vfio_pci: Allow regions to add own capabilities
[linux-2.6-block.git] / drivers / vfio / pci / vfio_pci.c
CommitLineData
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1/*
2 * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
3 * Author: Alex Williamson <alex.williamson@redhat.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * Derived from original vfio:
10 * Copyright 2010 Cisco Systems, Inc. All rights reserved.
11 * Author: Tom Lyon, pugs@cisco.com
12 */
13
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14#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15
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16#include <linux/device.h>
17#include <linux/eventfd.h>
8b27ee60 18#include <linux/file.h>
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19#include <linux/interrupt.h>
20#include <linux/iommu.h>
21#include <linux/module.h>
22#include <linux/mutex.h>
23#include <linux/notifier.h>
24#include <linux/pci.h>
25#include <linux/pm_runtime.h>
26#include <linux/slab.h>
27#include <linux/types.h>
28#include <linux/uaccess.h>
29#include <linux/vfio.h>
ecaa1f6a 30#include <linux/vgaarb.h>
0e714d27 31#include <linux/nospec.h>
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32
33#include "vfio_pci_private.h"
34
35#define DRIVER_VERSION "0.2"
36#define DRIVER_AUTHOR "Alex Williamson <alex.williamson@redhat.com>"
37#define DRIVER_DESC "VFIO PCI - User Level meta-driver"
38
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39static char ids[1024] __initdata;
40module_param_string(ids, ids, sizeof(ids), 0);
41MODULE_PARM_DESC(ids, "Initial PCI IDs to add to the vfio driver, format is \"vendor:device[:subvendor[:subdevice[:class[:class_mask]]]]\" and multiple comma separated entries can be specified");
42
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43static bool nointxmask;
44module_param_named(nointxmask, nointxmask, bool, S_IRUGO | S_IWUSR);
45MODULE_PARM_DESC(nointxmask,
46 "Disable support for PCI 2.3 style INTx masking. If this resolves problems for specific devices, report lspci -vvvxxx to linux-pci@vger.kernel.org so the device can be fixed automatically via the broken_intx_masking flag.");
47
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48#ifdef CONFIG_VFIO_PCI_VGA
49static bool disable_vga;
50module_param(disable_vga, bool, S_IRUGO);
51MODULE_PARM_DESC(disable_vga, "Disable VGA resource access through vfio-pci");
52#endif
53
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54static bool disable_idle_d3;
55module_param(disable_idle_d3, bool, S_IRUGO | S_IWUSR);
56MODULE_PARM_DESC(disable_idle_d3,
57 "Disable using the PCI D3 low power state for idle, unused devices");
58
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59static DEFINE_MUTEX(driver_lock);
60
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61static inline bool vfio_vga_disabled(void)
62{
63#ifdef CONFIG_VFIO_PCI_VGA
64 return disable_vga;
65#else
66 return true;
67#endif
68}
69
ecaa1f6a
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70/*
71 * Our VGA arbiter participation is limited since we don't know anything
72 * about the device itself. However, if the device is the only VGA device
73 * downstream of a bridge and VFIO VGA support is disabled, then we can
74 * safely return legacy VGA IO and memory as not decoded since the user
75 * has no way to get to it and routing can be disabled externally at the
76 * bridge.
77 */
78static unsigned int vfio_pci_set_vga_decode(void *opaque, bool single_vga)
79{
80 struct vfio_pci_device *vdev = opaque;
81 struct pci_dev *tmp = NULL, *pdev = vdev->pdev;
82 unsigned char max_busnr;
83 unsigned int decodes;
84
85 if (single_vga || !vfio_vga_disabled() || pci_is_root_bus(pdev->bus))
86 return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
87 VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
88
89 max_busnr = pci_bus_max_busnr(pdev->bus);
90 decodes = VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
91
92 while ((tmp = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, tmp)) != NULL) {
93 if (tmp == pdev ||
94 pci_domain_nr(tmp->bus) != pci_domain_nr(pdev->bus) ||
95 pci_is_root_bus(tmp->bus))
96 continue;
97
98 if (tmp->bus->number >= pdev->bus->number &&
99 tmp->bus->number <= max_busnr) {
100 pci_dev_put(tmp);
101 decodes |= VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
102 break;
103 }
104 }
105
106 return decodes;
107}
108
109static inline bool vfio_pci_is_vga(struct pci_dev *pdev)
110{
111 return (pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA;
112}
113
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114static void vfio_pci_probe_mmaps(struct vfio_pci_device *vdev)
115{
116 struct resource *res;
117 int bar;
118 struct vfio_pci_dummy_resource *dummy_res;
119
120 INIT_LIST_HEAD(&vdev->dummy_resources_list);
121
122 for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) {
123 res = vdev->pdev->resource + bar;
124
125 if (!IS_ENABLED(CONFIG_VFIO_PCI_MMAP))
126 goto no_mmap;
127
128 if (!(res->flags & IORESOURCE_MEM))
129 goto no_mmap;
130
131 /*
132 * The PCI core shouldn't set up a resource with a
133 * type but zero size. But there may be bugs that
134 * cause us to do that.
135 */
136 if (!resource_size(res))
137 goto no_mmap;
138
139 if (resource_size(res) >= PAGE_SIZE) {
140 vdev->bar_mmap_supported[bar] = true;
141 continue;
142 }
143
144 if (!(res->start & ~PAGE_MASK)) {
145 /*
146 * Add a dummy resource to reserve the remainder
147 * of the exclusive page in case that hot-add
148 * device's bar is assigned into it.
149 */
150 dummy_res = kzalloc(sizeof(*dummy_res), GFP_KERNEL);
151 if (dummy_res == NULL)
152 goto no_mmap;
153
154 dummy_res->resource.name = "vfio sub-page reserved";
155 dummy_res->resource.start = res->end + 1;
156 dummy_res->resource.end = res->start + PAGE_SIZE - 1;
157 dummy_res->resource.flags = res->flags;
158 if (request_resource(res->parent,
159 &dummy_res->resource)) {
160 kfree(dummy_res);
161 goto no_mmap;
162 }
163 dummy_res->index = bar;
164 list_add(&dummy_res->res_next,
165 &vdev->dummy_resources_list);
166 vdev->bar_mmap_supported[bar] = true;
167 continue;
168 }
169 /*
170 * Here we don't handle the case when the BAR is not page
171 * aligned because we can't expect the BAR will be
172 * assigned into the same location in a page in guest
173 * when we passthrough the BAR. And it's hard to access
174 * this BAR in userspace because we have no way to get
175 * the BAR's location in a page.
176 */
177no_mmap:
178 vdev->bar_mmap_supported[bar] = false;
179 }
180}
181
bc4fba77 182static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev);
f572a960 183static void vfio_pci_disable(struct vfio_pci_device *vdev);
bc4fba77 184
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185/*
186 * INTx masking requires the ability to disable INTx signaling via PCI_COMMAND
187 * _and_ the ability detect when the device is asserting INTx via PCI_STATUS.
188 * If a device implements the former but not the latter we would typically
189 * expect broken_intx_masking be set and require an exclusive interrupt.
190 * However since we do have control of the device's ability to assert INTx,
191 * we can instead pretend that the device does not implement INTx, virtualizing
192 * the pin register to report zero and maintaining DisINTx set on the host.
193 */
194static bool vfio_pci_nointx(struct pci_dev *pdev)
195{
196 switch (pdev->vendor) {
197 case PCI_VENDOR_ID_INTEL:
198 switch (pdev->device) {
7d57e5e9 199 /* All i40e (XL710/X710/XXV710) 10/20/25/40GbE NICs */
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200 case 0x1572:
201 case 0x1574:
202 case 0x1580 ... 0x1581:
7d57e5e9 203 case 0x1583 ... 0x158b:
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204 case 0x37d0 ... 0x37d2:
205 return true;
206 default:
207 return false;
208 }
209 }
210
211 return false;
212}
213
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214static int vfio_pci_enable(struct vfio_pci_device *vdev)
215{
216 struct pci_dev *pdev = vdev->pdev;
217 int ret;
218 u16 cmd;
219 u8 msix_pos;
220
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221 pci_set_power_state(pdev, PCI_D0);
222
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223 /* Don't allow our initial saved state to include busmaster */
224 pci_clear_master(pdev);
225
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226 ret = pci_enable_device(pdev);
227 if (ret)
228 return ret;
229
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230 /* If reset fails because of the device lock, fail this path entirely */
231 ret = pci_try_reset_function(pdev);
232 if (ret == -EAGAIN) {
233 pci_disable_device(pdev);
234 return ret;
235 }
236
237 vdev->reset_works = !ret;
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238 pci_save_state(pdev);
239 vdev->pci_saved_state = pci_store_saved_state(pdev);
240 if (!vdev->pci_saved_state)
241 pr_debug("%s: Couldn't store %s saved state\n",
242 __func__, dev_name(&pdev->dev));
243
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244 if (likely(!nointxmask)) {
245 if (vfio_pci_nointx(pdev)) {
246 dev_info(&pdev->dev, "Masking broken INTx support\n");
247 vdev->nointx = true;
248 pci_intx(pdev, 0);
249 } else
250 vdev->pci_2_3 = pci_intx_mask_supported(pdev);
9a92c509 251 }
89e1f7d4 252
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253 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
254 if (vdev->pci_2_3 && (cmd & PCI_COMMAND_INTX_DISABLE)) {
255 cmd &= ~PCI_COMMAND_INTX_DISABLE;
256 pci_write_config_word(pdev, PCI_COMMAND, cmd);
257 }
258
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259 ret = vfio_config_init(vdev);
260 if (ret) {
261 kfree(vdev->pci_saved_state);
262 vdev->pci_saved_state = NULL;
263 pci_disable_device(pdev);
264 return ret;
265 }
266
a9047f24 267 msix_pos = pdev->msix_cap;
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268 if (msix_pos) {
269 u16 flags;
270 u32 table;
271
272 pci_read_config_word(pdev, msix_pos + PCI_MSIX_FLAGS, &flags);
273 pci_read_config_dword(pdev, msix_pos + PCI_MSIX_TABLE, &table);
274
508d1aa6
BH
275 vdev->msix_bar = table & PCI_MSIX_TABLE_BIR;
276 vdev->msix_offset = table & PCI_MSIX_TABLE_OFFSET;
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277 vdev->msix_size = ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) * 16;
278 } else
279 vdev->msix_bar = 0xFF;
280
ecaa1f6a 281 if (!vfio_vga_disabled() && vfio_pci_is_vga(pdev))
84237a82 282 vdev->has_vga = true;
84237a82 283
5846ff54 284
f572a960
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285 if (vfio_pci_is_vga(pdev) &&
286 pdev->vendor == PCI_VENDOR_ID_INTEL &&
287 IS_ENABLED(CONFIG_VFIO_PCI_IGD)) {
288 ret = vfio_pci_igd_init(vdev);
289 if (ret) {
290 dev_warn(&vdev->pdev->dev,
291 "Failed to setup Intel IGD regions\n");
292 vfio_pci_disable(vdev);
293 return ret;
294 }
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295 }
296
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297 vfio_pci_probe_mmaps(vdev);
298
9a92c509 299 return 0;
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300}
301
302static void vfio_pci_disable(struct vfio_pci_device *vdev)
303{
2007722a 304 struct pci_dev *pdev = vdev->pdev;
05f0c03f 305 struct vfio_pci_dummy_resource *dummy_res, *tmp;
30656177 306 struct vfio_pci_ioeventfd *ioeventfd, *ioeventfd_tmp;
28541d41 307 int i, bar;
89e1f7d4 308
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309 /* Stop the device from further DMA */
310 pci_clear_master(pdev);
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311
312 vfio_pci_set_irqs_ioctl(vdev, VFIO_IRQ_SET_DATA_NONE |
313 VFIO_IRQ_SET_ACTION_TRIGGER,
314 vdev->irq_type, 0, 0, NULL);
315
30656177
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316 /* Device closed, don't need mutex here */
317 list_for_each_entry_safe(ioeventfd, ioeventfd_tmp,
318 &vdev->ioeventfds_list, next) {
319 vfio_virqfd_disable(&ioeventfd->virqfd);
320 list_del(&ioeventfd->next);
321 kfree(ioeventfd);
322 }
323 vdev->ioeventfds_nr = 0;
324
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325 vdev->virq_disabled = false;
326
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327 for (i = 0; i < vdev->num_regions; i++)
328 vdev->region[i].ops->release(vdev, &vdev->region[i]);
329
330 vdev->num_regions = 0;
331 kfree(vdev->region);
332 vdev->region = NULL; /* don't krealloc a freed pointer */
333
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334 vfio_config_free(vdev);
335
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336 for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) {
337 if (!vdev->barmap[bar])
338 continue;
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339 pci_iounmap(pdev, vdev->barmap[bar]);
340 pci_release_selected_regions(pdev, 1 << bar);
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341 vdev->barmap[bar] = NULL;
342 }
2007722a 343
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YX
344 list_for_each_entry_safe(dummy_res, tmp,
345 &vdev->dummy_resources_list, res_next) {
346 list_del(&dummy_res->res_next);
347 release_resource(&dummy_res->resource);
348 kfree(dummy_res);
349 }
350
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351 vdev->needs_reset = true;
352
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353 /*
354 * If we have saved state, restore it. If we can reset the device,
355 * even better. Resetting with current state seems better than
356 * nothing, but saving and restoring current state without reset
357 * is just busy work.
358 */
359 if (pci_load_and_free_saved_state(pdev, &vdev->pci_saved_state)) {
360 pr_info("%s: Couldn't reload %s saved state\n",
361 __func__, dev_name(&pdev->dev));
362
363 if (!vdev->reset_works)
9c22e660 364 goto out;
2007722a
AW
365
366 pci_save_state(pdev);
367 }
368
369 /*
370 * Disable INTx and MSI, presumably to avoid spurious interrupts
371 * during reset. Stolen from pci_reset_function()
372 */
373 pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
374
d24cdbfd 375 /*
890ed578
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376 * Try to reset the device. The success of this is dependent on
377 * being able to lock the device, which is not always possible.
d24cdbfd 378 */
561d72dd
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379 if (vdev->reset_works && !pci_try_reset_function(pdev))
380 vdev->needs_reset = false;
2007722a
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381
382 pci_restore_state(pdev);
9c22e660
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383out:
384 pci_disable_device(pdev);
bc4fba77
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385
386 vfio_pci_try_bus_reset(vdev);
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387
388 if (!disable_idle_d3)
389 pci_set_power_state(pdev, PCI_D3hot);
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390}
391
392static void vfio_pci_release(void *device_data)
393{
394 struct vfio_pci_device *vdev = device_data;
395
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396 mutex_lock(&driver_lock);
397
398 if (!(--vdev->refcnt)) {
1b69be5e 399 vfio_spapr_pci_eeh_release(vdev->pdev);
89e1f7d4 400 vfio_pci_disable(vdev);
1b69be5e 401 }
89e1f7d4 402
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403 mutex_unlock(&driver_lock);
404
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405 module_put(THIS_MODULE);
406}
407
408static int vfio_pci_open(void *device_data)
409{
410 struct vfio_pci_device *vdev = device_data;
61d79256 411 int ret = 0;
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412
413 if (!try_module_get(THIS_MODULE))
414 return -ENODEV;
415
61d79256
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416 mutex_lock(&driver_lock);
417
418 if (!vdev->refcnt) {
1b69be5e
GS
419 ret = vfio_pci_enable(vdev);
420 if (ret)
421 goto error;
422
9b936c96 423 vfio_spapr_pci_eeh_open(vdev->pdev);
89e1f7d4 424 }
61d79256 425 vdev->refcnt++;
1b69be5e 426error:
61d79256
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427 mutex_unlock(&driver_lock);
428 if (ret)
429 module_put(THIS_MODULE);
1b69be5e 430 return ret;
89e1f7d4
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431}
432
433static int vfio_pci_get_irq_count(struct vfio_pci_device *vdev, int irq_type)
434{
435 if (irq_type == VFIO_PCI_INTX_IRQ_INDEX) {
436 u8 pin;
db04264f
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437
438 if (!IS_ENABLED(CONFIG_VFIO_PCI_INTX) ||
439 vdev->nointx || vdev->pdev->is_virtfn)
440 return 0;
441
89e1f7d4 442 pci_read_config_byte(vdev->pdev, PCI_INTERRUPT_PIN, &pin);
89e1f7d4 443
db04264f 444 return pin ? 1 : 0;
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445 } else if (irq_type == VFIO_PCI_MSI_IRQ_INDEX) {
446 u8 pos;
447 u16 flags;
448
a9047f24 449 pos = vdev->pdev->msi_cap;
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450 if (pos) {
451 pci_read_config_word(vdev->pdev,
452 pos + PCI_MSI_FLAGS, &flags);
fd49c81f 453 return 1 << ((flags & PCI_MSI_FLAGS_QMASK) >> 1);
89e1f7d4
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454 }
455 } else if (irq_type == VFIO_PCI_MSIX_IRQ_INDEX) {
456 u8 pos;
457 u16 flags;
458
a9047f24 459 pos = vdev->pdev->msix_cap;
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AW
460 if (pos) {
461 pci_read_config_word(vdev->pdev,
462 pos + PCI_MSIX_FLAGS, &flags);
463
464 return (flags & PCI_MSIX_FLAGS_QSIZE) + 1;
465 }
6140a8f5 466 } else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX) {
dad9f897
VMP
467 if (pci_is_pcie(vdev->pdev))
468 return 1;
6140a8f5
AW
469 } else if (irq_type == VFIO_PCI_REQ_IRQ_INDEX) {
470 return 1;
471 }
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472
473 return 0;
474}
475
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476static int vfio_pci_count_devs(struct pci_dev *pdev, void *data)
477{
478 (*(int *)data)++;
479 return 0;
480}
481
482struct vfio_pci_fill_info {
483 int max;
484 int cur;
485 struct vfio_pci_dependent_device *devices;
486};
487
488static int vfio_pci_fill_devs(struct pci_dev *pdev, void *data)
489{
490 struct vfio_pci_fill_info *fill = data;
491 struct iommu_group *iommu_group;
492
493 if (fill->cur == fill->max)
494 return -EAGAIN; /* Something changed, try again */
495
496 iommu_group = iommu_group_get(&pdev->dev);
497 if (!iommu_group)
498 return -EPERM; /* Cannot reset non-isolated devices */
499
500 fill->devices[fill->cur].group_id = iommu_group_id(iommu_group);
501 fill->devices[fill->cur].segment = pci_domain_nr(pdev->bus);
502 fill->devices[fill->cur].bus = pdev->bus->number;
503 fill->devices[fill->cur].devfn = pdev->devfn;
504 fill->cur++;
505 iommu_group_put(iommu_group);
506 return 0;
507}
508
509struct vfio_pci_group_entry {
510 struct vfio_group *group;
511 int id;
512};
513
514struct vfio_pci_group_info {
515 int count;
516 struct vfio_pci_group_entry *groups;
517};
518
519static int vfio_pci_validate_devs(struct pci_dev *pdev, void *data)
520{
521 struct vfio_pci_group_info *info = data;
522 struct iommu_group *group;
523 int id, i;
524
525 group = iommu_group_get(&pdev->dev);
526 if (!group)
527 return -EPERM;
528
529 id = iommu_group_id(group);
530
531 for (i = 0; i < info->count; i++)
532 if (info->groups[i].id == id)
533 break;
534
535 iommu_group_put(group);
536
537 return (i == info->count) ? -EINVAL : 0;
538}
539
540static bool vfio_pci_dev_below_slot(struct pci_dev *pdev, struct pci_slot *slot)
541{
542 for (; pdev; pdev = pdev->bus->self)
543 if (pdev->bus == slot->bus)
544 return (pdev->slot == slot);
545 return false;
546}
547
548struct vfio_pci_walk_info {
549 int (*fn)(struct pci_dev *, void *data);
550 void *data;
551 struct pci_dev *pdev;
552 bool slot;
553 int ret;
554};
555
556static int vfio_pci_walk_wrapper(struct pci_dev *pdev, void *data)
557{
558 struct vfio_pci_walk_info *walk = data;
559
560 if (!walk->slot || vfio_pci_dev_below_slot(pdev, walk->pdev->slot))
561 walk->ret = walk->fn(pdev, walk->data);
562
563 return walk->ret;
564}
565
566static int vfio_pci_for_each_slot_or_bus(struct pci_dev *pdev,
567 int (*fn)(struct pci_dev *,
568 void *data), void *data,
569 bool slot)
570{
571 struct vfio_pci_walk_info walk = {
572 .fn = fn, .data = data, .pdev = pdev, .slot = slot, .ret = 0,
573 };
574
575 pci_walk_bus(pdev->bus, vfio_pci_walk_wrapper, &walk);
576
577 return walk.ret;
578}
579
a32295c6
AK
580static int msix_mmappable_cap(struct vfio_pci_device *vdev,
581 struct vfio_info_cap *caps)
188ad9d6 582{
a32295c6
AK
583 struct vfio_info_cap_header header = {
584 .id = VFIO_REGION_INFO_CAP_MSIX_MAPPABLE,
585 .version = 1
586 };
28541d41 587
a32295c6 588 return vfio_info_add_capability(caps, &header, sizeof(header));
28541d41
AW
589}
590
591int vfio_pci_register_dev_region(struct vfio_pci_device *vdev,
592 unsigned int type, unsigned int subtype,
593 const struct vfio_pci_regops *ops,
594 size_t size, u32 flags, void *data)
595{
596 struct vfio_pci_region *region;
597
598 region = krealloc(vdev->region,
599 (vdev->num_regions + 1) * sizeof(*region),
600 GFP_KERNEL);
601 if (!region)
602 return -ENOMEM;
603
604 vdev->region = region;
605 vdev->region[vdev->num_regions].type = type;
606 vdev->region[vdev->num_regions].subtype = subtype;
607 vdev->region[vdev->num_regions].ops = ops;
608 vdev->region[vdev->num_regions].size = size;
609 vdev->region[vdev->num_regions].flags = flags;
610 vdev->region[vdev->num_regions].data = data;
611
612 vdev->num_regions++;
613
614 return 0;
615}
616
89e1f7d4
AW
617static long vfio_pci_ioctl(void *device_data,
618 unsigned int cmd, unsigned long arg)
619{
620 struct vfio_pci_device *vdev = device_data;
621 unsigned long minsz;
622
623 if (cmd == VFIO_DEVICE_GET_INFO) {
624 struct vfio_device_info info;
625
626 minsz = offsetofend(struct vfio_device_info, num_irqs);
627
628 if (copy_from_user(&info, (void __user *)arg, minsz))
629 return -EFAULT;
630
631 if (info.argsz < minsz)
632 return -EINVAL;
633
634 info.flags = VFIO_DEVICE_FLAGS_PCI;
635
636 if (vdev->reset_works)
637 info.flags |= VFIO_DEVICE_FLAGS_RESET;
638
28541d41 639 info.num_regions = VFIO_PCI_NUM_REGIONS + vdev->num_regions;
89e1f7d4
AW
640 info.num_irqs = VFIO_PCI_NUM_IRQS;
641
8160c4e4
MT
642 return copy_to_user((void __user *)arg, &info, minsz) ?
643 -EFAULT : 0;
89e1f7d4
AW
644
645 } else if (cmd == VFIO_DEVICE_GET_REGION_INFO) {
646 struct pci_dev *pdev = vdev->pdev;
647 struct vfio_region_info info;
188ad9d6 648 struct vfio_info_cap caps = { .buf = NULL, .size = 0 };
28541d41 649 int i, ret;
89e1f7d4
AW
650
651 minsz = offsetofend(struct vfio_region_info, offset);
652
653 if (copy_from_user(&info, (void __user *)arg, minsz))
654 return -EFAULT;
655
656 if (info.argsz < minsz)
657 return -EINVAL;
658
659 switch (info.index) {
660 case VFIO_PCI_CONFIG_REGION_INDEX:
661 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
662 info.size = pdev->cfg_size;
663 info.flags = VFIO_REGION_INFO_FLAG_READ |
664 VFIO_REGION_INFO_FLAG_WRITE;
665 break;
666 case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
667 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
668 info.size = pci_resource_len(pdev, info.index);
669 if (!info.size) {
670 info.flags = 0;
671 break;
672 }
673
674 info.flags = VFIO_REGION_INFO_FLAG_READ |
675 VFIO_REGION_INFO_FLAG_WRITE;
05f0c03f 676 if (vdev->bar_mmap_supported[info.index]) {
89e1f7d4 677 info.flags |= VFIO_REGION_INFO_FLAG_MMAP;
188ad9d6 678 if (info.index == vdev->msix_bar) {
a32295c6 679 ret = msix_mmappable_cap(vdev, &caps);
188ad9d6
AW
680 if (ret)
681 return ret;
682 }
683 }
684
89e1f7d4
AW
685 break;
686 case VFIO_PCI_ROM_REGION_INDEX:
687 {
688 void __iomem *io;
689 size_t size;
690
691 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
692 info.flags = 0;
693
694 /* Report the BAR size, not the ROM size */
695 info.size = pci_resource_len(pdev, info.index);
a13b6459
AW
696 if (!info.size) {
697 /* Shadow ROMs appear as PCI option ROMs */
698 if (pdev->resource[PCI_ROM_RESOURCE].flags &
699 IORESOURCE_ROM_SHADOW)
700 info.size = 0x20000;
701 else
702 break;
703 }
89e1f7d4
AW
704
705 /* Is it really there? */
706 io = pci_map_rom(pdev, &size);
707 if (!io || !size) {
708 info.size = 0;
709 break;
710 }
711 pci_unmap_rom(pdev, io);
712
713 info.flags = VFIO_REGION_INFO_FLAG_READ;
714 break;
715 }
84237a82
AW
716 case VFIO_PCI_VGA_REGION_INDEX:
717 if (!vdev->has_vga)
718 return -EINVAL;
719
720 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
721 info.size = 0xc0000;
722 info.flags = VFIO_REGION_INFO_FLAG_READ |
723 VFIO_REGION_INFO_FLAG_WRITE;
724
725 break;
89e1f7d4 726 default:
c535d345 727 {
dda01f78
AW
728 struct vfio_region_info_cap_type cap_type = {
729 .header.id = VFIO_REGION_INFO_CAP_TYPE,
730 .header.version = 1 };
c535d345 731
28541d41
AW
732 if (info.index >=
733 VFIO_PCI_NUM_REGIONS + vdev->num_regions)
734 return -EINVAL;
0e714d27
GS
735 info.index = array_index_nospec(info.index,
736 VFIO_PCI_NUM_REGIONS +
737 vdev->num_regions);
28541d41
AW
738
739 i = info.index - VFIO_PCI_NUM_REGIONS;
740
741 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
742 info.size = vdev->region[i].size;
743 info.flags = vdev->region[i].flags;
744
c535d345
KW
745 cap_type.type = vdev->region[i].type;
746 cap_type.subtype = vdev->region[i].subtype;
747
dda01f78
AW
748 ret = vfio_info_add_capability(&caps, &cap_type.header,
749 sizeof(cap_type));
28541d41
AW
750 if (ret)
751 return ret;
c535d345 752
c2c0f1cd
AK
753 if (vdev->region[i].ops->add_capability) {
754 ret = vdev->region[i].ops->add_capability(vdev,
755 &vdev->region[i], &caps);
756 if (ret)
757 return ret;
758 }
c535d345 759 }
89e1f7d4
AW
760 }
761
188ad9d6
AW
762 if (caps.size) {
763 info.flags |= VFIO_REGION_INFO_FLAG_CAPS;
764 if (info.argsz < sizeof(info) + caps.size) {
765 info.argsz = sizeof(info) + caps.size;
766 info.cap_offset = 0;
767 } else {
768 vfio_info_cap_shift(&caps, sizeof(info));
c4aec310
DC
769 if (copy_to_user((void __user *)arg +
770 sizeof(info), caps.buf,
771 caps.size)) {
188ad9d6 772 kfree(caps.buf);
c4aec310 773 return -EFAULT;
188ad9d6
AW
774 }
775 info.cap_offset = sizeof(info);
776 }
777
778 kfree(caps.buf);
89e1f7d4
AW
779 }
780
8160c4e4
MT
781 return copy_to_user((void __user *)arg, &info, minsz) ?
782 -EFAULT : 0;
89e1f7d4
AW
783
784 } else if (cmd == VFIO_DEVICE_GET_IRQ_INFO) {
785 struct vfio_irq_info info;
786
787 minsz = offsetofend(struct vfio_irq_info, count);
788
789 if (copy_from_user(&info, (void __user *)arg, minsz))
790 return -EFAULT;
791
792 if (info.argsz < minsz || info.index >= VFIO_PCI_NUM_IRQS)
793 return -EINVAL;
794
dad9f897
VMP
795 switch (info.index) {
796 case VFIO_PCI_INTX_IRQ_INDEX ... VFIO_PCI_MSIX_IRQ_INDEX:
6140a8f5 797 case VFIO_PCI_REQ_IRQ_INDEX:
dad9f897
VMP
798 break;
799 case VFIO_PCI_ERR_IRQ_INDEX:
800 if (pci_is_pcie(vdev->pdev))
801 break;
544c05a6 802 /* fall through */
dad9f897
VMP
803 default:
804 return -EINVAL;
805 }
806
89e1f7d4
AW
807 info.flags = VFIO_IRQ_INFO_EVENTFD;
808
809 info.count = vfio_pci_get_irq_count(vdev, info.index);
810
811 if (info.index == VFIO_PCI_INTX_IRQ_INDEX)
812 info.flags |= (VFIO_IRQ_INFO_MASKABLE |
813 VFIO_IRQ_INFO_AUTOMASKED);
814 else
815 info.flags |= VFIO_IRQ_INFO_NORESIZE;
816
8160c4e4
MT
817 return copy_to_user((void __user *)arg, &info, minsz) ?
818 -EFAULT : 0;
89e1f7d4
AW
819
820 } else if (cmd == VFIO_DEVICE_SET_IRQS) {
821 struct vfio_irq_set hdr;
822 u8 *data = NULL;
05692d70 823 int max, ret = 0;
ef198aaa 824 size_t data_size = 0;
89e1f7d4
AW
825
826 minsz = offsetofend(struct vfio_irq_set, count);
827
828 if (copy_from_user(&hdr, (void __user *)arg, minsz))
829 return -EFAULT;
830
05692d70 831 max = vfio_pci_get_irq_count(vdev, hdr.index);
89e1f7d4 832
ef198aaa
KW
833 ret = vfio_set_irqs_validate_and_prepare(&hdr, max,
834 VFIO_PCI_NUM_IRQS, &data_size);
835 if (ret)
836 return ret;
89e1f7d4 837
ef198aaa 838 if (data_size) {
3a1f7041 839 data = memdup_user((void __user *)(arg + minsz),
ef198aaa 840 data_size);
3a1f7041
FW
841 if (IS_ERR(data))
842 return PTR_ERR(data);
89e1f7d4
AW
843 }
844
845 mutex_lock(&vdev->igate);
846
847 ret = vfio_pci_set_irqs_ioctl(vdev, hdr.flags, hdr.index,
848 hdr.start, hdr.count, data);
849
850 mutex_unlock(&vdev->igate);
851 kfree(data);
852
853 return ret;
854
8b27ee60 855 } else if (cmd == VFIO_DEVICE_RESET) {
89e1f7d4 856 return vdev->reset_works ?
890ed578 857 pci_try_reset_function(vdev->pdev) : -EINVAL;
89e1f7d4 858
8b27ee60
AW
859 } else if (cmd == VFIO_DEVICE_GET_PCI_HOT_RESET_INFO) {
860 struct vfio_pci_hot_reset_info hdr;
861 struct vfio_pci_fill_info fill = { 0 };
862 struct vfio_pci_dependent_device *devices = NULL;
863 bool slot = false;
864 int ret = 0;
865
866 minsz = offsetofend(struct vfio_pci_hot_reset_info, count);
867
868 if (copy_from_user(&hdr, (void __user *)arg, minsz))
869 return -EFAULT;
870
871 if (hdr.argsz < minsz)
872 return -EINVAL;
873
874 hdr.flags = 0;
875
876 /* Can we do a slot or bus reset or neither? */
877 if (!pci_probe_reset_slot(vdev->pdev->slot))
878 slot = true;
879 else if (pci_probe_reset_bus(vdev->pdev->bus))
880 return -ENODEV;
881
882 /* How many devices are affected? */
883 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
884 vfio_pci_count_devs,
885 &fill.max, slot);
886 if (ret)
887 return ret;
888
889 WARN_ON(!fill.max); /* Should always be at least one */
890
891 /*
892 * If there's enough space, fill it now, otherwise return
893 * -ENOSPC and the number of devices affected.
894 */
895 if (hdr.argsz < sizeof(hdr) + (fill.max * sizeof(*devices))) {
896 ret = -ENOSPC;
897 hdr.count = fill.max;
898 goto reset_info_exit;
899 }
900
901 devices = kcalloc(fill.max, sizeof(*devices), GFP_KERNEL);
902 if (!devices)
903 return -ENOMEM;
904
905 fill.devices = devices;
906
907 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
908 vfio_pci_fill_devs,
909 &fill, slot);
910
911 /*
912 * If a device was removed between counting and filling,
913 * we may come up short of fill.max. If a device was
914 * added, we'll have a return of -EAGAIN above.
915 */
916 if (!ret)
917 hdr.count = fill.cur;
918
919reset_info_exit:
920 if (copy_to_user((void __user *)arg, &hdr, minsz))
921 ret = -EFAULT;
922
923 if (!ret) {
924 if (copy_to_user((void __user *)(arg + minsz), devices,
925 hdr.count * sizeof(*devices)))
926 ret = -EFAULT;
927 }
928
929 kfree(devices);
930 return ret;
931
932 } else if (cmd == VFIO_DEVICE_PCI_HOT_RESET) {
933 struct vfio_pci_hot_reset hdr;
934 int32_t *group_fds;
935 struct vfio_pci_group_entry *groups;
936 struct vfio_pci_group_info info;
937 bool slot = false;
938 int i, count = 0, ret = 0;
939
940 minsz = offsetofend(struct vfio_pci_hot_reset, count);
941
942 if (copy_from_user(&hdr, (void __user *)arg, minsz))
943 return -EFAULT;
944
945 if (hdr.argsz < minsz || hdr.flags)
946 return -EINVAL;
947
948 /* Can we do a slot or bus reset or neither? */
949 if (!pci_probe_reset_slot(vdev->pdev->slot))
950 slot = true;
951 else if (pci_probe_reset_bus(vdev->pdev->bus))
952 return -ENODEV;
953
954 /*
955 * We can't let userspace give us an arbitrarily large
956 * buffer to copy, so verify how many we think there
957 * could be. Note groups can have multiple devices so
958 * one group per device is the max.
959 */
960 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
961 vfio_pci_count_devs,
962 &count, slot);
963 if (ret)
964 return ret;
965
966 /* Somewhere between 1 and count is OK */
967 if (!hdr.count || hdr.count > count)
968 return -EINVAL;
969
970 group_fds = kcalloc(hdr.count, sizeof(*group_fds), GFP_KERNEL);
971 groups = kcalloc(hdr.count, sizeof(*groups), GFP_KERNEL);
972 if (!group_fds || !groups) {
973 kfree(group_fds);
974 kfree(groups);
975 return -ENOMEM;
976 }
977
978 if (copy_from_user(group_fds, (void __user *)(arg + minsz),
979 hdr.count * sizeof(*group_fds))) {
980 kfree(group_fds);
981 kfree(groups);
982 return -EFAULT;
983 }
984
985 /*
986 * For each group_fd, get the group through the vfio external
987 * user interface and store the group and iommu ID. This
988 * ensures the group is held across the reset.
989 */
990 for (i = 0; i < hdr.count; i++) {
991 struct vfio_group *group;
992 struct fd f = fdget(group_fds[i]);
993 if (!f.file) {
994 ret = -EBADF;
995 break;
996 }
997
998 group = vfio_group_get_external_user(f.file);
999 fdput(f);
1000 if (IS_ERR(group)) {
1001 ret = PTR_ERR(group);
1002 break;
1003 }
1004
1005 groups[i].group = group;
1006 groups[i].id = vfio_external_user_iommu_id(group);
1007 }
1008
1009 kfree(group_fds);
1010
1011 /* release reference to groups on error */
1012 if (ret)
1013 goto hot_reset_release;
1014
1015 info.count = hdr.count;
1016 info.groups = groups;
1017
1018 /*
1019 * Test whether all the affected devices are contained
1020 * by the set of groups provided by the user.
1021 */
1022 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
1023 vfio_pci_validate_devs,
1024 &info, slot);
1025 if (!ret)
1026 /* User has access, do the reset */
c6a44ba9 1027 ret = pci_reset_bus(vdev->pdev);
8b27ee60
AW
1028
1029hot_reset_release:
1030 for (i--; i >= 0; i--)
1031 vfio_group_put_external_user(groups[i].group);
1032
1033 kfree(groups);
1034 return ret;
30656177
AW
1035 } else if (cmd == VFIO_DEVICE_IOEVENTFD) {
1036 struct vfio_device_ioeventfd ioeventfd;
1037 int count;
1038
1039 minsz = offsetofend(struct vfio_device_ioeventfd, fd);
1040
1041 if (copy_from_user(&ioeventfd, (void __user *)arg, minsz))
1042 return -EFAULT;
1043
1044 if (ioeventfd.argsz < minsz)
1045 return -EINVAL;
1046
1047 if (ioeventfd.flags & ~VFIO_DEVICE_IOEVENTFD_SIZE_MASK)
1048 return -EINVAL;
1049
1050 count = ioeventfd.flags & VFIO_DEVICE_IOEVENTFD_SIZE_MASK;
1051
1052 if (hweight8(count) != 1 || ioeventfd.fd < -1)
1053 return -EINVAL;
1054
1055 return vfio_pci_ioeventfd(vdev, ioeventfd.offset,
1056 ioeventfd.data, count, ioeventfd.fd);
8b27ee60
AW
1057 }
1058
89e1f7d4
AW
1059 return -ENOTTY;
1060}
1061
5b279a11
AW
1062static ssize_t vfio_pci_rw(void *device_data, char __user *buf,
1063 size_t count, loff_t *ppos, bool iswrite)
89e1f7d4
AW
1064{
1065 unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
1066 struct vfio_pci_device *vdev = device_data;
89e1f7d4 1067
28541d41 1068 if (index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions)
89e1f7d4
AW
1069 return -EINVAL;
1070
5b279a11
AW
1071 switch (index) {
1072 case VFIO_PCI_CONFIG_REGION_INDEX:
906ee99d
AW
1073 return vfio_pci_config_rw(vdev, buf, count, ppos, iswrite);
1074
5b279a11
AW
1075 case VFIO_PCI_ROM_REGION_INDEX:
1076 if (iswrite)
1077 return -EINVAL;
906ee99d 1078 return vfio_pci_bar_rw(vdev, buf, count, ppos, false);
89e1f7d4 1079
5b279a11 1080 case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
906ee99d 1081 return vfio_pci_bar_rw(vdev, buf, count, ppos, iswrite);
84237a82
AW
1082
1083 case VFIO_PCI_VGA_REGION_INDEX:
1084 return vfio_pci_vga_rw(vdev, buf, count, ppos, iswrite);
28541d41
AW
1085 default:
1086 index -= VFIO_PCI_NUM_REGIONS;
1087 return vdev->region[index].ops->rw(vdev, buf,
1088 count, ppos, iswrite);
5b279a11
AW
1089 }
1090
89e1f7d4
AW
1091 return -EINVAL;
1092}
1093
5b279a11
AW
1094static ssize_t vfio_pci_read(void *device_data, char __user *buf,
1095 size_t count, loff_t *ppos)
1096{
906ee99d
AW
1097 if (!count)
1098 return 0;
1099
5b279a11
AW
1100 return vfio_pci_rw(device_data, buf, count, ppos, false);
1101}
1102
89e1f7d4
AW
1103static ssize_t vfio_pci_write(void *device_data, const char __user *buf,
1104 size_t count, loff_t *ppos)
1105{
906ee99d
AW
1106 if (!count)
1107 return 0;
1108
1109 return vfio_pci_rw(device_data, (char __user *)buf, count, ppos, true);
89e1f7d4
AW
1110}
1111
1112static int vfio_pci_mmap(void *device_data, struct vm_area_struct *vma)
1113{
1114 struct vfio_pci_device *vdev = device_data;
1115 struct pci_dev *pdev = vdev->pdev;
1116 unsigned int index;
34002f54 1117 u64 phys_len, req_len, pgoff, req_start;
89e1f7d4
AW
1118 int ret;
1119
1120 index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT);
1121
1122 if (vma->vm_end < vma->vm_start)
1123 return -EINVAL;
1124 if ((vma->vm_flags & VM_SHARED) == 0)
1125 return -EINVAL;
a15b1883
AK
1126 if (index >= VFIO_PCI_NUM_REGIONS) {
1127 int regnum = index - VFIO_PCI_NUM_REGIONS;
1128 struct vfio_pci_region *region = vdev->region + regnum;
1129
1130 if (region && region->ops && region->ops->mmap &&
1131 (region->flags & VFIO_REGION_INFO_FLAG_MMAP))
1132 return region->ops->mmap(vdev, region, vma);
1133 return -EINVAL;
1134 }
89e1f7d4
AW
1135 if (index >= VFIO_PCI_ROM_REGION_INDEX)
1136 return -EINVAL;
05f0c03f 1137 if (!vdev->bar_mmap_supported[index])
89e1f7d4
AW
1138 return -EINVAL;
1139
05f0c03f 1140 phys_len = PAGE_ALIGN(pci_resource_len(pdev, index));
89e1f7d4
AW
1141 req_len = vma->vm_end - vma->vm_start;
1142 pgoff = vma->vm_pgoff &
1143 ((1U << (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT)) - 1);
1144 req_start = pgoff << PAGE_SHIFT;
1145
05f0c03f 1146 if (req_start + req_len > phys_len)
89e1f7d4
AW
1147 return -EINVAL;
1148
89e1f7d4
AW
1149 /*
1150 * Even though we don't make use of the barmap for the mmap,
1151 * we need to request the region and the barmap tracks that.
1152 */
1153 if (!vdev->barmap[index]) {
1154 ret = pci_request_selected_regions(pdev,
1155 1 << index, "vfio-pci");
1156 if (ret)
1157 return ret;
1158
1159 vdev->barmap[index] = pci_iomap(pdev, index, 0);
e19f32da
AY
1160 if (!vdev->barmap[index]) {
1161 pci_release_selected_regions(pdev, 1 << index);
1162 return -ENOMEM;
1163 }
89e1f7d4
AW
1164 }
1165
1166 vma->vm_private_data = vdev;
89e1f7d4 1167 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
34002f54 1168 vma->vm_pgoff = (pci_resource_start(pdev, index) >> PAGE_SHIFT) + pgoff;
89e1f7d4 1169
34002f54 1170 return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
89e1f7d4
AW
1171 req_len, vma->vm_page_prot);
1172}
1173
6140a8f5
AW
1174static void vfio_pci_request(void *device_data, unsigned int count)
1175{
1176 struct vfio_pci_device *vdev = device_data;
1177
1178 mutex_lock(&vdev->igate);
1179
1180 if (vdev->req_trigger) {
5f55d2ae
AW
1181 if (!(count % 10))
1182 dev_notice_ratelimited(&vdev->pdev->dev,
1183 "Relaying device request to user (#%u)\n",
1184 count);
6140a8f5 1185 eventfd_signal(vdev->req_trigger, 1);
5f55d2ae
AW
1186 } else if (count == 0) {
1187 dev_warn(&vdev->pdev->dev,
1188 "No device request channel registered, blocked until released by user\n");
6140a8f5
AW
1189 }
1190
1191 mutex_unlock(&vdev->igate);
1192}
1193
89e1f7d4
AW
1194static const struct vfio_device_ops vfio_pci_ops = {
1195 .name = "vfio-pci",
1196 .open = vfio_pci_open,
1197 .release = vfio_pci_release,
1198 .ioctl = vfio_pci_ioctl,
1199 .read = vfio_pci_read,
1200 .write = vfio_pci_write,
1201 .mmap = vfio_pci_mmap,
6140a8f5 1202 .request = vfio_pci_request,
89e1f7d4
AW
1203};
1204
1205static int vfio_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1206{
89e1f7d4
AW
1207 struct vfio_pci_device *vdev;
1208 struct iommu_group *group;
1209 int ret;
1210
7c2e211f 1211 if (pdev->hdr_type != PCI_HEADER_TYPE_NORMAL)
89e1f7d4
AW
1212 return -EINVAL;
1213
0dd0e297
AW
1214 /*
1215 * Prevent binding to PFs with VFs enabled, this too easily allows
1216 * userspace instance with VFs and PFs from the same device, which
1217 * cannot work. Disabling SR-IOV here would initiate removing the
1218 * VFs, which would unbind the driver, which is prone to blocking
1219 * if that VF is also in use by vfio-pci. Just reject these PFs
1220 * and let the user sort it out.
1221 */
1222 if (pci_num_vf(pdev)) {
1223 pci_warn(pdev, "Cannot bind to PF with SR-IOV enabled\n");
1224 return -EBUSY;
1225 }
1226
03a76b60 1227 group = vfio_iommu_group_get(&pdev->dev);
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AW
1228 if (!group)
1229 return -EINVAL;
1230
1231 vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
1232 if (!vdev) {
03a76b60 1233 vfio_iommu_group_put(group, &pdev->dev);
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AW
1234 return -ENOMEM;
1235 }
1236
1237 vdev->pdev = pdev;
1238 vdev->irq_type = VFIO_PCI_NUM_IRQS;
1239 mutex_init(&vdev->igate);
1240 spin_lock_init(&vdev->irqlock);
30656177
AW
1241 mutex_init(&vdev->ioeventfds_lock);
1242 INIT_LIST_HEAD(&vdev->ioeventfds_list);
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AW
1243
1244 ret = vfio_add_group_dev(&pdev->dev, &vfio_pci_ops, vdev);
1245 if (ret) {
03a76b60 1246 vfio_iommu_group_put(group, &pdev->dev);
89e1f7d4 1247 kfree(vdev);
5a0ff177 1248 return ret;
89e1f7d4
AW
1249 }
1250
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AW
1251 if (vfio_pci_is_vga(pdev)) {
1252 vga_client_register(pdev, vdev, NULL, vfio_pci_set_vga_decode);
1253 vga_set_legacy_decoding(pdev,
1254 vfio_pci_set_vga_decode(vdev, false));
1255 }
1256
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AW
1257 if (!disable_idle_d3) {
1258 /*
1259 * pci-core sets the device power state to an unknown value at
1260 * bootup and after being removed from a driver. The only
1261 * transition it allows from this unknown state is to D0, which
1262 * typically happens when a driver calls pci_enable_device().
1263 * We're not ready to enable the device yet, but we do want to
1264 * be able to get to D3. Therefore first do a D0 transition
1265 * before going to D3.
1266 */
1267 pci_set_power_state(pdev, PCI_D0);
1268 pci_set_power_state(pdev, PCI_D3hot);
1269 }
1270
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1271 return ret;
1272}
1273
1274static void vfio_pci_remove(struct pci_dev *pdev)
1275{
1276 struct vfio_pci_device *vdev;
1277
1278 vdev = vfio_del_group_dev(&pdev->dev);
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AW
1279 if (!vdev)
1280 return;
1281
03a76b60 1282 vfio_iommu_group_put(pdev->dev.iommu_group, &pdev->dev);
28541d41 1283 kfree(vdev->region);
30656177 1284 mutex_destroy(&vdev->ioeventfds_lock);
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AW
1285 kfree(vdev);
1286
1287 if (vfio_pci_is_vga(pdev)) {
1288 vga_client_register(pdev, NULL, NULL, NULL);
1289 vga_set_legacy_decoding(pdev,
1290 VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
1291 VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM);
61d79256 1292 }
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AW
1293
1294 if (!disable_idle_d3)
1295 pci_set_power_state(pdev, PCI_D0);
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AW
1296}
1297
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VMP
1298static pci_ers_result_t vfio_pci_aer_err_detected(struct pci_dev *pdev,
1299 pci_channel_state_t state)
1300{
1301 struct vfio_pci_device *vdev;
1302 struct vfio_device *device;
1303
1304 device = vfio_device_get_from_dev(&pdev->dev);
1305 if (device == NULL)
1306 return PCI_ERS_RESULT_DISCONNECT;
1307
1308 vdev = vfio_device_data(device);
1309 if (vdev == NULL) {
1310 vfio_device_put(device);
1311 return PCI_ERS_RESULT_DISCONNECT;
1312 }
1313
3be3a074
AW
1314 mutex_lock(&vdev->igate);
1315
dad9f897
VMP
1316 if (vdev->err_trigger)
1317 eventfd_signal(vdev->err_trigger, 1);
1318
3be3a074
AW
1319 mutex_unlock(&vdev->igate);
1320
dad9f897
VMP
1321 vfio_device_put(device);
1322
1323 return PCI_ERS_RESULT_CAN_RECOVER;
1324}
1325
7d10f4e0 1326static const struct pci_error_handlers vfio_err_handlers = {
dad9f897
VMP
1327 .error_detected = vfio_pci_aer_err_detected,
1328};
1329
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AW
1330static struct pci_driver vfio_pci_driver = {
1331 .name = "vfio-pci",
1332 .id_table = NULL, /* only dynamic ids */
1333 .probe = vfio_pci_probe,
1334 .remove = vfio_pci_remove,
dad9f897 1335 .err_handler = &vfio_err_handlers,
89e1f7d4
AW
1336};
1337
93899a67
AW
1338struct vfio_devices {
1339 struct vfio_device **devices;
1340 int cur_index;
1341 int max_index;
1342};
bc4fba77 1343
93899a67 1344static int vfio_pci_get_devs(struct pci_dev *pdev, void *data)
bc4fba77 1345{
93899a67 1346 struct vfio_devices *devs = data;
20f30017 1347 struct vfio_device *device;
bc4fba77 1348
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AW
1349 if (devs->cur_index == devs->max_index)
1350 return -ENOSPC;
bc4fba77 1351
20f30017
AW
1352 device = vfio_device_get_from_dev(&pdev->dev);
1353 if (!device)
93899a67 1354 return -EINVAL;
bc4fba77 1355
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AW
1356 if (pci_dev_driver(pdev) != &vfio_pci_driver) {
1357 vfio_device_put(device);
1358 return -EBUSY;
1359 }
1360
1361 devs->devices[devs->cur_index++] = device;
bc4fba77
AW
1362 return 0;
1363}
1364
1365/*
1366 * Attempt to do a bus/slot reset if there are devices affected by a reset for
1367 * this device that are needs_reset and all of the affected devices are unused
93899a67
AW
1368 * (!refcnt). Callers are required to hold driver_lock when calling this to
1369 * prevent device opens and concurrent bus reset attempts. We prevent device
1370 * unbinds by acquiring and holding a reference to the vfio_device.
1371 *
1372 * NB: vfio-core considers a group to be viable even if some devices are
1373 * bound to drivers like pci-stub or pcieport. Here we require all devices
1374 * to be bound to vfio_pci since that's the only way we can be sure they
1375 * stay put.
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1376 */
1377static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev)
1378{
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AW
1379 struct vfio_devices devs = { .cur_index = 0 };
1380 int i = 0, ret = -EINVAL;
bc4fba77 1381 bool needs_reset = false, slot = false;
93899a67 1382 struct vfio_pci_device *tmp;
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AW
1383
1384 if (!pci_probe_reset_slot(vdev->pdev->slot))
1385 slot = true;
1386 else if (pci_probe_reset_bus(vdev->pdev->bus))
1387 return;
1388
93899a67
AW
1389 if (vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_count_devs,
1390 &i, slot) || !i)
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AW
1391 return;
1392
93899a67
AW
1393 devs.max_index = i;
1394 devs.devices = kcalloc(i, sizeof(struct vfio_device *), GFP_KERNEL);
1395 if (!devs.devices)
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AW
1396 return;
1397
93899a67
AW
1398 if (vfio_pci_for_each_slot_or_bus(vdev->pdev,
1399 vfio_pci_get_devs, &devs, slot))
1400 goto put_devs;
1401
1402 for (i = 0; i < devs.cur_index; i++) {
1403 tmp = vfio_device_data(devs.devices[i]);
1404 if (tmp->needs_reset)
1405 needs_reset = true;
1406 if (tmp->refcnt)
1407 goto put_devs;
1408 }
1409
1410 if (needs_reset)
c6a44ba9 1411 ret = pci_reset_bus(vdev->pdev);
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AW
1412
1413put_devs:
1414 for (i = 0; i < devs.cur_index; i++) {
6eb70187
AW
1415 tmp = vfio_device_data(devs.devices[i]);
1416 if (!ret)
93899a67 1417 tmp->needs_reset = false;
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AW
1418
1419 if (!tmp->refcnt && !disable_idle_d3)
1420 pci_set_power_state(tmp->pdev, PCI_D3hot);
1421
93899a67
AW
1422 vfio_device_put(devs.devices[i]);
1423 }
1424
1425 kfree(devs.devices);
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AW
1426}
1427
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AW
1428static void __exit vfio_pci_cleanup(void)
1429{
1430 pci_unregister_driver(&vfio_pci_driver);
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AW
1431 vfio_pci_uninit_perm_bits();
1432}
1433
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AW
1434static void __init vfio_pci_fill_ids(void)
1435{
1436 char *p, *id;
1437 int rc;
1438
1439 /* no ids passed actually */
1440 if (ids[0] == '\0')
1441 return;
1442
1443 /* add ids specified in the module parameter */
1444 p = ids;
1445 while ((id = strsep(&p, ","))) {
1446 unsigned int vendor, device, subvendor = PCI_ANY_ID,
1447 subdevice = PCI_ANY_ID, class = 0, class_mask = 0;
1448 int fields;
1449
1450 if (!strlen(id))
1451 continue;
1452
1453 fields = sscanf(id, "%x:%x:%x:%x:%x:%x",
1454 &vendor, &device, &subvendor, &subdevice,
1455 &class, &class_mask);
1456
1457 if (fields < 2) {
1458 pr_warn("invalid id string \"%s\"\n", id);
1459 continue;
1460 }
1461
1462 rc = pci_add_dynid(&vfio_pci_driver, vendor, device,
1463 subvendor, subdevice, class, class_mask, 0);
1464 if (rc)
1465 pr_warn("failed to add dynamic id [%04hx:%04hx[%04hx:%04hx]] class %#08x/%08x (%d)\n",
1466 vendor, device, subvendor, subdevice,
1467 class, class_mask, rc);
1468 else
1469 pr_info("add [%04hx:%04hx[%04hx:%04hx]] class %#08x/%08x\n",
1470 vendor, device, subvendor, subdevice,
1471 class, class_mask);
1472 }
1473}
1474
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AW
1475static int __init vfio_pci_init(void)
1476{
1477 int ret;
1478
1479 /* Allocate shared config space permision data used by all devices */
1480 ret = vfio_pci_init_perm_bits();
1481 if (ret)
1482 return ret;
1483
89e1f7d4
AW
1484 /* Register and scan for devices */
1485 ret = pci_register_driver(&vfio_pci_driver);
1486 if (ret)
1487 goto out_driver;
1488
80c7e8cc
AW
1489 vfio_pci_fill_ids();
1490
89e1f7d4
AW
1491 return 0;
1492
89e1f7d4
AW
1493out_driver:
1494 vfio_pci_uninit_perm_bits();
1495 return ret;
1496}
1497
1498module_init(vfio_pci_init);
1499module_exit(vfio_pci_cleanup);
1500
1501MODULE_VERSION(DRIVER_VERSION);
1502MODULE_LICENSE("GPL v2");
1503MODULE_AUTHOR(DRIVER_AUTHOR);
1504MODULE_DESCRIPTION(DRIVER_DESC);