Linux 5.10-rc6
[linux-2.6-block.git] / drivers / vfio / pci / vfio_pci.c
CommitLineData
d2912cb1 1// SPDX-License-Identifier: GPL-2.0-only
89e1f7d4
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2/*
3 * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
4 * Author: Alex Williamson <alex.williamson@redhat.com>
5 *
89e1f7d4
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6 * Derived from original vfio:
7 * Copyright 2010 Cisco Systems, Inc. All rights reserved.
8 * Author: Tom Lyon, pugs@cisco.com
9 */
10
80c7e8cc
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11#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12
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13#include <linux/device.h>
14#include <linux/eventfd.h>
8b27ee60 15#include <linux/file.h>
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16#include <linux/interrupt.h>
17#include <linux/iommu.h>
18#include <linux/module.h>
19#include <linux/mutex.h>
20#include <linux/notifier.h>
21#include <linux/pci.h>
22#include <linux/pm_runtime.h>
23#include <linux/slab.h>
24#include <linux/types.h>
25#include <linux/uaccess.h>
26#include <linux/vfio.h>
ecaa1f6a 27#include <linux/vgaarb.h>
0e714d27 28#include <linux/nospec.h>
abafbc55 29#include <linux/sched/mm.h>
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30
31#include "vfio_pci_private.h"
32
33#define DRIVER_VERSION "0.2"
34#define DRIVER_AUTHOR "Alex Williamson <alex.williamson@redhat.com>"
35#define DRIVER_DESC "VFIO PCI - User Level meta-driver"
36
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37static char ids[1024] __initdata;
38module_param_string(ids, ids, sizeof(ids), 0);
39MODULE_PARM_DESC(ids, "Initial PCI IDs to add to the vfio driver, format is \"vendor:device[:subvendor[:subdevice[:class[:class_mask]]]]\" and multiple comma separated entries can be specified");
40
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41static bool nointxmask;
42module_param_named(nointxmask, nointxmask, bool, S_IRUGO | S_IWUSR);
43MODULE_PARM_DESC(nointxmask,
44 "Disable support for PCI 2.3 style INTx masking. If this resolves problems for specific devices, report lspci -vvvxxx to linux-pci@vger.kernel.org so the device can be fixed automatically via the broken_intx_masking flag.");
45
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46#ifdef CONFIG_VFIO_PCI_VGA
47static bool disable_vga;
48module_param(disable_vga, bool, S_IRUGO);
49MODULE_PARM_DESC(disable_vga, "Disable VGA resource access through vfio-pci");
50#endif
51
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52static bool disable_idle_d3;
53module_param(disable_idle_d3, bool, S_IRUGO | S_IWUSR);
54MODULE_PARM_DESC(disable_idle_d3,
55 "Disable using the PCI D3 low power state for idle, unused devices");
56
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57static bool enable_sriov;
58#ifdef CONFIG_PCI_IOV
59module_param(enable_sriov, bool, 0644);
60MODULE_PARM_DESC(enable_sriov, "Enable support for SR-IOV configuration. Enabling SR-IOV on a PF typically requires support of the userspace PF driver, enabling VFs without such support may result in non-functional VFs or PF.");
61#endif
62
1f97970e
GC
63static bool disable_denylist;
64module_param(disable_denylist, bool, 0444);
65MODULE_PARM_DESC(disable_denylist, "Disable use of device denylist. Disabling the denylist allows binding to devices with known errata that may lead to exploitable stability or security issues when accessed by untrusted users.");
66
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67static inline bool vfio_vga_disabled(void)
68{
69#ifdef CONFIG_VFIO_PCI_VGA
70 return disable_vga;
71#else
72 return true;
73#endif
74}
75
1f97970e
GC
76static bool vfio_pci_dev_in_denylist(struct pci_dev *pdev)
77{
50173329
GC
78 switch (pdev->vendor) {
79 case PCI_VENDOR_ID_INTEL:
80 switch (pdev->device) {
81 case PCI_DEVICE_ID_INTEL_QAT_C3XXX:
82 case PCI_DEVICE_ID_INTEL_QAT_C3XXX_VF:
83 case PCI_DEVICE_ID_INTEL_QAT_C62X:
84 case PCI_DEVICE_ID_INTEL_QAT_C62X_VF:
85 case PCI_DEVICE_ID_INTEL_QAT_DH895XCC:
86 case PCI_DEVICE_ID_INTEL_QAT_DH895XCC_VF:
87 return true;
88 default:
89 return false;
90 }
91 }
92
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GC
93 return false;
94}
95
96static bool vfio_pci_is_denylisted(struct pci_dev *pdev)
97{
98 if (!vfio_pci_dev_in_denylist(pdev))
99 return false;
100
101 if (disable_denylist) {
102 pci_warn(pdev,
103 "device denylist disabled - allowing device %04x:%04x.\n",
104 pdev->vendor, pdev->device);
105 return false;
106 }
107
108 pci_warn(pdev, "%04x:%04x exists in vfio-pci device denylist, driver probing disallowed.\n",
109 pdev->vendor, pdev->device);
110
111 return true;
112}
113
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114/*
115 * Our VGA arbiter participation is limited since we don't know anything
116 * about the device itself. However, if the device is the only VGA device
117 * downstream of a bridge and VFIO VGA support is disabled, then we can
118 * safely return legacy VGA IO and memory as not decoded since the user
119 * has no way to get to it and routing can be disabled externally at the
120 * bridge.
121 */
122static unsigned int vfio_pci_set_vga_decode(void *opaque, bool single_vga)
123{
124 struct vfio_pci_device *vdev = opaque;
125 struct pci_dev *tmp = NULL, *pdev = vdev->pdev;
126 unsigned char max_busnr;
127 unsigned int decodes;
128
129 if (single_vga || !vfio_vga_disabled() || pci_is_root_bus(pdev->bus))
130 return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
131 VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
132
133 max_busnr = pci_bus_max_busnr(pdev->bus);
134 decodes = VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
135
136 while ((tmp = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, tmp)) != NULL) {
137 if (tmp == pdev ||
138 pci_domain_nr(tmp->bus) != pci_domain_nr(pdev->bus) ||
139 pci_is_root_bus(tmp->bus))
140 continue;
141
142 if (tmp->bus->number >= pdev->bus->number &&
143 tmp->bus->number <= max_busnr) {
144 pci_dev_put(tmp);
145 decodes |= VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
146 break;
147 }
148 }
149
150 return decodes;
151}
152
153static inline bool vfio_pci_is_vga(struct pci_dev *pdev)
154{
155 return (pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA;
156}
157
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158static void vfio_pci_probe_mmaps(struct vfio_pci_device *vdev)
159{
160 struct resource *res;
c9c13ba4 161 int i;
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162 struct vfio_pci_dummy_resource *dummy_res;
163
164 INIT_LIST_HEAD(&vdev->dummy_resources_list);
165
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DE
166 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
167 int bar = i + PCI_STD_RESOURCES;
168
169 res = &vdev->pdev->resource[bar];
05f0c03f
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170
171 if (!IS_ENABLED(CONFIG_VFIO_PCI_MMAP))
172 goto no_mmap;
173
174 if (!(res->flags & IORESOURCE_MEM))
175 goto no_mmap;
176
177 /*
178 * The PCI core shouldn't set up a resource with a
179 * type but zero size. But there may be bugs that
180 * cause us to do that.
181 */
182 if (!resource_size(res))
183 goto no_mmap;
184
185 if (resource_size(res) >= PAGE_SIZE) {
186 vdev->bar_mmap_supported[bar] = true;
187 continue;
188 }
189
190 if (!(res->start & ~PAGE_MASK)) {
191 /*
192 * Add a dummy resource to reserve the remainder
193 * of the exclusive page in case that hot-add
194 * device's bar is assigned into it.
195 */
196 dummy_res = kzalloc(sizeof(*dummy_res), GFP_KERNEL);
197 if (dummy_res == NULL)
198 goto no_mmap;
199
200 dummy_res->resource.name = "vfio sub-page reserved";
201 dummy_res->resource.start = res->end + 1;
202 dummy_res->resource.end = res->start + PAGE_SIZE - 1;
203 dummy_res->resource.flags = res->flags;
204 if (request_resource(res->parent,
205 &dummy_res->resource)) {
206 kfree(dummy_res);
207 goto no_mmap;
208 }
209 dummy_res->index = bar;
210 list_add(&dummy_res->res_next,
211 &vdev->dummy_resources_list);
212 vdev->bar_mmap_supported[bar] = true;
213 continue;
214 }
215 /*
216 * Here we don't handle the case when the BAR is not page
217 * aligned because we can't expect the BAR will be
218 * assigned into the same location in a page in guest
219 * when we passthrough the BAR. And it's hard to access
220 * this BAR in userspace because we have no way to get
221 * the BAR's location in a page.
222 */
223no_mmap:
224 vdev->bar_mmap_supported[bar] = false;
225 }
226}
227
bc4fba77 228static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev);
f572a960 229static void vfio_pci_disable(struct vfio_pci_device *vdev);
abafbc55 230static int vfio_pci_try_zap_and_vma_lock_cb(struct pci_dev *pdev, void *data);
bc4fba77 231
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232/*
233 * INTx masking requires the ability to disable INTx signaling via PCI_COMMAND
234 * _and_ the ability detect when the device is asserting INTx via PCI_STATUS.
235 * If a device implements the former but not the latter we would typically
236 * expect broken_intx_masking be set and require an exclusive interrupt.
237 * However since we do have control of the device's ability to assert INTx,
238 * we can instead pretend that the device does not implement INTx, virtualizing
239 * the pin register to report zero and maintaining DisINTx set on the host.
240 */
241static bool vfio_pci_nointx(struct pci_dev *pdev)
242{
243 switch (pdev->vendor) {
244 case PCI_VENDOR_ID_INTEL:
245 switch (pdev->device) {
7d57e5e9 246 /* All i40e (XL710/X710/XXV710) 10/20/25/40GbE NICs */
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247 case 0x1572:
248 case 0x1574:
249 case 0x1580 ... 0x1581:
7d57e5e9 250 case 0x1583 ... 0x158b:
45074405 251 case 0x37d0 ... 0x37d2:
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252 /* X550 */
253 case 0x1563:
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254 return true;
255 default:
256 return false;
257 }
258 }
259
260 return false;
261}
262
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263static void vfio_pci_probe_power_state(struct vfio_pci_device *vdev)
264{
265 struct pci_dev *pdev = vdev->pdev;
266 u16 pmcsr;
267
268 if (!pdev->pm_cap)
269 return;
270
271 pci_read_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, &pmcsr);
272
273 vdev->needs_pm_restore = !(pmcsr & PCI_PM_CTRL_NO_SOFT_RESET);
274}
275
276/*
277 * pci_set_power_state() wrapper handling devices which perform a soft reset on
278 * D3->D0 transition. Save state prior to D0/1/2->D3, stash it on the vdev,
279 * restore when returned to D0. Saved separately from pci_saved_state for use
280 * by PM capability emulation and separately from pci_dev internal saved state
281 * to avoid it being overwritten and consumed around other resets.
282 */
283int vfio_pci_set_power_state(struct vfio_pci_device *vdev, pci_power_t state)
284{
285 struct pci_dev *pdev = vdev->pdev;
286 bool needs_restore = false, needs_save = false;
287 int ret;
288
289 if (vdev->needs_pm_restore) {
290 if (pdev->current_state < PCI_D3hot && state >= PCI_D3hot) {
291 pci_save_state(pdev);
292 needs_save = true;
293 }
294
295 if (pdev->current_state >= PCI_D3hot && state <= PCI_D0)
296 needs_restore = true;
297 }
298
299 ret = pci_set_power_state(pdev, state);
300
301 if (!ret) {
302 /* D3 might be unsupported via quirk, skip unless in D3 */
303 if (needs_save && pdev->current_state >= PCI_D3hot) {
304 vdev->pm_save = pci_store_saved_state(pdev);
305 } else if (needs_restore) {
306 pci_load_and_free_saved_state(pdev, &vdev->pm_save);
307 pci_restore_state(pdev);
308 }
309 }
310
311 return ret;
312}
313
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314static int vfio_pci_enable(struct vfio_pci_device *vdev)
315{
316 struct pci_dev *pdev = vdev->pdev;
317 int ret;
318 u16 cmd;
319 u8 msix_pos;
320
51ef3a00 321 vfio_pci_set_power_state(vdev, PCI_D0);
6eb70187 322
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323 /* Don't allow our initial saved state to include busmaster */
324 pci_clear_master(pdev);
325
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326 ret = pci_enable_device(pdev);
327 if (ret)
328 return ret;
329
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330 /* If reset fails because of the device lock, fail this path entirely */
331 ret = pci_try_reset_function(pdev);
332 if (ret == -EAGAIN) {
333 pci_disable_device(pdev);
334 return ret;
335 }
336
337 vdev->reset_works = !ret;
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338 pci_save_state(pdev);
339 vdev->pci_saved_state = pci_store_saved_state(pdev);
340 if (!vdev->pci_saved_state)
a88a7b3e 341 pci_dbg(pdev, "%s: Couldn't store saved state\n", __func__);
89e1f7d4 342
45074405
AW
343 if (likely(!nointxmask)) {
344 if (vfio_pci_nointx(pdev)) {
a88a7b3e 345 pci_info(pdev, "Masking broken INTx support\n");
45074405
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346 vdev->nointx = true;
347 pci_intx(pdev, 0);
348 } else
349 vdev->pci_2_3 = pci_intx_mask_supported(pdev);
9a92c509 350 }
89e1f7d4 351
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352 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
353 if (vdev->pci_2_3 && (cmd & PCI_COMMAND_INTX_DISABLE)) {
354 cmd &= ~PCI_COMMAND_INTX_DISABLE;
355 pci_write_config_word(pdev, PCI_COMMAND, cmd);
356 }
357
45074405
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358 ret = vfio_config_init(vdev);
359 if (ret) {
360 kfree(vdev->pci_saved_state);
361 vdev->pci_saved_state = NULL;
362 pci_disable_device(pdev);
363 return ret;
364 }
365
a9047f24 366 msix_pos = pdev->msix_cap;
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AW
367 if (msix_pos) {
368 u16 flags;
369 u32 table;
370
371 pci_read_config_word(pdev, msix_pos + PCI_MSIX_FLAGS, &flags);
372 pci_read_config_dword(pdev, msix_pos + PCI_MSIX_TABLE, &table);
373
508d1aa6
BH
374 vdev->msix_bar = table & PCI_MSIX_TABLE_BIR;
375 vdev->msix_offset = table & PCI_MSIX_TABLE_OFFSET;
89e1f7d4
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376 vdev->msix_size = ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) * 16;
377 } else
378 vdev->msix_bar = 0xFF;
379
ecaa1f6a 380 if (!vfio_vga_disabled() && vfio_pci_is_vga(pdev))
84237a82 381 vdev->has_vga = true;
84237a82 382
5846ff54 383
f572a960
AW
384 if (vfio_pci_is_vga(pdev) &&
385 pdev->vendor == PCI_VENDOR_ID_INTEL &&
386 IS_ENABLED(CONFIG_VFIO_PCI_IGD)) {
387 ret = vfio_pci_igd_init(vdev);
e4eccb85 388 if (ret && ret != -ENODEV) {
a88a7b3e 389 pci_warn(pdev, "Failed to setup Intel IGD regions\n");
7f928917
AK
390 goto disable_exit;
391 }
392 }
393
394 if (pdev->vendor == PCI_VENDOR_ID_NVIDIA &&
395 IS_ENABLED(CONFIG_VFIO_PCI_NVLINK2)) {
396 ret = vfio_pci_nvdia_v100_nvlink2_init(vdev);
397 if (ret && ret != -ENODEV) {
a88a7b3e 398 pci_warn(pdev, "Failed to setup NVIDIA NV2 RAM region\n");
7f928917
AK
399 goto disable_exit;
400 }
401 }
402
403 if (pdev->vendor == PCI_VENDOR_ID_IBM &&
404 IS_ENABLED(CONFIG_VFIO_PCI_NVLINK2)) {
405 ret = vfio_pci_ibm_npu2_init(vdev);
406 if (ret && ret != -ENODEV) {
a88a7b3e 407 pci_warn(pdev, "Failed to setup NVIDIA NV2 ATSD region\n");
7f928917 408 goto disable_exit;
f572a960 409 }
5846ff54
AW
410 }
411
05f0c03f
YX
412 vfio_pci_probe_mmaps(vdev);
413
9a92c509 414 return 0;
7f928917
AK
415
416disable_exit:
417 vfio_pci_disable(vdev);
418 return ret;
89e1f7d4
AW
419}
420
421static void vfio_pci_disable(struct vfio_pci_device *vdev)
422{
2007722a 423 struct pci_dev *pdev = vdev->pdev;
05f0c03f 424 struct vfio_pci_dummy_resource *dummy_res, *tmp;
30656177 425 struct vfio_pci_ioeventfd *ioeventfd, *ioeventfd_tmp;
28541d41 426 int i, bar;
89e1f7d4 427
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AW
428 /* Stop the device from further DMA */
429 pci_clear_master(pdev);
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430
431 vfio_pci_set_irqs_ioctl(vdev, VFIO_IRQ_SET_DATA_NONE |
432 VFIO_IRQ_SET_ACTION_TRIGGER,
433 vdev->irq_type, 0, 0, NULL);
434
30656177
AW
435 /* Device closed, don't need mutex here */
436 list_for_each_entry_safe(ioeventfd, ioeventfd_tmp,
437 &vdev->ioeventfds_list, next) {
438 vfio_virqfd_disable(&ioeventfd->virqfd);
439 list_del(&ioeventfd->next);
440 kfree(ioeventfd);
441 }
442 vdev->ioeventfds_nr = 0;
443
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444 vdev->virq_disabled = false;
445
28541d41
AW
446 for (i = 0; i < vdev->num_regions; i++)
447 vdev->region[i].ops->release(vdev, &vdev->region[i]);
448
449 vdev->num_regions = 0;
450 kfree(vdev->region);
451 vdev->region = NULL; /* don't krealloc a freed pointer */
452
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AW
453 vfio_config_free(vdev);
454
c9c13ba4
DE
455 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
456 bar = i + PCI_STD_RESOURCES;
89e1f7d4
AW
457 if (!vdev->barmap[bar])
458 continue;
2007722a
AW
459 pci_iounmap(pdev, vdev->barmap[bar]);
460 pci_release_selected_regions(pdev, 1 << bar);
89e1f7d4
AW
461 vdev->barmap[bar] = NULL;
462 }
2007722a 463
05f0c03f
YX
464 list_for_each_entry_safe(dummy_res, tmp,
465 &vdev->dummy_resources_list, res_next) {
466 list_del(&dummy_res->res_next);
467 release_resource(&dummy_res->resource);
468 kfree(dummy_res);
469 }
470
bc4fba77
AW
471 vdev->needs_reset = true;
472
2007722a
AW
473 /*
474 * If we have saved state, restore it. If we can reset the device,
475 * even better. Resetting with current state seems better than
476 * nothing, but saving and restoring current state without reset
477 * is just busy work.
478 */
479 if (pci_load_and_free_saved_state(pdev, &vdev->pci_saved_state)) {
a88a7b3e 480 pci_info(pdev, "%s: Couldn't reload saved state\n", __func__);
2007722a
AW
481
482 if (!vdev->reset_works)
9c22e660 483 goto out;
2007722a
AW
484
485 pci_save_state(pdev);
486 }
487
488 /*
489 * Disable INTx and MSI, presumably to avoid spurious interrupts
490 * during reset. Stolen from pci_reset_function()
491 */
492 pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
493
d24cdbfd 494 /*
92c80268 495 * Try to get the locks ourselves to prevent a deadlock. The
496 * success of this is dependent on being able to lock the device,
497 * which is not always possible.
498 * We can not use the "try" reset interface here, which will
499 * overwrite the previously restored configuration information.
d24cdbfd 500 */
92c80268 501 if (vdev->reset_works && pci_cfg_access_trylock(pdev)) {
502 if (device_trylock(&pdev->dev)) {
503 if (!__pci_reset_function_locked(pdev))
504 vdev->needs_reset = false;
505 device_unlock(&pdev->dev);
506 }
507 pci_cfg_access_unlock(pdev);
508 }
2007722a
AW
509
510 pci_restore_state(pdev);
9c22e660
AW
511out:
512 pci_disable_device(pdev);
bc4fba77
AW
513
514 vfio_pci_try_bus_reset(vdev);
6eb70187
AW
515
516 if (!disable_idle_d3)
51ef3a00 517 vfio_pci_set_power_state(vdev, PCI_D3hot);
89e1f7d4
AW
518}
519
cc20d799
AW
520static struct pci_driver vfio_pci_driver;
521
522static struct vfio_pci_device *get_pf_vdev(struct vfio_pci_device *vdev,
523 struct vfio_device **pf_dev)
524{
525 struct pci_dev *physfn = pci_physfn(vdev->pdev);
526
527 if (!vdev->pdev->is_virtfn)
528 return NULL;
529
530 *pf_dev = vfio_device_get_from_dev(&physfn->dev);
531 if (!*pf_dev)
532 return NULL;
533
534 if (pci_dev_driver(physfn) != &vfio_pci_driver) {
535 vfio_device_put(*pf_dev);
536 return NULL;
537 }
538
539 return vfio_device_data(*pf_dev);
540}
541
542static void vfio_pci_vf_token_user_add(struct vfio_pci_device *vdev, int val)
543{
544 struct vfio_device *pf_dev;
545 struct vfio_pci_device *pf_vdev = get_pf_vdev(vdev, &pf_dev);
546
547 if (!pf_vdev)
548 return;
549
550 mutex_lock(&pf_vdev->vf_token->lock);
551 pf_vdev->vf_token->users += val;
552 WARN_ON(pf_vdev->vf_token->users < 0);
553 mutex_unlock(&pf_vdev->vf_token->lock);
554
555 vfio_device_put(pf_dev);
556}
557
89e1f7d4
AW
558static void vfio_pci_release(void *device_data)
559{
560 struct vfio_pci_device *vdev = device_data;
561
e309df5b 562 mutex_lock(&vdev->reflck->lock);
61d79256
AW
563
564 if (!(--vdev->refcnt)) {
cc20d799 565 vfio_pci_vf_token_user_add(vdev, -1);
1b69be5e 566 vfio_spapr_pci_eeh_release(vdev->pdev);
89e1f7d4 567 vfio_pci_disable(vdev);
924b51ab 568
b872d064 569 mutex_lock(&vdev->igate);
5c5866c5 570 if (vdev->err_trigger) {
1518ac27 571 eventfd_ctx_put(vdev->err_trigger);
5c5866c5
AW
572 vdev->err_trigger = NULL;
573 }
574 if (vdev->req_trigger) {
1518ac27 575 eventfd_ctx_put(vdev->req_trigger);
5c5866c5
AW
576 vdev->req_trigger = NULL;
577 }
b872d064 578 mutex_unlock(&vdev->igate);
1b69be5e 579 }
89e1f7d4 580
e309df5b 581 mutex_unlock(&vdev->reflck->lock);
61d79256 582
89e1f7d4
AW
583 module_put(THIS_MODULE);
584}
585
586static int vfio_pci_open(void *device_data)
587{
588 struct vfio_pci_device *vdev = device_data;
61d79256 589 int ret = 0;
89e1f7d4
AW
590
591 if (!try_module_get(THIS_MODULE))
592 return -ENODEV;
593
e309df5b 594 mutex_lock(&vdev->reflck->lock);
61d79256
AW
595
596 if (!vdev->refcnt) {
1b69be5e
GS
597 ret = vfio_pci_enable(vdev);
598 if (ret)
599 goto error;
600
9b936c96 601 vfio_spapr_pci_eeh_open(vdev->pdev);
cc20d799 602 vfio_pci_vf_token_user_add(vdev, 1);
89e1f7d4 603 }
61d79256 604 vdev->refcnt++;
1b69be5e 605error:
e309df5b 606 mutex_unlock(&vdev->reflck->lock);
61d79256
AW
607 if (ret)
608 module_put(THIS_MODULE);
1b69be5e 609 return ret;
89e1f7d4
AW
610}
611
612static int vfio_pci_get_irq_count(struct vfio_pci_device *vdev, int irq_type)
613{
614 if (irq_type == VFIO_PCI_INTX_IRQ_INDEX) {
615 u8 pin;
db04264f
AW
616
617 if (!IS_ENABLED(CONFIG_VFIO_PCI_INTX) ||
618 vdev->nointx || vdev->pdev->is_virtfn)
619 return 0;
620
89e1f7d4 621 pci_read_config_byte(vdev->pdev, PCI_INTERRUPT_PIN, &pin);
89e1f7d4 622
db04264f 623 return pin ? 1 : 0;
89e1f7d4
AW
624 } else if (irq_type == VFIO_PCI_MSI_IRQ_INDEX) {
625 u8 pos;
626 u16 flags;
627
a9047f24 628 pos = vdev->pdev->msi_cap;
89e1f7d4
AW
629 if (pos) {
630 pci_read_config_word(vdev->pdev,
631 pos + PCI_MSI_FLAGS, &flags);
fd49c81f 632 return 1 << ((flags & PCI_MSI_FLAGS_QMASK) >> 1);
89e1f7d4
AW
633 }
634 } else if (irq_type == VFIO_PCI_MSIX_IRQ_INDEX) {
635 u8 pos;
636 u16 flags;
637
a9047f24 638 pos = vdev->pdev->msix_cap;
89e1f7d4
AW
639 if (pos) {
640 pci_read_config_word(vdev->pdev,
641 pos + PCI_MSIX_FLAGS, &flags);
642
643 return (flags & PCI_MSIX_FLAGS_QSIZE) + 1;
644 }
6140a8f5 645 } else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX) {
dad9f897
VMP
646 if (pci_is_pcie(vdev->pdev))
647 return 1;
6140a8f5
AW
648 } else if (irq_type == VFIO_PCI_REQ_IRQ_INDEX) {
649 return 1;
650 }
89e1f7d4
AW
651
652 return 0;
653}
654
8b27ee60
AW
655static int vfio_pci_count_devs(struct pci_dev *pdev, void *data)
656{
657 (*(int *)data)++;
658 return 0;
659}
660
661struct vfio_pci_fill_info {
662 int max;
663 int cur;
664 struct vfio_pci_dependent_device *devices;
665};
666
667static int vfio_pci_fill_devs(struct pci_dev *pdev, void *data)
668{
669 struct vfio_pci_fill_info *fill = data;
670 struct iommu_group *iommu_group;
671
672 if (fill->cur == fill->max)
673 return -EAGAIN; /* Something changed, try again */
674
675 iommu_group = iommu_group_get(&pdev->dev);
676 if (!iommu_group)
677 return -EPERM; /* Cannot reset non-isolated devices */
678
679 fill->devices[fill->cur].group_id = iommu_group_id(iommu_group);
680 fill->devices[fill->cur].segment = pci_domain_nr(pdev->bus);
681 fill->devices[fill->cur].bus = pdev->bus->number;
682 fill->devices[fill->cur].devfn = pdev->devfn;
683 fill->cur++;
684 iommu_group_put(iommu_group);
685 return 0;
686}
687
688struct vfio_pci_group_entry {
689 struct vfio_group *group;
690 int id;
691};
692
693struct vfio_pci_group_info {
694 int count;
695 struct vfio_pci_group_entry *groups;
696};
697
698static int vfio_pci_validate_devs(struct pci_dev *pdev, void *data)
699{
700 struct vfio_pci_group_info *info = data;
701 struct iommu_group *group;
702 int id, i;
703
704 group = iommu_group_get(&pdev->dev);
705 if (!group)
706 return -EPERM;
707
708 id = iommu_group_id(group);
709
710 for (i = 0; i < info->count; i++)
711 if (info->groups[i].id == id)
712 break;
713
714 iommu_group_put(group);
715
716 return (i == info->count) ? -EINVAL : 0;
717}
718
719static bool vfio_pci_dev_below_slot(struct pci_dev *pdev, struct pci_slot *slot)
720{
721 for (; pdev; pdev = pdev->bus->self)
722 if (pdev->bus == slot->bus)
723 return (pdev->slot == slot);
724 return false;
725}
726
727struct vfio_pci_walk_info {
728 int (*fn)(struct pci_dev *, void *data);
729 void *data;
730 struct pci_dev *pdev;
731 bool slot;
732 int ret;
733};
734
735static int vfio_pci_walk_wrapper(struct pci_dev *pdev, void *data)
736{
737 struct vfio_pci_walk_info *walk = data;
738
739 if (!walk->slot || vfio_pci_dev_below_slot(pdev, walk->pdev->slot))
740 walk->ret = walk->fn(pdev, walk->data);
741
742 return walk->ret;
743}
744
745static int vfio_pci_for_each_slot_or_bus(struct pci_dev *pdev,
746 int (*fn)(struct pci_dev *,
747 void *data), void *data,
748 bool slot)
749{
750 struct vfio_pci_walk_info walk = {
751 .fn = fn, .data = data, .pdev = pdev, .slot = slot, .ret = 0,
752 };
753
754 pci_walk_bus(pdev->bus, vfio_pci_walk_wrapper, &walk);
755
756 return walk.ret;
757}
758
a32295c6
AK
759static int msix_mmappable_cap(struct vfio_pci_device *vdev,
760 struct vfio_info_cap *caps)
188ad9d6 761{
a32295c6
AK
762 struct vfio_info_cap_header header = {
763 .id = VFIO_REGION_INFO_CAP_MSIX_MAPPABLE,
764 .version = 1
765 };
28541d41 766
a32295c6 767 return vfio_info_add_capability(caps, &header, sizeof(header));
28541d41
AW
768}
769
770int vfio_pci_register_dev_region(struct vfio_pci_device *vdev,
771 unsigned int type, unsigned int subtype,
772 const struct vfio_pci_regops *ops,
773 size_t size, u32 flags, void *data)
774{
775 struct vfio_pci_region *region;
776
777 region = krealloc(vdev->region,
778 (vdev->num_regions + 1) * sizeof(*region),
779 GFP_KERNEL);
780 if (!region)
781 return -ENOMEM;
782
783 vdev->region = region;
784 vdev->region[vdev->num_regions].type = type;
785 vdev->region[vdev->num_regions].subtype = subtype;
786 vdev->region[vdev->num_regions].ops = ops;
787 vdev->region[vdev->num_regions].size = size;
788 vdev->region[vdev->num_regions].flags = flags;
789 vdev->region[vdev->num_regions].data = data;
790
791 vdev->num_regions++;
792
793 return 0;
794}
795
abafbc55
AW
796struct vfio_devices {
797 struct vfio_device **devices;
798 int cur_index;
799 int max_index;
800};
801
89e1f7d4
AW
802static long vfio_pci_ioctl(void *device_data,
803 unsigned int cmd, unsigned long arg)
804{
805 struct vfio_pci_device *vdev = device_data;
806 unsigned long minsz;
807
808 if (cmd == VFIO_DEVICE_GET_INFO) {
809 struct vfio_device_info info;
e6b817d4
MR
810 struct vfio_info_cap caps = { .buf = NULL, .size = 0 };
811 unsigned long capsz;
89e1f7d4
AW
812
813 minsz = offsetofend(struct vfio_device_info, num_irqs);
814
e6b817d4
MR
815 /* For backward compatibility, cannot require this */
816 capsz = offsetofend(struct vfio_iommu_type1_info, cap_offset);
817
89e1f7d4
AW
818 if (copy_from_user(&info, (void __user *)arg, minsz))
819 return -EFAULT;
820
821 if (info.argsz < minsz)
822 return -EINVAL;
823
e6b817d4
MR
824 if (info.argsz >= capsz) {
825 minsz = capsz;
826 info.cap_offset = 0;
827 }
828
89e1f7d4
AW
829 info.flags = VFIO_DEVICE_FLAGS_PCI;
830
831 if (vdev->reset_works)
832 info.flags |= VFIO_DEVICE_FLAGS_RESET;
833
28541d41 834 info.num_regions = VFIO_PCI_NUM_REGIONS + vdev->num_regions;
89e1f7d4
AW
835 info.num_irqs = VFIO_PCI_NUM_IRQS;
836
e6b817d4
MR
837 if (IS_ENABLED(CONFIG_VFIO_PCI_ZDEV)) {
838 int ret = vfio_pci_info_zdev_add_caps(vdev, &caps);
839
840 if (ret && ret != -ENODEV) {
841 pci_warn(vdev->pdev, "Failed to setup zPCI info capabilities\n");
842 return ret;
843 }
844 }
845
846 if (caps.size) {
847 info.flags |= VFIO_DEVICE_FLAGS_CAPS;
848 if (info.argsz < sizeof(info) + caps.size) {
849 info.argsz = sizeof(info) + caps.size;
850 } else {
851 vfio_info_cap_shift(&caps, sizeof(info));
852 if (copy_to_user((void __user *)arg +
853 sizeof(info), caps.buf,
854 caps.size)) {
855 kfree(caps.buf);
856 return -EFAULT;
857 }
858 info.cap_offset = sizeof(info);
859 }
860
861 kfree(caps.buf);
862 }
863
8160c4e4
MT
864 return copy_to_user((void __user *)arg, &info, minsz) ?
865 -EFAULT : 0;
89e1f7d4
AW
866
867 } else if (cmd == VFIO_DEVICE_GET_REGION_INFO) {
868 struct pci_dev *pdev = vdev->pdev;
869 struct vfio_region_info info;
188ad9d6 870 struct vfio_info_cap caps = { .buf = NULL, .size = 0 };
28541d41 871 int i, ret;
89e1f7d4
AW
872
873 minsz = offsetofend(struct vfio_region_info, offset);
874
875 if (copy_from_user(&info, (void __user *)arg, minsz))
876 return -EFAULT;
877
878 if (info.argsz < minsz)
879 return -EINVAL;
880
881 switch (info.index) {
882 case VFIO_PCI_CONFIG_REGION_INDEX:
883 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
884 info.size = pdev->cfg_size;
885 info.flags = VFIO_REGION_INFO_FLAG_READ |
886 VFIO_REGION_INFO_FLAG_WRITE;
887 break;
888 case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
889 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
890 info.size = pci_resource_len(pdev, info.index);
891 if (!info.size) {
892 info.flags = 0;
893 break;
894 }
895
896 info.flags = VFIO_REGION_INFO_FLAG_READ |
897 VFIO_REGION_INFO_FLAG_WRITE;
05f0c03f 898 if (vdev->bar_mmap_supported[info.index]) {
89e1f7d4 899 info.flags |= VFIO_REGION_INFO_FLAG_MMAP;
188ad9d6 900 if (info.index == vdev->msix_bar) {
a32295c6 901 ret = msix_mmappable_cap(vdev, &caps);
188ad9d6
AW
902 if (ret)
903 return ret;
904 }
905 }
906
89e1f7d4
AW
907 break;
908 case VFIO_PCI_ROM_REGION_INDEX:
909 {
910 void __iomem *io;
911 size_t size;
abafbc55 912 u16 cmd;
89e1f7d4
AW
913
914 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
915 info.flags = 0;
916
917 /* Report the BAR size, not the ROM size */
918 info.size = pci_resource_len(pdev, info.index);
a13b6459
AW
919 if (!info.size) {
920 /* Shadow ROMs appear as PCI option ROMs */
921 if (pdev->resource[PCI_ROM_RESOURCE].flags &
922 IORESOURCE_ROM_SHADOW)
923 info.size = 0x20000;
924 else
925 break;
926 }
89e1f7d4 927
0cfd027b
EA
928 /*
929 * Is it really there? Enable memory decode for
930 * implicit access in pci_map_rom().
931 */
abafbc55 932 cmd = vfio_pci_memory_lock_and_enable(vdev);
89e1f7d4 933 io = pci_map_rom(pdev, &size);
0cfd027b
EA
934 if (io) {
935 info.flags = VFIO_REGION_INFO_FLAG_READ;
936 pci_unmap_rom(pdev, io);
937 } else {
89e1f7d4 938 info.size = 0;
89e1f7d4 939 }
abafbc55 940 vfio_pci_memory_unlock_and_restore(vdev, cmd);
89e1f7d4 941
89e1f7d4
AW
942 break;
943 }
84237a82
AW
944 case VFIO_PCI_VGA_REGION_INDEX:
945 if (!vdev->has_vga)
946 return -EINVAL;
947
948 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
949 info.size = 0xc0000;
950 info.flags = VFIO_REGION_INFO_FLAG_READ |
951 VFIO_REGION_INFO_FLAG_WRITE;
952
953 break;
89e1f7d4 954 default:
c535d345 955 {
dda01f78
AW
956 struct vfio_region_info_cap_type cap_type = {
957 .header.id = VFIO_REGION_INFO_CAP_TYPE,
958 .header.version = 1 };
c535d345 959
28541d41
AW
960 if (info.index >=
961 VFIO_PCI_NUM_REGIONS + vdev->num_regions)
962 return -EINVAL;
0e714d27
GS
963 info.index = array_index_nospec(info.index,
964 VFIO_PCI_NUM_REGIONS +
965 vdev->num_regions);
28541d41
AW
966
967 i = info.index - VFIO_PCI_NUM_REGIONS;
968
969 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
970 info.size = vdev->region[i].size;
971 info.flags = vdev->region[i].flags;
972
c535d345
KW
973 cap_type.type = vdev->region[i].type;
974 cap_type.subtype = vdev->region[i].subtype;
975
dda01f78
AW
976 ret = vfio_info_add_capability(&caps, &cap_type.header,
977 sizeof(cap_type));
28541d41
AW
978 if (ret)
979 return ret;
c535d345 980
c2c0f1cd
AK
981 if (vdev->region[i].ops->add_capability) {
982 ret = vdev->region[i].ops->add_capability(vdev,
983 &vdev->region[i], &caps);
984 if (ret)
985 return ret;
986 }
c535d345 987 }
89e1f7d4
AW
988 }
989
188ad9d6
AW
990 if (caps.size) {
991 info.flags |= VFIO_REGION_INFO_FLAG_CAPS;
992 if (info.argsz < sizeof(info) + caps.size) {
993 info.argsz = sizeof(info) + caps.size;
994 info.cap_offset = 0;
995 } else {
996 vfio_info_cap_shift(&caps, sizeof(info));
c4aec310
DC
997 if (copy_to_user((void __user *)arg +
998 sizeof(info), caps.buf,
999 caps.size)) {
188ad9d6 1000 kfree(caps.buf);
c4aec310 1001 return -EFAULT;
188ad9d6
AW
1002 }
1003 info.cap_offset = sizeof(info);
1004 }
1005
1006 kfree(caps.buf);
89e1f7d4
AW
1007 }
1008
8160c4e4
MT
1009 return copy_to_user((void __user *)arg, &info, minsz) ?
1010 -EFAULT : 0;
89e1f7d4
AW
1011
1012 } else if (cmd == VFIO_DEVICE_GET_IRQ_INFO) {
1013 struct vfio_irq_info info;
1014
1015 minsz = offsetofend(struct vfio_irq_info, count);
1016
1017 if (copy_from_user(&info, (void __user *)arg, minsz))
1018 return -EFAULT;
1019
1020 if (info.argsz < minsz || info.index >= VFIO_PCI_NUM_IRQS)
1021 return -EINVAL;
1022
dad9f897
VMP
1023 switch (info.index) {
1024 case VFIO_PCI_INTX_IRQ_INDEX ... VFIO_PCI_MSIX_IRQ_INDEX:
6140a8f5 1025 case VFIO_PCI_REQ_IRQ_INDEX:
dad9f897
VMP
1026 break;
1027 case VFIO_PCI_ERR_IRQ_INDEX:
1028 if (pci_is_pcie(vdev->pdev))
1029 break;
df561f66 1030 fallthrough;
dad9f897
VMP
1031 default:
1032 return -EINVAL;
1033 }
1034
89e1f7d4
AW
1035 info.flags = VFIO_IRQ_INFO_EVENTFD;
1036
1037 info.count = vfio_pci_get_irq_count(vdev, info.index);
1038
1039 if (info.index == VFIO_PCI_INTX_IRQ_INDEX)
1040 info.flags |= (VFIO_IRQ_INFO_MASKABLE |
1041 VFIO_IRQ_INFO_AUTOMASKED);
1042 else
1043 info.flags |= VFIO_IRQ_INFO_NORESIZE;
1044
8160c4e4
MT
1045 return copy_to_user((void __user *)arg, &info, minsz) ?
1046 -EFAULT : 0;
89e1f7d4
AW
1047
1048 } else if (cmd == VFIO_DEVICE_SET_IRQS) {
1049 struct vfio_irq_set hdr;
1050 u8 *data = NULL;
05692d70 1051 int max, ret = 0;
ef198aaa 1052 size_t data_size = 0;
89e1f7d4
AW
1053
1054 minsz = offsetofend(struct vfio_irq_set, count);
1055
1056 if (copy_from_user(&hdr, (void __user *)arg, minsz))
1057 return -EFAULT;
1058
05692d70 1059 max = vfio_pci_get_irq_count(vdev, hdr.index);
89e1f7d4 1060
ef198aaa
KW
1061 ret = vfio_set_irqs_validate_and_prepare(&hdr, max,
1062 VFIO_PCI_NUM_IRQS, &data_size);
1063 if (ret)
1064 return ret;
89e1f7d4 1065
ef198aaa 1066 if (data_size) {
3a1f7041 1067 data = memdup_user((void __user *)(arg + minsz),
ef198aaa 1068 data_size);
3a1f7041
FW
1069 if (IS_ERR(data))
1070 return PTR_ERR(data);
89e1f7d4
AW
1071 }
1072
1073 mutex_lock(&vdev->igate);
1074
1075 ret = vfio_pci_set_irqs_ioctl(vdev, hdr.flags, hdr.index,
1076 hdr.start, hdr.count, data);
1077
1078 mutex_unlock(&vdev->igate);
1079 kfree(data);
1080
1081 return ret;
1082
8b27ee60 1083 } else if (cmd == VFIO_DEVICE_RESET) {
abafbc55
AW
1084 int ret;
1085
1086 if (!vdev->reset_works)
1087 return -EINVAL;
1088
1089 vfio_pci_zap_and_down_write_memory_lock(vdev);
1090 ret = pci_try_reset_function(vdev->pdev);
1091 up_write(&vdev->memory_lock);
1092
1093 return ret;
89e1f7d4 1094
8b27ee60
AW
1095 } else if (cmd == VFIO_DEVICE_GET_PCI_HOT_RESET_INFO) {
1096 struct vfio_pci_hot_reset_info hdr;
1097 struct vfio_pci_fill_info fill = { 0 };
1098 struct vfio_pci_dependent_device *devices = NULL;
1099 bool slot = false;
1100 int ret = 0;
1101
1102 minsz = offsetofend(struct vfio_pci_hot_reset_info, count);
1103
1104 if (copy_from_user(&hdr, (void __user *)arg, minsz))
1105 return -EFAULT;
1106
1107 if (hdr.argsz < minsz)
1108 return -EINVAL;
1109
1110 hdr.flags = 0;
1111
1112 /* Can we do a slot or bus reset or neither? */
1113 if (!pci_probe_reset_slot(vdev->pdev->slot))
1114 slot = true;
1115 else if (pci_probe_reset_bus(vdev->pdev->bus))
1116 return -ENODEV;
1117
1118 /* How many devices are affected? */
1119 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
1120 vfio_pci_count_devs,
1121 &fill.max, slot);
1122 if (ret)
1123 return ret;
1124
1125 WARN_ON(!fill.max); /* Should always be at least one */
1126
1127 /*
1128 * If there's enough space, fill it now, otherwise return
1129 * -ENOSPC and the number of devices affected.
1130 */
1131 if (hdr.argsz < sizeof(hdr) + (fill.max * sizeof(*devices))) {
1132 ret = -ENOSPC;
1133 hdr.count = fill.max;
1134 goto reset_info_exit;
1135 }
1136
1137 devices = kcalloc(fill.max, sizeof(*devices), GFP_KERNEL);
1138 if (!devices)
1139 return -ENOMEM;
1140
1141 fill.devices = devices;
1142
1143 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
1144 vfio_pci_fill_devs,
1145 &fill, slot);
1146
1147 /*
1148 * If a device was removed between counting and filling,
1149 * we may come up short of fill.max. If a device was
1150 * added, we'll have a return of -EAGAIN above.
1151 */
1152 if (!ret)
1153 hdr.count = fill.cur;
1154
1155reset_info_exit:
1156 if (copy_to_user((void __user *)arg, &hdr, minsz))
1157 ret = -EFAULT;
1158
1159 if (!ret) {
1160 if (copy_to_user((void __user *)(arg + minsz), devices,
1161 hdr.count * sizeof(*devices)))
1162 ret = -EFAULT;
1163 }
1164
1165 kfree(devices);
1166 return ret;
1167
1168 } else if (cmd == VFIO_DEVICE_PCI_HOT_RESET) {
1169 struct vfio_pci_hot_reset hdr;
1170 int32_t *group_fds;
1171 struct vfio_pci_group_entry *groups;
1172 struct vfio_pci_group_info info;
abafbc55 1173 struct vfio_devices devs = { .cur_index = 0 };
8b27ee60 1174 bool slot = false;
abafbc55 1175 int i, group_idx, mem_idx = 0, count = 0, ret = 0;
8b27ee60
AW
1176
1177 minsz = offsetofend(struct vfio_pci_hot_reset, count);
1178
1179 if (copy_from_user(&hdr, (void __user *)arg, minsz))
1180 return -EFAULT;
1181
1182 if (hdr.argsz < minsz || hdr.flags)
1183 return -EINVAL;
1184
1185 /* Can we do a slot or bus reset or neither? */
1186 if (!pci_probe_reset_slot(vdev->pdev->slot))
1187 slot = true;
1188 else if (pci_probe_reset_bus(vdev->pdev->bus))
1189 return -ENODEV;
1190
1191 /*
1192 * We can't let userspace give us an arbitrarily large
1193 * buffer to copy, so verify how many we think there
1194 * could be. Note groups can have multiple devices so
1195 * one group per device is the max.
1196 */
1197 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
1198 vfio_pci_count_devs,
1199 &count, slot);
1200 if (ret)
1201 return ret;
1202
1203 /* Somewhere between 1 and count is OK */
1204 if (!hdr.count || hdr.count > count)
1205 return -EINVAL;
1206
1207 group_fds = kcalloc(hdr.count, sizeof(*group_fds), GFP_KERNEL);
1208 groups = kcalloc(hdr.count, sizeof(*groups), GFP_KERNEL);
1209 if (!group_fds || !groups) {
1210 kfree(group_fds);
1211 kfree(groups);
1212 return -ENOMEM;
1213 }
1214
1215 if (copy_from_user(group_fds, (void __user *)(arg + minsz),
1216 hdr.count * sizeof(*group_fds))) {
1217 kfree(group_fds);
1218 kfree(groups);
1219 return -EFAULT;
1220 }
1221
1222 /*
1223 * For each group_fd, get the group through the vfio external
1224 * user interface and store the group and iommu ID. This
1225 * ensures the group is held across the reset.
1226 */
abafbc55 1227 for (group_idx = 0; group_idx < hdr.count; group_idx++) {
8b27ee60 1228 struct vfio_group *group;
abafbc55 1229 struct fd f = fdget(group_fds[group_idx]);
8b27ee60
AW
1230 if (!f.file) {
1231 ret = -EBADF;
1232 break;
1233 }
1234
1235 group = vfio_group_get_external_user(f.file);
1236 fdput(f);
1237 if (IS_ERR(group)) {
1238 ret = PTR_ERR(group);
1239 break;
1240 }
1241
abafbc55
AW
1242 groups[group_idx].group = group;
1243 groups[group_idx].id =
1244 vfio_external_user_iommu_id(group);
8b27ee60
AW
1245 }
1246
1247 kfree(group_fds);
1248
1249 /* release reference to groups on error */
1250 if (ret)
1251 goto hot_reset_release;
1252
1253 info.count = hdr.count;
1254 info.groups = groups;
1255
1256 /*
1257 * Test whether all the affected devices are contained
1258 * by the set of groups provided by the user.
1259 */
1260 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
1261 vfio_pci_validate_devs,
1262 &info, slot);
abafbc55
AW
1263 if (ret)
1264 goto hot_reset_release;
1265
1266 devs.max_index = count;
1267 devs.devices = kcalloc(count, sizeof(struct vfio_device *),
1268 GFP_KERNEL);
1269 if (!devs.devices) {
1270 ret = -ENOMEM;
1271 goto hot_reset_release;
1272 }
1273
1274 /*
1275 * We need to get memory_lock for each device, but devices
c1e8d7c6 1276 * can share mmap_lock, therefore we need to zap and hold
abafbc55
AW
1277 * the vma_lock for each device, and only then get each
1278 * memory_lock.
1279 */
1280 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
1281 vfio_pci_try_zap_and_vma_lock_cb,
1282 &devs, slot);
1283 if (ret)
1284 goto hot_reset_release;
1285
1286 for (; mem_idx < devs.cur_index; mem_idx++) {
1287 struct vfio_pci_device *tmp;
1288
1289 tmp = vfio_device_data(devs.devices[mem_idx]);
1290
1291 ret = down_write_trylock(&tmp->memory_lock);
1292 if (!ret) {
1293 ret = -EBUSY;
1294 goto hot_reset_release;
1295 }
1296 mutex_unlock(&tmp->vma_lock);
1297 }
1298
1299 /* User has access, do the reset */
1300 ret = pci_reset_bus(vdev->pdev);
8b27ee60
AW
1301
1302hot_reset_release:
abafbc55
AW
1303 for (i = 0; i < devs.cur_index; i++) {
1304 struct vfio_device *device;
1305 struct vfio_pci_device *tmp;
1306
1307 device = devs.devices[i];
1308 tmp = vfio_device_data(device);
1309
1310 if (i < mem_idx)
1311 up_write(&tmp->memory_lock);
1312 else
1313 mutex_unlock(&tmp->vma_lock);
1314 vfio_device_put(device);
1315 }
1316 kfree(devs.devices);
1317
1318 for (group_idx--; group_idx >= 0; group_idx--)
1319 vfio_group_put_external_user(groups[group_idx].group);
8b27ee60
AW
1320
1321 kfree(groups);
1322 return ret;
30656177
AW
1323 } else if (cmd == VFIO_DEVICE_IOEVENTFD) {
1324 struct vfio_device_ioeventfd ioeventfd;
1325 int count;
1326
1327 minsz = offsetofend(struct vfio_device_ioeventfd, fd);
1328
1329 if (copy_from_user(&ioeventfd, (void __user *)arg, minsz))
1330 return -EFAULT;
1331
1332 if (ioeventfd.argsz < minsz)
1333 return -EINVAL;
1334
1335 if (ioeventfd.flags & ~VFIO_DEVICE_IOEVENTFD_SIZE_MASK)
1336 return -EINVAL;
1337
1338 count = ioeventfd.flags & VFIO_DEVICE_IOEVENTFD_SIZE_MASK;
1339
1340 if (hweight8(count) != 1 || ioeventfd.fd < -1)
1341 return -EINVAL;
1342
1343 return vfio_pci_ioeventfd(vdev, ioeventfd.offset,
1344 ioeventfd.data, count, ioeventfd.fd);
43eeeecc
AW
1345 } else if (cmd == VFIO_DEVICE_FEATURE) {
1346 struct vfio_device_feature feature;
1347 uuid_t uuid;
1348
1349 minsz = offsetofend(struct vfio_device_feature, flags);
1350
1351 if (copy_from_user(&feature, (void __user *)arg, minsz))
1352 return -EFAULT;
1353
1354 if (feature.argsz < minsz)
1355 return -EINVAL;
1356
1357 /* Check unknown flags */
1358 if (feature.flags & ~(VFIO_DEVICE_FEATURE_MASK |
1359 VFIO_DEVICE_FEATURE_SET |
1360 VFIO_DEVICE_FEATURE_GET |
1361 VFIO_DEVICE_FEATURE_PROBE))
1362 return -EINVAL;
1363
1364 /* GET & SET are mutually exclusive except with PROBE */
1365 if (!(feature.flags & VFIO_DEVICE_FEATURE_PROBE) &&
1366 (feature.flags & VFIO_DEVICE_FEATURE_SET) &&
1367 (feature.flags & VFIO_DEVICE_FEATURE_GET))
1368 return -EINVAL;
1369
1370 switch (feature.flags & VFIO_DEVICE_FEATURE_MASK) {
1371 case VFIO_DEVICE_FEATURE_PCI_VF_TOKEN:
1372 if (!vdev->vf_token)
1373 return -ENOTTY;
1374
1375 /*
1376 * We do not support GET of the VF Token UUID as this
1377 * could expose the token of the previous device user.
1378 */
1379 if (feature.flags & VFIO_DEVICE_FEATURE_GET)
1380 return -EINVAL;
1381
1382 if (feature.flags & VFIO_DEVICE_FEATURE_PROBE)
1383 return 0;
1384
1385 /* Don't SET unless told to do so */
1386 if (!(feature.flags & VFIO_DEVICE_FEATURE_SET))
1387 return -EINVAL;
1388
1389 if (feature.argsz < minsz + sizeof(uuid))
1390 return -EINVAL;
1391
1392 if (copy_from_user(&uuid, (void __user *)(arg + minsz),
1393 sizeof(uuid)))
1394 return -EFAULT;
1395
1396 mutex_lock(&vdev->vf_token->lock);
1397 uuid_copy(&vdev->vf_token->uuid, &uuid);
1398 mutex_unlock(&vdev->vf_token->lock);
1399
1400 return 0;
1401 default:
1402 return -ENOTTY;
1403 }
8b27ee60
AW
1404 }
1405
89e1f7d4
AW
1406 return -ENOTTY;
1407}
1408
5b279a11
AW
1409static ssize_t vfio_pci_rw(void *device_data, char __user *buf,
1410 size_t count, loff_t *ppos, bool iswrite)
89e1f7d4
AW
1411{
1412 unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
1413 struct vfio_pci_device *vdev = device_data;
89e1f7d4 1414
28541d41 1415 if (index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions)
89e1f7d4
AW
1416 return -EINVAL;
1417
5b279a11
AW
1418 switch (index) {
1419 case VFIO_PCI_CONFIG_REGION_INDEX:
906ee99d
AW
1420 return vfio_pci_config_rw(vdev, buf, count, ppos, iswrite);
1421
5b279a11
AW
1422 case VFIO_PCI_ROM_REGION_INDEX:
1423 if (iswrite)
1424 return -EINVAL;
906ee99d 1425 return vfio_pci_bar_rw(vdev, buf, count, ppos, false);
89e1f7d4 1426
5b279a11 1427 case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
906ee99d 1428 return vfio_pci_bar_rw(vdev, buf, count, ppos, iswrite);
84237a82
AW
1429
1430 case VFIO_PCI_VGA_REGION_INDEX:
1431 return vfio_pci_vga_rw(vdev, buf, count, ppos, iswrite);
28541d41
AW
1432 default:
1433 index -= VFIO_PCI_NUM_REGIONS;
1434 return vdev->region[index].ops->rw(vdev, buf,
1435 count, ppos, iswrite);
5b279a11
AW
1436 }
1437
89e1f7d4
AW
1438 return -EINVAL;
1439}
1440
5b279a11
AW
1441static ssize_t vfio_pci_read(void *device_data, char __user *buf,
1442 size_t count, loff_t *ppos)
1443{
906ee99d
AW
1444 if (!count)
1445 return 0;
1446
5b279a11
AW
1447 return vfio_pci_rw(device_data, buf, count, ppos, false);
1448}
1449
89e1f7d4
AW
1450static ssize_t vfio_pci_write(void *device_data, const char __user *buf,
1451 size_t count, loff_t *ppos)
1452{
906ee99d
AW
1453 if (!count)
1454 return 0;
1455
1456 return vfio_pci_rw(device_data, (char __user *)buf, count, ppos, true);
89e1f7d4
AW
1457}
1458
abafbc55
AW
1459/* Return 1 on zap and vma_lock acquired, 0 on contention (only with @try) */
1460static int vfio_pci_zap_and_vma_lock(struct vfio_pci_device *vdev, bool try)
1461{
1462 struct vfio_pci_mmap_vma *mmap_vma, *tmp;
1463
1464 /*
1465 * Lock ordering:
c1e8d7c6 1466 * vma_lock is nested under mmap_lock for vm_ops callback paths.
abafbc55
AW
1467 * The memory_lock semaphore is used by both code paths calling
1468 * into this function to zap vmas and the vm_ops.fault callback
1469 * to protect the memory enable state of the device.
1470 *
c1e8d7c6 1471 * When zapping vmas we need to maintain the mmap_lock => vma_lock
abafbc55 1472 * ordering, which requires using vma_lock to walk vma_list to
c1e8d7c6 1473 * acquire an mm, then dropping vma_lock to get the mmap_lock and
abafbc55
AW
1474 * reacquiring vma_lock. This logic is derived from similar
1475 * requirements in uverbs_user_mmap_disassociate().
1476 *
c1e8d7c6 1477 * mmap_lock must always be the top-level lock when it is taken.
abafbc55 1478 * Therefore we can only hold the memory_lock write lock when
c1e8d7c6 1479 * vma_list is empty, as we'd need to take mmap_lock to clear
abafbc55
AW
1480 * entries. vma_list can only be guaranteed empty when holding
1481 * vma_lock, thus memory_lock is nested under vma_lock.
1482 *
1483 * This enables the vm_ops.fault callback to acquire vma_lock,
1484 * followed by memory_lock read lock, while already holding
c1e8d7c6 1485 * mmap_lock without risk of deadlock.
abafbc55
AW
1486 */
1487 while (1) {
1488 struct mm_struct *mm = NULL;
1489
1490 if (try) {
1491 if (!mutex_trylock(&vdev->vma_lock))
1492 return 0;
1493 } else {
1494 mutex_lock(&vdev->vma_lock);
1495 }
1496 while (!list_empty(&vdev->vma_list)) {
1497 mmap_vma = list_first_entry(&vdev->vma_list,
1498 struct vfio_pci_mmap_vma,
1499 vma_next);
1500 mm = mmap_vma->vma->vm_mm;
1501 if (mmget_not_zero(mm))
1502 break;
1503
1504 list_del(&mmap_vma->vma_next);
1505 kfree(mmap_vma);
1506 mm = NULL;
1507 }
1508 if (!mm)
1509 return 1;
1510 mutex_unlock(&vdev->vma_lock);
1511
1512 if (try) {
89154dd5 1513 if (!mmap_read_trylock(mm)) {
abafbc55
AW
1514 mmput(mm);
1515 return 0;
1516 }
1517 } else {
89154dd5 1518 mmap_read_lock(mm);
abafbc55 1519 }
4d45e75a
JH
1520 if (try) {
1521 if (!mutex_trylock(&vdev->vma_lock)) {
1522 mmap_read_unlock(mm);
1523 mmput(mm);
1524 return 0;
abafbc55 1525 }
4d45e75a
JH
1526 } else {
1527 mutex_lock(&vdev->vma_lock);
1528 }
1529 list_for_each_entry_safe(mmap_vma, tmp,
1530 &vdev->vma_list, vma_next) {
1531 struct vm_area_struct *vma = mmap_vma->vma;
abafbc55 1532
4d45e75a
JH
1533 if (vma->vm_mm != mm)
1534 continue;
abafbc55 1535
4d45e75a
JH
1536 list_del(&mmap_vma->vma_next);
1537 kfree(mmap_vma);
abafbc55 1538
4d45e75a
JH
1539 zap_vma_ptes(vma, vma->vm_start,
1540 vma->vm_end - vma->vm_start);
abafbc55 1541 }
4d45e75a 1542 mutex_unlock(&vdev->vma_lock);
89154dd5 1543 mmap_read_unlock(mm);
abafbc55
AW
1544 mmput(mm);
1545 }
1546}
1547
1548void vfio_pci_zap_and_down_write_memory_lock(struct vfio_pci_device *vdev)
1549{
1550 vfio_pci_zap_and_vma_lock(vdev, false);
1551 down_write(&vdev->memory_lock);
1552 mutex_unlock(&vdev->vma_lock);
1553}
1554
1555u16 vfio_pci_memory_lock_and_enable(struct vfio_pci_device *vdev)
1556{
1557 u16 cmd;
1558
1559 down_write(&vdev->memory_lock);
1560 pci_read_config_word(vdev->pdev, PCI_COMMAND, &cmd);
1561 if (!(cmd & PCI_COMMAND_MEMORY))
1562 pci_write_config_word(vdev->pdev, PCI_COMMAND,
1563 cmd | PCI_COMMAND_MEMORY);
1564
1565 return cmd;
1566}
1567
1568void vfio_pci_memory_unlock_and_restore(struct vfio_pci_device *vdev, u16 cmd)
1569{
1570 pci_write_config_word(vdev->pdev, PCI_COMMAND, cmd);
1571 up_write(&vdev->memory_lock);
1572}
1573
1574/* Caller holds vma_lock */
1575static int __vfio_pci_add_vma(struct vfio_pci_device *vdev,
1576 struct vm_area_struct *vma)
11c4cd07
AW
1577{
1578 struct vfio_pci_mmap_vma *mmap_vma;
1579
1580 mmap_vma = kmalloc(sizeof(*mmap_vma), GFP_KERNEL);
1581 if (!mmap_vma)
1582 return -ENOMEM;
1583
1584 mmap_vma->vma = vma;
11c4cd07 1585 list_add(&mmap_vma->vma_next, &vdev->vma_list);
11c4cd07
AW
1586
1587 return 0;
1588}
1589
1590/*
1591 * Zap mmaps on open so that we can fault them in on access and therefore
1592 * our vma_list only tracks mappings accessed since last zap.
1593 */
1594static void vfio_pci_mmap_open(struct vm_area_struct *vma)
1595{
1596 zap_vma_ptes(vma, vma->vm_start, vma->vm_end - vma->vm_start);
1597}
1598
1599static void vfio_pci_mmap_close(struct vm_area_struct *vma)
1600{
1601 struct vfio_pci_device *vdev = vma->vm_private_data;
1602 struct vfio_pci_mmap_vma *mmap_vma;
1603
1604 mutex_lock(&vdev->vma_lock);
1605 list_for_each_entry(mmap_vma, &vdev->vma_list, vma_next) {
1606 if (mmap_vma->vma == vma) {
1607 list_del(&mmap_vma->vma_next);
1608 kfree(mmap_vma);
1609 break;
1610 }
1611 }
1612 mutex_unlock(&vdev->vma_lock);
1613}
1614
1615static vm_fault_t vfio_pci_mmap_fault(struct vm_fault *vmf)
1616{
1617 struct vm_area_struct *vma = vmf->vma;
1618 struct vfio_pci_device *vdev = vma->vm_private_data;
abafbc55
AW
1619 vm_fault_t ret = VM_FAULT_NOPAGE;
1620
1621 mutex_lock(&vdev->vma_lock);
1622 down_read(&vdev->memory_lock);
1623
1624 if (!__vfio_pci_memory_enabled(vdev)) {
1625 ret = VM_FAULT_SIGBUS;
1626 mutex_unlock(&vdev->vma_lock);
1627 goto up_out;
1628 }
11c4cd07 1629
abafbc55
AW
1630 if (__vfio_pci_add_vma(vdev, vma)) {
1631 ret = VM_FAULT_OOM;
1632 mutex_unlock(&vdev->vma_lock);
1633 goto up_out;
1634 }
1635
1636 mutex_unlock(&vdev->vma_lock);
11c4cd07
AW
1637
1638 if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
1639 vma->vm_end - vma->vm_start, vma->vm_page_prot))
abafbc55 1640 ret = VM_FAULT_SIGBUS;
11c4cd07 1641
abafbc55
AW
1642up_out:
1643 up_read(&vdev->memory_lock);
1644 return ret;
11c4cd07
AW
1645}
1646
1647static const struct vm_operations_struct vfio_pci_mmap_ops = {
1648 .open = vfio_pci_mmap_open,
1649 .close = vfio_pci_mmap_close,
1650 .fault = vfio_pci_mmap_fault,
1651};
1652
89e1f7d4
AW
1653static int vfio_pci_mmap(void *device_data, struct vm_area_struct *vma)
1654{
1655 struct vfio_pci_device *vdev = device_data;
1656 struct pci_dev *pdev = vdev->pdev;
1657 unsigned int index;
34002f54 1658 u64 phys_len, req_len, pgoff, req_start;
89e1f7d4
AW
1659 int ret;
1660
1661 index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT);
1662
1663 if (vma->vm_end < vma->vm_start)
1664 return -EINVAL;
1665 if ((vma->vm_flags & VM_SHARED) == 0)
1666 return -EINVAL;
a15b1883
AK
1667 if (index >= VFIO_PCI_NUM_REGIONS) {
1668 int regnum = index - VFIO_PCI_NUM_REGIONS;
1669 struct vfio_pci_region *region = vdev->region + regnum;
1670
1671 if (region && region->ops && region->ops->mmap &&
1672 (region->flags & VFIO_REGION_INFO_FLAG_MMAP))
1673 return region->ops->mmap(vdev, region, vma);
1674 return -EINVAL;
1675 }
89e1f7d4
AW
1676 if (index >= VFIO_PCI_ROM_REGION_INDEX)
1677 return -EINVAL;
05f0c03f 1678 if (!vdev->bar_mmap_supported[index])
89e1f7d4
AW
1679 return -EINVAL;
1680
05f0c03f 1681 phys_len = PAGE_ALIGN(pci_resource_len(pdev, index));
89e1f7d4
AW
1682 req_len = vma->vm_end - vma->vm_start;
1683 pgoff = vma->vm_pgoff &
1684 ((1U << (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT)) - 1);
1685 req_start = pgoff << PAGE_SHIFT;
1686
05f0c03f 1687 if (req_start + req_len > phys_len)
89e1f7d4
AW
1688 return -EINVAL;
1689
89e1f7d4
AW
1690 /*
1691 * Even though we don't make use of the barmap for the mmap,
1692 * we need to request the region and the barmap tracks that.
1693 */
1694 if (!vdev->barmap[index]) {
1695 ret = pci_request_selected_regions(pdev,
1696 1 << index, "vfio-pci");
1697 if (ret)
1698 return ret;
1699
1700 vdev->barmap[index] = pci_iomap(pdev, index, 0);
e19f32da
AY
1701 if (!vdev->barmap[index]) {
1702 pci_release_selected_regions(pdev, 1 << index);
1703 return -ENOMEM;
1704 }
89e1f7d4
AW
1705 }
1706
1707 vma->vm_private_data = vdev;
89e1f7d4 1708 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
34002f54 1709 vma->vm_pgoff = (pci_resource_start(pdev, index) >> PAGE_SHIFT) + pgoff;
89e1f7d4 1710
11c4cd07
AW
1711 /*
1712 * See remap_pfn_range(), called from vfio_pci_fault() but we can't
1713 * change vm_flags within the fault handler. Set them now.
1714 */
1715 vma->vm_flags |= VM_IO | VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP;
1716 vma->vm_ops = &vfio_pci_mmap_ops;
1717
1718 return 0;
89e1f7d4
AW
1719}
1720
6140a8f5
AW
1721static void vfio_pci_request(void *device_data, unsigned int count)
1722{
1723 struct vfio_pci_device *vdev = device_data;
a88a7b3e 1724 struct pci_dev *pdev = vdev->pdev;
6140a8f5
AW
1725
1726 mutex_lock(&vdev->igate);
1727
1728 if (vdev->req_trigger) {
5f55d2ae 1729 if (!(count % 10))
a88a7b3e 1730 pci_notice_ratelimited(pdev,
5f55d2ae
AW
1731 "Relaying device request to user (#%u)\n",
1732 count);
6140a8f5 1733 eventfd_signal(vdev->req_trigger, 1);
5f55d2ae 1734 } else if (count == 0) {
a88a7b3e 1735 pci_warn(pdev,
5f55d2ae 1736 "No device request channel registered, blocked until released by user\n");
6140a8f5
AW
1737 }
1738
1739 mutex_unlock(&vdev->igate);
1740}
1741
cc20d799
AW
1742static int vfio_pci_validate_vf_token(struct vfio_pci_device *vdev,
1743 bool vf_token, uuid_t *uuid)
1744{
1745 /*
1746 * There's always some degree of trust or collaboration between SR-IOV
1747 * PF and VFs, even if just that the PF hosts the SR-IOV capability and
1748 * can disrupt VFs with a reset, but often the PF has more explicit
1749 * access to deny service to the VF or access data passed through the
1750 * VF. We therefore require an opt-in via a shared VF token (UUID) to
1751 * represent this trust. This both prevents that a VF driver might
1752 * assume the PF driver is a trusted, in-kernel driver, and also that
1753 * a PF driver might be replaced with a rogue driver, unknown to in-use
1754 * VF drivers.
1755 *
1756 * Therefore when presented with a VF, if the PF is a vfio device and
1757 * it is bound to the vfio-pci driver, the user needs to provide a VF
1758 * token to access the device, in the form of appending a vf_token to
1759 * the device name, for example:
1760 *
1761 * "0000:04:10.0 vf_token=bd8d9d2b-5a5f-4f5a-a211-f591514ba1f3"
1762 *
1763 * When presented with a PF which has VFs in use, the user must also
1764 * provide the current VF token to prove collaboration with existing
1765 * VF users. If VFs are not in use, the VF token provided for the PF
1766 * device will act to set the VF token.
1767 *
1768 * If the VF token is provided but unused, an error is generated.
1769 */
1770 if (!vdev->pdev->is_virtfn && !vdev->vf_token && !vf_token)
1771 return 0; /* No VF token provided or required */
1772
1773 if (vdev->pdev->is_virtfn) {
1774 struct vfio_device *pf_dev;
1775 struct vfio_pci_device *pf_vdev = get_pf_vdev(vdev, &pf_dev);
1776 bool match;
1777
1778 if (!pf_vdev) {
1779 if (!vf_token)
1780 return 0; /* PF is not vfio-pci, no VF token */
1781
1782 pci_info_ratelimited(vdev->pdev,
1783 "VF token incorrectly provided, PF not bound to vfio-pci\n");
1784 return -EINVAL;
1785 }
1786
1787 if (!vf_token) {
1788 vfio_device_put(pf_dev);
1789 pci_info_ratelimited(vdev->pdev,
1790 "VF token required to access device\n");
1791 return -EACCES;
1792 }
1793
1794 mutex_lock(&pf_vdev->vf_token->lock);
1795 match = uuid_equal(uuid, &pf_vdev->vf_token->uuid);
1796 mutex_unlock(&pf_vdev->vf_token->lock);
1797
1798 vfio_device_put(pf_dev);
1799
1800 if (!match) {
1801 pci_info_ratelimited(vdev->pdev,
1802 "Incorrect VF token provided for device\n");
1803 return -EACCES;
1804 }
1805 } else if (vdev->vf_token) {
1806 mutex_lock(&vdev->vf_token->lock);
1807 if (vdev->vf_token->users) {
1808 if (!vf_token) {
1809 mutex_unlock(&vdev->vf_token->lock);
1810 pci_info_ratelimited(vdev->pdev,
1811 "VF token required to access device\n");
1812 return -EACCES;
1813 }
1814
1815 if (!uuid_equal(uuid, &vdev->vf_token->uuid)) {
1816 mutex_unlock(&vdev->vf_token->lock);
1817 pci_info_ratelimited(vdev->pdev,
1818 "Incorrect VF token provided for device\n");
1819 return -EACCES;
1820 }
1821 } else if (vf_token) {
1822 uuid_copy(&vdev->vf_token->uuid, uuid);
1823 }
1824
1825 mutex_unlock(&vdev->vf_token->lock);
1826 } else if (vf_token) {
1827 pci_info_ratelimited(vdev->pdev,
1828 "VF token incorrectly provided, not a PF or VF\n");
1829 return -EINVAL;
1830 }
1831
1832 return 0;
1833}
1834
1835#define VF_TOKEN_ARG "vf_token="
1836
467c084f
AW
1837static int vfio_pci_match(void *device_data, char *buf)
1838{
1839 struct vfio_pci_device *vdev = device_data;
cc20d799
AW
1840 bool vf_token = false;
1841 uuid_t uuid;
1842 int ret;
1843
1844 if (strncmp(pci_name(vdev->pdev), buf, strlen(pci_name(vdev->pdev))))
1845 return 0; /* No match */
1846
1847 if (strlen(buf) > strlen(pci_name(vdev->pdev))) {
1848 buf += strlen(pci_name(vdev->pdev));
1849
1850 if (*buf != ' ')
1851 return 0; /* No match: non-whitespace after name */
1852
1853 while (*buf) {
1854 if (*buf == ' ') {
1855 buf++;
1856 continue;
1857 }
1858
1859 if (!vf_token && !strncmp(buf, VF_TOKEN_ARG,
1860 strlen(VF_TOKEN_ARG))) {
1861 buf += strlen(VF_TOKEN_ARG);
1862
1863 if (strlen(buf) < UUID_STRING_LEN)
1864 return -EINVAL;
1865
1866 ret = uuid_parse(buf, &uuid);
1867 if (ret)
1868 return ret;
467c084f 1869
cc20d799
AW
1870 vf_token = true;
1871 buf += UUID_STRING_LEN;
1872 } else {
1873 /* Unknown/duplicate option */
1874 return -EINVAL;
1875 }
1876 }
1877 }
1878
1879 ret = vfio_pci_validate_vf_token(vdev, vf_token, &uuid);
1880 if (ret)
1881 return ret;
1882
1883 return 1; /* Match */
467c084f
AW
1884}
1885
89e1f7d4
AW
1886static const struct vfio_device_ops vfio_pci_ops = {
1887 .name = "vfio-pci",
1888 .open = vfio_pci_open,
1889 .release = vfio_pci_release,
1890 .ioctl = vfio_pci_ioctl,
1891 .read = vfio_pci_read,
1892 .write = vfio_pci_write,
1893 .mmap = vfio_pci_mmap,
6140a8f5 1894 .request = vfio_pci_request,
467c084f 1895 .match = vfio_pci_match,
89e1f7d4
AW
1896};
1897
e309df5b
AW
1898static int vfio_pci_reflck_attach(struct vfio_pci_device *vdev);
1899static void vfio_pci_reflck_put(struct vfio_pci_reflck *reflck);
137e5531
AW
1900
1901static int vfio_pci_bus_notifier(struct notifier_block *nb,
1902 unsigned long action, void *data)
1903{
1904 struct vfio_pci_device *vdev = container_of(nb,
1905 struct vfio_pci_device, nb);
1906 struct device *dev = data;
1907 struct pci_dev *pdev = to_pci_dev(dev);
1908 struct pci_dev *physfn = pci_physfn(pdev);
1909
1910 if (action == BUS_NOTIFY_ADD_DEVICE &&
1911 pdev->is_virtfn && physfn == vdev->pdev) {
1912 pci_info(vdev->pdev, "Captured SR-IOV VF %s driver_override\n",
1913 pci_name(pdev));
1914 pdev->driver_override = kasprintf(GFP_KERNEL, "%s",
1915 vfio_pci_ops.name);
1916 } else if (action == BUS_NOTIFY_BOUND_DRIVER &&
1917 pdev->is_virtfn && physfn == vdev->pdev) {
1918 struct pci_driver *drv = pci_dev_driver(pdev);
1919
1920 if (drv && drv != &vfio_pci_driver)
1921 pci_warn(vdev->pdev,
1922 "VF %s bound to driver %s while PF bound to vfio-pci\n",
1923 pci_name(pdev), drv->name);
1924 }
1925
1926 return 0;
1927}
e309df5b 1928
89e1f7d4
AW
1929static int vfio_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1930{
89e1f7d4
AW
1931 struct vfio_pci_device *vdev;
1932 struct iommu_group *group;
1933 int ret;
1934
1f97970e
GC
1935 if (vfio_pci_is_denylisted(pdev))
1936 return -EINVAL;
1937
7c2e211f 1938 if (pdev->hdr_type != PCI_HEADER_TYPE_NORMAL)
89e1f7d4
AW
1939 return -EINVAL;
1940
0dd0e297 1941 /*
137e5531
AW
1942 * Prevent binding to PFs with VFs enabled, the VFs might be in use
1943 * by the host or other users. We cannot capture the VFs if they
1944 * already exist, nor can we track VF users. Disabling SR-IOV here
1945 * would initiate removing the VFs, which would unbind the driver,
1946 * which is prone to blocking if that VF is also in use by vfio-pci.
1947 * Just reject these PFs and let the user sort it out.
0dd0e297
AW
1948 */
1949 if (pci_num_vf(pdev)) {
1950 pci_warn(pdev, "Cannot bind to PF with SR-IOV enabled\n");
1951 return -EBUSY;
1952 }
1953
03a76b60 1954 group = vfio_iommu_group_get(&pdev->dev);
89e1f7d4
AW
1955 if (!group)
1956 return -EINVAL;
1957
1958 vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
1959 if (!vdev) {
b66574a3
AW
1960 ret = -ENOMEM;
1961 goto out_group_put;
89e1f7d4
AW
1962 }
1963
1964 vdev->pdev = pdev;
1965 vdev->irq_type = VFIO_PCI_NUM_IRQS;
1966 mutex_init(&vdev->igate);
1967 spin_lock_init(&vdev->irqlock);
30656177
AW
1968 mutex_init(&vdev->ioeventfds_lock);
1969 INIT_LIST_HEAD(&vdev->ioeventfds_list);
11c4cd07
AW
1970 mutex_init(&vdev->vma_lock);
1971 INIT_LIST_HEAD(&vdev->vma_list);
abafbc55 1972 init_rwsem(&vdev->memory_lock);
89e1f7d4
AW
1973
1974 ret = vfio_add_group_dev(&pdev->dev, &vfio_pci_ops, vdev);
b66574a3
AW
1975 if (ret)
1976 goto out_free;
89e1f7d4 1977
e309df5b 1978 ret = vfio_pci_reflck_attach(vdev);
b66574a3
AW
1979 if (ret)
1980 goto out_del_group_dev;
e309df5b 1981
cc20d799
AW
1982 if (pdev->is_physfn) {
1983 vdev->vf_token = kzalloc(sizeof(*vdev->vf_token), GFP_KERNEL);
1984 if (!vdev->vf_token) {
b66574a3
AW
1985 ret = -ENOMEM;
1986 goto out_reflck;
137e5531
AW
1987 }
1988
cc20d799
AW
1989 mutex_init(&vdev->vf_token->lock);
1990 uuid_gen(&vdev->vf_token->uuid);
b66574a3
AW
1991
1992 vdev->nb.notifier_call = vfio_pci_bus_notifier;
1993 ret = bus_register_notifier(&pci_bus_type, &vdev->nb);
1994 if (ret)
1995 goto out_vf_token;
cc20d799
AW
1996 }
1997
ecaa1f6a
AW
1998 if (vfio_pci_is_vga(pdev)) {
1999 vga_client_register(pdev, vdev, NULL, vfio_pci_set_vga_decode);
2000 vga_set_legacy_decoding(pdev,
2001 vfio_pci_set_vga_decode(vdev, false));
2002 }
2003
51ef3a00
AW
2004 vfio_pci_probe_power_state(vdev);
2005
6eb70187
AW
2006 if (!disable_idle_d3) {
2007 /*
2008 * pci-core sets the device power state to an unknown value at
2009 * bootup and after being removed from a driver. The only
2010 * transition it allows from this unknown state is to D0, which
2011 * typically happens when a driver calls pci_enable_device().
2012 * We're not ready to enable the device yet, but we do want to
2013 * be able to get to D3. Therefore first do a D0 transition
2014 * before going to D3.
2015 */
51ef3a00
AW
2016 vfio_pci_set_power_state(vdev, PCI_D0);
2017 vfio_pci_set_power_state(vdev, PCI_D3hot);
6eb70187
AW
2018 }
2019
89e1f7d4 2020 return ret;
b66574a3
AW
2021
2022out_vf_token:
2023 kfree(vdev->vf_token);
2024out_reflck:
2025 vfio_pci_reflck_put(vdev->reflck);
2026out_del_group_dev:
2027 vfio_del_group_dev(&pdev->dev);
2028out_free:
2029 kfree(vdev);
2030out_group_put:
2031 vfio_iommu_group_put(group, &pdev->dev);
2032 return ret;
89e1f7d4
AW
2033}
2034
2035static void vfio_pci_remove(struct pci_dev *pdev)
2036{
2037 struct vfio_pci_device *vdev;
2038
137e5531
AW
2039 pci_disable_sriov(pdev);
2040
89e1f7d4 2041 vdev = vfio_del_group_dev(&pdev->dev);
ecaa1f6a
AW
2042 if (!vdev)
2043 return;
2044
cc20d799
AW
2045 if (vdev->vf_token) {
2046 WARN_ON(vdev->vf_token->users);
2047 mutex_destroy(&vdev->vf_token->lock);
2048 kfree(vdev->vf_token);
2049 }
2050
137e5531
AW
2051 if (vdev->nb.notifier_call)
2052 bus_unregister_notifier(&pci_bus_type, &vdev->nb);
2053
e309df5b
AW
2054 vfio_pci_reflck_put(vdev->reflck);
2055
03a76b60 2056 vfio_iommu_group_put(pdev->dev.iommu_group, &pdev->dev);
28541d41 2057 kfree(vdev->region);
30656177 2058 mutex_destroy(&vdev->ioeventfds_lock);
51ef3a00
AW
2059
2060 if (!disable_idle_d3)
2061 vfio_pci_set_power_state(vdev, PCI_D0);
2062
2063 kfree(vdev->pm_save);
ecaa1f6a
AW
2064 kfree(vdev);
2065
2066 if (vfio_pci_is_vga(pdev)) {
2067 vga_client_register(pdev, NULL, NULL, NULL);
2068 vga_set_legacy_decoding(pdev,
2069 VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
2070 VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM);
61d79256 2071 }
89e1f7d4
AW
2072}
2073
dad9f897
VMP
2074static pci_ers_result_t vfio_pci_aer_err_detected(struct pci_dev *pdev,
2075 pci_channel_state_t state)
2076{
2077 struct vfio_pci_device *vdev;
2078 struct vfio_device *device;
2079
2080 device = vfio_device_get_from_dev(&pdev->dev);
2081 if (device == NULL)
2082 return PCI_ERS_RESULT_DISCONNECT;
2083
2084 vdev = vfio_device_data(device);
2085 if (vdev == NULL) {
2086 vfio_device_put(device);
2087 return PCI_ERS_RESULT_DISCONNECT;
2088 }
2089
3be3a074
AW
2090 mutex_lock(&vdev->igate);
2091
dad9f897
VMP
2092 if (vdev->err_trigger)
2093 eventfd_signal(vdev->err_trigger, 1);
2094
3be3a074
AW
2095 mutex_unlock(&vdev->igate);
2096
dad9f897
VMP
2097 vfio_device_put(device);
2098
2099 return PCI_ERS_RESULT_CAN_RECOVER;
2100}
2101
137e5531
AW
2102static int vfio_pci_sriov_configure(struct pci_dev *pdev, int nr_virtfn)
2103{
2104 struct vfio_pci_device *vdev;
2105 struct vfio_device *device;
2106 int ret = 0;
2107
2108 might_sleep();
2109
2110 if (!enable_sriov)
2111 return -ENOENT;
2112
2113 device = vfio_device_get_from_dev(&pdev->dev);
2114 if (!device)
2115 return -ENODEV;
2116
2117 vdev = vfio_device_data(device);
2118 if (!vdev) {
2119 vfio_device_put(device);
2120 return -ENODEV;
2121 }
2122
2123 if (nr_virtfn == 0)
2124 pci_disable_sriov(pdev);
2125 else
2126 ret = pci_enable_sriov(pdev, nr_virtfn);
2127
2128 vfio_device_put(device);
2129
2130 return ret < 0 ? ret : nr_virtfn;
2131}
2132
7d10f4e0 2133static const struct pci_error_handlers vfio_err_handlers = {
dad9f897
VMP
2134 .error_detected = vfio_pci_aer_err_detected,
2135};
2136
89e1f7d4 2137static struct pci_driver vfio_pci_driver = {
137e5531
AW
2138 .name = "vfio-pci",
2139 .id_table = NULL, /* only dynamic ids */
2140 .probe = vfio_pci_probe,
2141 .remove = vfio_pci_remove,
2142 .sriov_configure = vfio_pci_sriov_configure,
2143 .err_handler = &vfio_err_handlers,
89e1f7d4
AW
2144};
2145
e309df5b
AW
2146static DEFINE_MUTEX(reflck_lock);
2147
2148static struct vfio_pci_reflck *vfio_pci_reflck_alloc(void)
2149{
2150 struct vfio_pci_reflck *reflck;
2151
2152 reflck = kzalloc(sizeof(*reflck), GFP_KERNEL);
2153 if (!reflck)
2154 return ERR_PTR(-ENOMEM);
2155
2156 kref_init(&reflck->kref);
2157 mutex_init(&reflck->lock);
2158
2159 return reflck;
2160}
2161
2162static void vfio_pci_reflck_get(struct vfio_pci_reflck *reflck)
2163{
2164 kref_get(&reflck->kref);
2165}
2166
2167static int vfio_pci_reflck_find(struct pci_dev *pdev, void *data)
2168{
2169 struct vfio_pci_reflck **preflck = data;
2170 struct vfio_device *device;
2171 struct vfio_pci_device *vdev;
2172
2173 device = vfio_device_get_from_dev(&pdev->dev);
2174 if (!device)
2175 return 0;
2176
2177 if (pci_dev_driver(pdev) != &vfio_pci_driver) {
2178 vfio_device_put(device);
2179 return 0;
2180 }
2181
2182 vdev = vfio_device_data(device);
2183
2184 if (vdev->reflck) {
2185 vfio_pci_reflck_get(vdev->reflck);
2186 *preflck = vdev->reflck;
2187 vfio_device_put(device);
2188 return 1;
2189 }
2190
2191 vfio_device_put(device);
2192 return 0;
2193}
2194
2195static int vfio_pci_reflck_attach(struct vfio_pci_device *vdev)
2196{
2197 bool slot = !pci_probe_reset_slot(vdev->pdev->slot);
2198
2199 mutex_lock(&reflck_lock);
2200
2201 if (pci_is_root_bus(vdev->pdev->bus) ||
2202 vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_reflck_find,
2203 &vdev->reflck, slot) <= 0)
2204 vdev->reflck = vfio_pci_reflck_alloc();
2205
2206 mutex_unlock(&reflck_lock);
2207
2208 return PTR_ERR_OR_ZERO(vdev->reflck);
2209}
2210
2211static void vfio_pci_reflck_release(struct kref *kref)
2212{
2213 struct vfio_pci_reflck *reflck = container_of(kref,
2214 struct vfio_pci_reflck,
2215 kref);
2216
2217 kfree(reflck);
2218 mutex_unlock(&reflck_lock);
2219}
2220
2221static void vfio_pci_reflck_put(struct vfio_pci_reflck *reflck)
2222{
2223 kref_put_mutex(&reflck->kref, vfio_pci_reflck_release, &reflck_lock);
2224}
2225
e309df5b 2226static int vfio_pci_get_unused_devs(struct pci_dev *pdev, void *data)
bc4fba77 2227{
93899a67 2228 struct vfio_devices *devs = data;
20f30017 2229 struct vfio_device *device;
e309df5b 2230 struct vfio_pci_device *vdev;
bc4fba77 2231
93899a67
AW
2232 if (devs->cur_index == devs->max_index)
2233 return -ENOSPC;
bc4fba77 2234
20f30017
AW
2235 device = vfio_device_get_from_dev(&pdev->dev);
2236 if (!device)
93899a67 2237 return -EINVAL;
bc4fba77 2238
20f30017
AW
2239 if (pci_dev_driver(pdev) != &vfio_pci_driver) {
2240 vfio_device_put(device);
2241 return -EBUSY;
2242 }
2243
e309df5b
AW
2244 vdev = vfio_device_data(device);
2245
2246 /* Fault if the device is not unused */
2247 if (vdev->refcnt) {
2248 vfio_device_put(device);
2249 return -EBUSY;
2250 }
2251
20f30017 2252 devs->devices[devs->cur_index++] = device;
bc4fba77
AW
2253 return 0;
2254}
2255
abafbc55
AW
2256static int vfio_pci_try_zap_and_vma_lock_cb(struct pci_dev *pdev, void *data)
2257{
2258 struct vfio_devices *devs = data;
2259 struct vfio_device *device;
2260 struct vfio_pci_device *vdev;
2261
2262 if (devs->cur_index == devs->max_index)
2263 return -ENOSPC;
2264
2265 device = vfio_device_get_from_dev(&pdev->dev);
2266 if (!device)
2267 return -EINVAL;
2268
2269 if (pci_dev_driver(pdev) != &vfio_pci_driver) {
2270 vfio_device_put(device);
2271 return -EBUSY;
2272 }
2273
2274 vdev = vfio_device_data(device);
2275
2276 /*
2277 * Locking multiple devices is prone to deadlock, runaway and
2278 * unwind if we hit contention.
2279 */
2280 if (!vfio_pci_zap_and_vma_lock(vdev, true)) {
2281 vfio_device_put(device);
2282 return -EBUSY;
2283 }
2284
2285 devs->devices[devs->cur_index++] = device;
2286 return 0;
2287}
2288
bc4fba77 2289/*
e309df5b
AW
2290 * If a bus or slot reset is available for the provided device and:
2291 * - All of the devices affected by that bus or slot reset are unused
2292 * (!refcnt)
2293 * - At least one of the affected devices is marked dirty via
2294 * needs_reset (such as by lack of FLR support)
2295 * Then attempt to perform that bus or slot reset. Callers are required
2296 * to hold vdev->reflck->lock, protecting the bus/slot reset group from
2297 * concurrent opens. A vfio_device reference is acquired for each device
2298 * to prevent unbinds during the reset operation.
93899a67
AW
2299 *
2300 * NB: vfio-core considers a group to be viable even if some devices are
2301 * bound to drivers like pci-stub or pcieport. Here we require all devices
2302 * to be bound to vfio_pci since that's the only way we can be sure they
2303 * stay put.
bc4fba77
AW
2304 */
2305static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev)
2306{
93899a67
AW
2307 struct vfio_devices devs = { .cur_index = 0 };
2308 int i = 0, ret = -EINVAL;
e309df5b 2309 bool slot = false;
93899a67 2310 struct vfio_pci_device *tmp;
bc4fba77
AW
2311
2312 if (!pci_probe_reset_slot(vdev->pdev->slot))
2313 slot = true;
2314 else if (pci_probe_reset_bus(vdev->pdev->bus))
2315 return;
2316
93899a67
AW
2317 if (vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_count_devs,
2318 &i, slot) || !i)
bc4fba77
AW
2319 return;
2320
93899a67
AW
2321 devs.max_index = i;
2322 devs.devices = kcalloc(i, sizeof(struct vfio_device *), GFP_KERNEL);
2323 if (!devs.devices)
bc4fba77
AW
2324 return;
2325
93899a67 2326 if (vfio_pci_for_each_slot_or_bus(vdev->pdev,
e309df5b
AW
2327 vfio_pci_get_unused_devs,
2328 &devs, slot))
93899a67
AW
2329 goto put_devs;
2330
e309df5b 2331 /* Does at least one need a reset? */
93899a67
AW
2332 for (i = 0; i < devs.cur_index; i++) {
2333 tmp = vfio_device_data(devs.devices[i]);
e309df5b
AW
2334 if (tmp->needs_reset) {
2335 ret = pci_reset_bus(vdev->pdev);
2336 break;
2337 }
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AW
2338 }
2339
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AW
2340put_devs:
2341 for (i = 0; i < devs.cur_index; i++) {
6eb70187 2342 tmp = vfio_device_data(devs.devices[i]);
e309df5b
AW
2343
2344 /*
2345 * If reset was successful, affected devices no longer need
2346 * a reset and we should return all the collateral devices
2347 * to low power. If not successful, we either didn't reset
2348 * the bus or timed out waiting for it, so let's not touch
2349 * the power state.
2350 */
2351 if (!ret) {
93899a67 2352 tmp->needs_reset = false;
6eb70187 2353
e309df5b 2354 if (tmp != vdev && !disable_idle_d3)
51ef3a00 2355 vfio_pci_set_power_state(tmp, PCI_D3hot);
e309df5b 2356 }
6eb70187 2357
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2358 vfio_device_put(devs.devices[i]);
2359 }
2360
2361 kfree(devs.devices);
bc4fba77
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2362}
2363
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AW
2364static void __exit vfio_pci_cleanup(void)
2365{
2366 pci_unregister_driver(&vfio_pci_driver);
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2367 vfio_pci_uninit_perm_bits();
2368}
2369
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2370static void __init vfio_pci_fill_ids(void)
2371{
2372 char *p, *id;
2373 int rc;
2374
2375 /* no ids passed actually */
2376 if (ids[0] == '\0')
2377 return;
2378
2379 /* add ids specified in the module parameter */
2380 p = ids;
2381 while ((id = strsep(&p, ","))) {
2382 unsigned int vendor, device, subvendor = PCI_ANY_ID,
2383 subdevice = PCI_ANY_ID, class = 0, class_mask = 0;
2384 int fields;
2385
2386 if (!strlen(id))
2387 continue;
2388
2389 fields = sscanf(id, "%x:%x:%x:%x:%x:%x",
2390 &vendor, &device, &subvendor, &subdevice,
2391 &class, &class_mask);
2392
2393 if (fields < 2) {
2394 pr_warn("invalid id string \"%s\"\n", id);
2395 continue;
2396 }
2397
2398 rc = pci_add_dynid(&vfio_pci_driver, vendor, device,
2399 subvendor, subdevice, class, class_mask, 0);
2400 if (rc)
426b046b 2401 pr_warn("failed to add dynamic id [%04x:%04x[%04x:%04x]] class %#08x/%08x (%d)\n",
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2402 vendor, device, subvendor, subdevice,
2403 class, class_mask, rc);
2404 else
426b046b 2405 pr_info("add [%04x:%04x[%04x:%04x]] class %#08x/%08x\n",
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2406 vendor, device, subvendor, subdevice,
2407 class, class_mask);
2408 }
2409}
2410
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2411static int __init vfio_pci_init(void)
2412{
2413 int ret;
2414
2415 /* Allocate shared config space permision data used by all devices */
2416 ret = vfio_pci_init_perm_bits();
2417 if (ret)
2418 return ret;
2419
89e1f7d4
AW
2420 /* Register and scan for devices */
2421 ret = pci_register_driver(&vfio_pci_driver);
2422 if (ret)
2423 goto out_driver;
2424
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AW
2425 vfio_pci_fill_ids();
2426
1f97970e
GC
2427 if (disable_denylist)
2428 pr_warn("device denylist disabled.\n");
2429
89e1f7d4
AW
2430 return 0;
2431
89e1f7d4
AW
2432out_driver:
2433 vfio_pci_uninit_perm_bits();
2434 return ret;
2435}
2436
2437module_init(vfio_pci_init);
2438module_exit(vfio_pci_cleanup);
2439
2440MODULE_VERSION(DRIVER_VERSION);
2441MODULE_LICENSE("GPL v2");
2442MODULE_AUTHOR(DRIVER_AUTHOR);
2443MODULE_DESCRIPTION(DRIVER_DESC);