Commit | Line | Data |
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89e1f7d4 AW |
1 | /* |
2 | * Copyright (C) 2012 Red Hat, Inc. All rights reserved. | |
3 | * Author: Alex Williamson <alex.williamson@redhat.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * Derived from original vfio: | |
10 | * Copyright 2010 Cisco Systems, Inc. All rights reserved. | |
11 | * Author: Tom Lyon, pugs@cisco.com | |
12 | */ | |
13 | ||
80c7e8cc AW |
14 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
15 | ||
89e1f7d4 AW |
16 | #include <linux/device.h> |
17 | #include <linux/eventfd.h> | |
8b27ee60 | 18 | #include <linux/file.h> |
89e1f7d4 AW |
19 | #include <linux/interrupt.h> |
20 | #include <linux/iommu.h> | |
21 | #include <linux/module.h> | |
22 | #include <linux/mutex.h> | |
23 | #include <linux/notifier.h> | |
24 | #include <linux/pci.h> | |
25 | #include <linux/pm_runtime.h> | |
26 | #include <linux/slab.h> | |
27 | #include <linux/types.h> | |
28 | #include <linux/uaccess.h> | |
29 | #include <linux/vfio.h> | |
ecaa1f6a | 30 | #include <linux/vgaarb.h> |
89e1f7d4 AW |
31 | |
32 | #include "vfio_pci_private.h" | |
33 | ||
34 | #define DRIVER_VERSION "0.2" | |
35 | #define DRIVER_AUTHOR "Alex Williamson <alex.williamson@redhat.com>" | |
36 | #define DRIVER_DESC "VFIO PCI - User Level meta-driver" | |
37 | ||
80c7e8cc AW |
38 | static char ids[1024] __initdata; |
39 | module_param_string(ids, ids, sizeof(ids), 0); | |
40 | MODULE_PARM_DESC(ids, "Initial PCI IDs to add to the vfio driver, format is \"vendor:device[:subvendor[:subdevice[:class[:class_mask]]]]\" and multiple comma separated entries can be specified"); | |
41 | ||
89e1f7d4 AW |
42 | static bool nointxmask; |
43 | module_param_named(nointxmask, nointxmask, bool, S_IRUGO | S_IWUSR); | |
44 | MODULE_PARM_DESC(nointxmask, | |
45 | "Disable support for PCI 2.3 style INTx masking. If this resolves problems for specific devices, report lspci -vvvxxx to linux-pci@vger.kernel.org so the device can be fixed automatically via the broken_intx_masking flag."); | |
46 | ||
88c0dead AW |
47 | #ifdef CONFIG_VFIO_PCI_VGA |
48 | static bool disable_vga; | |
49 | module_param(disable_vga, bool, S_IRUGO); | |
50 | MODULE_PARM_DESC(disable_vga, "Disable VGA resource access through vfio-pci"); | |
51 | #endif | |
52 | ||
6eb70187 AW |
53 | static bool disable_idle_d3; |
54 | module_param(disable_idle_d3, bool, S_IRUGO | S_IWUSR); | |
55 | MODULE_PARM_DESC(disable_idle_d3, | |
56 | "Disable using the PCI D3 low power state for idle, unused devices"); | |
57 | ||
61d79256 AW |
58 | static DEFINE_MUTEX(driver_lock); |
59 | ||
88c0dead AW |
60 | static inline bool vfio_vga_disabled(void) |
61 | { | |
62 | #ifdef CONFIG_VFIO_PCI_VGA | |
63 | return disable_vga; | |
64 | #else | |
65 | return true; | |
66 | #endif | |
67 | } | |
68 | ||
ecaa1f6a AW |
69 | /* |
70 | * Our VGA arbiter participation is limited since we don't know anything | |
71 | * about the device itself. However, if the device is the only VGA device | |
72 | * downstream of a bridge and VFIO VGA support is disabled, then we can | |
73 | * safely return legacy VGA IO and memory as not decoded since the user | |
74 | * has no way to get to it and routing can be disabled externally at the | |
75 | * bridge. | |
76 | */ | |
77 | static unsigned int vfio_pci_set_vga_decode(void *opaque, bool single_vga) | |
78 | { | |
79 | struct vfio_pci_device *vdev = opaque; | |
80 | struct pci_dev *tmp = NULL, *pdev = vdev->pdev; | |
81 | unsigned char max_busnr; | |
82 | unsigned int decodes; | |
83 | ||
84 | if (single_vga || !vfio_vga_disabled() || pci_is_root_bus(pdev->bus)) | |
85 | return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM | | |
86 | VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM; | |
87 | ||
88 | max_busnr = pci_bus_max_busnr(pdev->bus); | |
89 | decodes = VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; | |
90 | ||
91 | while ((tmp = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, tmp)) != NULL) { | |
92 | if (tmp == pdev || | |
93 | pci_domain_nr(tmp->bus) != pci_domain_nr(pdev->bus) || | |
94 | pci_is_root_bus(tmp->bus)) | |
95 | continue; | |
96 | ||
97 | if (tmp->bus->number >= pdev->bus->number && | |
98 | tmp->bus->number <= max_busnr) { | |
99 | pci_dev_put(tmp); | |
100 | decodes |= VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM; | |
101 | break; | |
102 | } | |
103 | } | |
104 | ||
105 | return decodes; | |
106 | } | |
107 | ||
108 | static inline bool vfio_pci_is_vga(struct pci_dev *pdev) | |
109 | { | |
110 | return (pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA; | |
111 | } | |
112 | ||
05f0c03f YX |
113 | static void vfio_pci_probe_mmaps(struct vfio_pci_device *vdev) |
114 | { | |
115 | struct resource *res; | |
116 | int bar; | |
117 | struct vfio_pci_dummy_resource *dummy_res; | |
118 | ||
119 | INIT_LIST_HEAD(&vdev->dummy_resources_list); | |
120 | ||
121 | for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) { | |
122 | res = vdev->pdev->resource + bar; | |
123 | ||
124 | if (!IS_ENABLED(CONFIG_VFIO_PCI_MMAP)) | |
125 | goto no_mmap; | |
126 | ||
127 | if (!(res->flags & IORESOURCE_MEM)) | |
128 | goto no_mmap; | |
129 | ||
130 | /* | |
131 | * The PCI core shouldn't set up a resource with a | |
132 | * type but zero size. But there may be bugs that | |
133 | * cause us to do that. | |
134 | */ | |
135 | if (!resource_size(res)) | |
136 | goto no_mmap; | |
137 | ||
138 | if (resource_size(res) >= PAGE_SIZE) { | |
139 | vdev->bar_mmap_supported[bar] = true; | |
140 | continue; | |
141 | } | |
142 | ||
143 | if (!(res->start & ~PAGE_MASK)) { | |
144 | /* | |
145 | * Add a dummy resource to reserve the remainder | |
146 | * of the exclusive page in case that hot-add | |
147 | * device's bar is assigned into it. | |
148 | */ | |
149 | dummy_res = kzalloc(sizeof(*dummy_res), GFP_KERNEL); | |
150 | if (dummy_res == NULL) | |
151 | goto no_mmap; | |
152 | ||
153 | dummy_res->resource.name = "vfio sub-page reserved"; | |
154 | dummy_res->resource.start = res->end + 1; | |
155 | dummy_res->resource.end = res->start + PAGE_SIZE - 1; | |
156 | dummy_res->resource.flags = res->flags; | |
157 | if (request_resource(res->parent, | |
158 | &dummy_res->resource)) { | |
159 | kfree(dummy_res); | |
160 | goto no_mmap; | |
161 | } | |
162 | dummy_res->index = bar; | |
163 | list_add(&dummy_res->res_next, | |
164 | &vdev->dummy_resources_list); | |
165 | vdev->bar_mmap_supported[bar] = true; | |
166 | continue; | |
167 | } | |
168 | /* | |
169 | * Here we don't handle the case when the BAR is not page | |
170 | * aligned because we can't expect the BAR will be | |
171 | * assigned into the same location in a page in guest | |
172 | * when we passthrough the BAR. And it's hard to access | |
173 | * this BAR in userspace because we have no way to get | |
174 | * the BAR's location in a page. | |
175 | */ | |
176 | no_mmap: | |
177 | vdev->bar_mmap_supported[bar] = false; | |
178 | } | |
179 | } | |
180 | ||
bc4fba77 | 181 | static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev); |
f572a960 | 182 | static void vfio_pci_disable(struct vfio_pci_device *vdev); |
bc4fba77 | 183 | |
45074405 AW |
184 | /* |
185 | * INTx masking requires the ability to disable INTx signaling via PCI_COMMAND | |
186 | * _and_ the ability detect when the device is asserting INTx via PCI_STATUS. | |
187 | * If a device implements the former but not the latter we would typically | |
188 | * expect broken_intx_masking be set and require an exclusive interrupt. | |
189 | * However since we do have control of the device's ability to assert INTx, | |
190 | * we can instead pretend that the device does not implement INTx, virtualizing | |
191 | * the pin register to report zero and maintaining DisINTx set on the host. | |
192 | */ | |
193 | static bool vfio_pci_nointx(struct pci_dev *pdev) | |
194 | { | |
195 | switch (pdev->vendor) { | |
196 | case PCI_VENDOR_ID_INTEL: | |
197 | switch (pdev->device) { | |
198 | /* All i40e (XL710/X710) 10/20/40GbE NICs */ | |
199 | case 0x1572: | |
200 | case 0x1574: | |
201 | case 0x1580 ... 0x1581: | |
202 | case 0x1583 ... 0x1589: | |
203 | case 0x37d0 ... 0x37d2: | |
204 | return true; | |
205 | default: | |
206 | return false; | |
207 | } | |
208 | } | |
209 | ||
210 | return false; | |
211 | } | |
212 | ||
89e1f7d4 AW |
213 | static int vfio_pci_enable(struct vfio_pci_device *vdev) |
214 | { | |
215 | struct pci_dev *pdev = vdev->pdev; | |
216 | int ret; | |
217 | u16 cmd; | |
218 | u8 msix_pos; | |
219 | ||
6eb70187 AW |
220 | pci_set_power_state(pdev, PCI_D0); |
221 | ||
9c22e660 AW |
222 | /* Don't allow our initial saved state to include busmaster */ |
223 | pci_clear_master(pdev); | |
224 | ||
9a92c509 AW |
225 | ret = pci_enable_device(pdev); |
226 | if (ret) | |
227 | return ret; | |
228 | ||
89e1f7d4 AW |
229 | vdev->reset_works = (pci_reset_function(pdev) == 0); |
230 | pci_save_state(pdev); | |
231 | vdev->pci_saved_state = pci_store_saved_state(pdev); | |
232 | if (!vdev->pci_saved_state) | |
233 | pr_debug("%s: Couldn't store %s saved state\n", | |
234 | __func__, dev_name(&pdev->dev)); | |
235 | ||
45074405 AW |
236 | if (likely(!nointxmask)) { |
237 | if (vfio_pci_nointx(pdev)) { | |
238 | dev_info(&pdev->dev, "Masking broken INTx support\n"); | |
239 | vdev->nointx = true; | |
240 | pci_intx(pdev, 0); | |
241 | } else | |
242 | vdev->pci_2_3 = pci_intx_mask_supported(pdev); | |
9a92c509 | 243 | } |
89e1f7d4 | 244 | |
89e1f7d4 AW |
245 | pci_read_config_word(pdev, PCI_COMMAND, &cmd); |
246 | if (vdev->pci_2_3 && (cmd & PCI_COMMAND_INTX_DISABLE)) { | |
247 | cmd &= ~PCI_COMMAND_INTX_DISABLE; | |
248 | pci_write_config_word(pdev, PCI_COMMAND, cmd); | |
249 | } | |
250 | ||
45074405 AW |
251 | ret = vfio_config_init(vdev); |
252 | if (ret) { | |
253 | kfree(vdev->pci_saved_state); | |
254 | vdev->pci_saved_state = NULL; | |
255 | pci_disable_device(pdev); | |
256 | return ret; | |
257 | } | |
258 | ||
a9047f24 | 259 | msix_pos = pdev->msix_cap; |
89e1f7d4 AW |
260 | if (msix_pos) { |
261 | u16 flags; | |
262 | u32 table; | |
263 | ||
264 | pci_read_config_word(pdev, msix_pos + PCI_MSIX_FLAGS, &flags); | |
265 | pci_read_config_dword(pdev, msix_pos + PCI_MSIX_TABLE, &table); | |
266 | ||
508d1aa6 BH |
267 | vdev->msix_bar = table & PCI_MSIX_TABLE_BIR; |
268 | vdev->msix_offset = table & PCI_MSIX_TABLE_OFFSET; | |
89e1f7d4 AW |
269 | vdev->msix_size = ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) * 16; |
270 | } else | |
271 | vdev->msix_bar = 0xFF; | |
272 | ||
ecaa1f6a | 273 | if (!vfio_vga_disabled() && vfio_pci_is_vga(pdev)) |
84237a82 | 274 | vdev->has_vga = true; |
84237a82 | 275 | |
5846ff54 | 276 | |
f572a960 AW |
277 | if (vfio_pci_is_vga(pdev) && |
278 | pdev->vendor == PCI_VENDOR_ID_INTEL && | |
279 | IS_ENABLED(CONFIG_VFIO_PCI_IGD)) { | |
280 | ret = vfio_pci_igd_init(vdev); | |
281 | if (ret) { | |
282 | dev_warn(&vdev->pdev->dev, | |
283 | "Failed to setup Intel IGD regions\n"); | |
284 | vfio_pci_disable(vdev); | |
285 | return ret; | |
286 | } | |
5846ff54 AW |
287 | } |
288 | ||
05f0c03f YX |
289 | vfio_pci_probe_mmaps(vdev); |
290 | ||
9a92c509 | 291 | return 0; |
89e1f7d4 AW |
292 | } |
293 | ||
294 | static void vfio_pci_disable(struct vfio_pci_device *vdev) | |
295 | { | |
2007722a | 296 | struct pci_dev *pdev = vdev->pdev; |
05f0c03f | 297 | struct vfio_pci_dummy_resource *dummy_res, *tmp; |
28541d41 | 298 | int i, bar; |
89e1f7d4 | 299 | |
9c22e660 AW |
300 | /* Stop the device from further DMA */ |
301 | pci_clear_master(pdev); | |
89e1f7d4 AW |
302 | |
303 | vfio_pci_set_irqs_ioctl(vdev, VFIO_IRQ_SET_DATA_NONE | | |
304 | VFIO_IRQ_SET_ACTION_TRIGGER, | |
305 | vdev->irq_type, 0, 0, NULL); | |
306 | ||
307 | vdev->virq_disabled = false; | |
308 | ||
28541d41 AW |
309 | for (i = 0; i < vdev->num_regions; i++) |
310 | vdev->region[i].ops->release(vdev, &vdev->region[i]); | |
311 | ||
312 | vdev->num_regions = 0; | |
313 | kfree(vdev->region); | |
314 | vdev->region = NULL; /* don't krealloc a freed pointer */ | |
315 | ||
89e1f7d4 AW |
316 | vfio_config_free(vdev); |
317 | ||
89e1f7d4 AW |
318 | for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) { |
319 | if (!vdev->barmap[bar]) | |
320 | continue; | |
2007722a AW |
321 | pci_iounmap(pdev, vdev->barmap[bar]); |
322 | pci_release_selected_regions(pdev, 1 << bar); | |
89e1f7d4 AW |
323 | vdev->barmap[bar] = NULL; |
324 | } | |
2007722a | 325 | |
05f0c03f YX |
326 | list_for_each_entry_safe(dummy_res, tmp, |
327 | &vdev->dummy_resources_list, res_next) { | |
328 | list_del(&dummy_res->res_next); | |
329 | release_resource(&dummy_res->resource); | |
330 | kfree(dummy_res); | |
331 | } | |
332 | ||
bc4fba77 AW |
333 | vdev->needs_reset = true; |
334 | ||
2007722a AW |
335 | /* |
336 | * If we have saved state, restore it. If we can reset the device, | |
337 | * even better. Resetting with current state seems better than | |
338 | * nothing, but saving and restoring current state without reset | |
339 | * is just busy work. | |
340 | */ | |
341 | if (pci_load_and_free_saved_state(pdev, &vdev->pci_saved_state)) { | |
342 | pr_info("%s: Couldn't reload %s saved state\n", | |
343 | __func__, dev_name(&pdev->dev)); | |
344 | ||
345 | if (!vdev->reset_works) | |
9c22e660 | 346 | goto out; |
2007722a AW |
347 | |
348 | pci_save_state(pdev); | |
349 | } | |
350 | ||
351 | /* | |
352 | * Disable INTx and MSI, presumably to avoid spurious interrupts | |
353 | * during reset. Stolen from pci_reset_function() | |
354 | */ | |
355 | pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE); | |
356 | ||
d24cdbfd | 357 | /* |
890ed578 AW |
358 | * Try to reset the device. The success of this is dependent on |
359 | * being able to lock the device, which is not always possible. | |
d24cdbfd | 360 | */ |
561d72dd AW |
361 | if (vdev->reset_works && !pci_try_reset_function(pdev)) |
362 | vdev->needs_reset = false; | |
2007722a AW |
363 | |
364 | pci_restore_state(pdev); | |
9c22e660 AW |
365 | out: |
366 | pci_disable_device(pdev); | |
bc4fba77 AW |
367 | |
368 | vfio_pci_try_bus_reset(vdev); | |
6eb70187 AW |
369 | |
370 | if (!disable_idle_d3) | |
371 | pci_set_power_state(pdev, PCI_D3hot); | |
89e1f7d4 AW |
372 | } |
373 | ||
374 | static void vfio_pci_release(void *device_data) | |
375 | { | |
376 | struct vfio_pci_device *vdev = device_data; | |
377 | ||
61d79256 AW |
378 | mutex_lock(&driver_lock); |
379 | ||
380 | if (!(--vdev->refcnt)) { | |
1b69be5e | 381 | vfio_spapr_pci_eeh_release(vdev->pdev); |
89e1f7d4 | 382 | vfio_pci_disable(vdev); |
1b69be5e | 383 | } |
89e1f7d4 | 384 | |
61d79256 AW |
385 | mutex_unlock(&driver_lock); |
386 | ||
89e1f7d4 AW |
387 | module_put(THIS_MODULE); |
388 | } | |
389 | ||
390 | static int vfio_pci_open(void *device_data) | |
391 | { | |
392 | struct vfio_pci_device *vdev = device_data; | |
61d79256 | 393 | int ret = 0; |
89e1f7d4 AW |
394 | |
395 | if (!try_module_get(THIS_MODULE)) | |
396 | return -ENODEV; | |
397 | ||
61d79256 AW |
398 | mutex_lock(&driver_lock); |
399 | ||
400 | if (!vdev->refcnt) { | |
1b69be5e GS |
401 | ret = vfio_pci_enable(vdev); |
402 | if (ret) | |
403 | goto error; | |
404 | ||
9b936c96 | 405 | vfio_spapr_pci_eeh_open(vdev->pdev); |
89e1f7d4 | 406 | } |
61d79256 | 407 | vdev->refcnt++; |
1b69be5e | 408 | error: |
61d79256 AW |
409 | mutex_unlock(&driver_lock); |
410 | if (ret) | |
411 | module_put(THIS_MODULE); | |
1b69be5e | 412 | return ret; |
89e1f7d4 AW |
413 | } |
414 | ||
415 | static int vfio_pci_get_irq_count(struct vfio_pci_device *vdev, int irq_type) | |
416 | { | |
417 | if (irq_type == VFIO_PCI_INTX_IRQ_INDEX) { | |
418 | u8 pin; | |
419 | pci_read_config_byte(vdev->pdev, PCI_INTERRUPT_PIN, &pin); | |
45074405 | 420 | if (IS_ENABLED(CONFIG_VFIO_PCI_INTX) && !vdev->nointx && pin) |
89e1f7d4 AW |
421 | return 1; |
422 | ||
423 | } else if (irq_type == VFIO_PCI_MSI_IRQ_INDEX) { | |
424 | u8 pos; | |
425 | u16 flags; | |
426 | ||
a9047f24 | 427 | pos = vdev->pdev->msi_cap; |
89e1f7d4 AW |
428 | if (pos) { |
429 | pci_read_config_word(vdev->pdev, | |
430 | pos + PCI_MSI_FLAGS, &flags); | |
fd49c81f | 431 | return 1 << ((flags & PCI_MSI_FLAGS_QMASK) >> 1); |
89e1f7d4 AW |
432 | } |
433 | } else if (irq_type == VFIO_PCI_MSIX_IRQ_INDEX) { | |
434 | u8 pos; | |
435 | u16 flags; | |
436 | ||
a9047f24 | 437 | pos = vdev->pdev->msix_cap; |
89e1f7d4 AW |
438 | if (pos) { |
439 | pci_read_config_word(vdev->pdev, | |
440 | pos + PCI_MSIX_FLAGS, &flags); | |
441 | ||
442 | return (flags & PCI_MSIX_FLAGS_QSIZE) + 1; | |
443 | } | |
6140a8f5 | 444 | } else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX) { |
dad9f897 VMP |
445 | if (pci_is_pcie(vdev->pdev)) |
446 | return 1; | |
6140a8f5 AW |
447 | } else if (irq_type == VFIO_PCI_REQ_IRQ_INDEX) { |
448 | return 1; | |
449 | } | |
89e1f7d4 AW |
450 | |
451 | return 0; | |
452 | } | |
453 | ||
8b27ee60 AW |
454 | static int vfio_pci_count_devs(struct pci_dev *pdev, void *data) |
455 | { | |
456 | (*(int *)data)++; | |
457 | return 0; | |
458 | } | |
459 | ||
460 | struct vfio_pci_fill_info { | |
461 | int max; | |
462 | int cur; | |
463 | struct vfio_pci_dependent_device *devices; | |
464 | }; | |
465 | ||
466 | static int vfio_pci_fill_devs(struct pci_dev *pdev, void *data) | |
467 | { | |
468 | struct vfio_pci_fill_info *fill = data; | |
469 | struct iommu_group *iommu_group; | |
470 | ||
471 | if (fill->cur == fill->max) | |
472 | return -EAGAIN; /* Something changed, try again */ | |
473 | ||
474 | iommu_group = iommu_group_get(&pdev->dev); | |
475 | if (!iommu_group) | |
476 | return -EPERM; /* Cannot reset non-isolated devices */ | |
477 | ||
478 | fill->devices[fill->cur].group_id = iommu_group_id(iommu_group); | |
479 | fill->devices[fill->cur].segment = pci_domain_nr(pdev->bus); | |
480 | fill->devices[fill->cur].bus = pdev->bus->number; | |
481 | fill->devices[fill->cur].devfn = pdev->devfn; | |
482 | fill->cur++; | |
483 | iommu_group_put(iommu_group); | |
484 | return 0; | |
485 | } | |
486 | ||
487 | struct vfio_pci_group_entry { | |
488 | struct vfio_group *group; | |
489 | int id; | |
490 | }; | |
491 | ||
492 | struct vfio_pci_group_info { | |
493 | int count; | |
494 | struct vfio_pci_group_entry *groups; | |
495 | }; | |
496 | ||
497 | static int vfio_pci_validate_devs(struct pci_dev *pdev, void *data) | |
498 | { | |
499 | struct vfio_pci_group_info *info = data; | |
500 | struct iommu_group *group; | |
501 | int id, i; | |
502 | ||
503 | group = iommu_group_get(&pdev->dev); | |
504 | if (!group) | |
505 | return -EPERM; | |
506 | ||
507 | id = iommu_group_id(group); | |
508 | ||
509 | for (i = 0; i < info->count; i++) | |
510 | if (info->groups[i].id == id) | |
511 | break; | |
512 | ||
513 | iommu_group_put(group); | |
514 | ||
515 | return (i == info->count) ? -EINVAL : 0; | |
516 | } | |
517 | ||
518 | static bool vfio_pci_dev_below_slot(struct pci_dev *pdev, struct pci_slot *slot) | |
519 | { | |
520 | for (; pdev; pdev = pdev->bus->self) | |
521 | if (pdev->bus == slot->bus) | |
522 | return (pdev->slot == slot); | |
523 | return false; | |
524 | } | |
525 | ||
526 | struct vfio_pci_walk_info { | |
527 | int (*fn)(struct pci_dev *, void *data); | |
528 | void *data; | |
529 | struct pci_dev *pdev; | |
530 | bool slot; | |
531 | int ret; | |
532 | }; | |
533 | ||
534 | static int vfio_pci_walk_wrapper(struct pci_dev *pdev, void *data) | |
535 | { | |
536 | struct vfio_pci_walk_info *walk = data; | |
537 | ||
538 | if (!walk->slot || vfio_pci_dev_below_slot(pdev, walk->pdev->slot)) | |
539 | walk->ret = walk->fn(pdev, walk->data); | |
540 | ||
541 | return walk->ret; | |
542 | } | |
543 | ||
544 | static int vfio_pci_for_each_slot_or_bus(struct pci_dev *pdev, | |
545 | int (*fn)(struct pci_dev *, | |
546 | void *data), void *data, | |
547 | bool slot) | |
548 | { | |
549 | struct vfio_pci_walk_info walk = { | |
550 | .fn = fn, .data = data, .pdev = pdev, .slot = slot, .ret = 0, | |
551 | }; | |
552 | ||
553 | pci_walk_bus(pdev->bus, vfio_pci_walk_wrapper, &walk); | |
554 | ||
555 | return walk.ret; | |
556 | } | |
557 | ||
188ad9d6 AW |
558 | static int msix_sparse_mmap_cap(struct vfio_pci_device *vdev, |
559 | struct vfio_info_cap *caps) | |
560 | { | |
188ad9d6 AW |
561 | struct vfio_region_info_cap_sparse_mmap *sparse; |
562 | size_t end, size; | |
c535d345 | 563 | int nr_areas = 2, i = 0, ret; |
188ad9d6 AW |
564 | |
565 | end = pci_resource_len(vdev->pdev, vdev->msix_bar); | |
566 | ||
567 | /* If MSI-X table is aligned to the start or end, only one area */ | |
568 | if (((vdev->msix_offset & PAGE_MASK) == 0) || | |
569 | (PAGE_ALIGN(vdev->msix_offset + vdev->msix_size) >= end)) | |
570 | nr_areas = 1; | |
571 | ||
572 | size = sizeof(*sparse) + (nr_areas * sizeof(*sparse->areas)); | |
573 | ||
c535d345 KW |
574 | sparse = kzalloc(size, GFP_KERNEL); |
575 | if (!sparse) | |
576 | return -ENOMEM; | |
188ad9d6 | 577 | |
188ad9d6 AW |
578 | sparse->nr_areas = nr_areas; |
579 | ||
580 | if (vdev->msix_offset & PAGE_MASK) { | |
581 | sparse->areas[i].offset = 0; | |
582 | sparse->areas[i].size = vdev->msix_offset & PAGE_MASK; | |
583 | i++; | |
584 | } | |
585 | ||
586 | if (PAGE_ALIGN(vdev->msix_offset + vdev->msix_size) < end) { | |
587 | sparse->areas[i].offset = PAGE_ALIGN(vdev->msix_offset + | |
588 | vdev->msix_size); | |
589 | sparse->areas[i].size = end - sparse->areas[i].offset; | |
590 | i++; | |
591 | } | |
592 | ||
c535d345 KW |
593 | ret = vfio_info_add_capability(caps, VFIO_REGION_INFO_CAP_SPARSE_MMAP, |
594 | sparse); | |
595 | kfree(sparse); | |
28541d41 | 596 | |
c535d345 | 597 | return ret; |
28541d41 AW |
598 | } |
599 | ||
600 | int vfio_pci_register_dev_region(struct vfio_pci_device *vdev, | |
601 | unsigned int type, unsigned int subtype, | |
602 | const struct vfio_pci_regops *ops, | |
603 | size_t size, u32 flags, void *data) | |
604 | { | |
605 | struct vfio_pci_region *region; | |
606 | ||
607 | region = krealloc(vdev->region, | |
608 | (vdev->num_regions + 1) * sizeof(*region), | |
609 | GFP_KERNEL); | |
610 | if (!region) | |
611 | return -ENOMEM; | |
612 | ||
613 | vdev->region = region; | |
614 | vdev->region[vdev->num_regions].type = type; | |
615 | vdev->region[vdev->num_regions].subtype = subtype; | |
616 | vdev->region[vdev->num_regions].ops = ops; | |
617 | vdev->region[vdev->num_regions].size = size; | |
618 | vdev->region[vdev->num_regions].flags = flags; | |
619 | vdev->region[vdev->num_regions].data = data; | |
620 | ||
621 | vdev->num_regions++; | |
622 | ||
623 | return 0; | |
624 | } | |
625 | ||
89e1f7d4 AW |
626 | static long vfio_pci_ioctl(void *device_data, |
627 | unsigned int cmd, unsigned long arg) | |
628 | { | |
629 | struct vfio_pci_device *vdev = device_data; | |
630 | unsigned long minsz; | |
631 | ||
632 | if (cmd == VFIO_DEVICE_GET_INFO) { | |
633 | struct vfio_device_info info; | |
634 | ||
635 | minsz = offsetofend(struct vfio_device_info, num_irqs); | |
636 | ||
637 | if (copy_from_user(&info, (void __user *)arg, minsz)) | |
638 | return -EFAULT; | |
639 | ||
640 | if (info.argsz < minsz) | |
641 | return -EINVAL; | |
642 | ||
643 | info.flags = VFIO_DEVICE_FLAGS_PCI; | |
644 | ||
645 | if (vdev->reset_works) | |
646 | info.flags |= VFIO_DEVICE_FLAGS_RESET; | |
647 | ||
28541d41 | 648 | info.num_regions = VFIO_PCI_NUM_REGIONS + vdev->num_regions; |
89e1f7d4 AW |
649 | info.num_irqs = VFIO_PCI_NUM_IRQS; |
650 | ||
8160c4e4 MT |
651 | return copy_to_user((void __user *)arg, &info, minsz) ? |
652 | -EFAULT : 0; | |
89e1f7d4 AW |
653 | |
654 | } else if (cmd == VFIO_DEVICE_GET_REGION_INFO) { | |
655 | struct pci_dev *pdev = vdev->pdev; | |
656 | struct vfio_region_info info; | |
188ad9d6 | 657 | struct vfio_info_cap caps = { .buf = NULL, .size = 0 }; |
28541d41 | 658 | int i, ret; |
89e1f7d4 AW |
659 | |
660 | minsz = offsetofend(struct vfio_region_info, offset); | |
661 | ||
662 | if (copy_from_user(&info, (void __user *)arg, minsz)) | |
663 | return -EFAULT; | |
664 | ||
665 | if (info.argsz < minsz) | |
666 | return -EINVAL; | |
667 | ||
668 | switch (info.index) { | |
669 | case VFIO_PCI_CONFIG_REGION_INDEX: | |
670 | info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index); | |
671 | info.size = pdev->cfg_size; | |
672 | info.flags = VFIO_REGION_INFO_FLAG_READ | | |
673 | VFIO_REGION_INFO_FLAG_WRITE; | |
674 | break; | |
675 | case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX: | |
676 | info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index); | |
677 | info.size = pci_resource_len(pdev, info.index); | |
678 | if (!info.size) { | |
679 | info.flags = 0; | |
680 | break; | |
681 | } | |
682 | ||
683 | info.flags = VFIO_REGION_INFO_FLAG_READ | | |
684 | VFIO_REGION_INFO_FLAG_WRITE; | |
05f0c03f | 685 | if (vdev->bar_mmap_supported[info.index]) { |
89e1f7d4 | 686 | info.flags |= VFIO_REGION_INFO_FLAG_MMAP; |
188ad9d6 AW |
687 | if (info.index == vdev->msix_bar) { |
688 | ret = msix_sparse_mmap_cap(vdev, &caps); | |
689 | if (ret) | |
690 | return ret; | |
691 | } | |
692 | } | |
693 | ||
89e1f7d4 AW |
694 | break; |
695 | case VFIO_PCI_ROM_REGION_INDEX: | |
696 | { | |
697 | void __iomem *io; | |
698 | size_t size; | |
699 | ||
700 | info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index); | |
701 | info.flags = 0; | |
702 | ||
703 | /* Report the BAR size, not the ROM size */ | |
704 | info.size = pci_resource_len(pdev, info.index); | |
a13b6459 AW |
705 | if (!info.size) { |
706 | /* Shadow ROMs appear as PCI option ROMs */ | |
707 | if (pdev->resource[PCI_ROM_RESOURCE].flags & | |
708 | IORESOURCE_ROM_SHADOW) | |
709 | info.size = 0x20000; | |
710 | else | |
711 | break; | |
712 | } | |
89e1f7d4 AW |
713 | |
714 | /* Is it really there? */ | |
715 | io = pci_map_rom(pdev, &size); | |
716 | if (!io || !size) { | |
717 | info.size = 0; | |
718 | break; | |
719 | } | |
720 | pci_unmap_rom(pdev, io); | |
721 | ||
722 | info.flags = VFIO_REGION_INFO_FLAG_READ; | |
723 | break; | |
724 | } | |
84237a82 AW |
725 | case VFIO_PCI_VGA_REGION_INDEX: |
726 | if (!vdev->has_vga) | |
727 | return -EINVAL; | |
728 | ||
729 | info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index); | |
730 | info.size = 0xc0000; | |
731 | info.flags = VFIO_REGION_INFO_FLAG_READ | | |
732 | VFIO_REGION_INFO_FLAG_WRITE; | |
733 | ||
734 | break; | |
89e1f7d4 | 735 | default: |
c535d345 KW |
736 | { |
737 | struct vfio_region_info_cap_type cap_type; | |
738 | ||
28541d41 AW |
739 | if (info.index >= |
740 | VFIO_PCI_NUM_REGIONS + vdev->num_regions) | |
741 | return -EINVAL; | |
742 | ||
743 | i = info.index - VFIO_PCI_NUM_REGIONS; | |
744 | ||
745 | info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index); | |
746 | info.size = vdev->region[i].size; | |
747 | info.flags = vdev->region[i].flags; | |
748 | ||
c535d345 KW |
749 | cap_type.type = vdev->region[i].type; |
750 | cap_type.subtype = vdev->region[i].subtype; | |
751 | ||
752 | ret = vfio_info_add_capability(&caps, | |
753 | VFIO_REGION_INFO_CAP_TYPE, | |
754 | &cap_type); | |
28541d41 AW |
755 | if (ret) |
756 | return ret; | |
c535d345 KW |
757 | |
758 | } | |
89e1f7d4 AW |
759 | } |
760 | ||
188ad9d6 AW |
761 | if (caps.size) { |
762 | info.flags |= VFIO_REGION_INFO_FLAG_CAPS; | |
763 | if (info.argsz < sizeof(info) + caps.size) { | |
764 | info.argsz = sizeof(info) + caps.size; | |
765 | info.cap_offset = 0; | |
766 | } else { | |
767 | vfio_info_cap_shift(&caps, sizeof(info)); | |
c4aec310 DC |
768 | if (copy_to_user((void __user *)arg + |
769 | sizeof(info), caps.buf, | |
770 | caps.size)) { | |
188ad9d6 | 771 | kfree(caps.buf); |
c4aec310 | 772 | return -EFAULT; |
188ad9d6 AW |
773 | } |
774 | info.cap_offset = sizeof(info); | |
775 | } | |
776 | ||
777 | kfree(caps.buf); | |
89e1f7d4 AW |
778 | } |
779 | ||
8160c4e4 MT |
780 | return copy_to_user((void __user *)arg, &info, minsz) ? |
781 | -EFAULT : 0; | |
89e1f7d4 AW |
782 | |
783 | } else if (cmd == VFIO_DEVICE_GET_IRQ_INFO) { | |
784 | struct vfio_irq_info info; | |
785 | ||
786 | minsz = offsetofend(struct vfio_irq_info, count); | |
787 | ||
788 | if (copy_from_user(&info, (void __user *)arg, minsz)) | |
789 | return -EFAULT; | |
790 | ||
791 | if (info.argsz < minsz || info.index >= VFIO_PCI_NUM_IRQS) | |
792 | return -EINVAL; | |
793 | ||
dad9f897 VMP |
794 | switch (info.index) { |
795 | case VFIO_PCI_INTX_IRQ_INDEX ... VFIO_PCI_MSIX_IRQ_INDEX: | |
6140a8f5 | 796 | case VFIO_PCI_REQ_IRQ_INDEX: |
dad9f897 VMP |
797 | break; |
798 | case VFIO_PCI_ERR_IRQ_INDEX: | |
799 | if (pci_is_pcie(vdev->pdev)) | |
800 | break; | |
801 | /* pass thru to return error */ | |
802 | default: | |
803 | return -EINVAL; | |
804 | } | |
805 | ||
89e1f7d4 AW |
806 | info.flags = VFIO_IRQ_INFO_EVENTFD; |
807 | ||
808 | info.count = vfio_pci_get_irq_count(vdev, info.index); | |
809 | ||
810 | if (info.index == VFIO_PCI_INTX_IRQ_INDEX) | |
811 | info.flags |= (VFIO_IRQ_INFO_MASKABLE | | |
812 | VFIO_IRQ_INFO_AUTOMASKED); | |
813 | else | |
814 | info.flags |= VFIO_IRQ_INFO_NORESIZE; | |
815 | ||
8160c4e4 MT |
816 | return copy_to_user((void __user *)arg, &info, minsz) ? |
817 | -EFAULT : 0; | |
89e1f7d4 AW |
818 | |
819 | } else if (cmd == VFIO_DEVICE_SET_IRQS) { | |
820 | struct vfio_irq_set hdr; | |
821 | u8 *data = NULL; | |
05692d70 | 822 | int max, ret = 0; |
ef198aaa | 823 | size_t data_size = 0; |
89e1f7d4 AW |
824 | |
825 | minsz = offsetofend(struct vfio_irq_set, count); | |
826 | ||
827 | if (copy_from_user(&hdr, (void __user *)arg, minsz)) | |
828 | return -EFAULT; | |
829 | ||
05692d70 | 830 | max = vfio_pci_get_irq_count(vdev, hdr.index); |
89e1f7d4 | 831 | |
ef198aaa KW |
832 | ret = vfio_set_irqs_validate_and_prepare(&hdr, max, |
833 | VFIO_PCI_NUM_IRQS, &data_size); | |
834 | if (ret) | |
835 | return ret; | |
89e1f7d4 | 836 | |
ef198aaa | 837 | if (data_size) { |
3a1f7041 | 838 | data = memdup_user((void __user *)(arg + minsz), |
ef198aaa | 839 | data_size); |
3a1f7041 FW |
840 | if (IS_ERR(data)) |
841 | return PTR_ERR(data); | |
89e1f7d4 AW |
842 | } |
843 | ||
844 | mutex_lock(&vdev->igate); | |
845 | ||
846 | ret = vfio_pci_set_irqs_ioctl(vdev, hdr.flags, hdr.index, | |
847 | hdr.start, hdr.count, data); | |
848 | ||
849 | mutex_unlock(&vdev->igate); | |
850 | kfree(data); | |
851 | ||
852 | return ret; | |
853 | ||
8b27ee60 | 854 | } else if (cmd == VFIO_DEVICE_RESET) { |
89e1f7d4 | 855 | return vdev->reset_works ? |
890ed578 | 856 | pci_try_reset_function(vdev->pdev) : -EINVAL; |
89e1f7d4 | 857 | |
8b27ee60 AW |
858 | } else if (cmd == VFIO_DEVICE_GET_PCI_HOT_RESET_INFO) { |
859 | struct vfio_pci_hot_reset_info hdr; | |
860 | struct vfio_pci_fill_info fill = { 0 }; | |
861 | struct vfio_pci_dependent_device *devices = NULL; | |
862 | bool slot = false; | |
863 | int ret = 0; | |
864 | ||
865 | minsz = offsetofend(struct vfio_pci_hot_reset_info, count); | |
866 | ||
867 | if (copy_from_user(&hdr, (void __user *)arg, minsz)) | |
868 | return -EFAULT; | |
869 | ||
870 | if (hdr.argsz < minsz) | |
871 | return -EINVAL; | |
872 | ||
873 | hdr.flags = 0; | |
874 | ||
875 | /* Can we do a slot or bus reset or neither? */ | |
876 | if (!pci_probe_reset_slot(vdev->pdev->slot)) | |
877 | slot = true; | |
878 | else if (pci_probe_reset_bus(vdev->pdev->bus)) | |
879 | return -ENODEV; | |
880 | ||
881 | /* How many devices are affected? */ | |
882 | ret = vfio_pci_for_each_slot_or_bus(vdev->pdev, | |
883 | vfio_pci_count_devs, | |
884 | &fill.max, slot); | |
885 | if (ret) | |
886 | return ret; | |
887 | ||
888 | WARN_ON(!fill.max); /* Should always be at least one */ | |
889 | ||
890 | /* | |
891 | * If there's enough space, fill it now, otherwise return | |
892 | * -ENOSPC and the number of devices affected. | |
893 | */ | |
894 | if (hdr.argsz < sizeof(hdr) + (fill.max * sizeof(*devices))) { | |
895 | ret = -ENOSPC; | |
896 | hdr.count = fill.max; | |
897 | goto reset_info_exit; | |
898 | } | |
899 | ||
900 | devices = kcalloc(fill.max, sizeof(*devices), GFP_KERNEL); | |
901 | if (!devices) | |
902 | return -ENOMEM; | |
903 | ||
904 | fill.devices = devices; | |
905 | ||
906 | ret = vfio_pci_for_each_slot_or_bus(vdev->pdev, | |
907 | vfio_pci_fill_devs, | |
908 | &fill, slot); | |
909 | ||
910 | /* | |
911 | * If a device was removed between counting and filling, | |
912 | * we may come up short of fill.max. If a device was | |
913 | * added, we'll have a return of -EAGAIN above. | |
914 | */ | |
915 | if (!ret) | |
916 | hdr.count = fill.cur; | |
917 | ||
918 | reset_info_exit: | |
919 | if (copy_to_user((void __user *)arg, &hdr, minsz)) | |
920 | ret = -EFAULT; | |
921 | ||
922 | if (!ret) { | |
923 | if (copy_to_user((void __user *)(arg + minsz), devices, | |
924 | hdr.count * sizeof(*devices))) | |
925 | ret = -EFAULT; | |
926 | } | |
927 | ||
928 | kfree(devices); | |
929 | return ret; | |
930 | ||
931 | } else if (cmd == VFIO_DEVICE_PCI_HOT_RESET) { | |
932 | struct vfio_pci_hot_reset hdr; | |
933 | int32_t *group_fds; | |
934 | struct vfio_pci_group_entry *groups; | |
935 | struct vfio_pci_group_info info; | |
936 | bool slot = false; | |
937 | int i, count = 0, ret = 0; | |
938 | ||
939 | minsz = offsetofend(struct vfio_pci_hot_reset, count); | |
940 | ||
941 | if (copy_from_user(&hdr, (void __user *)arg, minsz)) | |
942 | return -EFAULT; | |
943 | ||
944 | if (hdr.argsz < minsz || hdr.flags) | |
945 | return -EINVAL; | |
946 | ||
947 | /* Can we do a slot or bus reset or neither? */ | |
948 | if (!pci_probe_reset_slot(vdev->pdev->slot)) | |
949 | slot = true; | |
950 | else if (pci_probe_reset_bus(vdev->pdev->bus)) | |
951 | return -ENODEV; | |
952 | ||
953 | /* | |
954 | * We can't let userspace give us an arbitrarily large | |
955 | * buffer to copy, so verify how many we think there | |
956 | * could be. Note groups can have multiple devices so | |
957 | * one group per device is the max. | |
958 | */ | |
959 | ret = vfio_pci_for_each_slot_or_bus(vdev->pdev, | |
960 | vfio_pci_count_devs, | |
961 | &count, slot); | |
962 | if (ret) | |
963 | return ret; | |
964 | ||
965 | /* Somewhere between 1 and count is OK */ | |
966 | if (!hdr.count || hdr.count > count) | |
967 | return -EINVAL; | |
968 | ||
969 | group_fds = kcalloc(hdr.count, sizeof(*group_fds), GFP_KERNEL); | |
970 | groups = kcalloc(hdr.count, sizeof(*groups), GFP_KERNEL); | |
971 | if (!group_fds || !groups) { | |
972 | kfree(group_fds); | |
973 | kfree(groups); | |
974 | return -ENOMEM; | |
975 | } | |
976 | ||
977 | if (copy_from_user(group_fds, (void __user *)(arg + minsz), | |
978 | hdr.count * sizeof(*group_fds))) { | |
979 | kfree(group_fds); | |
980 | kfree(groups); | |
981 | return -EFAULT; | |
982 | } | |
983 | ||
984 | /* | |
985 | * For each group_fd, get the group through the vfio external | |
986 | * user interface and store the group and iommu ID. This | |
987 | * ensures the group is held across the reset. | |
988 | */ | |
989 | for (i = 0; i < hdr.count; i++) { | |
990 | struct vfio_group *group; | |
991 | struct fd f = fdget(group_fds[i]); | |
992 | if (!f.file) { | |
993 | ret = -EBADF; | |
994 | break; | |
995 | } | |
996 | ||
997 | group = vfio_group_get_external_user(f.file); | |
998 | fdput(f); | |
999 | if (IS_ERR(group)) { | |
1000 | ret = PTR_ERR(group); | |
1001 | break; | |
1002 | } | |
1003 | ||
1004 | groups[i].group = group; | |
1005 | groups[i].id = vfio_external_user_iommu_id(group); | |
1006 | } | |
1007 | ||
1008 | kfree(group_fds); | |
1009 | ||
1010 | /* release reference to groups on error */ | |
1011 | if (ret) | |
1012 | goto hot_reset_release; | |
1013 | ||
1014 | info.count = hdr.count; | |
1015 | info.groups = groups; | |
1016 | ||
1017 | /* | |
1018 | * Test whether all the affected devices are contained | |
1019 | * by the set of groups provided by the user. | |
1020 | */ | |
1021 | ret = vfio_pci_for_each_slot_or_bus(vdev->pdev, | |
1022 | vfio_pci_validate_devs, | |
1023 | &info, slot); | |
1024 | if (!ret) | |
1025 | /* User has access, do the reset */ | |
890ed578 AW |
1026 | ret = slot ? pci_try_reset_slot(vdev->pdev->slot) : |
1027 | pci_try_reset_bus(vdev->pdev->bus); | |
8b27ee60 AW |
1028 | |
1029 | hot_reset_release: | |
1030 | for (i--; i >= 0; i--) | |
1031 | vfio_group_put_external_user(groups[i].group); | |
1032 | ||
1033 | kfree(groups); | |
1034 | return ret; | |
1035 | } | |
1036 | ||
89e1f7d4 AW |
1037 | return -ENOTTY; |
1038 | } | |
1039 | ||
5b279a11 AW |
1040 | static ssize_t vfio_pci_rw(void *device_data, char __user *buf, |
1041 | size_t count, loff_t *ppos, bool iswrite) | |
89e1f7d4 AW |
1042 | { |
1043 | unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos); | |
1044 | struct vfio_pci_device *vdev = device_data; | |
89e1f7d4 | 1045 | |
28541d41 | 1046 | if (index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions) |
89e1f7d4 AW |
1047 | return -EINVAL; |
1048 | ||
5b279a11 AW |
1049 | switch (index) { |
1050 | case VFIO_PCI_CONFIG_REGION_INDEX: | |
906ee99d AW |
1051 | return vfio_pci_config_rw(vdev, buf, count, ppos, iswrite); |
1052 | ||
5b279a11 AW |
1053 | case VFIO_PCI_ROM_REGION_INDEX: |
1054 | if (iswrite) | |
1055 | return -EINVAL; | |
906ee99d | 1056 | return vfio_pci_bar_rw(vdev, buf, count, ppos, false); |
89e1f7d4 | 1057 | |
5b279a11 | 1058 | case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX: |
906ee99d | 1059 | return vfio_pci_bar_rw(vdev, buf, count, ppos, iswrite); |
84237a82 AW |
1060 | |
1061 | case VFIO_PCI_VGA_REGION_INDEX: | |
1062 | return vfio_pci_vga_rw(vdev, buf, count, ppos, iswrite); | |
28541d41 AW |
1063 | default: |
1064 | index -= VFIO_PCI_NUM_REGIONS; | |
1065 | return vdev->region[index].ops->rw(vdev, buf, | |
1066 | count, ppos, iswrite); | |
5b279a11 AW |
1067 | } |
1068 | ||
89e1f7d4 AW |
1069 | return -EINVAL; |
1070 | } | |
1071 | ||
5b279a11 AW |
1072 | static ssize_t vfio_pci_read(void *device_data, char __user *buf, |
1073 | size_t count, loff_t *ppos) | |
1074 | { | |
906ee99d AW |
1075 | if (!count) |
1076 | return 0; | |
1077 | ||
5b279a11 AW |
1078 | return vfio_pci_rw(device_data, buf, count, ppos, false); |
1079 | } | |
1080 | ||
89e1f7d4 AW |
1081 | static ssize_t vfio_pci_write(void *device_data, const char __user *buf, |
1082 | size_t count, loff_t *ppos) | |
1083 | { | |
906ee99d AW |
1084 | if (!count) |
1085 | return 0; | |
1086 | ||
1087 | return vfio_pci_rw(device_data, (char __user *)buf, count, ppos, true); | |
89e1f7d4 AW |
1088 | } |
1089 | ||
1090 | static int vfio_pci_mmap(void *device_data, struct vm_area_struct *vma) | |
1091 | { | |
1092 | struct vfio_pci_device *vdev = device_data; | |
1093 | struct pci_dev *pdev = vdev->pdev; | |
1094 | unsigned int index; | |
34002f54 | 1095 | u64 phys_len, req_len, pgoff, req_start; |
89e1f7d4 AW |
1096 | int ret; |
1097 | ||
1098 | index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT); | |
1099 | ||
1100 | if (vma->vm_end < vma->vm_start) | |
1101 | return -EINVAL; | |
1102 | if ((vma->vm_flags & VM_SHARED) == 0) | |
1103 | return -EINVAL; | |
1104 | if (index >= VFIO_PCI_ROM_REGION_INDEX) | |
1105 | return -EINVAL; | |
05f0c03f | 1106 | if (!vdev->bar_mmap_supported[index]) |
89e1f7d4 AW |
1107 | return -EINVAL; |
1108 | ||
05f0c03f | 1109 | phys_len = PAGE_ALIGN(pci_resource_len(pdev, index)); |
89e1f7d4 AW |
1110 | req_len = vma->vm_end - vma->vm_start; |
1111 | pgoff = vma->vm_pgoff & | |
1112 | ((1U << (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT)) - 1); | |
1113 | req_start = pgoff << PAGE_SHIFT; | |
1114 | ||
05f0c03f | 1115 | if (req_start + req_len > phys_len) |
89e1f7d4 AW |
1116 | return -EINVAL; |
1117 | ||
1118 | if (index == vdev->msix_bar) { | |
1119 | /* | |
1120 | * Disallow mmaps overlapping the MSI-X table; users don't | |
1121 | * get to touch this directly. We could find somewhere | |
1122 | * else to map the overlap, but page granularity is only | |
1123 | * a recommendation, not a requirement, so the user needs | |
1124 | * to know which bits are real. Requiring them to mmap | |
1125 | * around the table makes that clear. | |
1126 | */ | |
1127 | ||
1128 | /* If neither entirely above nor below, then it overlaps */ | |
1129 | if (!(req_start >= vdev->msix_offset + vdev->msix_size || | |
1130 | req_start + req_len <= vdev->msix_offset)) | |
1131 | return -EINVAL; | |
1132 | } | |
1133 | ||
1134 | /* | |
1135 | * Even though we don't make use of the barmap for the mmap, | |
1136 | * we need to request the region and the barmap tracks that. | |
1137 | */ | |
1138 | if (!vdev->barmap[index]) { | |
1139 | ret = pci_request_selected_regions(pdev, | |
1140 | 1 << index, "vfio-pci"); | |
1141 | if (ret) | |
1142 | return ret; | |
1143 | ||
1144 | vdev->barmap[index] = pci_iomap(pdev, index, 0); | |
1145 | } | |
1146 | ||
1147 | vma->vm_private_data = vdev; | |
89e1f7d4 | 1148 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); |
34002f54 | 1149 | vma->vm_pgoff = (pci_resource_start(pdev, index) >> PAGE_SHIFT) + pgoff; |
89e1f7d4 | 1150 | |
34002f54 | 1151 | return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, |
89e1f7d4 AW |
1152 | req_len, vma->vm_page_prot); |
1153 | } | |
1154 | ||
6140a8f5 AW |
1155 | static void vfio_pci_request(void *device_data, unsigned int count) |
1156 | { | |
1157 | struct vfio_pci_device *vdev = device_data; | |
1158 | ||
1159 | mutex_lock(&vdev->igate); | |
1160 | ||
1161 | if (vdev->req_trigger) { | |
5f55d2ae AW |
1162 | if (!(count % 10)) |
1163 | dev_notice_ratelimited(&vdev->pdev->dev, | |
1164 | "Relaying device request to user (#%u)\n", | |
1165 | count); | |
6140a8f5 | 1166 | eventfd_signal(vdev->req_trigger, 1); |
5f55d2ae AW |
1167 | } else if (count == 0) { |
1168 | dev_warn(&vdev->pdev->dev, | |
1169 | "No device request channel registered, blocked until released by user\n"); | |
6140a8f5 AW |
1170 | } |
1171 | ||
1172 | mutex_unlock(&vdev->igate); | |
1173 | } | |
1174 | ||
89e1f7d4 AW |
1175 | static const struct vfio_device_ops vfio_pci_ops = { |
1176 | .name = "vfio-pci", | |
1177 | .open = vfio_pci_open, | |
1178 | .release = vfio_pci_release, | |
1179 | .ioctl = vfio_pci_ioctl, | |
1180 | .read = vfio_pci_read, | |
1181 | .write = vfio_pci_write, | |
1182 | .mmap = vfio_pci_mmap, | |
6140a8f5 | 1183 | .request = vfio_pci_request, |
89e1f7d4 AW |
1184 | }; |
1185 | ||
1186 | static int vfio_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |
1187 | { | |
89e1f7d4 AW |
1188 | struct vfio_pci_device *vdev; |
1189 | struct iommu_group *group; | |
1190 | int ret; | |
1191 | ||
7c2e211f | 1192 | if (pdev->hdr_type != PCI_HEADER_TYPE_NORMAL) |
89e1f7d4 AW |
1193 | return -EINVAL; |
1194 | ||
03a76b60 | 1195 | group = vfio_iommu_group_get(&pdev->dev); |
89e1f7d4 AW |
1196 | if (!group) |
1197 | return -EINVAL; | |
1198 | ||
1199 | vdev = kzalloc(sizeof(*vdev), GFP_KERNEL); | |
1200 | if (!vdev) { | |
03a76b60 | 1201 | vfio_iommu_group_put(group, &pdev->dev); |
89e1f7d4 AW |
1202 | return -ENOMEM; |
1203 | } | |
1204 | ||
1205 | vdev->pdev = pdev; | |
1206 | vdev->irq_type = VFIO_PCI_NUM_IRQS; | |
1207 | mutex_init(&vdev->igate); | |
1208 | spin_lock_init(&vdev->irqlock); | |
89e1f7d4 AW |
1209 | |
1210 | ret = vfio_add_group_dev(&pdev->dev, &vfio_pci_ops, vdev); | |
1211 | if (ret) { | |
03a76b60 | 1212 | vfio_iommu_group_put(group, &pdev->dev); |
89e1f7d4 | 1213 | kfree(vdev); |
5a0ff177 | 1214 | return ret; |
89e1f7d4 AW |
1215 | } |
1216 | ||
ecaa1f6a AW |
1217 | if (vfio_pci_is_vga(pdev)) { |
1218 | vga_client_register(pdev, vdev, NULL, vfio_pci_set_vga_decode); | |
1219 | vga_set_legacy_decoding(pdev, | |
1220 | vfio_pci_set_vga_decode(vdev, false)); | |
1221 | } | |
1222 | ||
6eb70187 AW |
1223 | if (!disable_idle_d3) { |
1224 | /* | |
1225 | * pci-core sets the device power state to an unknown value at | |
1226 | * bootup and after being removed from a driver. The only | |
1227 | * transition it allows from this unknown state is to D0, which | |
1228 | * typically happens when a driver calls pci_enable_device(). | |
1229 | * We're not ready to enable the device yet, but we do want to | |
1230 | * be able to get to D3. Therefore first do a D0 transition | |
1231 | * before going to D3. | |
1232 | */ | |
1233 | pci_set_power_state(pdev, PCI_D0); | |
1234 | pci_set_power_state(pdev, PCI_D3hot); | |
1235 | } | |
1236 | ||
89e1f7d4 AW |
1237 | return ret; |
1238 | } | |
1239 | ||
1240 | static void vfio_pci_remove(struct pci_dev *pdev) | |
1241 | { | |
1242 | struct vfio_pci_device *vdev; | |
1243 | ||
1244 | vdev = vfio_del_group_dev(&pdev->dev); | |
ecaa1f6a AW |
1245 | if (!vdev) |
1246 | return; | |
1247 | ||
03a76b60 | 1248 | vfio_iommu_group_put(pdev->dev.iommu_group, &pdev->dev); |
28541d41 | 1249 | kfree(vdev->region); |
ecaa1f6a AW |
1250 | kfree(vdev); |
1251 | ||
1252 | if (vfio_pci_is_vga(pdev)) { | |
1253 | vga_client_register(pdev, NULL, NULL, NULL); | |
1254 | vga_set_legacy_decoding(pdev, | |
1255 | VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM | | |
1256 | VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM); | |
61d79256 | 1257 | } |
6eb70187 AW |
1258 | |
1259 | if (!disable_idle_d3) | |
1260 | pci_set_power_state(pdev, PCI_D0); | |
89e1f7d4 AW |
1261 | } |
1262 | ||
dad9f897 VMP |
1263 | static pci_ers_result_t vfio_pci_aer_err_detected(struct pci_dev *pdev, |
1264 | pci_channel_state_t state) | |
1265 | { | |
1266 | struct vfio_pci_device *vdev; | |
1267 | struct vfio_device *device; | |
1268 | ||
1269 | device = vfio_device_get_from_dev(&pdev->dev); | |
1270 | if (device == NULL) | |
1271 | return PCI_ERS_RESULT_DISCONNECT; | |
1272 | ||
1273 | vdev = vfio_device_data(device); | |
1274 | if (vdev == NULL) { | |
1275 | vfio_device_put(device); | |
1276 | return PCI_ERS_RESULT_DISCONNECT; | |
1277 | } | |
1278 | ||
3be3a074 AW |
1279 | mutex_lock(&vdev->igate); |
1280 | ||
dad9f897 VMP |
1281 | if (vdev->err_trigger) |
1282 | eventfd_signal(vdev->err_trigger, 1); | |
1283 | ||
3be3a074 AW |
1284 | mutex_unlock(&vdev->igate); |
1285 | ||
dad9f897 VMP |
1286 | vfio_device_put(device); |
1287 | ||
1288 | return PCI_ERS_RESULT_CAN_RECOVER; | |
1289 | } | |
1290 | ||
7d10f4e0 | 1291 | static const struct pci_error_handlers vfio_err_handlers = { |
dad9f897 VMP |
1292 | .error_detected = vfio_pci_aer_err_detected, |
1293 | }; | |
1294 | ||
89e1f7d4 AW |
1295 | static struct pci_driver vfio_pci_driver = { |
1296 | .name = "vfio-pci", | |
1297 | .id_table = NULL, /* only dynamic ids */ | |
1298 | .probe = vfio_pci_probe, | |
1299 | .remove = vfio_pci_remove, | |
dad9f897 | 1300 | .err_handler = &vfio_err_handlers, |
89e1f7d4 AW |
1301 | }; |
1302 | ||
93899a67 AW |
1303 | struct vfio_devices { |
1304 | struct vfio_device **devices; | |
1305 | int cur_index; | |
1306 | int max_index; | |
1307 | }; | |
bc4fba77 | 1308 | |
93899a67 | 1309 | static int vfio_pci_get_devs(struct pci_dev *pdev, void *data) |
bc4fba77 | 1310 | { |
93899a67 | 1311 | struct vfio_devices *devs = data; |
20f30017 | 1312 | struct vfio_device *device; |
bc4fba77 | 1313 | |
93899a67 AW |
1314 | if (devs->cur_index == devs->max_index) |
1315 | return -ENOSPC; | |
bc4fba77 | 1316 | |
20f30017 AW |
1317 | device = vfio_device_get_from_dev(&pdev->dev); |
1318 | if (!device) | |
93899a67 | 1319 | return -EINVAL; |
bc4fba77 | 1320 | |
20f30017 AW |
1321 | if (pci_dev_driver(pdev) != &vfio_pci_driver) { |
1322 | vfio_device_put(device); | |
1323 | return -EBUSY; | |
1324 | } | |
1325 | ||
1326 | devs->devices[devs->cur_index++] = device; | |
bc4fba77 AW |
1327 | return 0; |
1328 | } | |
1329 | ||
1330 | /* | |
1331 | * Attempt to do a bus/slot reset if there are devices affected by a reset for | |
1332 | * this device that are needs_reset and all of the affected devices are unused | |
93899a67 AW |
1333 | * (!refcnt). Callers are required to hold driver_lock when calling this to |
1334 | * prevent device opens and concurrent bus reset attempts. We prevent device | |
1335 | * unbinds by acquiring and holding a reference to the vfio_device. | |
1336 | * | |
1337 | * NB: vfio-core considers a group to be viable even if some devices are | |
1338 | * bound to drivers like pci-stub or pcieport. Here we require all devices | |
1339 | * to be bound to vfio_pci since that's the only way we can be sure they | |
1340 | * stay put. | |
bc4fba77 AW |
1341 | */ |
1342 | static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev) | |
1343 | { | |
93899a67 AW |
1344 | struct vfio_devices devs = { .cur_index = 0 }; |
1345 | int i = 0, ret = -EINVAL; | |
bc4fba77 | 1346 | bool needs_reset = false, slot = false; |
93899a67 | 1347 | struct vfio_pci_device *tmp; |
bc4fba77 AW |
1348 | |
1349 | if (!pci_probe_reset_slot(vdev->pdev->slot)) | |
1350 | slot = true; | |
1351 | else if (pci_probe_reset_bus(vdev->pdev->bus)) | |
1352 | return; | |
1353 | ||
93899a67 AW |
1354 | if (vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_count_devs, |
1355 | &i, slot) || !i) | |
bc4fba77 AW |
1356 | return; |
1357 | ||
93899a67 AW |
1358 | devs.max_index = i; |
1359 | devs.devices = kcalloc(i, sizeof(struct vfio_device *), GFP_KERNEL); | |
1360 | if (!devs.devices) | |
bc4fba77 AW |
1361 | return; |
1362 | ||
93899a67 AW |
1363 | if (vfio_pci_for_each_slot_or_bus(vdev->pdev, |
1364 | vfio_pci_get_devs, &devs, slot)) | |
1365 | goto put_devs; | |
1366 | ||
1367 | for (i = 0; i < devs.cur_index; i++) { | |
1368 | tmp = vfio_device_data(devs.devices[i]); | |
1369 | if (tmp->needs_reset) | |
1370 | needs_reset = true; | |
1371 | if (tmp->refcnt) | |
1372 | goto put_devs; | |
1373 | } | |
1374 | ||
1375 | if (needs_reset) | |
1376 | ret = slot ? pci_try_reset_slot(vdev->pdev->slot) : | |
1377 | pci_try_reset_bus(vdev->pdev->bus); | |
1378 | ||
1379 | put_devs: | |
1380 | for (i = 0; i < devs.cur_index; i++) { | |
6eb70187 AW |
1381 | tmp = vfio_device_data(devs.devices[i]); |
1382 | if (!ret) | |
93899a67 | 1383 | tmp->needs_reset = false; |
6eb70187 AW |
1384 | |
1385 | if (!tmp->refcnt && !disable_idle_d3) | |
1386 | pci_set_power_state(tmp->pdev, PCI_D3hot); | |
1387 | ||
93899a67 AW |
1388 | vfio_device_put(devs.devices[i]); |
1389 | } | |
1390 | ||
1391 | kfree(devs.devices); | |
bc4fba77 AW |
1392 | } |
1393 | ||
89e1f7d4 AW |
1394 | static void __exit vfio_pci_cleanup(void) |
1395 | { | |
1396 | pci_unregister_driver(&vfio_pci_driver); | |
89e1f7d4 AW |
1397 | vfio_pci_uninit_perm_bits(); |
1398 | } | |
1399 | ||
80c7e8cc AW |
1400 | static void __init vfio_pci_fill_ids(void) |
1401 | { | |
1402 | char *p, *id; | |
1403 | int rc; | |
1404 | ||
1405 | /* no ids passed actually */ | |
1406 | if (ids[0] == '\0') | |
1407 | return; | |
1408 | ||
1409 | /* add ids specified in the module parameter */ | |
1410 | p = ids; | |
1411 | while ((id = strsep(&p, ","))) { | |
1412 | unsigned int vendor, device, subvendor = PCI_ANY_ID, | |
1413 | subdevice = PCI_ANY_ID, class = 0, class_mask = 0; | |
1414 | int fields; | |
1415 | ||
1416 | if (!strlen(id)) | |
1417 | continue; | |
1418 | ||
1419 | fields = sscanf(id, "%x:%x:%x:%x:%x:%x", | |
1420 | &vendor, &device, &subvendor, &subdevice, | |
1421 | &class, &class_mask); | |
1422 | ||
1423 | if (fields < 2) { | |
1424 | pr_warn("invalid id string \"%s\"\n", id); | |
1425 | continue; | |
1426 | } | |
1427 | ||
1428 | rc = pci_add_dynid(&vfio_pci_driver, vendor, device, | |
1429 | subvendor, subdevice, class, class_mask, 0); | |
1430 | if (rc) | |
1431 | pr_warn("failed to add dynamic id [%04hx:%04hx[%04hx:%04hx]] class %#08x/%08x (%d)\n", | |
1432 | vendor, device, subvendor, subdevice, | |
1433 | class, class_mask, rc); | |
1434 | else | |
1435 | pr_info("add [%04hx:%04hx[%04hx:%04hx]] class %#08x/%08x\n", | |
1436 | vendor, device, subvendor, subdevice, | |
1437 | class, class_mask); | |
1438 | } | |
1439 | } | |
1440 | ||
89e1f7d4 AW |
1441 | static int __init vfio_pci_init(void) |
1442 | { | |
1443 | int ret; | |
1444 | ||
1445 | /* Allocate shared config space permision data used by all devices */ | |
1446 | ret = vfio_pci_init_perm_bits(); | |
1447 | if (ret) | |
1448 | return ret; | |
1449 | ||
89e1f7d4 AW |
1450 | /* Register and scan for devices */ |
1451 | ret = pci_register_driver(&vfio_pci_driver); | |
1452 | if (ret) | |
1453 | goto out_driver; | |
1454 | ||
80c7e8cc AW |
1455 | vfio_pci_fill_ids(); |
1456 | ||
89e1f7d4 AW |
1457 | return 0; |
1458 | ||
89e1f7d4 AW |
1459 | out_driver: |
1460 | vfio_pci_uninit_perm_bits(); | |
1461 | return ret; | |
1462 | } | |
1463 | ||
1464 | module_init(vfio_pci_init); | |
1465 | module_exit(vfio_pci_cleanup); | |
1466 | ||
1467 | MODULE_VERSION(DRIVER_VERSION); | |
1468 | MODULE_LICENSE("GPL v2"); | |
1469 | MODULE_AUTHOR(DRIVER_AUTHOR); | |
1470 | MODULE_DESCRIPTION(DRIVER_DESC); |