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5fd54ace | 1 | // SPDX-License-Identifier: GPL-2.0+ |
0c9bd600 JZHPH |
2 | /* |
3 | * F81532/F81534 USB to Serial Ports Bridge | |
4 | * | |
5 | * F81532 => 2 Serial Ports | |
6 | * F81534 => 4 Serial Ports | |
7 | * | |
0c9bd600 JZHPH |
8 | * Copyright (C) 2016 Feature Integration Technology Inc., (Fintek) |
9 | * Copyright (C) 2016 Tom Tsai (Tom_Tsai@fintek.com.tw) | |
10 | * Copyright (C) 2016 Peter Hong (Peter_Hong@fintek.com.tw) | |
11 | * | |
12 | * The F81532/F81534 had 1 control endpoint for setting, 1 endpoint bulk-out | |
13 | * for all serial port TX and 1 endpoint bulk-in for all serial port read in | |
14 | * (Read Data/MSR/LSR). | |
15 | * | |
16 | * Write URB is fixed with 512bytes, per serial port used 128Bytes. | |
17 | * It can be described by f81534_prepare_write_buffer() | |
18 | * | |
19 | * Read URB is 512Bytes max, per serial port used 128Bytes. | |
20 | * It can be described by f81534_process_read_urb() and maybe received with | |
21 | * 128x1,2,3,4 bytes. | |
22 | * | |
23 | */ | |
24 | #include <linux/slab.h> | |
25 | #include <linux/tty.h> | |
26 | #include <linux/tty_flip.h> | |
27 | #include <linux/usb.h> | |
28 | #include <linux/usb/serial.h> | |
29 | #include <linux/serial_reg.h> | |
30 | #include <linux/module.h> | |
31 | #include <linux/uaccess.h> | |
32 | ||
33 | /* Serial Port register Address */ | |
34 | #define F81534_UART_BASE_ADDRESS 0x1200 | |
35 | #define F81534_UART_OFFSET 0x10 | |
36 | #define F81534_DIVISOR_LSB_REG (0x00 + F81534_UART_BASE_ADDRESS) | |
37 | #define F81534_DIVISOR_MSB_REG (0x01 + F81534_UART_BASE_ADDRESS) | |
dea744ba | 38 | #define F81534_INTERRUPT_ENABLE_REG (0x01 + F81534_UART_BASE_ADDRESS) |
0c9bd600 JZHPH |
39 | #define F81534_FIFO_CONTROL_REG (0x02 + F81534_UART_BASE_ADDRESS) |
40 | #define F81534_LINE_CONTROL_REG (0x03 + F81534_UART_BASE_ADDRESS) | |
41 | #define F81534_MODEM_CONTROL_REG (0x04 + F81534_UART_BASE_ADDRESS) | |
dea744ba | 42 | #define F81534_LINE_STATUS_REG (0x05 + F81534_UART_BASE_ADDRESS) |
0c9bd600 | 43 | #define F81534_MODEM_STATUS_REG (0x06 + F81534_UART_BASE_ADDRESS) |
3aacac02 | 44 | #define F81534_CLOCK_REG (0x08 + F81534_UART_BASE_ADDRESS) |
0c9bd600 JZHPH |
45 | #define F81534_CONFIG1_REG (0x09 + F81534_UART_BASE_ADDRESS) |
46 | ||
47 | #define F81534_DEF_CONF_ADDRESS_START 0x3000 | |
ab60075f | 48 | #define F81534_DEF_CONF_SIZE 12 |
0c9bd600 JZHPH |
49 | |
50 | #define F81534_CUSTOM_ADDRESS_START 0x2f00 | |
51 | #define F81534_CUSTOM_DATA_SIZE 0x10 | |
52 | #define F81534_CUSTOM_NO_CUSTOM_DATA 0xff | |
53 | #define F81534_CUSTOM_VALID_TOKEN 0xf0 | |
54 | #define F81534_CONF_OFFSET 1 | |
ab60075f JZHPH |
55 | #define F81534_CONF_INIT_GPIO_OFFSET 4 |
56 | #define F81534_CONF_WORK_GPIO_OFFSET 8 | |
57 | #define F81534_CONF_GPIO_SHUTDOWN 7 | |
58 | #define F81534_CONF_GPIO_RS232 1 | |
0c9bd600 JZHPH |
59 | |
60 | #define F81534_MAX_DATA_BLOCK 64 | |
61 | #define F81534_MAX_BUS_RETRY 20 | |
62 | ||
63 | /* Default URB timeout for USB operations */ | |
64 | #define F81534_USB_MAX_RETRY 10 | |
3aacac02 | 65 | #define F81534_USB_TIMEOUT 2000 |
0c9bd600 JZHPH |
66 | #define F81534_SET_GET_REGISTER 0xA0 |
67 | ||
68 | #define F81534_NUM_PORT 4 | |
69 | #define F81534_UNUSED_PORT 0xff | |
70 | #define F81534_WRITE_BUFFER_SIZE 512 | |
71 | ||
72 | #define DRIVER_DESC "Fintek F81532/F81534" | |
73 | #define FINTEK_VENDOR_ID_1 0x1934 | |
74 | #define FINTEK_VENDOR_ID_2 0x2C42 | |
75 | #define FINTEK_DEVICE_ID 0x1202 | |
76 | #define F81534_MAX_TX_SIZE 124 | |
77 | #define F81534_MAX_RX_SIZE 124 | |
78 | #define F81534_RECEIVE_BLOCK_SIZE 128 | |
79 | #define F81534_MAX_RECEIVE_BLOCK_SIZE 512 | |
80 | ||
81 | #define F81534_TOKEN_RECEIVE 0x01 | |
82 | #define F81534_TOKEN_WRITE 0x02 | |
83 | #define F81534_TOKEN_TX_EMPTY 0x03 | |
84 | #define F81534_TOKEN_MSR_CHANGE 0x04 | |
85 | ||
86 | /* | |
87 | * We used interal SPI bus to access FLASH section. We must wait the SPI bus to | |
88 | * idle if we performed any command. | |
89 | * | |
90 | * SPI Bus status register: F81534_BUS_REG_STATUS | |
91 | * Bit 0/1 : BUSY | |
92 | * Bit 2 : IDLE | |
93 | */ | |
94 | #define F81534_BUS_BUSY (BIT(0) | BIT(1)) | |
95 | #define F81534_BUS_IDLE BIT(2) | |
96 | #define F81534_BUS_READ_DATA 0x1004 | |
97 | #define F81534_BUS_REG_STATUS 0x1003 | |
98 | #define F81534_BUS_REG_START 0x1002 | |
99 | #define F81534_BUS_REG_END 0x1001 | |
100 | ||
101 | #define F81534_CMD_READ 0x03 | |
102 | ||
103 | #define F81534_DEFAULT_BAUD_RATE 9600 | |
0c9bd600 | 104 | |
ee0309b4 JZHPH |
105 | #define F81534_PORT_CONF_RS232 0 |
106 | #define F81534_PORT_CONF_RS485 BIT(0) | |
107 | #define F81534_PORT_CONF_RS485_INVERT (BIT(0) | BIT(1)) | |
108 | #define F81534_PORT_CONF_MODE_MASK GENMASK(1, 0) | |
0c9bd600 JZHPH |
109 | #define F81534_PORT_CONF_DISABLE_PORT BIT(3) |
110 | #define F81534_PORT_CONF_NOT_EXIST_PORT BIT(7) | |
111 | #define F81534_PORT_UNAVAILABLE \ | |
112 | (F81534_PORT_CONF_DISABLE_PORT | F81534_PORT_CONF_NOT_EXIST_PORT) | |
113 | ||
ee0309b4 | 114 | |
0c9bd600 JZHPH |
115 | #define F81534_1X_RXTRIGGER 0xc3 |
116 | #define F81534_8X_RXTRIGGER 0xcf | |
117 | ||
3aacac02 JZHPH |
118 | /* |
119 | * F81532/534 Clock registers (offset +08h) | |
120 | * | |
121 | * Bit0: UART Enable (always on) | |
122 | * Bit2-1: Clock source selector | |
123 | * 00: 1.846MHz. | |
124 | * 01: 18.46MHz. | |
125 | * 10: 24MHz. | |
126 | * 11: 14.77MHz. | |
ee0309b4 JZHPH |
127 | * Bit4: Auto direction(RTS) control (RTS pin Low when TX) |
128 | * Bit5: Invert direction(RTS) when Bit4 enabled (RTS pin high when TX) | |
3aacac02 JZHPH |
129 | */ |
130 | ||
131 | #define F81534_UART_EN BIT(0) | |
132 | #define F81534_CLK_1_846_MHZ 0 | |
133 | #define F81534_CLK_18_46_MHZ BIT(1) | |
134 | #define F81534_CLK_24_MHZ BIT(2) | |
135 | #define F81534_CLK_14_77_MHZ (BIT(1) | BIT(2)) | |
136 | #define F81534_CLK_MASK GENMASK(2, 1) | |
d1c48227 | 137 | #define F81534_CLK_TX_DELAY_1BIT BIT(3) |
ee0309b4 JZHPH |
138 | #define F81534_CLK_RS485_MODE BIT(4) |
139 | #define F81534_CLK_RS485_INVERT BIT(5) | |
3aacac02 | 140 | |
0c9bd600 JZHPH |
141 | static const struct usb_device_id f81534_id_table[] = { |
142 | { USB_DEVICE(FINTEK_VENDOR_ID_1, FINTEK_DEVICE_ID) }, | |
143 | { USB_DEVICE(FINTEK_VENDOR_ID_2, FINTEK_DEVICE_ID) }, | |
144 | {} /* Terminating entry */ | |
145 | }; | |
146 | ||
147 | #define F81534_TX_EMPTY_BIT 0 | |
148 | ||
149 | struct f81534_serial_private { | |
150 | u8 conf_data[F81534_DEF_CONF_SIZE]; | |
151 | int tty_idx[F81534_NUM_PORT]; | |
152 | u8 setting_idx; | |
153 | int opened_port; | |
154 | struct mutex urb_mutex; | |
155 | }; | |
156 | ||
157 | struct f81534_port_private { | |
158 | struct mutex mcr_mutex; | |
7c36e6e1 | 159 | struct mutex lcr_mutex; |
dea744ba JZHPH |
160 | struct work_struct lsr_work; |
161 | struct usb_serial_port *port; | |
0c9bd600 JZHPH |
162 | unsigned long tx_empty; |
163 | spinlock_t msr_lock; | |
3aacac02 | 164 | u32 baud_base; |
0c9bd600 | 165 | u8 shadow_mcr; |
7c36e6e1 | 166 | u8 shadow_lcr; |
0c9bd600 | 167 | u8 shadow_msr; |
3aacac02 | 168 | u8 shadow_clk; |
0c9bd600 JZHPH |
169 | u8 phy_num; |
170 | }; | |
171 | ||
138651e1 JZHPH |
172 | struct f81534_pin_data { |
173 | const u16 reg_addr; | |
174 | const u8 reg_mask; | |
175 | }; | |
176 | ||
177 | struct f81534_port_out_pin { | |
178 | struct f81534_pin_data pin[3]; | |
179 | }; | |
180 | ||
181 | /* Pin output value for M2/M1/M0(SD) */ | |
182 | static const struct f81534_port_out_pin f81534_port_out_pins[] = { | |
183 | { { { 0x2ae8, BIT(7) }, { 0x2a90, BIT(5) }, { 0x2a90, BIT(4) } } }, | |
184 | { { { 0x2ae8, BIT(6) }, { 0x2ae8, BIT(0) }, { 0x2ae8, BIT(3) } } }, | |
185 | { { { 0x2a90, BIT(0) }, { 0x2ae8, BIT(2) }, { 0x2a80, BIT(6) } } }, | |
186 | { { { 0x2a90, BIT(3) }, { 0x2a90, BIT(2) }, { 0x2a90, BIT(1) } } }, | |
187 | }; | |
188 | ||
3aacac02 JZHPH |
189 | static u32 const baudrate_table[] = { 115200, 921600, 1152000, 1500000 }; |
190 | static u8 const clock_table[] = { F81534_CLK_1_846_MHZ, F81534_CLK_14_77_MHZ, | |
191 | F81534_CLK_18_46_MHZ, F81534_CLK_24_MHZ }; | |
192 | ||
0c9bd600 JZHPH |
193 | static int f81534_logic_to_phy_port(struct usb_serial *serial, |
194 | struct usb_serial_port *port) | |
195 | { | |
196 | struct f81534_serial_private *serial_priv = | |
197 | usb_get_serial_data(port->serial); | |
198 | int count = 0; | |
199 | int i; | |
200 | ||
201 | for (i = 0; i < F81534_NUM_PORT; ++i) { | |
202 | if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE) | |
203 | continue; | |
204 | ||
205 | if (port->port_number == count) | |
206 | return i; | |
207 | ||
208 | ++count; | |
209 | } | |
210 | ||
211 | return -ENODEV; | |
212 | } | |
213 | ||
214 | static int f81534_set_register(struct usb_serial *serial, u16 reg, u8 data) | |
215 | { | |
216 | struct usb_interface *interface = serial->interface; | |
217 | struct usb_device *dev = serial->dev; | |
218 | size_t count = F81534_USB_MAX_RETRY; | |
219 | int status; | |
220 | u8 *tmp; | |
221 | ||
222 | tmp = kmalloc(sizeof(u8), GFP_KERNEL); | |
223 | if (!tmp) | |
224 | return -ENOMEM; | |
225 | ||
226 | *tmp = data; | |
227 | ||
228 | /* | |
229 | * Our device maybe not reply when heavily loading, We'll retry for | |
230 | * F81534_USB_MAX_RETRY times. | |
231 | */ | |
232 | while (count--) { | |
233 | status = usb_control_msg(dev, usb_sndctrlpipe(dev, 0), | |
234 | F81534_SET_GET_REGISTER, | |
235 | USB_TYPE_VENDOR | USB_DIR_OUT, | |
236 | reg, 0, tmp, sizeof(u8), | |
237 | F81534_USB_TIMEOUT); | |
cfb0fde7 | 238 | if (status == sizeof(u8)) { |
0c9bd600 JZHPH |
239 | status = 0; |
240 | break; | |
0c9bd600 JZHPH |
241 | } |
242 | } | |
243 | ||
244 | if (status < 0) { | |
245 | dev_err(&interface->dev, "%s: reg: %x data: %x failed: %d\n", | |
246 | __func__, reg, data, status); | |
247 | } | |
248 | ||
249 | kfree(tmp); | |
250 | return status; | |
251 | } | |
252 | ||
253 | static int f81534_get_register(struct usb_serial *serial, u16 reg, u8 *data) | |
254 | { | |
255 | struct usb_interface *interface = serial->interface; | |
256 | struct usb_device *dev = serial->dev; | |
257 | size_t count = F81534_USB_MAX_RETRY; | |
258 | int status; | |
259 | u8 *tmp; | |
260 | ||
261 | tmp = kmalloc(sizeof(u8), GFP_KERNEL); | |
262 | if (!tmp) | |
263 | return -ENOMEM; | |
264 | ||
265 | /* | |
266 | * Our device maybe not reply when heavily loading, We'll retry for | |
267 | * F81534_USB_MAX_RETRY times. | |
268 | */ | |
269 | while (count--) { | |
270 | status = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), | |
271 | F81534_SET_GET_REGISTER, | |
272 | USB_TYPE_VENDOR | USB_DIR_IN, | |
273 | reg, 0, tmp, sizeof(u8), | |
274 | F81534_USB_TIMEOUT); | |
275 | if (status > 0) { | |
276 | status = 0; | |
277 | break; | |
278 | } else if (status == 0) { | |
279 | status = -EIO; | |
280 | } | |
281 | } | |
282 | ||
283 | if (status < 0) { | |
284 | dev_err(&interface->dev, "%s: reg: %x failed: %d\n", __func__, | |
285 | reg, status); | |
286 | goto end; | |
287 | } | |
288 | ||
289 | *data = *tmp; | |
290 | ||
291 | end: | |
292 | kfree(tmp); | |
293 | return status; | |
294 | } | |
295 | ||
138651e1 JZHPH |
296 | static int f81534_set_mask_register(struct usb_serial *serial, u16 reg, |
297 | u8 mask, u8 data) | |
298 | { | |
299 | int status; | |
300 | u8 tmp; | |
301 | ||
302 | status = f81534_get_register(serial, reg, &tmp); | |
303 | if (status) | |
304 | return status; | |
305 | ||
306 | tmp &= ~mask; | |
307 | tmp |= (mask & data); | |
308 | ||
309 | return f81534_set_register(serial, reg, tmp); | |
310 | } | |
311 | ||
bb543ca2 JZHPH |
312 | static int f81534_set_phy_port_register(struct usb_serial *serial, int phy, |
313 | u16 reg, u8 data) | |
314 | { | |
315 | return f81534_set_register(serial, reg + F81534_UART_OFFSET * phy, | |
316 | data); | |
317 | } | |
318 | ||
319 | static int f81534_get_phy_port_register(struct usb_serial *serial, int phy, | |
320 | u16 reg, u8 *data) | |
321 | { | |
322 | return f81534_get_register(serial, reg + F81534_UART_OFFSET * phy, | |
323 | data); | |
324 | } | |
325 | ||
0c9bd600 JZHPH |
326 | static int f81534_set_port_register(struct usb_serial_port *port, u16 reg, |
327 | u8 data) | |
328 | { | |
329 | struct f81534_port_private *port_priv = usb_get_serial_port_data(port); | |
330 | ||
331 | return f81534_set_register(port->serial, | |
332 | reg + port_priv->phy_num * F81534_UART_OFFSET, data); | |
333 | } | |
334 | ||
335 | static int f81534_get_port_register(struct usb_serial_port *port, u16 reg, | |
336 | u8 *data) | |
337 | { | |
338 | struct f81534_port_private *port_priv = usb_get_serial_port_data(port); | |
339 | ||
340 | return f81534_get_register(port->serial, | |
341 | reg + port_priv->phy_num * F81534_UART_OFFSET, data); | |
342 | } | |
343 | ||
344 | /* | |
345 | * If we try to access the internal flash via SPI bus, we should check the bus | |
346 | * status for every command. e.g., F81534_BUS_REG_START/F81534_BUS_REG_END | |
347 | */ | |
348 | static int f81534_wait_for_spi_idle(struct usb_serial *serial) | |
349 | { | |
350 | size_t count = F81534_MAX_BUS_RETRY; | |
351 | u8 tmp; | |
352 | int status; | |
353 | ||
354 | do { | |
355 | status = f81534_get_register(serial, F81534_BUS_REG_STATUS, | |
356 | &tmp); | |
357 | if (status) | |
358 | return status; | |
359 | ||
360 | if (tmp & F81534_BUS_BUSY) | |
361 | continue; | |
362 | ||
363 | if (tmp & F81534_BUS_IDLE) | |
364 | break; | |
365 | ||
366 | } while (--count); | |
367 | ||
368 | if (!count) { | |
369 | dev_err(&serial->interface->dev, | |
370 | "%s: timed out waiting for idle SPI bus\n", | |
371 | __func__); | |
372 | return -EIO; | |
373 | } | |
374 | ||
375 | return f81534_set_register(serial, F81534_BUS_REG_STATUS, | |
376 | tmp & ~F81534_BUS_IDLE); | |
377 | } | |
378 | ||
379 | static int f81534_get_spi_register(struct usb_serial *serial, u16 reg, | |
380 | u8 *data) | |
381 | { | |
382 | int status; | |
383 | ||
384 | status = f81534_get_register(serial, reg, data); | |
385 | if (status) | |
386 | return status; | |
387 | ||
388 | return f81534_wait_for_spi_idle(serial); | |
389 | } | |
390 | ||
391 | static int f81534_set_spi_register(struct usb_serial *serial, u16 reg, u8 data) | |
392 | { | |
393 | int status; | |
394 | ||
395 | status = f81534_set_register(serial, reg, data); | |
396 | if (status) | |
397 | return status; | |
398 | ||
399 | return f81534_wait_for_spi_idle(serial); | |
400 | } | |
401 | ||
402 | static int f81534_read_flash(struct usb_serial *serial, u32 address, | |
403 | size_t size, u8 *buf) | |
404 | { | |
405 | u8 tmp_buf[F81534_MAX_DATA_BLOCK]; | |
406 | size_t block = 0; | |
407 | size_t read_size; | |
408 | size_t count; | |
409 | int status; | |
410 | int offset; | |
411 | u16 reg_tmp; | |
412 | ||
413 | status = f81534_set_spi_register(serial, F81534_BUS_REG_START, | |
414 | F81534_CMD_READ); | |
415 | if (status) | |
416 | return status; | |
417 | ||
418 | status = f81534_set_spi_register(serial, F81534_BUS_REG_START, | |
419 | (address >> 16) & 0xff); | |
420 | if (status) | |
421 | return status; | |
422 | ||
423 | status = f81534_set_spi_register(serial, F81534_BUS_REG_START, | |
424 | (address >> 8) & 0xff); | |
425 | if (status) | |
426 | return status; | |
427 | ||
428 | status = f81534_set_spi_register(serial, F81534_BUS_REG_START, | |
429 | (address >> 0) & 0xff); | |
430 | if (status) | |
431 | return status; | |
432 | ||
433 | /* Continuous read mode */ | |
434 | do { | |
435 | read_size = min_t(size_t, F81534_MAX_DATA_BLOCK, size); | |
436 | ||
437 | for (count = 0; count < read_size; ++count) { | |
438 | /* To write F81534_BUS_REG_END when final byte */ | |
439 | if (size <= F81534_MAX_DATA_BLOCK && | |
440 | read_size == count + 1) | |
441 | reg_tmp = F81534_BUS_REG_END; | |
442 | else | |
443 | reg_tmp = F81534_BUS_REG_START; | |
444 | ||
445 | /* | |
446 | * Dummy code, force IC to generate a read pulse, the | |
447 | * set of value 0xf1 is dont care (any value is ok) | |
448 | */ | |
449 | status = f81534_set_spi_register(serial, reg_tmp, | |
450 | 0xf1); | |
451 | if (status) | |
452 | return status; | |
453 | ||
454 | status = f81534_get_spi_register(serial, | |
455 | F81534_BUS_READ_DATA, | |
456 | &tmp_buf[count]); | |
457 | if (status) | |
458 | return status; | |
459 | ||
460 | offset = count + block * F81534_MAX_DATA_BLOCK; | |
461 | buf[offset] = tmp_buf[count]; | |
462 | } | |
463 | ||
464 | size -= read_size; | |
465 | ++block; | |
466 | } while (size); | |
467 | ||
468 | return 0; | |
469 | } | |
470 | ||
471 | static void f81534_prepare_write_buffer(struct usb_serial_port *port, u8 *buf) | |
472 | { | |
473 | struct f81534_port_private *port_priv = usb_get_serial_port_data(port); | |
474 | int phy_num = port_priv->phy_num; | |
475 | u8 tx_len; | |
476 | int i; | |
477 | ||
478 | /* | |
479 | * The block layout is fixed with 4x128 Bytes, per 128 Bytes a port. | |
480 | * index 0: port phy idx (e.g., 0,1,2,3) | |
481 | * index 1: only F81534_TOKEN_WRITE | |
482 | * index 2: serial TX out length | |
483 | * index 3: fix to 0 | |
484 | * index 4~127: serial out data block | |
485 | */ | |
486 | for (i = 0; i < F81534_NUM_PORT; ++i) { | |
487 | buf[i * F81534_RECEIVE_BLOCK_SIZE] = i; | |
488 | buf[i * F81534_RECEIVE_BLOCK_SIZE + 1] = F81534_TOKEN_WRITE; | |
489 | buf[i * F81534_RECEIVE_BLOCK_SIZE + 2] = 0; | |
490 | buf[i * F81534_RECEIVE_BLOCK_SIZE + 3] = 0; | |
491 | } | |
492 | ||
493 | tx_len = kfifo_out_locked(&port->write_fifo, | |
494 | &buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 4], | |
495 | F81534_MAX_TX_SIZE, &port->lock); | |
496 | ||
497 | buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 2] = tx_len; | |
498 | } | |
499 | ||
500 | static int f81534_submit_writer(struct usb_serial_port *port, gfp_t mem_flags) | |
501 | { | |
502 | struct f81534_port_private *port_priv = usb_get_serial_port_data(port); | |
503 | struct urb *urb; | |
504 | unsigned long flags; | |
505 | int result; | |
506 | ||
507 | /* Check is any data in write_fifo */ | |
508 | spin_lock_irqsave(&port->lock, flags); | |
509 | ||
510 | if (kfifo_is_empty(&port->write_fifo)) { | |
511 | spin_unlock_irqrestore(&port->lock, flags); | |
512 | return 0; | |
513 | } | |
514 | ||
515 | spin_unlock_irqrestore(&port->lock, flags); | |
516 | ||
517 | /* Check H/W is TXEMPTY */ | |
518 | if (!test_and_clear_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty)) | |
519 | return 0; | |
520 | ||
521 | urb = port->write_urbs[0]; | |
522 | f81534_prepare_write_buffer(port, port->bulk_out_buffers[0]); | |
523 | urb->transfer_buffer_length = F81534_WRITE_BUFFER_SIZE; | |
524 | ||
525 | result = usb_submit_urb(urb, mem_flags); | |
526 | if (result) { | |
527 | set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty); | |
528 | dev_err(&port->dev, "%s: submit failed: %d\n", __func__, | |
529 | result); | |
530 | return result; | |
531 | } | |
532 | ||
533 | usb_serial_port_softint(port); | |
534 | return 0; | |
535 | } | |
536 | ||
537 | static u32 f81534_calc_baud_divisor(u32 baudrate, u32 clockrate) | |
538 | { | |
0c9bd600 JZHPH |
539 | /* Round to nearest divisor */ |
540 | return DIV_ROUND_CLOSEST(clockrate, baudrate); | |
541 | } | |
542 | ||
3aacac02 JZHPH |
543 | static int f81534_find_clk(u32 baudrate) |
544 | { | |
545 | int idx; | |
546 | ||
547 | for (idx = 0; idx < ARRAY_SIZE(baudrate_table); ++idx) { | |
548 | if (baudrate <= baudrate_table[idx] && | |
549 | baudrate_table[idx] % baudrate == 0) | |
550 | return idx; | |
551 | } | |
552 | ||
553 | return -EINVAL; | |
554 | } | |
555 | ||
556 | static int f81534_set_port_config(struct usb_serial_port *port, | |
557 | struct tty_struct *tty, u32 baudrate, u32 old_baudrate, u8 lcr) | |
0c9bd600 | 558 | { |
7c36e6e1 | 559 | struct f81534_port_private *port_priv = usb_get_serial_port_data(port); |
0c9bd600 JZHPH |
560 | u32 divisor; |
561 | int status; | |
3aacac02 JZHPH |
562 | int i; |
563 | int idx; | |
0c9bd600 | 564 | u8 value; |
3aacac02 JZHPH |
565 | u32 baud_list[] = {baudrate, old_baudrate, F81534_DEFAULT_BAUD_RATE}; |
566 | ||
567 | for (i = 0; i < ARRAY_SIZE(baud_list); ++i) { | |
188c9c2e JH |
568 | baudrate = baud_list[i]; |
569 | if (baudrate == 0) { | |
570 | tty_encode_baud_rate(tty, 0, 0); | |
571 | return 0; | |
572 | } | |
573 | ||
574 | idx = f81534_find_clk(baudrate); | |
3aacac02 | 575 | if (idx >= 0) { |
3aacac02 JZHPH |
576 | tty_encode_baud_rate(tty, baudrate, baudrate); |
577 | break; | |
578 | } | |
579 | } | |
580 | ||
581 | if (idx < 0) | |
582 | return -EINVAL; | |
583 | ||
584 | port_priv->baud_base = baudrate_table[idx]; | |
585 | port_priv->shadow_clk &= ~F81534_CLK_MASK; | |
586 | port_priv->shadow_clk |= clock_table[idx]; | |
587 | ||
588 | status = f81534_set_port_register(port, F81534_CLOCK_REG, | |
589 | port_priv->shadow_clk); | |
590 | if (status) { | |
591 | dev_err(&port->dev, "CLOCK_REG setting failed\n"); | |
592 | return status; | |
593 | } | |
0c9bd600 JZHPH |
594 | |
595 | if (baudrate <= 1200) | |
596 | value = F81534_1X_RXTRIGGER; /* 128 FIFO & TL: 1x */ | |
597 | else | |
598 | value = F81534_8X_RXTRIGGER; /* 128 FIFO & TL: 8x */ | |
599 | ||
600 | status = f81534_set_port_register(port, F81534_CONFIG1_REG, value); | |
601 | if (status) { | |
602 | dev_err(&port->dev, "%s: CONFIG1 setting failed\n", __func__); | |
603 | return status; | |
604 | } | |
605 | ||
606 | if (baudrate <= 1200) | |
607 | value = UART_FCR_TRIGGER_1 | UART_FCR_ENABLE_FIFO; /* TL: 1 */ | |
608 | else | |
3aacac02 | 609 | value = UART_FCR_TRIGGER_8 | UART_FCR_ENABLE_FIFO; /* TL: 8 */ |
0c9bd600 JZHPH |
610 | |
611 | status = f81534_set_port_register(port, F81534_FIFO_CONTROL_REG, | |
612 | value); | |
613 | if (status) { | |
614 | dev_err(&port->dev, "%s: FCR setting failed\n", __func__); | |
615 | return status; | |
616 | } | |
617 | ||
3aacac02 | 618 | divisor = f81534_calc_baud_divisor(baudrate, port_priv->baud_base); |
7c36e6e1 JZHPH |
619 | |
620 | mutex_lock(&port_priv->lcr_mutex); | |
621 | ||
0c9bd600 JZHPH |
622 | value = UART_LCR_DLAB; |
623 | status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG, | |
624 | value); | |
625 | if (status) { | |
626 | dev_err(&port->dev, "%s: set LCR failed\n", __func__); | |
7c36e6e1 | 627 | goto out_unlock; |
0c9bd600 JZHPH |
628 | } |
629 | ||
630 | value = divisor & 0xff; | |
631 | status = f81534_set_port_register(port, F81534_DIVISOR_LSB_REG, value); | |
632 | if (status) { | |
633 | dev_err(&port->dev, "%s: set DLAB LSB failed\n", __func__); | |
7c36e6e1 | 634 | goto out_unlock; |
0c9bd600 JZHPH |
635 | } |
636 | ||
637 | value = (divisor >> 8) & 0xff; | |
638 | status = f81534_set_port_register(port, F81534_DIVISOR_MSB_REG, value); | |
639 | if (status) { | |
640 | dev_err(&port->dev, "%s: set DLAB MSB failed\n", __func__); | |
7c36e6e1 | 641 | goto out_unlock; |
0c9bd600 JZHPH |
642 | } |
643 | ||
7c36e6e1 JZHPH |
644 | value = lcr | (port_priv->shadow_lcr & UART_LCR_SBC); |
645 | status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG, | |
646 | value); | |
0c9bd600 JZHPH |
647 | if (status) { |
648 | dev_err(&port->dev, "%s: set LCR failed\n", __func__); | |
7c36e6e1 | 649 | goto out_unlock; |
0c9bd600 JZHPH |
650 | } |
651 | ||
7c36e6e1 JZHPH |
652 | port_priv->shadow_lcr = value; |
653 | out_unlock: | |
654 | mutex_unlock(&port_priv->lcr_mutex); | |
655 | ||
656 | return status; | |
657 | } | |
658 | ||
659 | static void f81534_break_ctl(struct tty_struct *tty, int break_state) | |
660 | { | |
661 | struct usb_serial_port *port = tty->driver_data; | |
662 | struct f81534_port_private *port_priv = usb_get_serial_port_data(port); | |
663 | int status; | |
664 | ||
665 | mutex_lock(&port_priv->lcr_mutex); | |
666 | ||
667 | if (break_state) | |
668 | port_priv->shadow_lcr |= UART_LCR_SBC; | |
669 | else | |
670 | port_priv->shadow_lcr &= ~UART_LCR_SBC; | |
671 | ||
672 | status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG, | |
673 | port_priv->shadow_lcr); | |
674 | if (status) | |
675 | dev_err(&port->dev, "set break failed: %d\n", status); | |
676 | ||
677 | mutex_unlock(&port_priv->lcr_mutex); | |
0c9bd600 JZHPH |
678 | } |
679 | ||
680 | static int f81534_update_mctrl(struct usb_serial_port *port, unsigned int set, | |
681 | unsigned int clear) | |
682 | { | |
683 | struct f81534_port_private *port_priv = usb_get_serial_port_data(port); | |
684 | int status; | |
685 | u8 tmp; | |
686 | ||
687 | if (((set | clear) & (TIOCM_DTR | TIOCM_RTS)) == 0) | |
688 | return 0; /* no change */ | |
689 | ||
690 | mutex_lock(&port_priv->mcr_mutex); | |
691 | ||
692 | /* 'Set' takes precedence over 'Clear' */ | |
693 | clear &= ~set; | |
694 | ||
695 | /* Always enable UART_MCR_OUT2 */ | |
696 | tmp = UART_MCR_OUT2 | port_priv->shadow_mcr; | |
697 | ||
698 | if (clear & TIOCM_DTR) | |
699 | tmp &= ~UART_MCR_DTR; | |
700 | ||
701 | if (clear & TIOCM_RTS) | |
702 | tmp &= ~UART_MCR_RTS; | |
703 | ||
704 | if (set & TIOCM_DTR) | |
705 | tmp |= UART_MCR_DTR; | |
706 | ||
707 | if (set & TIOCM_RTS) | |
708 | tmp |= UART_MCR_RTS; | |
709 | ||
710 | status = f81534_set_port_register(port, F81534_MODEM_CONTROL_REG, tmp); | |
711 | if (status < 0) { | |
712 | dev_err(&port->dev, "%s: MCR write failed\n", __func__); | |
713 | mutex_unlock(&port_priv->mcr_mutex); | |
714 | return status; | |
715 | } | |
716 | ||
717 | port_priv->shadow_mcr = tmp; | |
718 | mutex_unlock(&port_priv->mcr_mutex); | |
719 | return 0; | |
720 | } | |
721 | ||
722 | /* | |
723 | * This function will search the data area with token F81534_CUSTOM_VALID_TOKEN | |
724 | * for latest configuration index. If nothing found | |
725 | * (*index = F81534_CUSTOM_NO_CUSTOM_DATA), We'll load default configure in | |
726 | * F81534_DEF_CONF_ADDRESS_START section. | |
727 | * | |
728 | * Due to we only use block0 to save data, so *index should be 0 or | |
729 | * F81534_CUSTOM_NO_CUSTOM_DATA. | |
730 | */ | |
731 | static int f81534_find_config_idx(struct usb_serial *serial, u8 *index) | |
732 | { | |
733 | u8 tmp; | |
734 | int status; | |
735 | ||
736 | status = f81534_read_flash(serial, F81534_CUSTOM_ADDRESS_START, 1, | |
737 | &tmp); | |
738 | if (status) { | |
739 | dev_err(&serial->interface->dev, "%s: read failed: %d\n", | |
740 | __func__, status); | |
741 | return status; | |
742 | } | |
743 | ||
744 | /* We'll use the custom data when the data is valid. */ | |
745 | if (tmp == F81534_CUSTOM_VALID_TOKEN) | |
746 | *index = 0; | |
747 | else | |
748 | *index = F81534_CUSTOM_NO_CUSTOM_DATA; | |
749 | ||
750 | return 0; | |
751 | } | |
752 | ||
bb543ca2 JZHPH |
753 | /* |
754 | * The F81532/534 will not report serial port to USB serial subsystem when | |
755 | * H/W DCD/DSR/CTS/RI/RX pin connected to ground. | |
756 | * | |
757 | * To detect RX pin status, we'll enable MCR interal loopback, disable it and | |
758 | * delayed for 60ms. It connected to ground If LSR register report UART_LSR_BI. | |
759 | */ | |
760 | static bool f81534_check_port_hw_disabled(struct usb_serial *serial, int phy) | |
761 | { | |
762 | int status; | |
763 | u8 old_mcr; | |
764 | u8 msr; | |
765 | u8 lsr; | |
766 | u8 msr_mask; | |
767 | ||
768 | msr_mask = UART_MSR_DCD | UART_MSR_RI | UART_MSR_DSR | UART_MSR_CTS; | |
769 | ||
770 | status = f81534_get_phy_port_register(serial, phy, | |
771 | F81534_MODEM_STATUS_REG, &msr); | |
772 | if (status) | |
773 | return false; | |
774 | ||
775 | if ((msr & msr_mask) != msr_mask) | |
776 | return false; | |
777 | ||
778 | status = f81534_set_phy_port_register(serial, phy, | |
779 | F81534_FIFO_CONTROL_REG, UART_FCR_ENABLE_FIFO | | |
780 | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); | |
781 | if (status) | |
782 | return false; | |
783 | ||
784 | status = f81534_get_phy_port_register(serial, phy, | |
785 | F81534_MODEM_CONTROL_REG, &old_mcr); | |
786 | if (status) | |
787 | return false; | |
788 | ||
789 | status = f81534_set_phy_port_register(serial, phy, | |
790 | F81534_MODEM_CONTROL_REG, UART_MCR_LOOP); | |
791 | if (status) | |
792 | return false; | |
793 | ||
794 | status = f81534_set_phy_port_register(serial, phy, | |
795 | F81534_MODEM_CONTROL_REG, 0x0); | |
796 | if (status) | |
797 | return false; | |
798 | ||
799 | msleep(60); | |
800 | ||
801 | status = f81534_get_phy_port_register(serial, phy, | |
802 | F81534_LINE_STATUS_REG, &lsr); | |
803 | if (status) | |
804 | return false; | |
805 | ||
806 | status = f81534_set_phy_port_register(serial, phy, | |
807 | F81534_MODEM_CONTROL_REG, old_mcr); | |
808 | if (status) | |
809 | return false; | |
810 | ||
811 | if ((lsr & UART_LSR_BI) == UART_LSR_BI) | |
812 | return true; | |
813 | ||
814 | return false; | |
815 | } | |
816 | ||
0c9bd600 JZHPH |
817 | /* |
818 | * We had 2 generation of F81532/534 IC. All has an internal storage. | |
819 | * | |
820 | * 1st is pure USB-to-TTL RS232 IC and designed for 4 ports only, no any | |
821 | * internal data will used. All mode and gpio control should manually set | |
822 | * by AP or Driver and all storage space value are 0xff. The | |
823 | * f81534_calc_num_ports() will run to final we marked as "oldest version" | |
824 | * for this IC. | |
825 | * | |
826 | * 2rd is designed to more generic to use any transceiver and this is our | |
827 | * mass production type. We'll save data in F81534_CUSTOM_ADDRESS_START | |
828 | * (0x2f00) with 9bytes. The 1st byte is a indicater. If the token is | |
829 | * F81534_CUSTOM_VALID_TOKEN(0xf0), the IC is 2nd gen type, the following | |
830 | * 4bytes save port mode (0:RS232/1:RS485 Invert/2:RS485), and the last | |
831 | * 4bytes save GPIO state(value from 0~7 to represent 3 GPIO output pin). | |
832 | * The f81534_calc_num_ports() will run to "new style" with checking | |
833 | * F81534_PORT_UNAVAILABLE section. | |
834 | */ | |
07814246 JH |
835 | static int f81534_calc_num_ports(struct usb_serial *serial, |
836 | struct usb_serial_endpoints *epds) | |
0c9bd600 | 837 | { |
f047d357 | 838 | struct f81534_serial_private *serial_priv; |
cac4cea5 JH |
839 | struct device *dev = &serial->interface->dev; |
840 | int size_bulk_in = usb_endpoint_maxp(epds->bulk_in[0]); | |
841 | int size_bulk_out = usb_endpoint_maxp(epds->bulk_out[0]); | |
0c9bd600 | 842 | u8 num_port = 0; |
f047d357 | 843 | int index = 0; |
0c9bd600 | 844 | int status; |
f047d357 | 845 | int i; |
0c9bd600 | 846 | |
cac4cea5 JH |
847 | if (size_bulk_out != F81534_WRITE_BUFFER_SIZE || |
848 | size_bulk_in != F81534_MAX_RECEIVE_BLOCK_SIZE) { | |
849 | dev_err(dev, "unsupported endpoint max packet size\n"); | |
850 | return -ENODEV; | |
851 | } | |
852 | ||
f047d357 JZHPH |
853 | serial_priv = devm_kzalloc(&serial->interface->dev, |
854 | sizeof(*serial_priv), GFP_KERNEL); | |
855 | if (!serial_priv) | |
856 | return -ENOMEM; | |
857 | ||
858 | usb_set_serial_data(serial, serial_priv); | |
859 | mutex_init(&serial_priv->urb_mutex); | |
860 | ||
0c9bd600 | 861 | /* Check had custom setting */ |
f047d357 | 862 | status = f81534_find_config_idx(serial, &serial_priv->setting_idx); |
0c9bd600 JZHPH |
863 | if (status) { |
864 | dev_err(&serial->interface->dev, "%s: find idx failed: %d\n", | |
865 | __func__, status); | |
2f16621b | 866 | return status; |
0c9bd600 JZHPH |
867 | } |
868 | ||
869 | /* | |
870 | * We'll read custom data only when data available, otherwise we'll | |
871 | * read default value instead. | |
872 | */ | |
f047d357 | 873 | if (serial_priv->setting_idx != F81534_CUSTOM_NO_CUSTOM_DATA) { |
0c9bd600 JZHPH |
874 | status = f81534_read_flash(serial, |
875 | F81534_CUSTOM_ADDRESS_START + | |
876 | F81534_CONF_OFFSET, | |
f047d357 JZHPH |
877 | sizeof(serial_priv->conf_data), |
878 | serial_priv->conf_data); | |
0c9bd600 JZHPH |
879 | if (status) { |
880 | dev_err(&serial->interface->dev, | |
881 | "%s: get custom data failed: %d\n", | |
882 | __func__, status); | |
2f16621b | 883 | return status; |
0c9bd600 JZHPH |
884 | } |
885 | ||
886 | dev_dbg(&serial->interface->dev, | |
887 | "%s: read config from block: %d\n", __func__, | |
f047d357 | 888 | serial_priv->setting_idx); |
0c9bd600 JZHPH |
889 | } else { |
890 | /* Read default board setting */ | |
891 | status = f81534_read_flash(serial, | |
f047d357 JZHPH |
892 | F81534_DEF_CONF_ADDRESS_START, |
893 | sizeof(serial_priv->conf_data), | |
894 | serial_priv->conf_data); | |
0c9bd600 JZHPH |
895 | if (status) { |
896 | dev_err(&serial->interface->dev, | |
897 | "%s: read failed: %d\n", __func__, | |
898 | status); | |
2f16621b | 899 | return status; |
0c9bd600 JZHPH |
900 | } |
901 | ||
902 | dev_dbg(&serial->interface->dev, "%s: read default config\n", | |
903 | __func__); | |
904 | } | |
905 | ||
906 | /* New style, find all possible ports */ | |
907 | for (i = 0; i < F81534_NUM_PORT; ++i) { | |
bb543ca2 JZHPH |
908 | if (f81534_check_port_hw_disabled(serial, i)) |
909 | serial_priv->conf_data[i] |= F81534_PORT_UNAVAILABLE; | |
910 | ||
f047d357 | 911 | if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE) |
0c9bd600 JZHPH |
912 | continue; |
913 | ||
914 | ++num_port; | |
915 | } | |
916 | ||
5e07240a JH |
917 | if (!num_port) { |
918 | dev_warn(&serial->interface->dev, | |
919 | "no config found, assuming 4 ports\n"); | |
920 | num_port = 4; /* Nothing found, oldest version IC */ | |
921 | } | |
0c9bd600 | 922 | |
f047d357 JZHPH |
923 | /* Assign phy-to-logic mapping */ |
924 | for (i = 0; i < F81534_NUM_PORT; ++i) { | |
925 | if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE) | |
926 | continue; | |
927 | ||
928 | serial_priv->tty_idx[i] = index++; | |
929 | dev_dbg(&serial->interface->dev, | |
930 | "%s: phy_num: %d, tty_idx: %d\n", __func__, i, | |
931 | serial_priv->tty_idx[i]); | |
932 | } | |
933 | ||
d5ccfce0 JH |
934 | /* |
935 | * Setup bulk-out endpoint multiplexing. All ports share the same | |
936 | * bulk-out endpoint. | |
937 | */ | |
938 | BUILD_BUG_ON(ARRAY_SIZE(epds->bulk_out) < F81534_NUM_PORT); | |
939 | ||
940 | for (i = 1; i < num_port; ++i) | |
941 | epds->bulk_out[i] = epds->bulk_out[0]; | |
942 | ||
943 | epds->num_bulk_out = num_port; | |
944 | ||
5e07240a | 945 | return num_port; |
0c9bd600 JZHPH |
946 | } |
947 | ||
948 | static void f81534_set_termios(struct tty_struct *tty, | |
f6d47fe5 IJ |
949 | struct usb_serial_port *port, |
950 | const struct ktermios *old_termios) | |
0c9bd600 JZHPH |
951 | { |
952 | u8 new_lcr = 0; | |
953 | int status; | |
954 | u32 baud; | |
3aacac02 | 955 | u32 old_baud; |
0c9bd600 JZHPH |
956 | |
957 | if (C_BAUD(tty) == B0) | |
958 | f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS); | |
959 | else if (old_termios && (old_termios->c_cflag & CBAUD) == B0) | |
960 | f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0); | |
961 | ||
962 | if (C_PARENB(tty)) { | |
963 | new_lcr |= UART_LCR_PARITY; | |
964 | ||
965 | if (!C_PARODD(tty)) | |
966 | new_lcr |= UART_LCR_EPAR; | |
967 | ||
968 | if (C_CMSPAR(tty)) | |
969 | new_lcr |= UART_LCR_SPAR; | |
970 | } | |
971 | ||
972 | if (C_CSTOPB(tty)) | |
973 | new_lcr |= UART_LCR_STOP; | |
974 | ||
5e1440bc | 975 | new_lcr |= UART_LCR_WLEN(tty_get_char_size(tty->termios.c_cflag)); |
0c9bd600 JZHPH |
976 | |
977 | baud = tty_get_baud_rate(tty); | |
978 | if (!baud) | |
979 | return; | |
980 | ||
3aacac02 JZHPH |
981 | if (old_termios) |
982 | old_baud = tty_termios_baud_rate(old_termios); | |
983 | else | |
984 | old_baud = F81534_DEFAULT_BAUD_RATE; | |
0c9bd600 JZHPH |
985 | |
986 | dev_dbg(&port->dev, "%s: baud: %d\n", __func__, baud); | |
987 | ||
3aacac02 | 988 | status = f81534_set_port_config(port, tty, baud, old_baud, new_lcr); |
0c9bd600 JZHPH |
989 | if (status < 0) { |
990 | dev_err(&port->dev, "%s: set port config failed: %d\n", | |
991 | __func__, status); | |
992 | } | |
993 | } | |
994 | ||
995 | static int f81534_submit_read_urb(struct usb_serial *serial, gfp_t flags) | |
996 | { | |
997 | return usb_serial_generic_submit_read_urbs(serial->port[0], flags); | |
998 | } | |
999 | ||
1000 | static void f81534_msr_changed(struct usb_serial_port *port, u8 msr) | |
1001 | { | |
1002 | struct f81534_port_private *port_priv = usb_get_serial_port_data(port); | |
1003 | struct tty_struct *tty; | |
1004 | unsigned long flags; | |
1005 | u8 old_msr; | |
1006 | ||
1007 | if (!(msr & UART_MSR_ANY_DELTA)) | |
1008 | return; | |
1009 | ||
1010 | spin_lock_irqsave(&port_priv->msr_lock, flags); | |
1011 | old_msr = port_priv->shadow_msr; | |
1012 | port_priv->shadow_msr = msr; | |
1013 | spin_unlock_irqrestore(&port_priv->msr_lock, flags); | |
1014 | ||
1015 | dev_dbg(&port->dev, "%s: MSR from %02x to %02x\n", __func__, old_msr, | |
1016 | msr); | |
1017 | ||
1018 | /* Update input line counters */ | |
1019 | if (msr & UART_MSR_DCTS) | |
1020 | port->icount.cts++; | |
1021 | if (msr & UART_MSR_DDSR) | |
1022 | port->icount.dsr++; | |
1023 | if (msr & UART_MSR_DDCD) | |
1024 | port->icount.dcd++; | |
1025 | if (msr & UART_MSR_TERI) | |
1026 | port->icount.rng++; | |
1027 | ||
1028 | wake_up_interruptible(&port->port.delta_msr_wait); | |
1029 | ||
1030 | if (!(msr & UART_MSR_DDCD)) | |
1031 | return; | |
1032 | ||
1033 | dev_dbg(&port->dev, "%s: DCD Changed: phy_num: %d from %x to %x\n", | |
1034 | __func__, port_priv->phy_num, old_msr, msr); | |
1035 | ||
1036 | tty = tty_port_tty_get(&port->port); | |
1037 | if (!tty) | |
1038 | return; | |
1039 | ||
1040 | usb_serial_handle_dcd_change(port, tty, msr & UART_MSR_DCD); | |
1041 | tty_kref_put(tty); | |
1042 | } | |
1043 | ||
1044 | static int f81534_read_msr(struct usb_serial_port *port) | |
1045 | { | |
1046 | struct f81534_port_private *port_priv = usb_get_serial_port_data(port); | |
1047 | unsigned long flags; | |
1048 | int status; | |
1049 | u8 msr; | |
1050 | ||
1051 | /* Get MSR initial value */ | |
1052 | status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr); | |
1053 | if (status) | |
1054 | return status; | |
1055 | ||
1056 | /* Force update current state */ | |
1057 | spin_lock_irqsave(&port_priv->msr_lock, flags); | |
1058 | port_priv->shadow_msr = msr; | |
1059 | spin_unlock_irqrestore(&port_priv->msr_lock, flags); | |
1060 | ||
1061 | return 0; | |
1062 | } | |
1063 | ||
1064 | static int f81534_open(struct tty_struct *tty, struct usb_serial_port *port) | |
1065 | { | |
1066 | struct f81534_serial_private *serial_priv = | |
1067 | usb_get_serial_data(port->serial); | |
1068 | struct f81534_port_private *port_priv = usb_get_serial_port_data(port); | |
1069 | int status; | |
1070 | ||
1071 | status = f81534_set_port_register(port, | |
1072 | F81534_FIFO_CONTROL_REG, UART_FCR_ENABLE_FIFO | | |
1073 | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); | |
1074 | if (status) { | |
1075 | dev_err(&port->dev, "%s: Clear FIFO failed: %d\n", __func__, | |
1076 | status); | |
1077 | return status; | |
1078 | } | |
1079 | ||
1080 | if (tty) | |
1081 | f81534_set_termios(tty, port, NULL); | |
1082 | ||
1083 | status = f81534_read_msr(port); | |
1084 | if (status) | |
1085 | return status; | |
1086 | ||
1087 | mutex_lock(&serial_priv->urb_mutex); | |
1088 | ||
1089 | /* Submit Read URBs for first port opened */ | |
1090 | if (!serial_priv->opened_port) { | |
1091 | status = f81534_submit_read_urb(port->serial, GFP_KERNEL); | |
1092 | if (status) | |
1093 | goto exit; | |
1094 | } | |
1095 | ||
1096 | serial_priv->opened_port++; | |
1097 | ||
1098 | exit: | |
1099 | mutex_unlock(&serial_priv->urb_mutex); | |
1100 | ||
1101 | set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty); | |
1102 | return status; | |
1103 | } | |
1104 | ||
1105 | static void f81534_close(struct usb_serial_port *port) | |
1106 | { | |
1107 | struct f81534_serial_private *serial_priv = | |
1108 | usb_get_serial_data(port->serial); | |
1109 | struct usb_serial_port *port0 = port->serial->port[0]; | |
1110 | unsigned long flags; | |
1111 | size_t i; | |
1112 | ||
1113 | usb_kill_urb(port->write_urbs[0]); | |
1114 | ||
1115 | spin_lock_irqsave(&port->lock, flags); | |
1116 | kfifo_reset_out(&port->write_fifo); | |
1117 | spin_unlock_irqrestore(&port->lock, flags); | |
1118 | ||
1119 | /* Kill Read URBs when final port closed */ | |
1120 | mutex_lock(&serial_priv->urb_mutex); | |
1121 | serial_priv->opened_port--; | |
1122 | ||
1123 | if (!serial_priv->opened_port) { | |
1124 | for (i = 0; i < ARRAY_SIZE(port0->read_urbs); ++i) | |
1125 | usb_kill_urb(port0->read_urbs[i]); | |
1126 | } | |
1127 | ||
1128 | mutex_unlock(&serial_priv->urb_mutex); | |
1129 | } | |
1130 | ||
01fd45f6 | 1131 | static void f81534_get_serial_info(struct tty_struct *tty, struct serial_struct *ss) |
0c9bd600 | 1132 | { |
c8f97e77 | 1133 | struct usb_serial_port *port = tty->driver_data; |
0c9bd600 | 1134 | struct f81534_port_private *port_priv; |
0c9bd600 JZHPH |
1135 | |
1136 | port_priv = usb_get_serial_port_data(port); | |
1137 | ||
c8f97e77 | 1138 | ss->baud_base = port_priv->baud_base; |
0c9bd600 JZHPH |
1139 | } |
1140 | ||
0c9bd600 JZHPH |
1141 | static void f81534_process_per_serial_block(struct usb_serial_port *port, |
1142 | u8 *data) | |
1143 | { | |
1144 | struct f81534_port_private *port_priv = usb_get_serial_port_data(port); | |
1145 | int phy_num = data[0]; | |
1146 | size_t read_size = 0; | |
1147 | size_t i; | |
1148 | char tty_flag; | |
1149 | int status; | |
1150 | u8 lsr; | |
1151 | ||
1152 | /* | |
1153 | * The block layout is 128 Bytes | |
1154 | * index 0: port phy idx (e.g., 0,1,2,3), | |
1155 | * index 1: It's could be | |
1156 | * F81534_TOKEN_RECEIVE | |
1157 | * F81534_TOKEN_TX_EMPTY | |
1158 | * F81534_TOKEN_MSR_CHANGE | |
1159 | * index 2: serial in size (data+lsr, must be even) | |
1160 | * meaningful for F81534_TOKEN_RECEIVE only | |
1161 | * index 3: current MSR with this device | |
1162 | * index 4~127: serial in data block (data+lsr, must be even) | |
1163 | */ | |
1164 | switch (data[1]) { | |
1165 | case F81534_TOKEN_TX_EMPTY: | |
1166 | set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty); | |
1167 | ||
1168 | /* Try to submit writer */ | |
1169 | status = f81534_submit_writer(port, GFP_ATOMIC); | |
1170 | if (status) | |
1171 | dev_err(&port->dev, "%s: submit failed\n", __func__); | |
1172 | return; | |
1173 | ||
1174 | case F81534_TOKEN_MSR_CHANGE: | |
1175 | f81534_msr_changed(port, data[3]); | |
1176 | return; | |
1177 | ||
1178 | case F81534_TOKEN_RECEIVE: | |
1179 | read_size = data[2]; | |
1180 | if (read_size > F81534_MAX_RX_SIZE) { | |
1181 | dev_err(&port->dev, | |
1182 | "%s: phy: %d read_size: %zu larger than: %d\n", | |
1183 | __func__, phy_num, read_size, | |
1184 | F81534_MAX_RX_SIZE); | |
1185 | return; | |
1186 | } | |
1187 | ||
1188 | break; | |
1189 | ||
1190 | default: | |
1191 | dev_warn(&port->dev, "%s: unknown token: %02x\n", __func__, | |
1192 | data[1]); | |
1193 | return; | |
1194 | } | |
1195 | ||
1196 | for (i = 4; i < 4 + read_size; i += 2) { | |
1197 | tty_flag = TTY_NORMAL; | |
1198 | lsr = data[i + 1]; | |
1199 | ||
1200 | if (lsr & UART_LSR_BRK_ERROR_BITS) { | |
1201 | if (lsr & UART_LSR_BI) { | |
1202 | tty_flag = TTY_BREAK; | |
1203 | port->icount.brk++; | |
1204 | usb_serial_handle_break(port); | |
1205 | } else if (lsr & UART_LSR_PE) { | |
1206 | tty_flag = TTY_PARITY; | |
1207 | port->icount.parity++; | |
1208 | } else if (lsr & UART_LSR_FE) { | |
1209 | tty_flag = TTY_FRAME; | |
1210 | port->icount.frame++; | |
1211 | } | |
1212 | ||
1213 | if (lsr & UART_LSR_OE) { | |
1214 | port->icount.overrun++; | |
1215 | tty_insert_flip_char(&port->port, 0, | |
1216 | TTY_OVERRUN); | |
1217 | } | |
dea744ba JZHPH |
1218 | |
1219 | schedule_work(&port_priv->lsr_work); | |
0c9bd600 JZHPH |
1220 | } |
1221 | ||
37ae2315 | 1222 | if (port->sysrq) { |
0c9bd600 JZHPH |
1223 | if (usb_serial_handle_sysrq_char(port, data[i])) |
1224 | continue; | |
1225 | } | |
1226 | ||
1227 | tty_insert_flip_char(&port->port, data[i], tty_flag); | |
1228 | } | |
1229 | ||
1230 | tty_flip_buffer_push(&port->port); | |
1231 | } | |
1232 | ||
1233 | static void f81534_process_read_urb(struct urb *urb) | |
1234 | { | |
1235 | struct f81534_serial_private *serial_priv; | |
1236 | struct usb_serial_port *port; | |
1237 | struct usb_serial *serial; | |
1238 | u8 *buf; | |
1239 | int phy_port_num; | |
1240 | int tty_port_num; | |
1241 | size_t i; | |
1242 | ||
1243 | if (!urb->actual_length || | |
1244 | urb->actual_length % F81534_RECEIVE_BLOCK_SIZE) { | |
1245 | return; | |
1246 | } | |
1247 | ||
1248 | port = urb->context; | |
1249 | serial = port->serial; | |
1250 | buf = urb->transfer_buffer; | |
1251 | serial_priv = usb_get_serial_data(serial); | |
1252 | ||
1253 | for (i = 0; i < urb->actual_length; i += F81534_RECEIVE_BLOCK_SIZE) { | |
1254 | phy_port_num = buf[i]; | |
1255 | if (phy_port_num >= F81534_NUM_PORT) { | |
1256 | dev_err(&port->dev, | |
1257 | "%s: phy_port_num: %d larger than: %d\n", | |
1258 | __func__, phy_port_num, F81534_NUM_PORT); | |
1259 | continue; | |
1260 | } | |
1261 | ||
1262 | tty_port_num = serial_priv->tty_idx[phy_port_num]; | |
1263 | port = serial->port[tty_port_num]; | |
1264 | ||
1265 | if (tty_port_initialized(&port->port)) | |
1266 | f81534_process_per_serial_block(port, &buf[i]); | |
1267 | } | |
1268 | } | |
1269 | ||
1270 | static void f81534_write_usb_callback(struct urb *urb) | |
1271 | { | |
1272 | struct usb_serial_port *port = urb->context; | |
1273 | ||
1274 | switch (urb->status) { | |
1275 | case 0: | |
1276 | break; | |
1277 | case -ENOENT: | |
1278 | case -ECONNRESET: | |
1279 | case -ESHUTDOWN: | |
1280 | dev_dbg(&port->dev, "%s - urb stopped: %d\n", | |
1281 | __func__, urb->status); | |
1282 | return; | |
1283 | case -EPIPE: | |
1284 | dev_err(&port->dev, "%s - urb stopped: %d\n", | |
1285 | __func__, urb->status); | |
1286 | return; | |
1287 | default: | |
1288 | dev_dbg(&port->dev, "%s - nonzero urb status: %d\n", | |
1289 | __func__, urb->status); | |
1290 | break; | |
1291 | } | |
1292 | } | |
1293 | ||
dea744ba JZHPH |
1294 | static void f81534_lsr_worker(struct work_struct *work) |
1295 | { | |
1296 | struct f81534_port_private *port_priv; | |
1297 | struct usb_serial_port *port; | |
1298 | int status; | |
1299 | u8 tmp; | |
1300 | ||
1301 | port_priv = container_of(work, struct f81534_port_private, lsr_work); | |
1302 | port = port_priv->port; | |
1303 | ||
1304 | status = f81534_get_port_register(port, F81534_LINE_STATUS_REG, &tmp); | |
1305 | if (status) | |
1306 | dev_warn(&port->dev, "read LSR failed: %d\n", status); | |
1307 | } | |
1308 | ||
138651e1 JZHPH |
1309 | static int f81534_set_port_output_pin(struct usb_serial_port *port) |
1310 | { | |
1311 | struct f81534_serial_private *serial_priv; | |
1312 | struct f81534_port_private *port_priv; | |
1313 | struct usb_serial *serial; | |
1314 | const struct f81534_port_out_pin *pins; | |
1315 | int status; | |
1316 | int i; | |
1317 | u8 value; | |
1318 | u8 idx; | |
1319 | ||
1320 | serial = port->serial; | |
1321 | serial_priv = usb_get_serial_data(serial); | |
1322 | port_priv = usb_get_serial_port_data(port); | |
1323 | ||
ab60075f | 1324 | idx = F81534_CONF_INIT_GPIO_OFFSET + port_priv->phy_num; |
138651e1 | 1325 | value = serial_priv->conf_data[idx]; |
ab60075f JZHPH |
1326 | if (value >= F81534_CONF_GPIO_SHUTDOWN) { |
1327 | /* | |
1328 | * Newer IC configure will make transceiver in shutdown mode on | |
1329 | * initial power on. We need enable it before using UARTs. | |
1330 | */ | |
1331 | idx = F81534_CONF_WORK_GPIO_OFFSET + port_priv->phy_num; | |
1332 | value = serial_priv->conf_data[idx]; | |
1333 | if (value >= F81534_CONF_GPIO_SHUTDOWN) | |
1334 | value = F81534_CONF_GPIO_RS232; | |
1335 | } | |
1336 | ||
138651e1 JZHPH |
1337 | pins = &f81534_port_out_pins[port_priv->phy_num]; |
1338 | ||
1339 | for (i = 0; i < ARRAY_SIZE(pins->pin); ++i) { | |
1340 | status = f81534_set_mask_register(serial, | |
1341 | pins->pin[i].reg_addr, pins->pin[i].reg_mask, | |
1342 | value & BIT(i) ? pins->pin[i].reg_mask : 0); | |
1343 | if (status) | |
1344 | return status; | |
1345 | } | |
1346 | ||
1347 | dev_dbg(&port->dev, "Output pin (M0/M1/M2): %d\n", value); | |
1348 | return 0; | |
1349 | } | |
1350 | ||
0c9bd600 JZHPH |
1351 | static int f81534_port_probe(struct usb_serial_port *port) |
1352 | { | |
ee0309b4 | 1353 | struct f81534_serial_private *serial_priv; |
0c9bd600 | 1354 | struct f81534_port_private *port_priv; |
42715763 | 1355 | int ret; |
ee0309b4 | 1356 | u8 value; |
0c9bd600 | 1357 | |
ee0309b4 | 1358 | serial_priv = usb_get_serial_data(port->serial); |
0c9bd600 JZHPH |
1359 | port_priv = devm_kzalloc(&port->dev, sizeof(*port_priv), GFP_KERNEL); |
1360 | if (!port_priv) | |
1361 | return -ENOMEM; | |
1362 | ||
d1c48227 JZHPH |
1363 | /* |
1364 | * We'll make tx frame error when baud rate from 384~500kps. So we'll | |
1365 | * delay all tx data frame with 1bit. | |
1366 | */ | |
1367 | port_priv->shadow_clk = F81534_UART_EN | F81534_CLK_TX_DELAY_1BIT; | |
0c9bd600 JZHPH |
1368 | spin_lock_init(&port_priv->msr_lock); |
1369 | mutex_init(&port_priv->mcr_mutex); | |
7c36e6e1 | 1370 | mutex_init(&port_priv->lcr_mutex); |
dea744ba | 1371 | INIT_WORK(&port_priv->lsr_work, f81534_lsr_worker); |
0c9bd600 JZHPH |
1372 | |
1373 | /* Assign logic-to-phy mapping */ | |
42715763 GU |
1374 | ret = f81534_logic_to_phy_port(port->serial, port); |
1375 | if (ret < 0) | |
1376 | return ret; | |
0c9bd600 | 1377 | |
42715763 | 1378 | port_priv->phy_num = ret; |
dea744ba | 1379 | port_priv->port = port; |
0c9bd600 JZHPH |
1380 | usb_set_serial_port_data(port, port_priv); |
1381 | dev_dbg(&port->dev, "%s: port_number: %d, phy_num: %d\n", __func__, | |
1382 | port->port_number, port_priv->phy_num); | |
1383 | ||
dea744ba JZHPH |
1384 | /* |
1385 | * The F81532/534 will hang-up when enable LSR interrupt in IER and | |
1386 | * occur data overrun. So we'll disable the LSR interrupt in probe() | |
1387 | * and submit the LSR worker to clear LSR state when reported LSR error | |
1388 | * bit with bulk-in data in f81534_process_per_serial_block(). | |
1389 | */ | |
1390 | ret = f81534_set_port_register(port, F81534_INTERRUPT_ENABLE_REG, | |
1391 | UART_IER_RDI | UART_IER_THRI | UART_IER_MSI); | |
1392 | if (ret) | |
1393 | return ret; | |
1394 | ||
ee0309b4 JZHPH |
1395 | value = serial_priv->conf_data[port_priv->phy_num]; |
1396 | switch (value & F81534_PORT_CONF_MODE_MASK) { | |
1397 | case F81534_PORT_CONF_RS485_INVERT: | |
1398 | port_priv->shadow_clk |= F81534_CLK_RS485_MODE | | |
1399 | F81534_CLK_RS485_INVERT; | |
1400 | dev_dbg(&port->dev, "RS485 invert mode\n"); | |
1401 | break; | |
1402 | case F81534_PORT_CONF_RS485: | |
1403 | port_priv->shadow_clk |= F81534_CLK_RS485_MODE; | |
1404 | dev_dbg(&port->dev, "RS485 mode\n"); | |
1405 | break; | |
1406 | ||
1407 | default: | |
1408 | case F81534_PORT_CONF_RS232: | |
1409 | dev_dbg(&port->dev, "RS232 mode\n"); | |
1410 | break; | |
1411 | } | |
1412 | ||
138651e1 | 1413 | return f81534_set_port_output_pin(port); |
dea744ba JZHPH |
1414 | } |
1415 | ||
c5d1448f | 1416 | static void f81534_port_remove(struct usb_serial_port *port) |
dea744ba JZHPH |
1417 | { |
1418 | struct f81534_port_private *port_priv = usb_get_serial_port_data(port); | |
1419 | ||
1420 | flush_work(&port_priv->lsr_work); | |
0c9bd600 JZHPH |
1421 | } |
1422 | ||
1423 | static int f81534_tiocmget(struct tty_struct *tty) | |
1424 | { | |
1425 | struct usb_serial_port *port = tty->driver_data; | |
1426 | struct f81534_port_private *port_priv = usb_get_serial_port_data(port); | |
1427 | int status; | |
1428 | int r; | |
1429 | u8 msr; | |
1430 | u8 mcr; | |
1431 | ||
1432 | /* Read current MSR from device */ | |
1433 | status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr); | |
1434 | if (status) | |
1435 | return status; | |
1436 | ||
1437 | mutex_lock(&port_priv->mcr_mutex); | |
1438 | mcr = port_priv->shadow_mcr; | |
1439 | mutex_unlock(&port_priv->mcr_mutex); | |
1440 | ||
1441 | r = (mcr & UART_MCR_DTR ? TIOCM_DTR : 0) | | |
1442 | (mcr & UART_MCR_RTS ? TIOCM_RTS : 0) | | |
1443 | (msr & UART_MSR_CTS ? TIOCM_CTS : 0) | | |
1444 | (msr & UART_MSR_DCD ? TIOCM_CAR : 0) | | |
1445 | (msr & UART_MSR_RI ? TIOCM_RI : 0) | | |
1446 | (msr & UART_MSR_DSR ? TIOCM_DSR : 0); | |
1447 | ||
1448 | return r; | |
1449 | } | |
1450 | ||
1451 | static int f81534_tiocmset(struct tty_struct *tty, unsigned int set, | |
1452 | unsigned int clear) | |
1453 | { | |
1454 | struct usb_serial_port *port = tty->driver_data; | |
1455 | ||
1456 | return f81534_update_mctrl(port, set, clear); | |
1457 | } | |
1458 | ||
1459 | static void f81534_dtr_rts(struct usb_serial_port *port, int on) | |
1460 | { | |
1461 | if (on) | |
1462 | f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0); | |
1463 | else | |
1464 | f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS); | |
1465 | } | |
1466 | ||
1467 | static int f81534_write(struct tty_struct *tty, struct usb_serial_port *port, | |
1468 | const u8 *buf, int count) | |
1469 | { | |
1470 | int bytes_out, status; | |
1471 | ||
1472 | if (!count) | |
1473 | return 0; | |
1474 | ||
1475 | bytes_out = kfifo_in_locked(&port->write_fifo, buf, count, | |
1476 | &port->lock); | |
1477 | ||
1478 | status = f81534_submit_writer(port, GFP_ATOMIC); | |
1479 | if (status) { | |
1480 | dev_err(&port->dev, "%s: submit failed\n", __func__); | |
1481 | return status; | |
1482 | } | |
1483 | ||
1484 | return bytes_out; | |
1485 | } | |
1486 | ||
1487 | static bool f81534_tx_empty(struct usb_serial_port *port) | |
1488 | { | |
1489 | struct f81534_port_private *port_priv = usb_get_serial_port_data(port); | |
1490 | ||
1491 | return test_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty); | |
1492 | } | |
1493 | ||
1494 | static int f81534_resume(struct usb_serial *serial) | |
1495 | { | |
1496 | struct f81534_serial_private *serial_priv = | |
1497 | usb_get_serial_data(serial); | |
1498 | struct usb_serial_port *port; | |
1499 | int error = 0; | |
1500 | int status; | |
1501 | size_t i; | |
1502 | ||
1503 | /* | |
1504 | * We'll register port 0 bulkin when port had opened, It'll take all | |
1505 | * port received data, MSR register change and TX_EMPTY information. | |
1506 | */ | |
1507 | mutex_lock(&serial_priv->urb_mutex); | |
1508 | ||
1509 | if (serial_priv->opened_port) { | |
1510 | status = f81534_submit_read_urb(serial, GFP_NOIO); | |
1511 | if (status) { | |
1512 | mutex_unlock(&serial_priv->urb_mutex); | |
1513 | return status; | |
1514 | } | |
1515 | } | |
1516 | ||
1517 | mutex_unlock(&serial_priv->urb_mutex); | |
1518 | ||
1519 | for (i = 0; i < serial->num_ports; i++) { | |
1520 | port = serial->port[i]; | |
1521 | if (!tty_port_initialized(&port->port)) | |
1522 | continue; | |
1523 | ||
1524 | status = f81534_submit_writer(port, GFP_NOIO); | |
1525 | if (status) { | |
1526 | dev_err(&port->dev, "%s: submit failed\n", __func__); | |
1527 | ++error; | |
1528 | } | |
1529 | } | |
1530 | ||
1531 | if (error) | |
1532 | return -EIO; | |
1533 | ||
1534 | return 0; | |
1535 | } | |
1536 | ||
1537 | static struct usb_serial_driver f81534_device = { | |
1538 | .driver = { | |
1539 | .owner = THIS_MODULE, | |
1540 | .name = "f81534", | |
1541 | }, | |
1542 | .description = DRIVER_DESC, | |
1543 | .id_table = f81534_id_table, | |
cac4cea5 JH |
1544 | .num_bulk_in = 1, |
1545 | .num_bulk_out = 1, | |
0c9bd600 JZHPH |
1546 | .open = f81534_open, |
1547 | .close = f81534_close, | |
1548 | .write = f81534_write, | |
1549 | .tx_empty = f81534_tx_empty, | |
1550 | .calc_num_ports = f81534_calc_num_ports, | |
0c9bd600 | 1551 | .port_probe = f81534_port_probe, |
dea744ba | 1552 | .port_remove = f81534_port_remove, |
7c36e6e1 | 1553 | .break_ctl = f81534_break_ctl, |
0c9bd600 JZHPH |
1554 | .dtr_rts = f81534_dtr_rts, |
1555 | .process_read_urb = f81534_process_read_urb, | |
c8f97e77 | 1556 | .get_serial = f81534_get_serial_info, |
0c9bd600 JZHPH |
1557 | .tiocmget = f81534_tiocmget, |
1558 | .tiocmset = f81534_tiocmset, | |
1559 | .write_bulk_callback = f81534_write_usb_callback, | |
1560 | .set_termios = f81534_set_termios, | |
1561 | .resume = f81534_resume, | |
1562 | }; | |
1563 | ||
1564 | static struct usb_serial_driver *const serial_drivers[] = { | |
1565 | &f81534_device, NULL | |
1566 | }; | |
1567 | ||
1568 | module_usb_serial_driver(serial_drivers, f81534_id_table); | |
1569 | ||
1570 | MODULE_DEVICE_TABLE(usb, f81534_id_table); | |
1571 | MODULE_DESCRIPTION(DRIVER_DESC); | |
1572 | MODULE_AUTHOR("Peter Hong <Peter_Hong@fintek.com.tw>"); | |
1573 | MODULE_AUTHOR("Tom Tsai <Tom_Tsai@fintek.com.tw>"); | |
1574 | MODULE_LICENSE("GPL"); |