usb: renesas_usbhs: add a workaround for a race condition of workqueue
[linux-2.6-block.git] / drivers / usb / renesas_usbhs / fifo.c
CommitLineData
5fd54ace 1// SPDX-License-Identifier: GPL-1.0+
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2/*
3 * Renesas USB driver
4 *
5 * Copyright (C) 2011 Renesas Solutions Corp.
6 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
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7 */
8#include <linux/delay.h>
9#include <linux/io.h>
9c646cfc 10#include <linux/scatterlist.h>
cc502bb7
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11#include "common.h"
12#include "pipe.h"
e8d548d5 13
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14#define usbhsf_get_cfifo(p) (&((p)->fifo_info.cfifo))
15
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16#define usbhsf_fifo_is_busy(f) ((f)->pipe) /* see usbhs_pipe_select_fifo */
17
4bd04811 18/*
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19 * packet initialize
20 */
21void usbhs_pkt_init(struct usbhs_pkt *pkt)
22{
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23 INIT_LIST_HEAD(&pkt->node);
24}
25
26/*
27 * packet control function
4bd04811 28 */
97664a20 29static int usbhsf_null_handle(struct usbhs_pkt *pkt, int *is_done)
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30{
31 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
32 struct device *dev = usbhs_priv_to_dev(priv);
33
34 dev_err(dev, "null handler\n");
35
36 return -EINVAL;
37}
38
fcb42e23 39static const struct usbhs_pkt_handle usbhsf_null_handler = {
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40 .prepare = usbhsf_null_handle,
41 .try_run = usbhsf_null_handle,
42};
43
659d4954 44void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt,
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45 void (*done)(struct usbhs_priv *priv,
46 struct usbhs_pkt *pkt),
3edeee38 47 void *buf, int len, int zero, int sequence)
6acb95d4 48{
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49 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
50 struct device *dev = usbhs_priv_to_dev(priv);
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51 unsigned long flags;
52
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53 if (!done) {
54 dev_err(dev, "no done function\n");
55 return;
56 }
57
a2c76b83
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58 /******************** spin lock ********************/
59 usbhs_lock(priv, flags);
60
0c6ef985 61 if (!pipe->handler) {
dad67397 62 dev_err(dev, "no handler function\n");
0c6ef985 63 pipe->handler = &usbhsf_null_handler;
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64 }
65
d5261286 66 list_move_tail(&pkt->node, &pipe->list);
6acb95d4 67
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68 /*
69 * each pkt must hold own handler.
70 * because handler might be changed by its situation.
71 * dma handler -> pio handler.
72 */
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73 pkt->pipe = pipe;
74 pkt->buf = buf;
0c6ef985 75 pkt->handler = pipe->handler;
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76 pkt->length = len;
77 pkt->zero = zero;
78 pkt->actual = 0;
b331872b 79 pkt->done = done;
3edeee38 80 pkt->sequence = sequence;
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81
82 usbhs_unlock(priv, flags);
83 /******************** spin unlock ******************/
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84}
85
97664a20 86static void __usbhsf_pkt_del(struct usbhs_pkt *pkt)
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87{
88 list_del_init(&pkt->node);
89}
90
97664a20 91static struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe)
6acb95d4 92{
31faf878 93 return list_first_entry_or_null(&pipe->list, struct usbhs_pkt, node);
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94}
95
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96static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe,
97 struct usbhs_fifo *fifo);
98static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo,
99 struct usbhs_pkt *pkt);
100#define usbhsf_dma_map(p) __usbhsf_dma_map_ctrl(p, 1)
101#define usbhsf_dma_unmap(p) __usbhsf_dma_map_ctrl(p, 0)
102static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map);
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103struct usbhs_pkt *usbhs_pkt_pop(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt)
104{
105 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
2743e7f9 106 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
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107 unsigned long flags;
108
109 /******************** spin lock ********************/
110 usbhs_lock(priv, flags);
111
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112 usbhs_pipe_disable(pipe);
113
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114 if (!pkt)
115 pkt = __usbhsf_pkt_get(pipe);
116
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117 if (pkt) {
118 struct dma_chan *chan = NULL;
119
120 if (fifo)
121 chan = usbhsf_dma_chan_get(fifo, pkt);
122 if (chan) {
123 dmaengine_terminate_all(chan);
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124 usbhsf_dma_unmap(pkt);
125 }
126
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127 usbhs_pipe_clear_without_sequence(pipe, 0, 0);
128
97664a20 129 __usbhsf_pkt_del(pkt);
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130 }
131
132 if (fifo)
133 usbhsf_fifo_unselect(pipe, fifo);
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134
135 usbhs_unlock(priv, flags);
136 /******************** spin unlock ******************/
137
138 return pkt;
139}
140
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141enum {
142 USBHSF_PKT_PREPARE,
143 USBHSF_PKT_TRY_RUN,
144 USBHSF_PKT_DMA_DONE,
145};
146
147static int usbhsf_pkt_handler(struct usbhs_pipe *pipe, int type)
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148{
149 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
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150 struct usbhs_pkt *pkt;
151 struct device *dev = usbhs_priv_to_dev(priv);
152 int (*func)(struct usbhs_pkt *pkt, int *is_done);
153 unsigned long flags;
154 int ret = 0;
155 int is_done = 0;
156
157 /******************** spin lock ********************/
158 usbhs_lock(priv, flags);
159
160 pkt = __usbhsf_pkt_get(pipe);
161 if (!pkt)
162 goto __usbhs_pkt_handler_end;
163
164 switch (type) {
165 case USBHSF_PKT_PREPARE:
166 func = pkt->handler->prepare;
167 break;
168 case USBHSF_PKT_TRY_RUN:
169 func = pkt->handler->try_run;
170 break;
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171 case USBHSF_PKT_DMA_DONE:
172 func = pkt->handler->dma_done;
173 break;
97664a20 174 default:
984e833c 175 dev_err(dev, "unknown pkt handler\n");
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176 goto __usbhs_pkt_handler_end;
177 }
178
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179 if (likely(func))
180 ret = func(pkt, &is_done);
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181
182 if (is_done)
183 __usbhsf_pkt_del(pkt);
184
185__usbhs_pkt_handler_end:
186 usbhs_unlock(priv, flags);
187 /******************** spin unlock ******************/
188
0432eed0 189 if (is_done) {
b331872b 190 pkt->done(priv, pkt);
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191 usbhs_pkt_start(pipe);
192 }
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193
194 return ret;
195}
196
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197void usbhs_pkt_start(struct usbhs_pipe *pipe)
198{
199 usbhsf_pkt_handler(pipe, USBHSF_PKT_PREPARE);
200}
201
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202/*
203 * irq enable/disable function
204 */
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205#define usbhsf_irq_empty_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_bempsts, e)
206#define usbhsf_irq_ready_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_brdysts, e)
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207#define usbhsf_irq_callback_ctrl(pipe, status, enable) \
208 ({ \
209 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); \
210 struct usbhs_mod *mod = usbhs_mod_get_current(priv); \
211 u16 status = (1 << usbhs_pipe_number(pipe)); \
212 if (!mod) \
213 return; \
214 if (enable) \
3192fcb2 215 mod->status |= status; \
659d4954 216 else \
3192fcb2 217 mod->status &= ~status; \
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218 usbhs_irq_callback_update(priv, mod); \
219 })
220
221static void usbhsf_tx_irq_ctrl(struct usbhs_pipe *pipe, int enable)
222{
223 /*
224 * And DCP pipe can NOT use "ready interrupt" for "send"
225 * it should use "empty" interrupt.
226 * see
227 * "Operation" - "Interrupt Function" - "BRDY Interrupt"
228 *
229 * on the other hand, normal pipe can use "ready interrupt" for "send"
230 * even though it is single/double buffer
231 */
232 if (usbhs_pipe_is_dcp(pipe))
233 usbhsf_irq_empty_ctrl(pipe, enable);
234 else
235 usbhsf_irq_ready_ctrl(pipe, enable);
236}
237
238static void usbhsf_rx_irq_ctrl(struct usbhs_pipe *pipe, int enable)
239{
240 usbhsf_irq_ready_ctrl(pipe, enable);
241}
242
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243/*
244 * FIFO ctrl
245 */
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246static void usbhsf_send_terminator(struct usbhs_pipe *pipe,
247 struct usbhs_fifo *fifo)
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248{
249 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
250
d3af90a5 251 usbhs_bset(priv, fifo->ctr, BVAL, BVAL);
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252}
253
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254static int usbhsf_fifo_barrier(struct usbhs_priv *priv,
255 struct usbhs_fifo *fifo)
e8d548d5 256{
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257 /* The FIFO port is accessible */
258 if (usbhs_read(priv, fifo->ctr) & FRDY)
259 return 0;
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260
261 return -EBUSY;
262}
263
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264static void usbhsf_fifo_clear(struct usbhs_pipe *pipe,
265 struct usbhs_fifo *fifo)
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266{
267 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
6124607a 268 int ret = 0;
e8d548d5 269
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270 if (!usbhs_pipe_is_dcp(pipe)) {
271 /*
272 * This driver checks the pipe condition first to avoid -EBUSY
469e2978
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273 * from usbhsf_fifo_barrier() if the pipe is RX direction and
274 * empty.
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275 */
276 if (usbhs_pipe_is_dir_in(pipe))
277 ret = usbhs_pipe_is_accessible(pipe);
278 if (!ret)
279 ret = usbhsf_fifo_barrier(priv, fifo);
280 }
e8d548d5 281
6124607a
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282 /*
283 * if non-DCP pipe, this driver should set BCLR when
284 * usbhsf_fifo_barrier() returns 0.
285 */
286 if (!ret)
287 usbhs_write(priv, fifo->ctr, BCLR);
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288}
289
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290static int usbhsf_fifo_rcv_len(struct usbhs_priv *priv,
291 struct usbhs_fifo *fifo)
e8d548d5 292{
d3af90a5 293 return usbhs_read(priv, fifo->ctr) & DTLN_MASK;
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294}
295
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296static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe,
297 struct usbhs_fifo *fifo)
298{
299 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
300
301 usbhs_pipe_select_fifo(pipe, NULL);
302 usbhs_write(priv, fifo->sel, 0);
303}
304
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305static int usbhsf_fifo_select(struct usbhs_pipe *pipe,
306 struct usbhs_fifo *fifo,
307 int write)
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308{
309 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
310 struct device *dev = usbhs_priv_to_dev(priv);
311 int timeout = 1024;
312 u16 mask = ((1 << 5) | 0xF); /* mask of ISEL | CURPIPE */
313 u16 base = usbhs_pipe_number(pipe); /* CURPIPE */
314
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315 if (usbhs_pipe_is_busy(pipe) ||
316 usbhsf_fifo_is_busy(fifo))
317 return -EBUSY;
318
92352071 319 if (usbhs_pipe_is_dcp(pipe)) {
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320 base |= (1 == write) << 5; /* ISEL */
321
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322 if (usbhs_mod_is_host(priv))
323 usbhs_dcp_dir_for_host(pipe, write);
324 }
325
e8d548d5 326 /* "base" will be used below */
32a6cfdf 327 usbhs_write(priv, fifo->sel, base | MBW_32);
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328
329 /* check ISEL and CURPIPE value */
330 while (timeout--) {
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331 if (base == (mask & usbhs_read(priv, fifo->sel))) {
332 usbhs_pipe_select_fifo(pipe, fifo);
e8d548d5 333 return 0;
d77e3f4e 334 }
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335 udelay(10);
336 }
337
338 dev_err(dev, "fifo select error\n");
339
340 return -EIO;
341}
342
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343/*
344 * DCP status stage
345 */
346static int usbhs_dcp_dir_switch_to_write(struct usbhs_pkt *pkt, int *is_done)
347{
348 struct usbhs_pipe *pipe = pkt->pipe;
349 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
350 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
351 struct device *dev = usbhs_priv_to_dev(priv);
352 int ret;
353
354 usbhs_pipe_disable(pipe);
355
356 ret = usbhsf_fifo_select(pipe, fifo, 1);
357 if (ret < 0) {
358 dev_err(dev, "%s() faile\n", __func__);
359 return ret;
360 }
361
362 usbhs_pipe_sequence_data1(pipe); /* DATA1 */
363
364 usbhsf_fifo_clear(pipe, fifo);
365 usbhsf_send_terminator(pipe, fifo);
366
367 usbhsf_fifo_unselect(pipe, fifo);
368
369 usbhsf_tx_irq_ctrl(pipe, 1);
370 usbhs_pipe_enable(pipe);
371
372 return ret;
373}
374
375static int usbhs_dcp_dir_switch_to_read(struct usbhs_pkt *pkt, int *is_done)
376{
377 struct usbhs_pipe *pipe = pkt->pipe;
378 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
379 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
380 struct device *dev = usbhs_priv_to_dev(priv);
381 int ret;
382
383 usbhs_pipe_disable(pipe);
384
385 ret = usbhsf_fifo_select(pipe, fifo, 0);
386 if (ret < 0) {
387 dev_err(dev, "%s() fail\n", __func__);
388 return ret;
389 }
390
391 usbhs_pipe_sequence_data1(pipe); /* DATA1 */
392 usbhsf_fifo_clear(pipe, fifo);
393
394 usbhsf_fifo_unselect(pipe, fifo);
395
396 usbhsf_rx_irq_ctrl(pipe, 1);
397 usbhs_pipe_enable(pipe);
398
399 return ret;
400
401}
402
403static int usbhs_dcp_dir_switch_done(struct usbhs_pkt *pkt, int *is_done)
404{
405 struct usbhs_pipe *pipe = pkt->pipe;
406
407 if (pkt->handler == &usbhs_dcp_status_stage_in_handler)
408 usbhsf_tx_irq_ctrl(pipe, 0);
409 else
410 usbhsf_rx_irq_ctrl(pipe, 0);
411
412 pkt->actual = pkt->length;
413 *is_done = 1;
414
415 return 0;
416}
417
fcb42e23 418const struct usbhs_pkt_handle usbhs_dcp_status_stage_in_handler = {
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419 .prepare = usbhs_dcp_dir_switch_to_write,
420 .try_run = usbhs_dcp_dir_switch_done,
421};
422
fcb42e23 423const struct usbhs_pkt_handle usbhs_dcp_status_stage_out_handler = {
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424 .prepare = usbhs_dcp_dir_switch_to_read,
425 .try_run = usbhs_dcp_dir_switch_done,
426};
427
428/*
429 * DCP data stage (push)
430 */
431static int usbhsf_dcp_data_stage_try_push(struct usbhs_pkt *pkt, int *is_done)
432{
433 struct usbhs_pipe *pipe = pkt->pipe;
434
435 usbhs_pipe_sequence_data1(pipe); /* DATA1 */
436
437 /*
438 * change handler to PIO push
439 */
440 pkt->handler = &usbhs_fifo_pio_push_handler;
441
442 return pkt->handler->prepare(pkt, is_done);
443}
444
fcb42e23 445const struct usbhs_pkt_handle usbhs_dcp_data_stage_out_handler = {
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446 .prepare = usbhsf_dcp_data_stage_try_push,
447};
448
449/*
450 * DCP data stage (pop)
451 */
452static int usbhsf_dcp_data_stage_prepare_pop(struct usbhs_pkt *pkt,
453 int *is_done)
454{
455 struct usbhs_pipe *pipe = pkt->pipe;
456 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
457 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv);
458
459 if (usbhs_pipe_is_busy(pipe))
460 return 0;
461
462 /*
463 * prepare pop for DCP should
464 * - change DCP direction,
465 * - clear fifo
466 * - DATA1
467 */
468 usbhs_pipe_disable(pipe);
469
470 usbhs_pipe_sequence_data1(pipe); /* DATA1 */
471
472 usbhsf_fifo_select(pipe, fifo, 0);
473 usbhsf_fifo_clear(pipe, fifo);
474 usbhsf_fifo_unselect(pipe, fifo);
475
476 /*
477 * change handler to PIO pop
478 */
479 pkt->handler = &usbhs_fifo_pio_pop_handler;
480
481 return pkt->handler->prepare(pkt, is_done);
482}
483
fcb42e23 484const struct usbhs_pkt_handle usbhs_dcp_data_stage_in_handler = {
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485 .prepare = usbhsf_dcp_data_stage_prepare_pop,
486};
487
e8d548d5 488/*
233f519d 489 * PIO push handler
e8d548d5 490 */
0cb7e61d 491static int usbhsf_pio_try_push(struct usbhs_pkt *pkt, int *is_done)
e8d548d5 492{
4bd04811 493 struct usbhs_pipe *pipe = pkt->pipe;
e8d548d5 494 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
659d4954 495 struct device *dev = usbhs_priv_to_dev(priv);
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496 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
497 void __iomem *addr = priv->base + fifo->port;
659d4954 498 u8 *buf;
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499 int maxp = usbhs_pipe_get_maxpacket(pipe);
500 int total_len;
4bd04811 501 int i, ret, len;
97664a20 502 int is_short;
e8d548d5 503
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504 usbhs_pipe_data_sequence(pipe, pkt->sequence);
505 pkt->sequence = -1; /* -1 sequence will be ignored */
506
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507 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length);
508
d3af90a5 509 ret = usbhsf_fifo_select(pipe, fifo, 1);
e8d548d5 510 if (ret < 0)
d77e3f4e 511 return 0;
e8d548d5 512
dad67397 513 ret = usbhs_pipe_is_accessible(pipe);
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514 if (ret < 0) {
515 /* inaccessible pipe is not an error */
516 ret = 0;
659d4954 517 goto usbhs_fifo_write_busy;
4ef85e0f 518 }
e8d548d5 519
d3af90a5 520 ret = usbhsf_fifo_barrier(priv, fifo);
e8d548d5 521 if (ret < 0)
659d4954 522 goto usbhs_fifo_write_busy;
e8d548d5 523
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524 buf = pkt->buf + pkt->actual;
525 len = pkt->length - pkt->actual;
526 len = min(len, maxp);
527 total_len = len;
528 is_short = total_len < maxp;
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529
530 /*
531 * FIXME
532 *
533 * 32-bit access only
534 */
659d4954 535 if (len >= 4 && !((unsigned long)buf & 0x03)) {
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536 iowrite32_rep(addr, buf, len / 4);
537 len %= 4;
538 buf += total_len - len;
539 }
540
541 /* the rest operation */
f7560669
CB
542 if (usbhs_get_dparam(priv, cfifo_byte_addr)) {
543 for (i = 0; i < len; i++)
544 iowrite8(buf[i], addr + (i & 0x03));
545 } else {
546 for (i = 0; i < len; i++)
547 iowrite8(buf[i], addr + (0x03 - (i & 0x03)));
548 }
e8d548d5 549
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550 /*
551 * variable update
552 */
553 pkt->actual += total_len;
554
555 if (pkt->actual < pkt->length)
97664a20 556 *is_done = 0; /* there are remainder data */
659d4954 557 else if (is_short)
97664a20 558 *is_done = 1; /* short packet */
659d4954 559 else
97664a20 560 *is_done = !pkt->zero; /* send zero packet ? */
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561
562 /*
563 * pipe/irq handling
564 */
565 if (is_short)
d3af90a5 566 usbhsf_send_terminator(pipe, fifo);
e8d548d5 567
97664a20 568 usbhsf_tx_irq_ctrl(pipe, !*is_done);
8355b2b3 569 usbhs_pipe_running(pipe, !*is_done);
4bd04811
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570 usbhs_pipe_enable(pipe);
571
659d4954
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572 dev_dbg(dev, " send %d (%d/ %d/ %d/ %d)\n",
573 usbhs_pipe_number(pipe),
97664a20 574 pkt->length, pkt->actual, *is_done, pkt->zero);
659d4954 575
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576 usbhsf_fifo_unselect(pipe, fifo);
577
4bd04811 578 return 0;
659d4954
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579
580usbhs_fifo_write_busy:
d77e3f4e
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581 usbhsf_fifo_unselect(pipe, fifo);
582
659d4954
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583 /*
584 * pipe is busy.
585 * retry in interrupt
586 */
587 usbhsf_tx_irq_ctrl(pipe, 1);
8355b2b3 588 usbhs_pipe_running(pipe, 1);
659d4954
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589
590 return ret;
e8d548d5
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591}
592
8355b2b3
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593static int usbhsf_pio_prepare_push(struct usbhs_pkt *pkt, int *is_done)
594{
595 if (usbhs_pipe_is_running(pkt->pipe))
596 return 0;
597
598 return usbhsf_pio_try_push(pkt, is_done);
599}
600
fcb42e23 601const struct usbhs_pkt_handle usbhs_fifo_pio_push_handler = {
8355b2b3 602 .prepare = usbhsf_pio_prepare_push,
0cb7e61d 603 .try_run = usbhsf_pio_try_push,
dad67397
KM
604};
605
233f519d
KM
606/*
607 * PIO pop handler
608 */
97664a20 609static int usbhsf_prepare_pop(struct usbhs_pkt *pkt, int *is_done)
e8d548d5 610{
dad67397 611 struct usbhs_pipe *pipe = pkt->pipe;
e73d42f1
KM
612 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
613 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv);
d77e3f4e
KM
614
615 if (usbhs_pipe_is_busy(pipe))
616 return 0;
e8d548d5 617
8355b2b3
YS
618 if (usbhs_pipe_is_running(pipe))
619 return 0;
620
e8d548d5 621 /*
d77e3f4e 622 * pipe enable to prepare packet receive
e8d548d5 623 */
3edeee38
KM
624 usbhs_pipe_data_sequence(pipe, pkt->sequence);
625 pkt->sequence = -1; /* -1 sequence will be ignored */
e8d548d5 626
e73d42f1
KM
627 if (usbhs_pipe_is_dcp(pipe))
628 usbhsf_fifo_clear(pipe, fifo);
629
1c90ee0b 630 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length);
e8d548d5 631 usbhs_pipe_enable(pipe);
8355b2b3 632 usbhs_pipe_running(pipe, 1);
659d4954 633 usbhsf_rx_irq_ctrl(pipe, 1);
e8d548d5 634
d3af90a5 635 return 0;
e8d548d5
KM
636}
637
0cb7e61d 638static int usbhsf_pio_try_pop(struct usbhs_pkt *pkt, int *is_done)
e8d548d5 639{
4bd04811 640 struct usbhs_pipe *pipe = pkt->pipe;
e8d548d5 641 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
659d4954 642 struct device *dev = usbhs_priv_to_dev(priv);
d3af90a5
KM
643 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
644 void __iomem *addr = priv->base + fifo->port;
659d4954
KM
645 u8 *buf;
646 u32 data = 0;
647 int maxp = usbhs_pipe_get_maxpacket(pipe);
4bd04811 648 int rcv_len, len;
e8d548d5 649 int i, ret;
4bd04811 650 int total_len = 0;
e8d548d5 651
d3af90a5 652 ret = usbhsf_fifo_select(pipe, fifo, 0);
e8d548d5 653 if (ret < 0)
d77e3f4e 654 return 0;
e8d548d5 655
d3af90a5 656 ret = usbhsf_fifo_barrier(priv, fifo);
e8d548d5 657 if (ret < 0)
d77e3f4e 658 goto usbhs_fifo_read_busy;
e8d548d5 659
d3af90a5 660 rcv_len = usbhsf_fifo_rcv_len(priv, fifo);
e8d548d5 661
659d4954
KM
662 buf = pkt->buf + pkt->actual;
663 len = pkt->length - pkt->actual;
664 len = min(len, rcv_len);
665 total_len = len;
666
6ff5d09b
KM
667 /*
668 * update actual length first here to decide disable pipe.
669 * if this pipe keeps BUF status and all data were popped,
670 * then, next interrupt/token will be issued again
671 */
672 pkt->actual += total_len;
673
674 if ((pkt->actual == pkt->length) || /* receive all data */
675 (total_len < maxp)) { /* short packet */
676 *is_done = 1;
677 usbhsf_rx_irq_ctrl(pipe, 0);
8355b2b3 678 usbhs_pipe_running(pipe, 0);
93fb9127
YS
679 /*
680 * If function mode, since this controller is possible to enter
681 * Control Write status stage at this timing, this driver
682 * should not disable the pipe. If such a case happens, this
683 * controller is not able to complete the status stage.
684 */
685 if (!usbhs_mod_is_host(priv) && !usbhs_pipe_is_dcp(pipe))
686 usbhs_pipe_disable(pipe); /* disable pipe first */
6ff5d09b
KM
687 }
688
e8d548d5
KM
689 /*
690 * Buffer clear if Zero-Length packet
691 *
692 * see
693 * "Operation" - "FIFO Buffer Memory" - "FIFO Port Function"
694 */
695 if (0 == rcv_len) {
3edeee38 696 pkt->zero = 1;
d3af90a5 697 usbhsf_fifo_clear(pipe, fifo);
4bd04811 698 goto usbhs_fifo_read_end;
e8d548d5
KM
699 }
700
e8d548d5
KM
701 /*
702 * FIXME
703 *
704 * 32-bit access only
705 */
659d4954 706 if (len >= 4 && !((unsigned long)buf & 0x03)) {
e8d548d5
KM
707 ioread32_rep(addr, buf, len / 4);
708 len %= 4;
659d4954 709 buf += total_len - len;
e8d548d5
KM
710 }
711
712 /* the rest operation */
713 for (i = 0; i < len; i++) {
714 if (!(i & 0x03))
715 data = ioread32(addr);
716
717 buf[i] = (data >> ((i & 0x03) * 8)) & 0xff;
718 }
719
4bd04811 720usbhs_fifo_read_end:
97664a20
KM
721 dev_dbg(dev, " recv %d (%d/ %d/ %d/ %d)\n",
722 usbhs_pipe_number(pipe),
723 pkt->length, pkt->actual, *is_done, pkt->zero);
724
d77e3f4e
KM
725usbhs_fifo_read_busy:
726 usbhsf_fifo_unselect(pipe, fifo);
727
728 return ret;
e8d548d5 729}
dad67397 730
fcb42e23 731const struct usbhs_pkt_handle usbhs_fifo_pio_pop_handler = {
dad67397 732 .prepare = usbhsf_prepare_pop,
0cb7e61d 733 .try_run = usbhsf_pio_try_pop,
dad67397
KM
734};
735
736/*
233f519d 737 * DCP ctrol statge handler
dad67397 738 */
97664a20 739static int usbhsf_ctrl_stage_end(struct usbhs_pkt *pkt, int *is_done)
dad67397 740{
97664a20 741 usbhs_dcp_control_transfer_done(pkt->pipe);
dad67397 742
97664a20 743 *is_done = 1;
dad67397
KM
744
745 return 0;
746}
747
fcb42e23 748const struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler = {
dad67397
KM
749 .prepare = usbhsf_ctrl_stage_end,
750 .try_run = usbhsf_ctrl_stage_end,
751};
752
e73a9891
KM
753/*
754 * DMA fifo functions
755 */
756static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo,
757 struct usbhs_pkt *pkt)
758{
759 if (&usbhs_fifo_dma_push_handler == pkt->handler)
760 return fifo->tx_chan;
761
762 if (&usbhs_fifo_dma_pop_handler == pkt->handler)
763 return fifo->rx_chan;
764
765 return NULL;
766}
767
768static struct usbhs_fifo *usbhsf_get_dma_fifo(struct usbhs_priv *priv,
769 struct usbhs_pkt *pkt)
770{
771 struct usbhs_fifo *fifo;
3a2634a5 772 int i;
e73a9891 773
3a2634a5
YS
774 usbhs_for_each_dfifo(priv, fifo, i) {
775 if (usbhsf_dma_chan_get(fifo, pkt) &&
776 !usbhsf_fifo_is_busy(fifo))
777 return fifo;
778 }
e73a9891
KM
779
780 return NULL;
781}
782
783#define usbhsf_dma_start(p, f) __usbhsf_dma_ctrl(p, f, DREQE)
784#define usbhsf_dma_stop(p, f) __usbhsf_dma_ctrl(p, f, 0)
785static void __usbhsf_dma_ctrl(struct usbhs_pipe *pipe,
786 struct usbhs_fifo *fifo,
787 u16 dreqe)
788{
789 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
790
791 usbhs_bset(priv, fifo->sel, DREQE, dreqe);
792}
793
e73a9891
KM
794static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map)
795{
796 struct usbhs_pipe *pipe = pkt->pipe;
797 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
798 struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv);
c3cdcac7
YS
799 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
800 struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt);
e73a9891 801
c3cdcac7 802 return info->dma_map_ctrl(chan->device->dev, pkt, map);
e73a9891
KM
803}
804
805static void usbhsf_dma_complete(void *arg);
b2357839 806static void usbhsf_dma_xfer_preparing(struct usbhs_pkt *pkt)
e73a9891 807{
e73a9891 808 struct usbhs_pipe *pipe = pkt->pipe;
4fdef698 809 struct usbhs_fifo *fifo;
e73a9891 810 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
e73a9891 811 struct dma_async_tx_descriptor *desc;
4fdef698 812 struct dma_chan *chan;
e73a9891 813 struct device *dev = usbhs_priv_to_dev(priv);
55ba4e5e 814 enum dma_transfer_direction dir;
4fdef698 815
4fdef698
YS
816 fifo = usbhs_pipe_to_fifo(pipe);
817 if (!fifo)
b2357839 818 return;
e73a9891 819
4fdef698 820 chan = usbhsf_dma_chan_get(fifo, pkt);
55ba4e5e 821 dir = usbhs_pipe_is_dir_in(pipe) ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV;
e73a9891 822
2f0de9d8
KM
823 desc = dmaengine_prep_slave_single(chan, pkt->dma + pkt->actual,
824 pkt->trans, dir,
16052827 825 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
e73a9891 826 if (!desc)
b2357839 827 return;
e73a9891
KM
828
829 desc->callback = usbhsf_dma_complete;
830 desc->callback_param = pipe;
831
ab330cf3
YS
832 pkt->cookie = dmaengine_submit(desc);
833 if (pkt->cookie < 0) {
e73a9891 834 dev_err(dev, "Failed to submit dma descriptor\n");
b2357839 835 return;
e73a9891
KM
836 }
837
838 dev_dbg(dev, " %s %d (%d/ %d)\n",
839 fifo->name, usbhs_pipe_number(pipe), pkt->length, pkt->zero);
840
8355b2b3 841 usbhs_pipe_running(pipe, 1);
9b53d9af 842 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->trans);
e73a9891 843 dma_async_issue_pending(chan);
29c7f3e6 844 usbhsf_dma_start(pipe, fifo);
9b53d9af 845 usbhs_pipe_enable(pipe);
b2357839
YS
846}
847
848static void xfer_work(struct work_struct *work)
849{
850 struct usbhs_pkt *pkt = container_of(work, struct usbhs_pkt, work);
851 struct usbhs_pipe *pipe = pkt->pipe;
852 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
853 unsigned long flags;
4fdef698 854
b2357839
YS
855 usbhs_lock(priv, flags);
856 usbhsf_dma_xfer_preparing(pkt);
4fdef698 857 usbhs_unlock(priv, flags);
e73a9891
KM
858}
859
233f519d
KM
860/*
861 * DMA push handler
862 */
e73a9891
KM
863static int usbhsf_dma_prepare_push(struct usbhs_pkt *pkt, int *is_done)
864{
865 struct usbhs_pipe *pipe = pkt->pipe;
866 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
867 struct usbhs_fifo *fifo;
868 int len = pkt->length - pkt->actual;
869 int ret;
ab330cf3 870 uintptr_t align_mask;
e73a9891
KM
871
872 if (usbhs_pipe_is_busy(pipe))
873 return 0;
874
875 /* use PIO if packet is less than pio_dma_border or pipe is DCP */
876 if ((len < usbhs_get_dparam(priv, pio_dma_border)) ||
700aa7ff 877 usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC))
e73a9891
KM
878 goto usbhsf_pio_prepare_push;
879
ab330cf3
YS
880 /* check data length if this driver don't use USB-DMAC */
881 if (!usbhs_get_dparam(priv, has_usb_dmac) && len & 0x7)
e73a9891
KM
882 goto usbhsf_pio_prepare_push;
883
ab330cf3
YS
884 /* check buffer alignment */
885 align_mask = usbhs_get_dparam(priv, has_usb_dmac) ?
886 USBHS_USB_DMAC_XFER_SIZE - 1 : 0x7;
887 if ((uintptr_t)(pkt->buf + pkt->actual) & align_mask)
9a12d097
KM
888 goto usbhsf_pio_prepare_push;
889
8355b2b3
YS
890 /* return at this time if the pipe is running */
891 if (usbhs_pipe_is_running(pipe))
892 return 0;
893
e73a9891
KM
894 /* get enable DMA fifo */
895 fifo = usbhsf_get_dma_fifo(priv, pkt);
896 if (!fifo)
897 goto usbhsf_pio_prepare_push;
898
e73a9891
KM
899 ret = usbhsf_fifo_select(pipe, fifo, 0);
900 if (ret < 0)
e789ece1
YS
901 goto usbhsf_pio_prepare_push;
902
903 if (usbhsf_dma_map(pkt) < 0)
904 goto usbhsf_pio_prepare_push_unselect;
e73a9891
KM
905
906 pkt->trans = len;
907
6490865c 908 usbhsf_tx_irq_ctrl(pipe, 0);
b2357839
YS
909 /* FIXME: Workaound for usb dmac that driver can be used in atomic */
910 if (usbhs_get_dparam(priv, has_usb_dmac)) {
911 usbhsf_dma_xfer_preparing(pkt);
912 } else {
913 INIT_WORK(&pkt->work, xfer_work);
914 schedule_work(&pkt->work);
915 }
e73a9891
KM
916
917 return 0;
918
e789ece1
YS
919usbhsf_pio_prepare_push_unselect:
920 usbhsf_fifo_unselect(pipe, fifo);
e73a9891
KM
921usbhsf_pio_prepare_push:
922 /*
923 * change handler to PIO
924 */
925 pkt->handler = &usbhs_fifo_pio_push_handler;
926
927 return pkt->handler->prepare(pkt, is_done);
928}
929
930static int usbhsf_dma_push_done(struct usbhs_pkt *pkt, int *is_done)
931{
932 struct usbhs_pipe *pipe = pkt->pipe;
c0ed8b23 933 int is_short = pkt->trans % usbhs_pipe_get_maxpacket(pipe);
e73a9891 934
c0ed8b23
YS
935 pkt->actual += pkt->trans;
936
937 if (pkt->actual < pkt->length)
938 *is_done = 0; /* there are remainder data */
939 else if (is_short)
940 *is_done = 1; /* short packet */
941 else
942 *is_done = !pkt->zero; /* send zero packet? */
e73a9891 943
8355b2b3 944 usbhs_pipe_running(pipe, !*is_done);
e73a9891
KM
945
946 usbhsf_dma_stop(pipe, pipe->fifo);
947 usbhsf_dma_unmap(pkt);
948 usbhsf_fifo_unselect(pipe, pipe->fifo);
949
c0ed8b23
YS
950 if (!*is_done) {
951 /* change handler to PIO */
952 pkt->handler = &usbhs_fifo_pio_push_handler;
953 return pkt->handler->try_run(pkt, is_done);
954 }
955
e73a9891
KM
956 return 0;
957}
958
fcb42e23 959const struct usbhs_pkt_handle usbhs_fifo_dma_push_handler = {
e73a9891
KM
960 .prepare = usbhsf_dma_prepare_push,
961 .dma_done = usbhsf_dma_push_done,
962};
963
233f519d
KM
964/*
965 * DMA pop handler
966 */
ab330cf3
YS
967
968static int usbhsf_dma_prepare_pop_with_rx_irq(struct usbhs_pkt *pkt,
969 int *is_done)
970{
971 return usbhsf_prepare_pop(pkt, is_done);
972}
973
974static int usbhsf_dma_prepare_pop_with_usb_dmac(struct usbhs_pkt *pkt,
975 int *is_done)
976{
977 struct usbhs_pipe *pipe = pkt->pipe;
978 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
979 struct usbhs_fifo *fifo;
980 int ret;
981
982 if (usbhs_pipe_is_busy(pipe))
983 return 0;
984
985 /* use PIO if packet is less than pio_dma_border or pipe is DCP */
986 if ((pkt->length < usbhs_get_dparam(priv, pio_dma_border)) ||
700aa7ff 987 usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC))
ab330cf3
YS
988 goto usbhsf_pio_prepare_pop;
989
990 fifo = usbhsf_get_dma_fifo(priv, pkt);
991 if (!fifo)
992 goto usbhsf_pio_prepare_pop;
993
994 if ((uintptr_t)pkt->buf & (USBHS_USB_DMAC_XFER_SIZE - 1))
995 goto usbhsf_pio_prepare_pop;
996
d6efa938
YS
997 /* return at this time if the pipe is running */
998 if (usbhs_pipe_is_running(pipe))
999 return 0;
1000
ab330cf3
YS
1001 usbhs_pipe_config_change_bfre(pipe, 1);
1002
1003 ret = usbhsf_fifo_select(pipe, fifo, 0);
1004 if (ret < 0)
1005 goto usbhsf_pio_prepare_pop;
1006
1007 if (usbhsf_dma_map(pkt) < 0)
1008 goto usbhsf_pio_prepare_pop_unselect;
1009
1010 /* DMA */
1011
1012 /*
1013 * usbhs_fifo_dma_pop_handler :: prepare
1014 * enabled irq to come here.
1015 * but it is no longer needed for DMA. disable it.
1016 */
1017 usbhsf_rx_irq_ctrl(pipe, 0);
1018
1019 pkt->trans = pkt->length;
1020
b2357839 1021 usbhsf_dma_xfer_preparing(pkt);
ab330cf3
YS
1022
1023 return 0;
1024
1025usbhsf_pio_prepare_pop_unselect:
1026 usbhsf_fifo_unselect(pipe, fifo);
1027usbhsf_pio_prepare_pop:
1028
1029 /*
1030 * change handler to PIO
1031 */
1032 pkt->handler = &usbhs_fifo_pio_pop_handler;
1033 usbhs_pipe_config_change_bfre(pipe, 0);
1034
1035 return pkt->handler->prepare(pkt, is_done);
1036}
1037
1038static int usbhsf_dma_prepare_pop(struct usbhs_pkt *pkt, int *is_done)
1039{
1040 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
1041
1042 if (usbhs_get_dparam(priv, has_usb_dmac))
1043 return usbhsf_dma_prepare_pop_with_usb_dmac(pkt, is_done);
1044 else
1045 return usbhsf_dma_prepare_pop_with_rx_irq(pkt, is_done);
1046}
1047
1048static int usbhsf_dma_try_pop_with_rx_irq(struct usbhs_pkt *pkt, int *is_done)
e73a9891
KM
1049{
1050 struct usbhs_pipe *pipe = pkt->pipe;
1051 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
1052 struct usbhs_fifo *fifo;
1053 int len, ret;
1054
1055 if (usbhs_pipe_is_busy(pipe))
1056 return 0;
1057
1058 if (usbhs_pipe_is_dcp(pipe))
1059 goto usbhsf_pio_prepare_pop;
1060
1061 /* get enable DMA fifo */
1062 fifo = usbhsf_get_dma_fifo(priv, pkt);
1063 if (!fifo)
1064 goto usbhsf_pio_prepare_pop;
1065
c9ae0c91 1066 if ((uintptr_t)(pkt->buf + pkt->actual) & 0x7) /* 8byte alignment */
9a12d097
KM
1067 goto usbhsf_pio_prepare_pop;
1068
e73a9891
KM
1069 ret = usbhsf_fifo_select(pipe, fifo, 0);
1070 if (ret < 0)
1071 goto usbhsf_pio_prepare_pop;
1072
1073 /* use PIO if packet is less than pio_dma_border */
1074 len = usbhsf_fifo_rcv_len(priv, fifo);
1075 len = min(pkt->length - pkt->actual, len);
77975eec 1076 if (len & 0x7) /* 8byte alignment */
e73a9891
KM
1077 goto usbhsf_pio_prepare_pop_unselect;
1078
1079 if (len < usbhs_get_dparam(priv, pio_dma_border))
1080 goto usbhsf_pio_prepare_pop_unselect;
1081
1082 ret = usbhsf_fifo_barrier(priv, fifo);
1083 if (ret < 0)
1084 goto usbhsf_pio_prepare_pop_unselect;
1085
1086 if (usbhsf_dma_map(pkt) < 0)
1087 goto usbhsf_pio_prepare_pop_unselect;
1088
1089 /* DMA */
1090
1091 /*
1092 * usbhs_fifo_dma_pop_handler :: prepare
1093 * enabled irq to come here.
1094 * but it is no longer needed for DMA. disable it.
1095 */
1096 usbhsf_rx_irq_ctrl(pipe, 0);
1097
1098 pkt->trans = len;
1099
6e4b74e4
GL
1100 INIT_WORK(&pkt->work, xfer_work);
1101 schedule_work(&pkt->work);
e73a9891
KM
1102
1103 return 0;
1104
1105usbhsf_pio_prepare_pop_unselect:
1106 usbhsf_fifo_unselect(pipe, fifo);
1107usbhsf_pio_prepare_pop:
1108
1109 /*
1110 * change handler to PIO
1111 */
1112 pkt->handler = &usbhs_fifo_pio_pop_handler;
1113
1114 return pkt->handler->try_run(pkt, is_done);
1115}
1116
ab330cf3
YS
1117static int usbhsf_dma_try_pop(struct usbhs_pkt *pkt, int *is_done)
1118{
1119 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
1120
1121 BUG_ON(usbhs_get_dparam(priv, has_usb_dmac));
1122
1123 return usbhsf_dma_try_pop_with_rx_irq(pkt, is_done);
1124}
1125
1126static int usbhsf_dma_pop_done_with_rx_irq(struct usbhs_pkt *pkt, int *is_done)
e73a9891
KM
1127{
1128 struct usbhs_pipe *pipe = pkt->pipe;
1129 int maxp = usbhs_pipe_get_maxpacket(pipe);
1130
1131 usbhsf_dma_stop(pipe, pipe->fifo);
1132 usbhsf_dma_unmap(pkt);
1133 usbhsf_fifo_unselect(pipe, pipe->fifo);
1134
1135 pkt->actual += pkt->trans;
1136
1137 if ((pkt->actual == pkt->length) || /* receive all data */
1138 (pkt->trans < maxp)) { /* short packet */
1139 *is_done = 1;
8355b2b3 1140 usbhs_pipe_running(pipe, 0);
e73a9891
KM
1141 } else {
1142 /* re-enable */
8355b2b3 1143 usbhs_pipe_running(pipe, 0);
e73a9891
KM
1144 usbhsf_prepare_pop(pkt, is_done);
1145 }
1146
1147 return 0;
1148}
1149
ab330cf3
YS
1150static size_t usbhs_dma_calc_received_size(struct usbhs_pkt *pkt,
1151 struct dma_chan *chan, int dtln)
1152{
1153 struct usbhs_pipe *pipe = pkt->pipe;
1154 struct dma_tx_state state;
1155 size_t received_size;
1156 int maxp = usbhs_pipe_get_maxpacket(pipe);
1157
1158 dmaengine_tx_status(chan, pkt->cookie, &state);
1159 received_size = pkt->length - state.residue;
1160
1161 if (dtln) {
1162 received_size -= USBHS_USB_DMAC_XFER_SIZE;
1163 received_size &= ~(maxp - 1);
1164 received_size += dtln;
1165 }
1166
1167 return received_size;
1168}
1169
1170static int usbhsf_dma_pop_done_with_usb_dmac(struct usbhs_pkt *pkt,
1171 int *is_done)
1172{
1173 struct usbhs_pipe *pipe = pkt->pipe;
1174 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
1175 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
1176 struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt);
1177 int rcv_len;
1178
1179 /*
1180 * Since the driver disables rx_irq in DMA mode, the interrupt handler
1181 * cannot the BRDYSTS. So, the function clears it here because the
1182 * driver may use PIO mode next time.
1183 */
1184 usbhs_xxxsts_clear(priv, BRDYSTS, usbhs_pipe_number(pipe));
1185
1186 rcv_len = usbhsf_fifo_rcv_len(priv, fifo);
1187 usbhsf_fifo_clear(pipe, fifo);
1188 pkt->actual = usbhs_dma_calc_received_size(pkt, chan, rcv_len);
1189
d6efa938 1190 usbhs_pipe_running(pipe, 0);
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1191 usbhsf_dma_stop(pipe, fifo);
1192 usbhsf_dma_unmap(pkt);
1193 usbhsf_fifo_unselect(pipe, pipe->fifo);
1194
1195 /* The driver can assume the rx transaction is always "done" */
1196 *is_done = 1;
1197
1198 return 0;
1199}
1200
1201static int usbhsf_dma_pop_done(struct usbhs_pkt *pkt, int *is_done)
1202{
1203 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
1204
1205 if (usbhs_get_dparam(priv, has_usb_dmac))
1206 return usbhsf_dma_pop_done_with_usb_dmac(pkt, is_done);
1207 else
1208 return usbhsf_dma_pop_done_with_rx_irq(pkt, is_done);
1209}
1210
fcb42e23 1211const struct usbhs_pkt_handle usbhs_fifo_dma_pop_handler = {
ab330cf3 1212 .prepare = usbhsf_dma_prepare_pop,
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1213 .try_run = usbhsf_dma_try_pop,
1214 .dma_done = usbhsf_dma_pop_done
1215};
1216
1217/*
1218 * DMA setting
1219 */
1220static bool usbhsf_dma_filter(struct dma_chan *chan, void *param)
1221{
1222 struct sh_dmae_slave *slave = param;
1223
1224 /*
1225 * FIXME
1226 *
1227 * usbhs doesn't recognize id = 0 as valid DMA
1228 */
f19b7e0d 1229 if (0 == slave->shdma_slave.slave_id)
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1230 return false;
1231
1232 chan->private = slave;
1233
1234 return true;
1235}
1236
1237static void usbhsf_dma_quit(struct usbhs_priv *priv, struct usbhs_fifo *fifo)
1238{
1239 if (fifo->tx_chan)
1240 dma_release_channel(fifo->tx_chan);
1241 if (fifo->rx_chan)
1242 dma_release_channel(fifo->rx_chan);
1243
1244 fifo->tx_chan = NULL;
1245 fifo->rx_chan = NULL;
1246}
1247
6e3f53ab 1248static void usbhsf_dma_init_pdev(struct usbhs_fifo *fifo)
e73a9891 1249{
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1250 dma_cap_mask_t mask;
1251
1252 dma_cap_zero(mask);
1253 dma_cap_set(DMA_SLAVE, mask);
1254 fifo->tx_chan = dma_request_channel(mask, usbhsf_dma_filter,
1255 &fifo->tx_slave);
1256
1257 dma_cap_zero(mask);
1258 dma_cap_set(DMA_SLAVE, mask);
1259 fifo->rx_chan = dma_request_channel(mask, usbhsf_dma_filter,
1260 &fifo->rx_slave);
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1261}
1262
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1263static void usbhsf_dma_init_dt(struct device *dev, struct usbhs_fifo *fifo,
1264 int channel)
abd2dbf6 1265{
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1266 char name[16];
1267
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1268 /*
1269 * To avoid complex handing for DnFIFOs, the driver uses each
1270 * DnFIFO as TX or RX direction (not bi-direction).
1271 * So, the driver uses odd channels for TX, even channels for RX.
1272 */
1273 snprintf(name, sizeof(name), "ch%d", channel);
1274 if (channel & 1) {
1275 fifo->tx_chan = dma_request_slave_channel_reason(dev, name);
1276 if (IS_ERR(fifo->tx_chan))
1277 fifo->tx_chan = NULL;
1278 } else {
1279 fifo->rx_chan = dma_request_slave_channel_reason(dev, name);
1280 if (IS_ERR(fifo->rx_chan))
1281 fifo->rx_chan = NULL;
1282 }
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1283}
1284
7a96b784
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1285static void usbhsf_dma_init(struct usbhs_priv *priv, struct usbhs_fifo *fifo,
1286 int channel)
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1287{
1288 struct device *dev = usbhs_priv_to_dev(priv);
1289
abd2dbf6 1290 if (dev->of_node)
7a96b784 1291 usbhsf_dma_init_dt(dev, fifo, channel);
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1292 else
1293 usbhsf_dma_init_pdev(fifo);
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1294
1295 if (fifo->tx_chan || fifo->rx_chan)
4ce68805 1296 dev_dbg(dev, "enable DMAEngine (%s%s%s)\n",
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1297 fifo->name,
1298 fifo->tx_chan ? "[TX]" : " ",
1299 fifo->rx_chan ? "[RX]" : " ");
1300}
1301
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1302/*
1303 * irq functions
1304 */
1305static int usbhsf_irq_empty(struct usbhs_priv *priv,
1306 struct usbhs_irq_state *irq_state)
1307{
1308 struct usbhs_pipe *pipe;
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1309 struct device *dev = usbhs_priv_to_dev(priv);
1310 int i, ret;
1311
1312 if (!irq_state->bempsts) {
1313 dev_err(dev, "debug %s !!\n", __func__);
1314 return -EIO;
1315 }
1316
1317 dev_dbg(dev, "irq empty [0x%04x]\n", irq_state->bempsts);
1318
1319 /*
1320 * search interrupted "pipe"
1321 * not "uep".
1322 */
1323 usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
1324 if (!(irq_state->bempsts & (1 << i)))
1325 continue;
1326
51b8a021 1327 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN);
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1328 if (ret < 0)
1329 dev_err(dev, "irq_empty run_error %d : %d\n", i, ret);
1330 }
1331
1332 return 0;
1333}
1334
1335static int usbhsf_irq_ready(struct usbhs_priv *priv,
1336 struct usbhs_irq_state *irq_state)
1337{
1338 struct usbhs_pipe *pipe;
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1339 struct device *dev = usbhs_priv_to_dev(priv);
1340 int i, ret;
1341
1342 if (!irq_state->brdysts) {
1343 dev_err(dev, "debug %s !!\n", __func__);
1344 return -EIO;
1345 }
1346
1347 dev_dbg(dev, "irq ready [0x%04x]\n", irq_state->brdysts);
1348
1349 /*
1350 * search interrupted "pipe"
1351 * not "uep".
1352 */
1353 usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
1354 if (!(irq_state->brdysts & (1 << i)))
1355 continue;
1356
51b8a021 1357 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN);
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1358 if (ret < 0)
1359 dev_err(dev, "irq_ready run_error %d : %d\n", i, ret);
1360 }
1361
1362 return 0;
1363}
1364
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1365static void usbhsf_dma_complete(void *arg)
1366{
1367 struct usbhs_pipe *pipe = arg;
1368 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
1369 struct device *dev = usbhs_priv_to_dev(priv);
1370 int ret;
1371
51b8a021 1372 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_DMA_DONE);
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1373 if (ret < 0)
1374 dev_err(dev, "dma_complete run_error %d : %d\n",
1375 usbhs_pipe_number(pipe), ret);
1376}
1377
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1378void usbhs_fifo_clear_dcp(struct usbhs_pipe *pipe)
1379{
1380 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
1381 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
1382
1383 /* clear DCP FIFO of transmission */
1384 if (usbhsf_fifo_select(pipe, fifo, 1) < 0)
1385 return;
1386 usbhsf_fifo_clear(pipe, fifo);
1387 usbhsf_fifo_unselect(pipe, fifo);
1388
1389 /* clear DCP FIFO of reception */
1390 if (usbhsf_fifo_select(pipe, fifo, 0) < 0)
1391 return;
1392 usbhsf_fifo_clear(pipe, fifo);
1393 usbhsf_fifo_unselect(pipe, fifo);
1394}
1395
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1396/*
1397 * fifo init
1398 */
1399void usbhs_fifo_init(struct usbhs_priv *priv)
1400{
1401 struct usbhs_mod *mod = usbhs_mod_get_current(priv);
d77e3f4e 1402 struct usbhs_fifo *cfifo = usbhsf_get_cfifo(priv);
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1403 struct usbhs_fifo *dfifo;
1404 int i;
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1405
1406 mod->irq_empty = usbhsf_irq_empty;
1407 mod->irq_ready = usbhsf_irq_ready;
1408 mod->irq_bempsts = 0;
1409 mod->irq_brdysts = 0;
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1410
1411 cfifo->pipe = NULL;
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1412 usbhs_for_each_dfifo(priv, dfifo, i)
1413 dfifo->pipe = NULL;
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1414}
1415
1416void usbhs_fifo_quit(struct usbhs_priv *priv)
1417{
1418 struct usbhs_mod *mod = usbhs_mod_get_current(priv);
1419
1420 mod->irq_empty = NULL;
1421 mod->irq_ready = NULL;
1422 mod->irq_bempsts = 0;
1423 mod->irq_brdysts = 0;
1424}
d3af90a5 1425
53e734b1 1426#define __USBHS_DFIFO_INIT(priv, fifo, channel, fifo_port) \
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1427do { \
1428 fifo = usbhsf_get_dnfifo(priv, channel); \
1429 fifo->name = "D"#channel"FIFO"; \
53e734b1 1430 fifo->port = fifo_port; \
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1431 fifo->sel = D##channel##FIFOSEL; \
1432 fifo->ctr = D##channel##FIFOCTR; \
1433 fifo->tx_slave.shdma_slave.slave_id = \
1434 usbhs_get_dparam(priv, d##channel##_tx_id); \
1435 fifo->rx_slave.shdma_slave.slave_id = \
1436 usbhs_get_dparam(priv, d##channel##_rx_id); \
7a96b784 1437 usbhsf_dma_init(priv, fifo, channel); \
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1438} while (0)
1439
53e734b1
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1440#define USBHS_DFIFO_INIT(priv, fifo, channel) \
1441 __USBHS_DFIFO_INIT(priv, fifo, channel, D##channel##FIFO)
1442#define USBHS_DFIFO_INIT_NO_PORT(priv, fifo, channel) \
1443 __USBHS_DFIFO_INIT(priv, fifo, channel, 0)
1444
d3af90a5
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1445int usbhs_fifo_probe(struct usbhs_priv *priv)
1446{
1447 struct usbhs_fifo *fifo;
1448
1449 /* CFIFO */
1450 fifo = usbhsf_get_cfifo(priv);
e73a9891 1451 fifo->name = "CFIFO";
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1452 fifo->port = CFIFO;
1453 fifo->sel = CFIFOSEL;
1454 fifo->ctr = CFIFOCTR;
1455
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1456 /* DFIFO */
1457 USBHS_DFIFO_INIT(priv, fifo, 0);
1458 USBHS_DFIFO_INIT(priv, fifo, 1);
d3cf6a4b
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1459 USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 2);
1460 USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 3);
e73a9891 1461
d3af90a5
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1462 return 0;
1463}
1464
1465void usbhs_fifo_remove(struct usbhs_priv *priv)
1466{
3a2634a5
YS
1467 struct usbhs_fifo *fifo;
1468 int i;
1469
1470 usbhs_for_each_dfifo(priv, fifo, i)
1471 usbhsf_dma_quit(priv, fifo);
d3af90a5 1472}