Commit | Line | Data |
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e8d548d5 KM |
1 | /* |
2 | * Renesas USB driver | |
3 | * | |
4 | * Copyright (C) 2011 Renesas Solutions Corp. | |
5 | * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | |
6 | * | |
7 | * This program is distributed in the hope that it will be useful, | |
8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
10 | * GNU General Public License for more details. | |
11 | * | |
12 | * You should have received a copy of the GNU General Public License | |
13 | * along with this program; if not, write to the Free Software | |
14 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
15 | * | |
16 | */ | |
17 | #include <linux/delay.h> | |
18 | #include <linux/io.h> | |
9c646cfc | 19 | #include <linux/scatterlist.h> |
cc502bb7 PB |
20 | #include "common.h" |
21 | #include "pipe.h" | |
e8d548d5 | 22 | |
d3af90a5 | 23 | #define usbhsf_get_cfifo(p) (&((p)->fifo_info.cfifo)) |
5ea43994 | 24 | #define usbhsf_is_cfifo(p, f) (usbhsf_get_cfifo(p) == f) |
d3af90a5 | 25 | |
d77e3f4e KM |
26 | #define usbhsf_fifo_is_busy(f) ((f)->pipe) /* see usbhs_pipe_select_fifo */ |
27 | ||
4bd04811 | 28 | /* |
233f519d KM |
29 | * packet initialize |
30 | */ | |
31 | void usbhs_pkt_init(struct usbhs_pkt *pkt) | |
32 | { | |
233f519d KM |
33 | INIT_LIST_HEAD(&pkt->node); |
34 | } | |
35 | ||
36 | /* | |
37 | * packet control function | |
4bd04811 | 38 | */ |
97664a20 | 39 | static int usbhsf_null_handle(struct usbhs_pkt *pkt, int *is_done) |
dad67397 KM |
40 | { |
41 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe); | |
42 | struct device *dev = usbhs_priv_to_dev(priv); | |
43 | ||
44 | dev_err(dev, "null handler\n"); | |
45 | ||
46 | return -EINVAL; | |
47 | } | |
48 | ||
49 | static struct usbhs_pkt_handle usbhsf_null_handler = { | |
50 | .prepare = usbhsf_null_handle, | |
51 | .try_run = usbhsf_null_handle, | |
52 | }; | |
53 | ||
659d4954 | 54 | void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt, |
b331872b KM |
55 | void (*done)(struct usbhs_priv *priv, |
56 | struct usbhs_pkt *pkt), | |
3edeee38 | 57 | void *buf, int len, int zero, int sequence) |
6acb95d4 | 58 | { |
dad67397 KM |
59 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); |
60 | struct device *dev = usbhs_priv_to_dev(priv); | |
97664a20 KM |
61 | unsigned long flags; |
62 | ||
b331872b KM |
63 | if (!done) { |
64 | dev_err(dev, "no done function\n"); | |
65 | return; | |
66 | } | |
67 | ||
a2c76b83 KM |
68 | /******************** spin lock ********************/ |
69 | usbhs_lock(priv, flags); | |
70 | ||
0c6ef985 | 71 | if (!pipe->handler) { |
dad67397 | 72 | dev_err(dev, "no handler function\n"); |
0c6ef985 | 73 | pipe->handler = &usbhsf_null_handler; |
dad67397 KM |
74 | } |
75 | ||
d5261286 | 76 | list_move_tail(&pkt->node, &pipe->list); |
6acb95d4 | 77 | |
0c6ef985 KM |
78 | /* |
79 | * each pkt must hold own handler. | |
80 | * because handler might be changed by its situation. | |
81 | * dma handler -> pio handler. | |
82 | */ | |
659d4954 KM |
83 | pkt->pipe = pipe; |
84 | pkt->buf = buf; | |
0c6ef985 | 85 | pkt->handler = pipe->handler; |
659d4954 KM |
86 | pkt->length = len; |
87 | pkt->zero = zero; | |
88 | pkt->actual = 0; | |
b331872b | 89 | pkt->done = done; |
3edeee38 | 90 | pkt->sequence = sequence; |
97664a20 KM |
91 | |
92 | usbhs_unlock(priv, flags); | |
93 | /******************** spin unlock ******************/ | |
6acb95d4 KM |
94 | } |
95 | ||
97664a20 | 96 | static void __usbhsf_pkt_del(struct usbhs_pkt *pkt) |
6acb95d4 KM |
97 | { |
98 | list_del_init(&pkt->node); | |
99 | } | |
100 | ||
97664a20 | 101 | static struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe) |
6acb95d4 KM |
102 | { |
103 | if (list_empty(&pipe->list)) | |
104 | return NULL; | |
105 | ||
d5261286 | 106 | return list_first_entry(&pipe->list, struct usbhs_pkt, node); |
6acb95d4 KM |
107 | } |
108 | ||
2743e7f9 YS |
109 | static void usbhsf_fifo_clear(struct usbhs_pipe *pipe, |
110 | struct usbhs_fifo *fifo); | |
111 | static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe, | |
112 | struct usbhs_fifo *fifo); | |
113 | static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo, | |
114 | struct usbhs_pkt *pkt); | |
115 | #define usbhsf_dma_map(p) __usbhsf_dma_map_ctrl(p, 1) | |
116 | #define usbhsf_dma_unmap(p) __usbhsf_dma_map_ctrl(p, 0) | |
117 | static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map); | |
97664a20 KM |
118 | struct usbhs_pkt *usbhs_pkt_pop(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt) |
119 | { | |
120 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); | |
2743e7f9 | 121 | struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe); |
97664a20 KM |
122 | unsigned long flags; |
123 | ||
124 | /******************** spin lock ********************/ | |
125 | usbhs_lock(priv, flags); | |
126 | ||
2743e7f9 YS |
127 | usbhs_pipe_disable(pipe); |
128 | ||
97664a20 KM |
129 | if (!pkt) |
130 | pkt = __usbhsf_pkt_get(pipe); | |
131 | ||
2743e7f9 YS |
132 | if (pkt) { |
133 | struct dma_chan *chan = NULL; | |
134 | ||
135 | if (fifo) | |
136 | chan = usbhsf_dma_chan_get(fifo, pkt); | |
137 | if (chan) { | |
138 | dmaengine_terminate_all(chan); | |
139 | usbhsf_fifo_clear(pipe, fifo); | |
140 | usbhsf_dma_unmap(pkt); | |
141 | } | |
142 | ||
97664a20 | 143 | __usbhsf_pkt_del(pkt); |
2743e7f9 YS |
144 | } |
145 | ||
146 | if (fifo) | |
147 | usbhsf_fifo_unselect(pipe, fifo); | |
97664a20 KM |
148 | |
149 | usbhs_unlock(priv, flags); | |
150 | /******************** spin unlock ******************/ | |
151 | ||
152 | return pkt; | |
153 | } | |
154 | ||
51b8a021 KM |
155 | enum { |
156 | USBHSF_PKT_PREPARE, | |
157 | USBHSF_PKT_TRY_RUN, | |
158 | USBHSF_PKT_DMA_DONE, | |
159 | }; | |
160 | ||
161 | static int usbhsf_pkt_handler(struct usbhs_pipe *pipe, int type) | |
97664a20 KM |
162 | { |
163 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); | |
97664a20 KM |
164 | struct usbhs_pkt *pkt; |
165 | struct device *dev = usbhs_priv_to_dev(priv); | |
166 | int (*func)(struct usbhs_pkt *pkt, int *is_done); | |
167 | unsigned long flags; | |
168 | int ret = 0; | |
169 | int is_done = 0; | |
170 | ||
171 | /******************** spin lock ********************/ | |
172 | usbhs_lock(priv, flags); | |
173 | ||
174 | pkt = __usbhsf_pkt_get(pipe); | |
175 | if (!pkt) | |
176 | goto __usbhs_pkt_handler_end; | |
177 | ||
178 | switch (type) { | |
179 | case USBHSF_PKT_PREPARE: | |
180 | func = pkt->handler->prepare; | |
181 | break; | |
182 | case USBHSF_PKT_TRY_RUN: | |
183 | func = pkt->handler->try_run; | |
184 | break; | |
e73a9891 KM |
185 | case USBHSF_PKT_DMA_DONE: |
186 | func = pkt->handler->dma_done; | |
187 | break; | |
97664a20 | 188 | default: |
984e833c | 189 | dev_err(dev, "unknown pkt handler\n"); |
97664a20 KM |
190 | goto __usbhs_pkt_handler_end; |
191 | } | |
192 | ||
193 | ret = func(pkt, &is_done); | |
194 | ||
195 | if (is_done) | |
196 | __usbhsf_pkt_del(pkt); | |
197 | ||
198 | __usbhs_pkt_handler_end: | |
199 | usbhs_unlock(priv, flags); | |
200 | /******************** spin unlock ******************/ | |
201 | ||
0432eed0 | 202 | if (is_done) { |
b331872b | 203 | pkt->done(priv, pkt); |
0432eed0 KM |
204 | usbhs_pkt_start(pipe); |
205 | } | |
97664a20 KM |
206 | |
207 | return ret; | |
208 | } | |
209 | ||
51b8a021 KM |
210 | void usbhs_pkt_start(struct usbhs_pipe *pipe) |
211 | { | |
212 | usbhsf_pkt_handler(pipe, USBHSF_PKT_PREPARE); | |
213 | } | |
214 | ||
659d4954 KM |
215 | /* |
216 | * irq enable/disable function | |
217 | */ | |
3192fcb2 KM |
218 | #define usbhsf_irq_empty_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_bempsts, e) |
219 | #define usbhsf_irq_ready_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_brdysts, e) | |
659d4954 KM |
220 | #define usbhsf_irq_callback_ctrl(pipe, status, enable) \ |
221 | ({ \ | |
222 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); \ | |
223 | struct usbhs_mod *mod = usbhs_mod_get_current(priv); \ | |
224 | u16 status = (1 << usbhs_pipe_number(pipe)); \ | |
225 | if (!mod) \ | |
226 | return; \ | |
227 | if (enable) \ | |
3192fcb2 | 228 | mod->status |= status; \ |
659d4954 | 229 | else \ |
3192fcb2 | 230 | mod->status &= ~status; \ |
659d4954 KM |
231 | usbhs_irq_callback_update(priv, mod); \ |
232 | }) | |
233 | ||
234 | static void usbhsf_tx_irq_ctrl(struct usbhs_pipe *pipe, int enable) | |
235 | { | |
236 | /* | |
237 | * And DCP pipe can NOT use "ready interrupt" for "send" | |
238 | * it should use "empty" interrupt. | |
239 | * see | |
240 | * "Operation" - "Interrupt Function" - "BRDY Interrupt" | |
241 | * | |
242 | * on the other hand, normal pipe can use "ready interrupt" for "send" | |
243 | * even though it is single/double buffer | |
244 | */ | |
245 | if (usbhs_pipe_is_dcp(pipe)) | |
246 | usbhsf_irq_empty_ctrl(pipe, enable); | |
247 | else | |
248 | usbhsf_irq_ready_ctrl(pipe, enable); | |
249 | } | |
250 | ||
251 | static void usbhsf_rx_irq_ctrl(struct usbhs_pipe *pipe, int enable) | |
252 | { | |
253 | usbhsf_irq_ready_ctrl(pipe, enable); | |
254 | } | |
255 | ||
e8d548d5 KM |
256 | /* |
257 | * FIFO ctrl | |
258 | */ | |
d3af90a5 KM |
259 | static void usbhsf_send_terminator(struct usbhs_pipe *pipe, |
260 | struct usbhs_fifo *fifo) | |
e8d548d5 KM |
261 | { |
262 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); | |
263 | ||
d3af90a5 | 264 | usbhs_bset(priv, fifo->ctr, BVAL, BVAL); |
e8d548d5 KM |
265 | } |
266 | ||
d3af90a5 KM |
267 | static int usbhsf_fifo_barrier(struct usbhs_priv *priv, |
268 | struct usbhs_fifo *fifo) | |
e8d548d5 KM |
269 | { |
270 | int timeout = 1024; | |
271 | ||
272 | do { | |
273 | /* The FIFO port is accessible */ | |
d3af90a5 | 274 | if (usbhs_read(priv, fifo->ctr) & FRDY) |
e8d548d5 KM |
275 | return 0; |
276 | ||
277 | udelay(10); | |
278 | } while (timeout--); | |
279 | ||
280 | return -EBUSY; | |
281 | } | |
282 | ||
d3af90a5 KM |
283 | static void usbhsf_fifo_clear(struct usbhs_pipe *pipe, |
284 | struct usbhs_fifo *fifo) | |
e8d548d5 KM |
285 | { |
286 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); | |
287 | ||
288 | if (!usbhs_pipe_is_dcp(pipe)) | |
d3af90a5 | 289 | usbhsf_fifo_barrier(priv, fifo); |
e8d548d5 | 290 | |
d3af90a5 | 291 | usbhs_write(priv, fifo->ctr, BCLR); |
e8d548d5 KM |
292 | } |
293 | ||
d3af90a5 KM |
294 | static int usbhsf_fifo_rcv_len(struct usbhs_priv *priv, |
295 | struct usbhs_fifo *fifo) | |
e8d548d5 | 296 | { |
d3af90a5 | 297 | return usbhs_read(priv, fifo->ctr) & DTLN_MASK; |
e8d548d5 KM |
298 | } |
299 | ||
d77e3f4e KM |
300 | static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe, |
301 | struct usbhs_fifo *fifo) | |
302 | { | |
303 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); | |
304 | ||
305 | usbhs_pipe_select_fifo(pipe, NULL); | |
306 | usbhs_write(priv, fifo->sel, 0); | |
307 | } | |
308 | ||
d3af90a5 KM |
309 | static int usbhsf_fifo_select(struct usbhs_pipe *pipe, |
310 | struct usbhs_fifo *fifo, | |
311 | int write) | |
e8d548d5 KM |
312 | { |
313 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); | |
314 | struct device *dev = usbhs_priv_to_dev(priv); | |
315 | int timeout = 1024; | |
316 | u16 mask = ((1 << 5) | 0xF); /* mask of ISEL | CURPIPE */ | |
317 | u16 base = usbhs_pipe_number(pipe); /* CURPIPE */ | |
318 | ||
d77e3f4e KM |
319 | if (usbhs_pipe_is_busy(pipe) || |
320 | usbhsf_fifo_is_busy(fifo)) | |
321 | return -EBUSY; | |
322 | ||
92352071 | 323 | if (usbhs_pipe_is_dcp(pipe)) { |
e8d548d5 KM |
324 | base |= (1 == write) << 5; /* ISEL */ |
325 | ||
92352071 KM |
326 | if (usbhs_mod_is_host(priv)) |
327 | usbhs_dcp_dir_for_host(pipe, write); | |
328 | } | |
329 | ||
e8d548d5 | 330 | /* "base" will be used below */ |
5ea43994 SY |
331 | if (usbhs_get_dparam(priv, has_sudmac) && !usbhsf_is_cfifo(priv, fifo)) |
332 | usbhs_write(priv, fifo->sel, base); | |
333 | else | |
334 | usbhs_write(priv, fifo->sel, base | MBW_32); | |
e8d548d5 KM |
335 | |
336 | /* check ISEL and CURPIPE value */ | |
337 | while (timeout--) { | |
d77e3f4e KM |
338 | if (base == (mask & usbhs_read(priv, fifo->sel))) { |
339 | usbhs_pipe_select_fifo(pipe, fifo); | |
e8d548d5 | 340 | return 0; |
d77e3f4e | 341 | } |
e8d548d5 KM |
342 | udelay(10); |
343 | } | |
344 | ||
345 | dev_err(dev, "fifo select error\n"); | |
346 | ||
347 | return -EIO; | |
348 | } | |
349 | ||
9e74d601 KM |
350 | /* |
351 | * DCP status stage | |
352 | */ | |
353 | static int usbhs_dcp_dir_switch_to_write(struct usbhs_pkt *pkt, int *is_done) | |
354 | { | |
355 | struct usbhs_pipe *pipe = pkt->pipe; | |
356 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); | |
357 | struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */ | |
358 | struct device *dev = usbhs_priv_to_dev(priv); | |
359 | int ret; | |
360 | ||
361 | usbhs_pipe_disable(pipe); | |
362 | ||
363 | ret = usbhsf_fifo_select(pipe, fifo, 1); | |
364 | if (ret < 0) { | |
365 | dev_err(dev, "%s() faile\n", __func__); | |
366 | return ret; | |
367 | } | |
368 | ||
369 | usbhs_pipe_sequence_data1(pipe); /* DATA1 */ | |
370 | ||
371 | usbhsf_fifo_clear(pipe, fifo); | |
372 | usbhsf_send_terminator(pipe, fifo); | |
373 | ||
374 | usbhsf_fifo_unselect(pipe, fifo); | |
375 | ||
376 | usbhsf_tx_irq_ctrl(pipe, 1); | |
377 | usbhs_pipe_enable(pipe); | |
378 | ||
379 | return ret; | |
380 | } | |
381 | ||
382 | static int usbhs_dcp_dir_switch_to_read(struct usbhs_pkt *pkt, int *is_done) | |
383 | { | |
384 | struct usbhs_pipe *pipe = pkt->pipe; | |
385 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); | |
386 | struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */ | |
387 | struct device *dev = usbhs_priv_to_dev(priv); | |
388 | int ret; | |
389 | ||
390 | usbhs_pipe_disable(pipe); | |
391 | ||
392 | ret = usbhsf_fifo_select(pipe, fifo, 0); | |
393 | if (ret < 0) { | |
394 | dev_err(dev, "%s() fail\n", __func__); | |
395 | return ret; | |
396 | } | |
397 | ||
398 | usbhs_pipe_sequence_data1(pipe); /* DATA1 */ | |
399 | usbhsf_fifo_clear(pipe, fifo); | |
400 | ||
401 | usbhsf_fifo_unselect(pipe, fifo); | |
402 | ||
403 | usbhsf_rx_irq_ctrl(pipe, 1); | |
404 | usbhs_pipe_enable(pipe); | |
405 | ||
406 | return ret; | |
407 | ||
408 | } | |
409 | ||
410 | static int usbhs_dcp_dir_switch_done(struct usbhs_pkt *pkt, int *is_done) | |
411 | { | |
412 | struct usbhs_pipe *pipe = pkt->pipe; | |
413 | ||
414 | if (pkt->handler == &usbhs_dcp_status_stage_in_handler) | |
415 | usbhsf_tx_irq_ctrl(pipe, 0); | |
416 | else | |
417 | usbhsf_rx_irq_ctrl(pipe, 0); | |
418 | ||
419 | pkt->actual = pkt->length; | |
420 | *is_done = 1; | |
421 | ||
422 | return 0; | |
423 | } | |
424 | ||
425 | struct usbhs_pkt_handle usbhs_dcp_status_stage_in_handler = { | |
426 | .prepare = usbhs_dcp_dir_switch_to_write, | |
427 | .try_run = usbhs_dcp_dir_switch_done, | |
428 | }; | |
429 | ||
430 | struct usbhs_pkt_handle usbhs_dcp_status_stage_out_handler = { | |
431 | .prepare = usbhs_dcp_dir_switch_to_read, | |
432 | .try_run = usbhs_dcp_dir_switch_done, | |
433 | }; | |
434 | ||
435 | /* | |
436 | * DCP data stage (push) | |
437 | */ | |
438 | static int usbhsf_dcp_data_stage_try_push(struct usbhs_pkt *pkt, int *is_done) | |
439 | { | |
440 | struct usbhs_pipe *pipe = pkt->pipe; | |
441 | ||
442 | usbhs_pipe_sequence_data1(pipe); /* DATA1 */ | |
443 | ||
444 | /* | |
445 | * change handler to PIO push | |
446 | */ | |
447 | pkt->handler = &usbhs_fifo_pio_push_handler; | |
448 | ||
449 | return pkt->handler->prepare(pkt, is_done); | |
450 | } | |
451 | ||
452 | struct usbhs_pkt_handle usbhs_dcp_data_stage_out_handler = { | |
453 | .prepare = usbhsf_dcp_data_stage_try_push, | |
454 | }; | |
455 | ||
456 | /* | |
457 | * DCP data stage (pop) | |
458 | */ | |
459 | static int usbhsf_dcp_data_stage_prepare_pop(struct usbhs_pkt *pkt, | |
460 | int *is_done) | |
461 | { | |
462 | struct usbhs_pipe *pipe = pkt->pipe; | |
463 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); | |
464 | struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); | |
465 | ||
466 | if (usbhs_pipe_is_busy(pipe)) | |
467 | return 0; | |
468 | ||
469 | /* | |
470 | * prepare pop for DCP should | |
471 | * - change DCP direction, | |
472 | * - clear fifo | |
473 | * - DATA1 | |
474 | */ | |
475 | usbhs_pipe_disable(pipe); | |
476 | ||
477 | usbhs_pipe_sequence_data1(pipe); /* DATA1 */ | |
478 | ||
479 | usbhsf_fifo_select(pipe, fifo, 0); | |
480 | usbhsf_fifo_clear(pipe, fifo); | |
481 | usbhsf_fifo_unselect(pipe, fifo); | |
482 | ||
483 | /* | |
484 | * change handler to PIO pop | |
485 | */ | |
486 | pkt->handler = &usbhs_fifo_pio_pop_handler; | |
487 | ||
488 | return pkt->handler->prepare(pkt, is_done); | |
489 | } | |
490 | ||
491 | struct usbhs_pkt_handle usbhs_dcp_data_stage_in_handler = { | |
492 | .prepare = usbhsf_dcp_data_stage_prepare_pop, | |
493 | }; | |
494 | ||
e8d548d5 | 495 | /* |
233f519d | 496 | * PIO push handler |
e8d548d5 | 497 | */ |
0cb7e61d | 498 | static int usbhsf_pio_try_push(struct usbhs_pkt *pkt, int *is_done) |
e8d548d5 | 499 | { |
4bd04811 | 500 | struct usbhs_pipe *pipe = pkt->pipe; |
e8d548d5 | 501 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); |
659d4954 | 502 | struct device *dev = usbhs_priv_to_dev(priv); |
d3af90a5 KM |
503 | struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */ |
504 | void __iomem *addr = priv->base + fifo->port; | |
659d4954 | 505 | u8 *buf; |
e8d548d5 KM |
506 | int maxp = usbhs_pipe_get_maxpacket(pipe); |
507 | int total_len; | |
4bd04811 | 508 | int i, ret, len; |
97664a20 | 509 | int is_short; |
e8d548d5 | 510 | |
3edeee38 KM |
511 | usbhs_pipe_data_sequence(pipe, pkt->sequence); |
512 | pkt->sequence = -1; /* -1 sequence will be ignored */ | |
513 | ||
1c90ee0b KM |
514 | usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length); |
515 | ||
d3af90a5 | 516 | ret = usbhsf_fifo_select(pipe, fifo, 1); |
e8d548d5 | 517 | if (ret < 0) |
d77e3f4e | 518 | return 0; |
e8d548d5 | 519 | |
dad67397 | 520 | ret = usbhs_pipe_is_accessible(pipe); |
4ef85e0f KM |
521 | if (ret < 0) { |
522 | /* inaccessible pipe is not an error */ | |
523 | ret = 0; | |
659d4954 | 524 | goto usbhs_fifo_write_busy; |
4ef85e0f | 525 | } |
e8d548d5 | 526 | |
d3af90a5 | 527 | ret = usbhsf_fifo_barrier(priv, fifo); |
e8d548d5 | 528 | if (ret < 0) |
659d4954 | 529 | goto usbhs_fifo_write_busy; |
e8d548d5 | 530 | |
659d4954 KM |
531 | buf = pkt->buf + pkt->actual; |
532 | len = pkt->length - pkt->actual; | |
533 | len = min(len, maxp); | |
534 | total_len = len; | |
535 | is_short = total_len < maxp; | |
e8d548d5 KM |
536 | |
537 | /* | |
538 | * FIXME | |
539 | * | |
540 | * 32-bit access only | |
541 | */ | |
659d4954 | 542 | if (len >= 4 && !((unsigned long)buf & 0x03)) { |
e8d548d5 KM |
543 | iowrite32_rep(addr, buf, len / 4); |
544 | len %= 4; | |
545 | buf += total_len - len; | |
546 | } | |
547 | ||
548 | /* the rest operation */ | |
549 | for (i = 0; i < len; i++) | |
550 | iowrite8(buf[i], addr + (0x03 - (i & 0x03))); | |
551 | ||
659d4954 KM |
552 | /* |
553 | * variable update | |
554 | */ | |
555 | pkt->actual += total_len; | |
556 | ||
557 | if (pkt->actual < pkt->length) | |
97664a20 | 558 | *is_done = 0; /* there are remainder data */ |
659d4954 | 559 | else if (is_short) |
97664a20 | 560 | *is_done = 1; /* short packet */ |
659d4954 | 561 | else |
97664a20 | 562 | *is_done = !pkt->zero; /* send zero packet ? */ |
659d4954 KM |
563 | |
564 | /* | |
565 | * pipe/irq handling | |
566 | */ | |
567 | if (is_short) | |
d3af90a5 | 568 | usbhsf_send_terminator(pipe, fifo); |
e8d548d5 | 569 | |
97664a20 | 570 | usbhsf_tx_irq_ctrl(pipe, !*is_done); |
8355b2b3 | 571 | usbhs_pipe_running(pipe, !*is_done); |
4bd04811 KM |
572 | usbhs_pipe_enable(pipe); |
573 | ||
659d4954 KM |
574 | dev_dbg(dev, " send %d (%d/ %d/ %d/ %d)\n", |
575 | usbhs_pipe_number(pipe), | |
97664a20 | 576 | pkt->length, pkt->actual, *is_done, pkt->zero); |
659d4954 | 577 | |
d77e3f4e KM |
578 | usbhsf_fifo_unselect(pipe, fifo); |
579 | ||
4bd04811 | 580 | return 0; |
659d4954 KM |
581 | |
582 | usbhs_fifo_write_busy: | |
d77e3f4e KM |
583 | usbhsf_fifo_unselect(pipe, fifo); |
584 | ||
659d4954 KM |
585 | /* |
586 | * pipe is busy. | |
587 | * retry in interrupt | |
588 | */ | |
589 | usbhsf_tx_irq_ctrl(pipe, 1); | |
8355b2b3 | 590 | usbhs_pipe_running(pipe, 1); |
659d4954 KM |
591 | |
592 | return ret; | |
e8d548d5 KM |
593 | } |
594 | ||
8355b2b3 YS |
595 | static int usbhsf_pio_prepare_push(struct usbhs_pkt *pkt, int *is_done) |
596 | { | |
597 | if (usbhs_pipe_is_running(pkt->pipe)) | |
598 | return 0; | |
599 | ||
600 | return usbhsf_pio_try_push(pkt, is_done); | |
601 | } | |
602 | ||
0cb7e61d | 603 | struct usbhs_pkt_handle usbhs_fifo_pio_push_handler = { |
8355b2b3 | 604 | .prepare = usbhsf_pio_prepare_push, |
0cb7e61d | 605 | .try_run = usbhsf_pio_try_push, |
dad67397 KM |
606 | }; |
607 | ||
233f519d KM |
608 | /* |
609 | * PIO pop handler | |
610 | */ | |
97664a20 | 611 | static int usbhsf_prepare_pop(struct usbhs_pkt *pkt, int *is_done) |
e8d548d5 | 612 | { |
dad67397 | 613 | struct usbhs_pipe *pipe = pkt->pipe; |
e73d42f1 KM |
614 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); |
615 | struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); | |
d77e3f4e KM |
616 | |
617 | if (usbhs_pipe_is_busy(pipe)) | |
618 | return 0; | |
e8d548d5 | 619 | |
8355b2b3 YS |
620 | if (usbhs_pipe_is_running(pipe)) |
621 | return 0; | |
622 | ||
e8d548d5 | 623 | /* |
d77e3f4e | 624 | * pipe enable to prepare packet receive |
e8d548d5 | 625 | */ |
3edeee38 KM |
626 | usbhs_pipe_data_sequence(pipe, pkt->sequence); |
627 | pkt->sequence = -1; /* -1 sequence will be ignored */ | |
e8d548d5 | 628 | |
e73d42f1 KM |
629 | if (usbhs_pipe_is_dcp(pipe)) |
630 | usbhsf_fifo_clear(pipe, fifo); | |
631 | ||
1c90ee0b | 632 | usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length); |
e8d548d5 | 633 | usbhs_pipe_enable(pipe); |
8355b2b3 | 634 | usbhs_pipe_running(pipe, 1); |
659d4954 | 635 | usbhsf_rx_irq_ctrl(pipe, 1); |
e8d548d5 | 636 | |
d3af90a5 | 637 | return 0; |
e8d548d5 KM |
638 | } |
639 | ||
0cb7e61d | 640 | static int usbhsf_pio_try_pop(struct usbhs_pkt *pkt, int *is_done) |
e8d548d5 | 641 | { |
4bd04811 | 642 | struct usbhs_pipe *pipe = pkt->pipe; |
e8d548d5 | 643 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); |
659d4954 | 644 | struct device *dev = usbhs_priv_to_dev(priv); |
d3af90a5 KM |
645 | struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */ |
646 | void __iomem *addr = priv->base + fifo->port; | |
659d4954 KM |
647 | u8 *buf; |
648 | u32 data = 0; | |
649 | int maxp = usbhs_pipe_get_maxpacket(pipe); | |
4bd04811 | 650 | int rcv_len, len; |
e8d548d5 | 651 | int i, ret; |
4bd04811 | 652 | int total_len = 0; |
e8d548d5 | 653 | |
d3af90a5 | 654 | ret = usbhsf_fifo_select(pipe, fifo, 0); |
e8d548d5 | 655 | if (ret < 0) |
d77e3f4e | 656 | return 0; |
e8d548d5 | 657 | |
d3af90a5 | 658 | ret = usbhsf_fifo_barrier(priv, fifo); |
e8d548d5 | 659 | if (ret < 0) |
d77e3f4e | 660 | goto usbhs_fifo_read_busy; |
e8d548d5 | 661 | |
d3af90a5 | 662 | rcv_len = usbhsf_fifo_rcv_len(priv, fifo); |
e8d548d5 | 663 | |
659d4954 KM |
664 | buf = pkt->buf + pkt->actual; |
665 | len = pkt->length - pkt->actual; | |
666 | len = min(len, rcv_len); | |
667 | total_len = len; | |
668 | ||
6ff5d09b KM |
669 | /* |
670 | * update actual length first here to decide disable pipe. | |
671 | * if this pipe keeps BUF status and all data were popped, | |
672 | * then, next interrupt/token will be issued again | |
673 | */ | |
674 | pkt->actual += total_len; | |
675 | ||
676 | if ((pkt->actual == pkt->length) || /* receive all data */ | |
677 | (total_len < maxp)) { /* short packet */ | |
678 | *is_done = 1; | |
679 | usbhsf_rx_irq_ctrl(pipe, 0); | |
8355b2b3 | 680 | usbhs_pipe_running(pipe, 0); |
93fb9127 YS |
681 | /* |
682 | * If function mode, since this controller is possible to enter | |
683 | * Control Write status stage at this timing, this driver | |
684 | * should not disable the pipe. If such a case happens, this | |
685 | * controller is not able to complete the status stage. | |
686 | */ | |
687 | if (!usbhs_mod_is_host(priv) && !usbhs_pipe_is_dcp(pipe)) | |
688 | usbhs_pipe_disable(pipe); /* disable pipe first */ | |
6ff5d09b KM |
689 | } |
690 | ||
e8d548d5 KM |
691 | /* |
692 | * Buffer clear if Zero-Length packet | |
693 | * | |
694 | * see | |
695 | * "Operation" - "FIFO Buffer Memory" - "FIFO Port Function" | |
696 | */ | |
697 | if (0 == rcv_len) { | |
3edeee38 | 698 | pkt->zero = 1; |
d3af90a5 | 699 | usbhsf_fifo_clear(pipe, fifo); |
4bd04811 | 700 | goto usbhs_fifo_read_end; |
e8d548d5 KM |
701 | } |
702 | ||
e8d548d5 KM |
703 | /* |
704 | * FIXME | |
705 | * | |
706 | * 32-bit access only | |
707 | */ | |
659d4954 | 708 | if (len >= 4 && !((unsigned long)buf & 0x03)) { |
e8d548d5 KM |
709 | ioread32_rep(addr, buf, len / 4); |
710 | len %= 4; | |
659d4954 | 711 | buf += total_len - len; |
e8d548d5 KM |
712 | } |
713 | ||
714 | /* the rest operation */ | |
715 | for (i = 0; i < len; i++) { | |
716 | if (!(i & 0x03)) | |
717 | data = ioread32(addr); | |
718 | ||
719 | buf[i] = (data >> ((i & 0x03) * 8)) & 0xff; | |
720 | } | |
721 | ||
4bd04811 | 722 | usbhs_fifo_read_end: |
97664a20 KM |
723 | dev_dbg(dev, " recv %d (%d/ %d/ %d/ %d)\n", |
724 | usbhs_pipe_number(pipe), | |
725 | pkt->length, pkt->actual, *is_done, pkt->zero); | |
726 | ||
d77e3f4e KM |
727 | usbhs_fifo_read_busy: |
728 | usbhsf_fifo_unselect(pipe, fifo); | |
729 | ||
730 | return ret; | |
e8d548d5 | 731 | } |
dad67397 | 732 | |
0cb7e61d | 733 | struct usbhs_pkt_handle usbhs_fifo_pio_pop_handler = { |
dad67397 | 734 | .prepare = usbhsf_prepare_pop, |
0cb7e61d | 735 | .try_run = usbhsf_pio_try_pop, |
dad67397 KM |
736 | }; |
737 | ||
738 | /* | |
233f519d | 739 | * DCP ctrol statge handler |
dad67397 | 740 | */ |
97664a20 | 741 | static int usbhsf_ctrl_stage_end(struct usbhs_pkt *pkt, int *is_done) |
dad67397 | 742 | { |
97664a20 | 743 | usbhs_dcp_control_transfer_done(pkt->pipe); |
dad67397 | 744 | |
97664a20 | 745 | *is_done = 1; |
dad67397 KM |
746 | |
747 | return 0; | |
748 | } | |
749 | ||
750 | struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler = { | |
751 | .prepare = usbhsf_ctrl_stage_end, | |
752 | .try_run = usbhsf_ctrl_stage_end, | |
753 | }; | |
754 | ||
e73a9891 KM |
755 | /* |
756 | * DMA fifo functions | |
757 | */ | |
758 | static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo, | |
759 | struct usbhs_pkt *pkt) | |
760 | { | |
761 | if (&usbhs_fifo_dma_push_handler == pkt->handler) | |
762 | return fifo->tx_chan; | |
763 | ||
764 | if (&usbhs_fifo_dma_pop_handler == pkt->handler) | |
765 | return fifo->rx_chan; | |
766 | ||
767 | return NULL; | |
768 | } | |
769 | ||
770 | static struct usbhs_fifo *usbhsf_get_dma_fifo(struct usbhs_priv *priv, | |
771 | struct usbhs_pkt *pkt) | |
772 | { | |
773 | struct usbhs_fifo *fifo; | |
3a2634a5 | 774 | int i; |
e73a9891 | 775 | |
3a2634a5 YS |
776 | usbhs_for_each_dfifo(priv, fifo, i) { |
777 | if (usbhsf_dma_chan_get(fifo, pkt) && | |
778 | !usbhsf_fifo_is_busy(fifo)) | |
779 | return fifo; | |
780 | } | |
e73a9891 KM |
781 | |
782 | return NULL; | |
783 | } | |
784 | ||
785 | #define usbhsf_dma_start(p, f) __usbhsf_dma_ctrl(p, f, DREQE) | |
786 | #define usbhsf_dma_stop(p, f) __usbhsf_dma_ctrl(p, f, 0) | |
787 | static void __usbhsf_dma_ctrl(struct usbhs_pipe *pipe, | |
788 | struct usbhs_fifo *fifo, | |
789 | u16 dreqe) | |
790 | { | |
791 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); | |
792 | ||
793 | usbhs_bset(priv, fifo->sel, DREQE, dreqe); | |
794 | } | |
795 | ||
e73a9891 KM |
796 | static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map) |
797 | { | |
798 | struct usbhs_pipe *pipe = pkt->pipe; | |
799 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); | |
800 | struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv); | |
801 | ||
802 | return info->dma_map_ctrl(pkt, map); | |
803 | } | |
804 | ||
805 | static void usbhsf_dma_complete(void *arg); | |
6e4b74e4 | 806 | static void xfer_work(struct work_struct *work) |
e73a9891 | 807 | { |
6e4b74e4 | 808 | struct usbhs_pkt *pkt = container_of(work, struct usbhs_pkt, work); |
e73a9891 KM |
809 | struct usbhs_pipe *pipe = pkt->pipe; |
810 | struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe); | |
811 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); | |
e73a9891 KM |
812 | struct dma_async_tx_descriptor *desc; |
813 | struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt); | |
814 | struct device *dev = usbhs_priv_to_dev(priv); | |
55ba4e5e | 815 | enum dma_transfer_direction dir; |
e73a9891 | 816 | |
55ba4e5e | 817 | dir = usbhs_pipe_is_dir_in(pipe) ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV; |
e73a9891 | 818 | |
2f0de9d8 KM |
819 | desc = dmaengine_prep_slave_single(chan, pkt->dma + pkt->actual, |
820 | pkt->trans, dir, | |
16052827 | 821 | DMA_PREP_INTERRUPT | DMA_CTRL_ACK); |
e73a9891 KM |
822 | if (!desc) |
823 | return; | |
824 | ||
825 | desc->callback = usbhsf_dma_complete; | |
826 | desc->callback_param = pipe; | |
827 | ||
ab330cf3 YS |
828 | pkt->cookie = dmaengine_submit(desc); |
829 | if (pkt->cookie < 0) { | |
e73a9891 KM |
830 | dev_err(dev, "Failed to submit dma descriptor\n"); |
831 | return; | |
832 | } | |
833 | ||
834 | dev_dbg(dev, " %s %d (%d/ %d)\n", | |
835 | fifo->name, usbhs_pipe_number(pipe), pkt->length, pkt->zero); | |
836 | ||
8355b2b3 | 837 | usbhs_pipe_running(pipe, 1); |
e73a9891 | 838 | usbhsf_dma_start(pipe, fifo); |
9b53d9af | 839 | usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->trans); |
e73a9891 | 840 | dma_async_issue_pending(chan); |
9b53d9af | 841 | usbhs_pipe_enable(pipe); |
e73a9891 KM |
842 | } |
843 | ||
233f519d KM |
844 | /* |
845 | * DMA push handler | |
846 | */ | |
e73a9891 KM |
847 | static int usbhsf_dma_prepare_push(struct usbhs_pkt *pkt, int *is_done) |
848 | { | |
849 | struct usbhs_pipe *pipe = pkt->pipe; | |
850 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); | |
851 | struct usbhs_fifo *fifo; | |
852 | int len = pkt->length - pkt->actual; | |
853 | int ret; | |
ab330cf3 | 854 | uintptr_t align_mask; |
e73a9891 KM |
855 | |
856 | if (usbhs_pipe_is_busy(pipe)) | |
857 | return 0; | |
858 | ||
859 | /* use PIO if packet is less than pio_dma_border or pipe is DCP */ | |
860 | if ((len < usbhs_get_dparam(priv, pio_dma_border)) || | |
861 | usbhs_pipe_is_dcp(pipe)) | |
862 | goto usbhsf_pio_prepare_push; | |
863 | ||
ab330cf3 YS |
864 | /* check data length if this driver don't use USB-DMAC */ |
865 | if (!usbhs_get_dparam(priv, has_usb_dmac) && len & 0x7) | |
e73a9891 KM |
866 | goto usbhsf_pio_prepare_push; |
867 | ||
ab330cf3 YS |
868 | /* check buffer alignment */ |
869 | align_mask = usbhs_get_dparam(priv, has_usb_dmac) ? | |
870 | USBHS_USB_DMAC_XFER_SIZE - 1 : 0x7; | |
871 | if ((uintptr_t)(pkt->buf + pkt->actual) & align_mask) | |
9a12d097 KM |
872 | goto usbhsf_pio_prepare_push; |
873 | ||
8355b2b3 YS |
874 | /* return at this time if the pipe is running */ |
875 | if (usbhs_pipe_is_running(pipe)) | |
876 | return 0; | |
877 | ||
e73a9891 KM |
878 | /* get enable DMA fifo */ |
879 | fifo = usbhsf_get_dma_fifo(priv, pkt); | |
880 | if (!fifo) | |
881 | goto usbhsf_pio_prepare_push; | |
882 | ||
883 | if (usbhsf_dma_map(pkt) < 0) | |
884 | goto usbhsf_pio_prepare_push; | |
885 | ||
886 | ret = usbhsf_fifo_select(pipe, fifo, 0); | |
887 | if (ret < 0) | |
888 | goto usbhsf_pio_prepare_push_unmap; | |
889 | ||
890 | pkt->trans = len; | |
891 | ||
6e4b74e4 GL |
892 | INIT_WORK(&pkt->work, xfer_work); |
893 | schedule_work(&pkt->work); | |
e73a9891 KM |
894 | |
895 | return 0; | |
896 | ||
897 | usbhsf_pio_prepare_push_unmap: | |
898 | usbhsf_dma_unmap(pkt); | |
899 | usbhsf_pio_prepare_push: | |
900 | /* | |
901 | * change handler to PIO | |
902 | */ | |
903 | pkt->handler = &usbhs_fifo_pio_push_handler; | |
904 | ||
905 | return pkt->handler->prepare(pkt, is_done); | |
906 | } | |
907 | ||
908 | static int usbhsf_dma_push_done(struct usbhs_pkt *pkt, int *is_done) | |
909 | { | |
910 | struct usbhs_pipe *pipe = pkt->pipe; | |
c0ed8b23 | 911 | int is_short = pkt->trans % usbhs_pipe_get_maxpacket(pipe); |
e73a9891 | 912 | |
c0ed8b23 YS |
913 | pkt->actual += pkt->trans; |
914 | ||
915 | if (pkt->actual < pkt->length) | |
916 | *is_done = 0; /* there are remainder data */ | |
917 | else if (is_short) | |
918 | *is_done = 1; /* short packet */ | |
919 | else | |
920 | *is_done = !pkt->zero; /* send zero packet? */ | |
e73a9891 | 921 | |
8355b2b3 | 922 | usbhs_pipe_running(pipe, !*is_done); |
e73a9891 KM |
923 | |
924 | usbhsf_dma_stop(pipe, pipe->fifo); | |
925 | usbhsf_dma_unmap(pkt); | |
926 | usbhsf_fifo_unselect(pipe, pipe->fifo); | |
927 | ||
c0ed8b23 YS |
928 | if (!*is_done) { |
929 | /* change handler to PIO */ | |
930 | pkt->handler = &usbhs_fifo_pio_push_handler; | |
931 | return pkt->handler->try_run(pkt, is_done); | |
932 | } | |
933 | ||
e73a9891 KM |
934 | return 0; |
935 | } | |
936 | ||
937 | struct usbhs_pkt_handle usbhs_fifo_dma_push_handler = { | |
938 | .prepare = usbhsf_dma_prepare_push, | |
939 | .dma_done = usbhsf_dma_push_done, | |
940 | }; | |
941 | ||
233f519d KM |
942 | /* |
943 | * DMA pop handler | |
944 | */ | |
ab330cf3 YS |
945 | |
946 | static int usbhsf_dma_prepare_pop_with_rx_irq(struct usbhs_pkt *pkt, | |
947 | int *is_done) | |
948 | { | |
949 | return usbhsf_prepare_pop(pkt, is_done); | |
950 | } | |
951 | ||
952 | static int usbhsf_dma_prepare_pop_with_usb_dmac(struct usbhs_pkt *pkt, | |
953 | int *is_done) | |
954 | { | |
955 | struct usbhs_pipe *pipe = pkt->pipe; | |
956 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); | |
957 | struct usbhs_fifo *fifo; | |
958 | int ret; | |
959 | ||
960 | if (usbhs_pipe_is_busy(pipe)) | |
961 | return 0; | |
962 | ||
963 | /* use PIO if packet is less than pio_dma_border or pipe is DCP */ | |
964 | if ((pkt->length < usbhs_get_dparam(priv, pio_dma_border)) || | |
965 | usbhs_pipe_is_dcp(pipe)) | |
966 | goto usbhsf_pio_prepare_pop; | |
967 | ||
968 | fifo = usbhsf_get_dma_fifo(priv, pkt); | |
969 | if (!fifo) | |
970 | goto usbhsf_pio_prepare_pop; | |
971 | ||
972 | if ((uintptr_t)pkt->buf & (USBHS_USB_DMAC_XFER_SIZE - 1)) | |
973 | goto usbhsf_pio_prepare_pop; | |
974 | ||
975 | usbhs_pipe_config_change_bfre(pipe, 1); | |
976 | ||
977 | ret = usbhsf_fifo_select(pipe, fifo, 0); | |
978 | if (ret < 0) | |
979 | goto usbhsf_pio_prepare_pop; | |
980 | ||
981 | if (usbhsf_dma_map(pkt) < 0) | |
982 | goto usbhsf_pio_prepare_pop_unselect; | |
983 | ||
984 | /* DMA */ | |
985 | ||
986 | /* | |
987 | * usbhs_fifo_dma_pop_handler :: prepare | |
988 | * enabled irq to come here. | |
989 | * but it is no longer needed for DMA. disable it. | |
990 | */ | |
991 | usbhsf_rx_irq_ctrl(pipe, 0); | |
992 | ||
993 | pkt->trans = pkt->length; | |
994 | ||
995 | INIT_WORK(&pkt->work, xfer_work); | |
996 | schedule_work(&pkt->work); | |
997 | ||
998 | return 0; | |
999 | ||
1000 | usbhsf_pio_prepare_pop_unselect: | |
1001 | usbhsf_fifo_unselect(pipe, fifo); | |
1002 | usbhsf_pio_prepare_pop: | |
1003 | ||
1004 | /* | |
1005 | * change handler to PIO | |
1006 | */ | |
1007 | pkt->handler = &usbhs_fifo_pio_pop_handler; | |
1008 | usbhs_pipe_config_change_bfre(pipe, 0); | |
1009 | ||
1010 | return pkt->handler->prepare(pkt, is_done); | |
1011 | } | |
1012 | ||
1013 | static int usbhsf_dma_prepare_pop(struct usbhs_pkt *pkt, int *is_done) | |
1014 | { | |
1015 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe); | |
1016 | ||
1017 | if (usbhs_get_dparam(priv, has_usb_dmac)) | |
1018 | return usbhsf_dma_prepare_pop_with_usb_dmac(pkt, is_done); | |
1019 | else | |
1020 | return usbhsf_dma_prepare_pop_with_rx_irq(pkt, is_done); | |
1021 | } | |
1022 | ||
1023 | static int usbhsf_dma_try_pop_with_rx_irq(struct usbhs_pkt *pkt, int *is_done) | |
e73a9891 KM |
1024 | { |
1025 | struct usbhs_pipe *pipe = pkt->pipe; | |
1026 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); | |
1027 | struct usbhs_fifo *fifo; | |
1028 | int len, ret; | |
1029 | ||
1030 | if (usbhs_pipe_is_busy(pipe)) | |
1031 | return 0; | |
1032 | ||
1033 | if (usbhs_pipe_is_dcp(pipe)) | |
1034 | goto usbhsf_pio_prepare_pop; | |
1035 | ||
1036 | /* get enable DMA fifo */ | |
1037 | fifo = usbhsf_get_dma_fifo(priv, pkt); | |
1038 | if (!fifo) | |
1039 | goto usbhsf_pio_prepare_pop; | |
1040 | ||
c9ae0c91 | 1041 | if ((uintptr_t)(pkt->buf + pkt->actual) & 0x7) /* 8byte alignment */ |
9a12d097 KM |
1042 | goto usbhsf_pio_prepare_pop; |
1043 | ||
e73a9891 KM |
1044 | ret = usbhsf_fifo_select(pipe, fifo, 0); |
1045 | if (ret < 0) | |
1046 | goto usbhsf_pio_prepare_pop; | |
1047 | ||
1048 | /* use PIO if packet is less than pio_dma_border */ | |
1049 | len = usbhsf_fifo_rcv_len(priv, fifo); | |
1050 | len = min(pkt->length - pkt->actual, len); | |
77975eec | 1051 | if (len & 0x7) /* 8byte alignment */ |
e73a9891 KM |
1052 | goto usbhsf_pio_prepare_pop_unselect; |
1053 | ||
1054 | if (len < usbhs_get_dparam(priv, pio_dma_border)) | |
1055 | goto usbhsf_pio_prepare_pop_unselect; | |
1056 | ||
1057 | ret = usbhsf_fifo_barrier(priv, fifo); | |
1058 | if (ret < 0) | |
1059 | goto usbhsf_pio_prepare_pop_unselect; | |
1060 | ||
1061 | if (usbhsf_dma_map(pkt) < 0) | |
1062 | goto usbhsf_pio_prepare_pop_unselect; | |
1063 | ||
1064 | /* DMA */ | |
1065 | ||
1066 | /* | |
1067 | * usbhs_fifo_dma_pop_handler :: prepare | |
1068 | * enabled irq to come here. | |
1069 | * but it is no longer needed for DMA. disable it. | |
1070 | */ | |
1071 | usbhsf_rx_irq_ctrl(pipe, 0); | |
1072 | ||
1073 | pkt->trans = len; | |
1074 | ||
6e4b74e4 GL |
1075 | INIT_WORK(&pkt->work, xfer_work); |
1076 | schedule_work(&pkt->work); | |
e73a9891 KM |
1077 | |
1078 | return 0; | |
1079 | ||
1080 | usbhsf_pio_prepare_pop_unselect: | |
1081 | usbhsf_fifo_unselect(pipe, fifo); | |
1082 | usbhsf_pio_prepare_pop: | |
1083 | ||
1084 | /* | |
1085 | * change handler to PIO | |
1086 | */ | |
1087 | pkt->handler = &usbhs_fifo_pio_pop_handler; | |
1088 | ||
1089 | return pkt->handler->try_run(pkt, is_done); | |
1090 | } | |
1091 | ||
ab330cf3 YS |
1092 | static int usbhsf_dma_try_pop(struct usbhs_pkt *pkt, int *is_done) |
1093 | { | |
1094 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe); | |
1095 | ||
1096 | BUG_ON(usbhs_get_dparam(priv, has_usb_dmac)); | |
1097 | ||
1098 | return usbhsf_dma_try_pop_with_rx_irq(pkt, is_done); | |
1099 | } | |
1100 | ||
1101 | static int usbhsf_dma_pop_done_with_rx_irq(struct usbhs_pkt *pkt, int *is_done) | |
e73a9891 KM |
1102 | { |
1103 | struct usbhs_pipe *pipe = pkt->pipe; | |
1104 | int maxp = usbhs_pipe_get_maxpacket(pipe); | |
1105 | ||
1106 | usbhsf_dma_stop(pipe, pipe->fifo); | |
1107 | usbhsf_dma_unmap(pkt); | |
1108 | usbhsf_fifo_unselect(pipe, pipe->fifo); | |
1109 | ||
1110 | pkt->actual += pkt->trans; | |
1111 | ||
1112 | if ((pkt->actual == pkt->length) || /* receive all data */ | |
1113 | (pkt->trans < maxp)) { /* short packet */ | |
1114 | *is_done = 1; | |
8355b2b3 | 1115 | usbhs_pipe_running(pipe, 0); |
e73a9891 KM |
1116 | } else { |
1117 | /* re-enable */ | |
8355b2b3 | 1118 | usbhs_pipe_running(pipe, 0); |
e73a9891 KM |
1119 | usbhsf_prepare_pop(pkt, is_done); |
1120 | } | |
1121 | ||
1122 | return 0; | |
1123 | } | |
1124 | ||
ab330cf3 YS |
1125 | static size_t usbhs_dma_calc_received_size(struct usbhs_pkt *pkt, |
1126 | struct dma_chan *chan, int dtln) | |
1127 | { | |
1128 | struct usbhs_pipe *pipe = pkt->pipe; | |
1129 | struct dma_tx_state state; | |
1130 | size_t received_size; | |
1131 | int maxp = usbhs_pipe_get_maxpacket(pipe); | |
1132 | ||
1133 | dmaengine_tx_status(chan, pkt->cookie, &state); | |
1134 | received_size = pkt->length - state.residue; | |
1135 | ||
1136 | if (dtln) { | |
1137 | received_size -= USBHS_USB_DMAC_XFER_SIZE; | |
1138 | received_size &= ~(maxp - 1); | |
1139 | received_size += dtln; | |
1140 | } | |
1141 | ||
1142 | return received_size; | |
1143 | } | |
1144 | ||
1145 | static int usbhsf_dma_pop_done_with_usb_dmac(struct usbhs_pkt *pkt, | |
1146 | int *is_done) | |
1147 | { | |
1148 | struct usbhs_pipe *pipe = pkt->pipe; | |
1149 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); | |
1150 | struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe); | |
1151 | struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt); | |
1152 | int rcv_len; | |
1153 | ||
1154 | /* | |
1155 | * Since the driver disables rx_irq in DMA mode, the interrupt handler | |
1156 | * cannot the BRDYSTS. So, the function clears it here because the | |
1157 | * driver may use PIO mode next time. | |
1158 | */ | |
1159 | usbhs_xxxsts_clear(priv, BRDYSTS, usbhs_pipe_number(pipe)); | |
1160 | ||
1161 | rcv_len = usbhsf_fifo_rcv_len(priv, fifo); | |
1162 | usbhsf_fifo_clear(pipe, fifo); | |
1163 | pkt->actual = usbhs_dma_calc_received_size(pkt, chan, rcv_len); | |
1164 | ||
1165 | usbhsf_dma_stop(pipe, fifo); | |
1166 | usbhsf_dma_unmap(pkt); | |
1167 | usbhsf_fifo_unselect(pipe, pipe->fifo); | |
1168 | ||
1169 | /* The driver can assume the rx transaction is always "done" */ | |
1170 | *is_done = 1; | |
1171 | ||
1172 | return 0; | |
1173 | } | |
1174 | ||
1175 | static int usbhsf_dma_pop_done(struct usbhs_pkt *pkt, int *is_done) | |
1176 | { | |
1177 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe); | |
1178 | ||
1179 | if (usbhs_get_dparam(priv, has_usb_dmac)) | |
1180 | return usbhsf_dma_pop_done_with_usb_dmac(pkt, is_done); | |
1181 | else | |
1182 | return usbhsf_dma_pop_done_with_rx_irq(pkt, is_done); | |
1183 | } | |
1184 | ||
e73a9891 | 1185 | struct usbhs_pkt_handle usbhs_fifo_dma_pop_handler = { |
ab330cf3 | 1186 | .prepare = usbhsf_dma_prepare_pop, |
e73a9891 KM |
1187 | .try_run = usbhsf_dma_try_pop, |
1188 | .dma_done = usbhsf_dma_pop_done | |
1189 | }; | |
1190 | ||
1191 | /* | |
1192 | * DMA setting | |
1193 | */ | |
1194 | static bool usbhsf_dma_filter(struct dma_chan *chan, void *param) | |
1195 | { | |
1196 | struct sh_dmae_slave *slave = param; | |
1197 | ||
1198 | /* | |
1199 | * FIXME | |
1200 | * | |
1201 | * usbhs doesn't recognize id = 0 as valid DMA | |
1202 | */ | |
f19b7e0d | 1203 | if (0 == slave->shdma_slave.slave_id) |
e73a9891 KM |
1204 | return false; |
1205 | ||
1206 | chan->private = slave; | |
1207 | ||
1208 | return true; | |
1209 | } | |
1210 | ||
1211 | static void usbhsf_dma_quit(struct usbhs_priv *priv, struct usbhs_fifo *fifo) | |
1212 | { | |
1213 | if (fifo->tx_chan) | |
1214 | dma_release_channel(fifo->tx_chan); | |
1215 | if (fifo->rx_chan) | |
1216 | dma_release_channel(fifo->rx_chan); | |
1217 | ||
1218 | fifo->tx_chan = NULL; | |
1219 | fifo->rx_chan = NULL; | |
1220 | } | |
1221 | ||
6e3f53ab | 1222 | static void usbhsf_dma_init_pdev(struct usbhs_fifo *fifo) |
e73a9891 | 1223 | { |
e73a9891 KM |
1224 | dma_cap_mask_t mask; |
1225 | ||
1226 | dma_cap_zero(mask); | |
1227 | dma_cap_set(DMA_SLAVE, mask); | |
1228 | fifo->tx_chan = dma_request_channel(mask, usbhsf_dma_filter, | |
1229 | &fifo->tx_slave); | |
1230 | ||
1231 | dma_cap_zero(mask); | |
1232 | dma_cap_set(DMA_SLAVE, mask); | |
1233 | fifo->rx_chan = dma_request_channel(mask, usbhsf_dma_filter, | |
1234 | &fifo->rx_slave); | |
6e3f53ab YS |
1235 | } |
1236 | ||
7a96b784 YS |
1237 | static void usbhsf_dma_init_dt(struct device *dev, struct usbhs_fifo *fifo, |
1238 | int channel) | |
abd2dbf6 | 1239 | { |
7a96b784 YS |
1240 | char name[16]; |
1241 | ||
7cc99f1e YS |
1242 | /* |
1243 | * To avoid complex handing for DnFIFOs, the driver uses each | |
1244 | * DnFIFO as TX or RX direction (not bi-direction). | |
1245 | * So, the driver uses odd channels for TX, even channels for RX. | |
1246 | */ | |
1247 | snprintf(name, sizeof(name), "ch%d", channel); | |
1248 | if (channel & 1) { | |
1249 | fifo->tx_chan = dma_request_slave_channel_reason(dev, name); | |
1250 | if (IS_ERR(fifo->tx_chan)) | |
1251 | fifo->tx_chan = NULL; | |
1252 | } else { | |
1253 | fifo->rx_chan = dma_request_slave_channel_reason(dev, name); | |
1254 | if (IS_ERR(fifo->rx_chan)) | |
1255 | fifo->rx_chan = NULL; | |
1256 | } | |
abd2dbf6 YS |
1257 | } |
1258 | ||
7a96b784 YS |
1259 | static void usbhsf_dma_init(struct usbhs_priv *priv, struct usbhs_fifo *fifo, |
1260 | int channel) | |
6e3f53ab YS |
1261 | { |
1262 | struct device *dev = usbhs_priv_to_dev(priv); | |
1263 | ||
abd2dbf6 | 1264 | if (dev->of_node) |
7a96b784 | 1265 | usbhsf_dma_init_dt(dev, fifo, channel); |
abd2dbf6 YS |
1266 | else |
1267 | usbhsf_dma_init_pdev(fifo); | |
e73a9891 KM |
1268 | |
1269 | if (fifo->tx_chan || fifo->rx_chan) | |
4ce68805 | 1270 | dev_dbg(dev, "enable DMAEngine (%s%s%s)\n", |
e73a9891 KM |
1271 | fifo->name, |
1272 | fifo->tx_chan ? "[TX]" : " ", | |
1273 | fifo->rx_chan ? "[RX]" : " "); | |
1274 | } | |
1275 | ||
dad67397 KM |
1276 | /* |
1277 | * irq functions | |
1278 | */ | |
1279 | static int usbhsf_irq_empty(struct usbhs_priv *priv, | |
1280 | struct usbhs_irq_state *irq_state) | |
1281 | { | |
1282 | struct usbhs_pipe *pipe; | |
dad67397 KM |
1283 | struct device *dev = usbhs_priv_to_dev(priv); |
1284 | int i, ret; | |
1285 | ||
1286 | if (!irq_state->bempsts) { | |
1287 | dev_err(dev, "debug %s !!\n", __func__); | |
1288 | return -EIO; | |
1289 | } | |
1290 | ||
1291 | dev_dbg(dev, "irq empty [0x%04x]\n", irq_state->bempsts); | |
1292 | ||
1293 | /* | |
1294 | * search interrupted "pipe" | |
1295 | * not "uep". | |
1296 | */ | |
1297 | usbhs_for_each_pipe_with_dcp(pipe, priv, i) { | |
1298 | if (!(irq_state->bempsts & (1 << i))) | |
1299 | continue; | |
1300 | ||
51b8a021 | 1301 | ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN); |
dad67397 KM |
1302 | if (ret < 0) |
1303 | dev_err(dev, "irq_empty run_error %d : %d\n", i, ret); | |
1304 | } | |
1305 | ||
1306 | return 0; | |
1307 | } | |
1308 | ||
1309 | static int usbhsf_irq_ready(struct usbhs_priv *priv, | |
1310 | struct usbhs_irq_state *irq_state) | |
1311 | { | |
1312 | struct usbhs_pipe *pipe; | |
dad67397 KM |
1313 | struct device *dev = usbhs_priv_to_dev(priv); |
1314 | int i, ret; | |
1315 | ||
1316 | if (!irq_state->brdysts) { | |
1317 | dev_err(dev, "debug %s !!\n", __func__); | |
1318 | return -EIO; | |
1319 | } | |
1320 | ||
1321 | dev_dbg(dev, "irq ready [0x%04x]\n", irq_state->brdysts); | |
1322 | ||
1323 | /* | |
1324 | * search interrupted "pipe" | |
1325 | * not "uep". | |
1326 | */ | |
1327 | usbhs_for_each_pipe_with_dcp(pipe, priv, i) { | |
1328 | if (!(irq_state->brdysts & (1 << i))) | |
1329 | continue; | |
1330 | ||
51b8a021 | 1331 | ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN); |
dad67397 KM |
1332 | if (ret < 0) |
1333 | dev_err(dev, "irq_ready run_error %d : %d\n", i, ret); | |
1334 | } | |
1335 | ||
1336 | return 0; | |
1337 | } | |
1338 | ||
e73a9891 KM |
1339 | static void usbhsf_dma_complete(void *arg) |
1340 | { | |
1341 | struct usbhs_pipe *pipe = arg; | |
1342 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); | |
1343 | struct device *dev = usbhs_priv_to_dev(priv); | |
1344 | int ret; | |
1345 | ||
51b8a021 | 1346 | ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_DMA_DONE); |
e73a9891 KM |
1347 | if (ret < 0) |
1348 | dev_err(dev, "dma_complete run_error %d : %d\n", | |
1349 | usbhs_pipe_number(pipe), ret); | |
1350 | } | |
1351 | ||
cdeb7943 YS |
1352 | void usbhs_fifo_clear_dcp(struct usbhs_pipe *pipe) |
1353 | { | |
1354 | struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); | |
1355 | struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */ | |
1356 | ||
1357 | /* clear DCP FIFO of transmission */ | |
1358 | if (usbhsf_fifo_select(pipe, fifo, 1) < 0) | |
1359 | return; | |
1360 | usbhsf_fifo_clear(pipe, fifo); | |
1361 | usbhsf_fifo_unselect(pipe, fifo); | |
1362 | ||
1363 | /* clear DCP FIFO of reception */ | |
1364 | if (usbhsf_fifo_select(pipe, fifo, 0) < 0) | |
1365 | return; | |
1366 | usbhsf_fifo_clear(pipe, fifo); | |
1367 | usbhsf_fifo_unselect(pipe, fifo); | |
1368 | } | |
1369 | ||
dad67397 KM |
1370 | /* |
1371 | * fifo init | |
1372 | */ | |
1373 | void usbhs_fifo_init(struct usbhs_priv *priv) | |
1374 | { | |
1375 | struct usbhs_mod *mod = usbhs_mod_get_current(priv); | |
d77e3f4e | 1376 | struct usbhs_fifo *cfifo = usbhsf_get_cfifo(priv); |
3a2634a5 YS |
1377 | struct usbhs_fifo *dfifo; |
1378 | int i; | |
dad67397 KM |
1379 | |
1380 | mod->irq_empty = usbhsf_irq_empty; | |
1381 | mod->irq_ready = usbhsf_irq_ready; | |
1382 | mod->irq_bempsts = 0; | |
1383 | mod->irq_brdysts = 0; | |
d77e3f4e KM |
1384 | |
1385 | cfifo->pipe = NULL; | |
3a2634a5 YS |
1386 | usbhs_for_each_dfifo(priv, dfifo, i) |
1387 | dfifo->pipe = NULL; | |
dad67397 KM |
1388 | } |
1389 | ||
1390 | void usbhs_fifo_quit(struct usbhs_priv *priv) | |
1391 | { | |
1392 | struct usbhs_mod *mod = usbhs_mod_get_current(priv); | |
1393 | ||
1394 | mod->irq_empty = NULL; | |
1395 | mod->irq_ready = NULL; | |
1396 | mod->irq_bempsts = 0; | |
1397 | mod->irq_brdysts = 0; | |
1398 | } | |
d3af90a5 | 1399 | |
53e734b1 | 1400 | #define __USBHS_DFIFO_INIT(priv, fifo, channel, fifo_port) \ |
3a2634a5 YS |
1401 | do { \ |
1402 | fifo = usbhsf_get_dnfifo(priv, channel); \ | |
1403 | fifo->name = "D"#channel"FIFO"; \ | |
53e734b1 | 1404 | fifo->port = fifo_port; \ |
3a2634a5 YS |
1405 | fifo->sel = D##channel##FIFOSEL; \ |
1406 | fifo->ctr = D##channel##FIFOCTR; \ | |
1407 | fifo->tx_slave.shdma_slave.slave_id = \ | |
1408 | usbhs_get_dparam(priv, d##channel##_tx_id); \ | |
1409 | fifo->rx_slave.shdma_slave.slave_id = \ | |
1410 | usbhs_get_dparam(priv, d##channel##_rx_id); \ | |
7a96b784 | 1411 | usbhsf_dma_init(priv, fifo, channel); \ |
3a2634a5 YS |
1412 | } while (0) |
1413 | ||
53e734b1 YS |
1414 | #define USBHS_DFIFO_INIT(priv, fifo, channel) \ |
1415 | __USBHS_DFIFO_INIT(priv, fifo, channel, D##channel##FIFO) | |
1416 | #define USBHS_DFIFO_INIT_NO_PORT(priv, fifo, channel) \ | |
1417 | __USBHS_DFIFO_INIT(priv, fifo, channel, 0) | |
1418 | ||
d3af90a5 KM |
1419 | int usbhs_fifo_probe(struct usbhs_priv *priv) |
1420 | { | |
1421 | struct usbhs_fifo *fifo; | |
1422 | ||
1423 | /* CFIFO */ | |
1424 | fifo = usbhsf_get_cfifo(priv); | |
e73a9891 | 1425 | fifo->name = "CFIFO"; |
d3af90a5 KM |
1426 | fifo->port = CFIFO; |
1427 | fifo->sel = CFIFOSEL; | |
1428 | fifo->ctr = CFIFOCTR; | |
1429 | ||
3a2634a5 YS |
1430 | /* DFIFO */ |
1431 | USBHS_DFIFO_INIT(priv, fifo, 0); | |
1432 | USBHS_DFIFO_INIT(priv, fifo, 1); | |
d3cf6a4b YS |
1433 | USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 2); |
1434 | USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 3); | |
e73a9891 | 1435 | |
d3af90a5 KM |
1436 | return 0; |
1437 | } | |
1438 | ||
1439 | void usbhs_fifo_remove(struct usbhs_priv *priv) | |
1440 | { | |
3a2634a5 YS |
1441 | struct usbhs_fifo *fifo; |
1442 | int i; | |
1443 | ||
1444 | usbhs_for_each_dfifo(priv, fifo, i) | |
1445 | usbhsf_dma_quit(priv, fifo); | |
d3af90a5 | 1446 | } |