Merge branch 'overlayfs-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mszer...
[linux-2.6-block.git] / drivers / usb / renesas_usbhs / fifo.c
CommitLineData
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1/*
2 * Renesas USB driver
3 *
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
15 *
16 */
17#include <linux/delay.h>
18#include <linux/io.h>
9c646cfc 19#include <linux/scatterlist.h>
cc502bb7
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20#include "common.h"
21#include "pipe.h"
e8d548d5 22
d3af90a5 23#define usbhsf_get_cfifo(p) (&((p)->fifo_info.cfifo))
5ea43994 24#define usbhsf_is_cfifo(p, f) (usbhsf_get_cfifo(p) == f)
d3af90a5 25
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26#define usbhsf_fifo_is_busy(f) ((f)->pipe) /* see usbhs_pipe_select_fifo */
27
4bd04811 28/*
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29 * packet initialize
30 */
31void usbhs_pkt_init(struct usbhs_pkt *pkt)
32{
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33 INIT_LIST_HEAD(&pkt->node);
34}
35
36/*
37 * packet control function
4bd04811 38 */
97664a20 39static int usbhsf_null_handle(struct usbhs_pkt *pkt, int *is_done)
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40{
41 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
42 struct device *dev = usbhs_priv_to_dev(priv);
43
44 dev_err(dev, "null handler\n");
45
46 return -EINVAL;
47}
48
fcb42e23 49static const struct usbhs_pkt_handle usbhsf_null_handler = {
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50 .prepare = usbhsf_null_handle,
51 .try_run = usbhsf_null_handle,
52};
53
659d4954 54void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt,
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55 void (*done)(struct usbhs_priv *priv,
56 struct usbhs_pkt *pkt),
3edeee38 57 void *buf, int len, int zero, int sequence)
6acb95d4 58{
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59 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
60 struct device *dev = usbhs_priv_to_dev(priv);
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61 unsigned long flags;
62
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63 if (!done) {
64 dev_err(dev, "no done function\n");
65 return;
66 }
67
a2c76b83
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68 /******************** spin lock ********************/
69 usbhs_lock(priv, flags);
70
0c6ef985 71 if (!pipe->handler) {
dad67397 72 dev_err(dev, "no handler function\n");
0c6ef985 73 pipe->handler = &usbhsf_null_handler;
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74 }
75
d5261286 76 list_move_tail(&pkt->node, &pipe->list);
6acb95d4 77
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78 /*
79 * each pkt must hold own handler.
80 * because handler might be changed by its situation.
81 * dma handler -> pio handler.
82 */
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83 pkt->pipe = pipe;
84 pkt->buf = buf;
0c6ef985 85 pkt->handler = pipe->handler;
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86 pkt->length = len;
87 pkt->zero = zero;
88 pkt->actual = 0;
b331872b 89 pkt->done = done;
3edeee38 90 pkt->sequence = sequence;
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91
92 usbhs_unlock(priv, flags);
93 /******************** spin unlock ******************/
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94}
95
97664a20 96static void __usbhsf_pkt_del(struct usbhs_pkt *pkt)
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97{
98 list_del_init(&pkt->node);
99}
100
97664a20 101static struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe)
6acb95d4 102{
31faf878 103 return list_first_entry_or_null(&pipe->list, struct usbhs_pkt, node);
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104}
105
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106static void usbhsf_fifo_clear(struct usbhs_pipe *pipe,
107 struct usbhs_fifo *fifo);
108static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe,
109 struct usbhs_fifo *fifo);
110static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo,
111 struct usbhs_pkt *pkt);
112#define usbhsf_dma_map(p) __usbhsf_dma_map_ctrl(p, 1)
113#define usbhsf_dma_unmap(p) __usbhsf_dma_map_ctrl(p, 0)
114static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map);
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115struct usbhs_pkt *usbhs_pkt_pop(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt)
116{
117 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
2743e7f9 118 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
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119 unsigned long flags;
120
121 /******************** spin lock ********************/
122 usbhs_lock(priv, flags);
123
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124 usbhs_pipe_disable(pipe);
125
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126 if (!pkt)
127 pkt = __usbhsf_pkt_get(pipe);
128
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129 if (pkt) {
130 struct dma_chan *chan = NULL;
131
132 if (fifo)
133 chan = usbhsf_dma_chan_get(fifo, pkt);
134 if (chan) {
135 dmaengine_terminate_all(chan);
136 usbhsf_fifo_clear(pipe, fifo);
137 usbhsf_dma_unmap(pkt);
138 }
139
97664a20 140 __usbhsf_pkt_del(pkt);
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141 }
142
143 if (fifo)
144 usbhsf_fifo_unselect(pipe, fifo);
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145
146 usbhs_unlock(priv, flags);
147 /******************** spin unlock ******************/
148
149 return pkt;
150}
151
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152enum {
153 USBHSF_PKT_PREPARE,
154 USBHSF_PKT_TRY_RUN,
155 USBHSF_PKT_DMA_DONE,
156};
157
158static int usbhsf_pkt_handler(struct usbhs_pipe *pipe, int type)
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159{
160 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
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161 struct usbhs_pkt *pkt;
162 struct device *dev = usbhs_priv_to_dev(priv);
163 int (*func)(struct usbhs_pkt *pkt, int *is_done);
164 unsigned long flags;
165 int ret = 0;
166 int is_done = 0;
167
168 /******************** spin lock ********************/
169 usbhs_lock(priv, flags);
170
171 pkt = __usbhsf_pkt_get(pipe);
172 if (!pkt)
173 goto __usbhs_pkt_handler_end;
174
175 switch (type) {
176 case USBHSF_PKT_PREPARE:
177 func = pkt->handler->prepare;
178 break;
179 case USBHSF_PKT_TRY_RUN:
180 func = pkt->handler->try_run;
181 break;
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182 case USBHSF_PKT_DMA_DONE:
183 func = pkt->handler->dma_done;
184 break;
97664a20 185 default:
984e833c 186 dev_err(dev, "unknown pkt handler\n");
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187 goto __usbhs_pkt_handler_end;
188 }
189
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190 if (likely(func))
191 ret = func(pkt, &is_done);
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192
193 if (is_done)
194 __usbhsf_pkt_del(pkt);
195
196__usbhs_pkt_handler_end:
197 usbhs_unlock(priv, flags);
198 /******************** spin unlock ******************/
199
0432eed0 200 if (is_done) {
b331872b 201 pkt->done(priv, pkt);
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202 usbhs_pkt_start(pipe);
203 }
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204
205 return ret;
206}
207
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208void usbhs_pkt_start(struct usbhs_pipe *pipe)
209{
210 usbhsf_pkt_handler(pipe, USBHSF_PKT_PREPARE);
211}
212
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213/*
214 * irq enable/disable function
215 */
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216#define usbhsf_irq_empty_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_bempsts, e)
217#define usbhsf_irq_ready_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_brdysts, e)
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218#define usbhsf_irq_callback_ctrl(pipe, status, enable) \
219 ({ \
220 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); \
221 struct usbhs_mod *mod = usbhs_mod_get_current(priv); \
222 u16 status = (1 << usbhs_pipe_number(pipe)); \
223 if (!mod) \
224 return; \
225 if (enable) \
3192fcb2 226 mod->status |= status; \
659d4954 227 else \
3192fcb2 228 mod->status &= ~status; \
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229 usbhs_irq_callback_update(priv, mod); \
230 })
231
232static void usbhsf_tx_irq_ctrl(struct usbhs_pipe *pipe, int enable)
233{
234 /*
235 * And DCP pipe can NOT use "ready interrupt" for "send"
236 * it should use "empty" interrupt.
237 * see
238 * "Operation" - "Interrupt Function" - "BRDY Interrupt"
239 *
240 * on the other hand, normal pipe can use "ready interrupt" for "send"
241 * even though it is single/double buffer
242 */
243 if (usbhs_pipe_is_dcp(pipe))
244 usbhsf_irq_empty_ctrl(pipe, enable);
245 else
246 usbhsf_irq_ready_ctrl(pipe, enable);
247}
248
249static void usbhsf_rx_irq_ctrl(struct usbhs_pipe *pipe, int enable)
250{
251 usbhsf_irq_ready_ctrl(pipe, enable);
252}
253
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254/*
255 * FIFO ctrl
256 */
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257static void usbhsf_send_terminator(struct usbhs_pipe *pipe,
258 struct usbhs_fifo *fifo)
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259{
260 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
261
d3af90a5 262 usbhs_bset(priv, fifo->ctr, BVAL, BVAL);
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263}
264
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265static int usbhsf_fifo_barrier(struct usbhs_priv *priv,
266 struct usbhs_fifo *fifo)
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267{
268 int timeout = 1024;
269
270 do {
271 /* The FIFO port is accessible */
d3af90a5 272 if (usbhs_read(priv, fifo->ctr) & FRDY)
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273 return 0;
274
275 udelay(10);
276 } while (timeout--);
277
278 return -EBUSY;
279}
280
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281static void usbhsf_fifo_clear(struct usbhs_pipe *pipe,
282 struct usbhs_fifo *fifo)
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283{
284 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
285
286 if (!usbhs_pipe_is_dcp(pipe))
d3af90a5 287 usbhsf_fifo_barrier(priv, fifo);
e8d548d5 288
d3af90a5 289 usbhs_write(priv, fifo->ctr, BCLR);
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290}
291
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292static int usbhsf_fifo_rcv_len(struct usbhs_priv *priv,
293 struct usbhs_fifo *fifo)
e8d548d5 294{
d3af90a5 295 return usbhs_read(priv, fifo->ctr) & DTLN_MASK;
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296}
297
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298static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe,
299 struct usbhs_fifo *fifo)
300{
301 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
302
303 usbhs_pipe_select_fifo(pipe, NULL);
304 usbhs_write(priv, fifo->sel, 0);
305}
306
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307static int usbhsf_fifo_select(struct usbhs_pipe *pipe,
308 struct usbhs_fifo *fifo,
309 int write)
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310{
311 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
312 struct device *dev = usbhs_priv_to_dev(priv);
313 int timeout = 1024;
314 u16 mask = ((1 << 5) | 0xF); /* mask of ISEL | CURPIPE */
315 u16 base = usbhs_pipe_number(pipe); /* CURPIPE */
316
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317 if (usbhs_pipe_is_busy(pipe) ||
318 usbhsf_fifo_is_busy(fifo))
319 return -EBUSY;
320
92352071 321 if (usbhs_pipe_is_dcp(pipe)) {
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322 base |= (1 == write) << 5; /* ISEL */
323
92352071
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324 if (usbhs_mod_is_host(priv))
325 usbhs_dcp_dir_for_host(pipe, write);
326 }
327
e8d548d5 328 /* "base" will be used below */
5ea43994
SY
329 if (usbhs_get_dparam(priv, has_sudmac) && !usbhsf_is_cfifo(priv, fifo))
330 usbhs_write(priv, fifo->sel, base);
331 else
332 usbhs_write(priv, fifo->sel, base | MBW_32);
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333
334 /* check ISEL and CURPIPE value */
335 while (timeout--) {
d77e3f4e
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336 if (base == (mask & usbhs_read(priv, fifo->sel))) {
337 usbhs_pipe_select_fifo(pipe, fifo);
e8d548d5 338 return 0;
d77e3f4e 339 }
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340 udelay(10);
341 }
342
343 dev_err(dev, "fifo select error\n");
344
345 return -EIO;
346}
347
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348/*
349 * DCP status stage
350 */
351static int usbhs_dcp_dir_switch_to_write(struct usbhs_pkt *pkt, int *is_done)
352{
353 struct usbhs_pipe *pipe = pkt->pipe;
354 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
355 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
356 struct device *dev = usbhs_priv_to_dev(priv);
357 int ret;
358
359 usbhs_pipe_disable(pipe);
360
361 ret = usbhsf_fifo_select(pipe, fifo, 1);
362 if (ret < 0) {
363 dev_err(dev, "%s() faile\n", __func__);
364 return ret;
365 }
366
367 usbhs_pipe_sequence_data1(pipe); /* DATA1 */
368
369 usbhsf_fifo_clear(pipe, fifo);
370 usbhsf_send_terminator(pipe, fifo);
371
372 usbhsf_fifo_unselect(pipe, fifo);
373
374 usbhsf_tx_irq_ctrl(pipe, 1);
375 usbhs_pipe_enable(pipe);
376
377 return ret;
378}
379
380static int usbhs_dcp_dir_switch_to_read(struct usbhs_pkt *pkt, int *is_done)
381{
382 struct usbhs_pipe *pipe = pkt->pipe;
383 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
384 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
385 struct device *dev = usbhs_priv_to_dev(priv);
386 int ret;
387
388 usbhs_pipe_disable(pipe);
389
390 ret = usbhsf_fifo_select(pipe, fifo, 0);
391 if (ret < 0) {
392 dev_err(dev, "%s() fail\n", __func__);
393 return ret;
394 }
395
396 usbhs_pipe_sequence_data1(pipe); /* DATA1 */
397 usbhsf_fifo_clear(pipe, fifo);
398
399 usbhsf_fifo_unselect(pipe, fifo);
400
401 usbhsf_rx_irq_ctrl(pipe, 1);
402 usbhs_pipe_enable(pipe);
403
404 return ret;
405
406}
407
408static int usbhs_dcp_dir_switch_done(struct usbhs_pkt *pkt, int *is_done)
409{
410 struct usbhs_pipe *pipe = pkt->pipe;
411
412 if (pkt->handler == &usbhs_dcp_status_stage_in_handler)
413 usbhsf_tx_irq_ctrl(pipe, 0);
414 else
415 usbhsf_rx_irq_ctrl(pipe, 0);
416
417 pkt->actual = pkt->length;
418 *is_done = 1;
419
420 return 0;
421}
422
fcb42e23 423const struct usbhs_pkt_handle usbhs_dcp_status_stage_in_handler = {
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424 .prepare = usbhs_dcp_dir_switch_to_write,
425 .try_run = usbhs_dcp_dir_switch_done,
426};
427
fcb42e23 428const struct usbhs_pkt_handle usbhs_dcp_status_stage_out_handler = {
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429 .prepare = usbhs_dcp_dir_switch_to_read,
430 .try_run = usbhs_dcp_dir_switch_done,
431};
432
433/*
434 * DCP data stage (push)
435 */
436static int usbhsf_dcp_data_stage_try_push(struct usbhs_pkt *pkt, int *is_done)
437{
438 struct usbhs_pipe *pipe = pkt->pipe;
439
440 usbhs_pipe_sequence_data1(pipe); /* DATA1 */
441
442 /*
443 * change handler to PIO push
444 */
445 pkt->handler = &usbhs_fifo_pio_push_handler;
446
447 return pkt->handler->prepare(pkt, is_done);
448}
449
fcb42e23 450const struct usbhs_pkt_handle usbhs_dcp_data_stage_out_handler = {
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451 .prepare = usbhsf_dcp_data_stage_try_push,
452};
453
454/*
455 * DCP data stage (pop)
456 */
457static int usbhsf_dcp_data_stage_prepare_pop(struct usbhs_pkt *pkt,
458 int *is_done)
459{
460 struct usbhs_pipe *pipe = pkt->pipe;
461 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
462 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv);
463
464 if (usbhs_pipe_is_busy(pipe))
465 return 0;
466
467 /*
468 * prepare pop for DCP should
469 * - change DCP direction,
470 * - clear fifo
471 * - DATA1
472 */
473 usbhs_pipe_disable(pipe);
474
475 usbhs_pipe_sequence_data1(pipe); /* DATA1 */
476
477 usbhsf_fifo_select(pipe, fifo, 0);
478 usbhsf_fifo_clear(pipe, fifo);
479 usbhsf_fifo_unselect(pipe, fifo);
480
481 /*
482 * change handler to PIO pop
483 */
484 pkt->handler = &usbhs_fifo_pio_pop_handler;
485
486 return pkt->handler->prepare(pkt, is_done);
487}
488
fcb42e23 489const struct usbhs_pkt_handle usbhs_dcp_data_stage_in_handler = {
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490 .prepare = usbhsf_dcp_data_stage_prepare_pop,
491};
492
e8d548d5 493/*
233f519d 494 * PIO push handler
e8d548d5 495 */
0cb7e61d 496static int usbhsf_pio_try_push(struct usbhs_pkt *pkt, int *is_done)
e8d548d5 497{
4bd04811 498 struct usbhs_pipe *pipe = pkt->pipe;
e8d548d5 499 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
659d4954 500 struct device *dev = usbhs_priv_to_dev(priv);
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501 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
502 void __iomem *addr = priv->base + fifo->port;
659d4954 503 u8 *buf;
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504 int maxp = usbhs_pipe_get_maxpacket(pipe);
505 int total_len;
4bd04811 506 int i, ret, len;
97664a20 507 int is_short;
e8d548d5 508
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509 usbhs_pipe_data_sequence(pipe, pkt->sequence);
510 pkt->sequence = -1; /* -1 sequence will be ignored */
511
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512 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length);
513
d3af90a5 514 ret = usbhsf_fifo_select(pipe, fifo, 1);
e8d548d5 515 if (ret < 0)
d77e3f4e 516 return 0;
e8d548d5 517
dad67397 518 ret = usbhs_pipe_is_accessible(pipe);
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519 if (ret < 0) {
520 /* inaccessible pipe is not an error */
521 ret = 0;
659d4954 522 goto usbhs_fifo_write_busy;
4ef85e0f 523 }
e8d548d5 524
d3af90a5 525 ret = usbhsf_fifo_barrier(priv, fifo);
e8d548d5 526 if (ret < 0)
659d4954 527 goto usbhs_fifo_write_busy;
e8d548d5 528
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529 buf = pkt->buf + pkt->actual;
530 len = pkt->length - pkt->actual;
531 len = min(len, maxp);
532 total_len = len;
533 is_short = total_len < maxp;
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534
535 /*
536 * FIXME
537 *
538 * 32-bit access only
539 */
659d4954 540 if (len >= 4 && !((unsigned long)buf & 0x03)) {
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541 iowrite32_rep(addr, buf, len / 4);
542 len %= 4;
543 buf += total_len - len;
544 }
545
546 /* the rest operation */
547 for (i = 0; i < len; i++)
548 iowrite8(buf[i], addr + (0x03 - (i & 0x03)));
549
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550 /*
551 * variable update
552 */
553 pkt->actual += total_len;
554
555 if (pkt->actual < pkt->length)
97664a20 556 *is_done = 0; /* there are remainder data */
659d4954 557 else if (is_short)
97664a20 558 *is_done = 1; /* short packet */
659d4954 559 else
97664a20 560 *is_done = !pkt->zero; /* send zero packet ? */
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561
562 /*
563 * pipe/irq handling
564 */
565 if (is_short)
d3af90a5 566 usbhsf_send_terminator(pipe, fifo);
e8d548d5 567
97664a20 568 usbhsf_tx_irq_ctrl(pipe, !*is_done);
8355b2b3 569 usbhs_pipe_running(pipe, !*is_done);
4bd04811
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570 usbhs_pipe_enable(pipe);
571
659d4954
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572 dev_dbg(dev, " send %d (%d/ %d/ %d/ %d)\n",
573 usbhs_pipe_number(pipe),
97664a20 574 pkt->length, pkt->actual, *is_done, pkt->zero);
659d4954 575
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576 usbhsf_fifo_unselect(pipe, fifo);
577
4bd04811 578 return 0;
659d4954
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579
580usbhs_fifo_write_busy:
d77e3f4e
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581 usbhsf_fifo_unselect(pipe, fifo);
582
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583 /*
584 * pipe is busy.
585 * retry in interrupt
586 */
587 usbhsf_tx_irq_ctrl(pipe, 1);
8355b2b3 588 usbhs_pipe_running(pipe, 1);
659d4954
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589
590 return ret;
e8d548d5
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591}
592
8355b2b3
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593static int usbhsf_pio_prepare_push(struct usbhs_pkt *pkt, int *is_done)
594{
595 if (usbhs_pipe_is_running(pkt->pipe))
596 return 0;
597
598 return usbhsf_pio_try_push(pkt, is_done);
599}
600
fcb42e23 601const struct usbhs_pkt_handle usbhs_fifo_pio_push_handler = {
8355b2b3 602 .prepare = usbhsf_pio_prepare_push,
0cb7e61d 603 .try_run = usbhsf_pio_try_push,
dad67397
KM
604};
605
233f519d
KM
606/*
607 * PIO pop handler
608 */
97664a20 609static int usbhsf_prepare_pop(struct usbhs_pkt *pkt, int *is_done)
e8d548d5 610{
dad67397 611 struct usbhs_pipe *pipe = pkt->pipe;
e73d42f1
KM
612 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
613 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv);
d77e3f4e
KM
614
615 if (usbhs_pipe_is_busy(pipe))
616 return 0;
e8d548d5 617
8355b2b3
YS
618 if (usbhs_pipe_is_running(pipe))
619 return 0;
620
e8d548d5 621 /*
d77e3f4e 622 * pipe enable to prepare packet receive
e8d548d5 623 */
3edeee38
KM
624 usbhs_pipe_data_sequence(pipe, pkt->sequence);
625 pkt->sequence = -1; /* -1 sequence will be ignored */
e8d548d5 626
e73d42f1
KM
627 if (usbhs_pipe_is_dcp(pipe))
628 usbhsf_fifo_clear(pipe, fifo);
629
1c90ee0b 630 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length);
e8d548d5 631 usbhs_pipe_enable(pipe);
8355b2b3 632 usbhs_pipe_running(pipe, 1);
659d4954 633 usbhsf_rx_irq_ctrl(pipe, 1);
e8d548d5 634
d3af90a5 635 return 0;
e8d548d5
KM
636}
637
0cb7e61d 638static int usbhsf_pio_try_pop(struct usbhs_pkt *pkt, int *is_done)
e8d548d5 639{
4bd04811 640 struct usbhs_pipe *pipe = pkt->pipe;
e8d548d5 641 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
659d4954 642 struct device *dev = usbhs_priv_to_dev(priv);
d3af90a5
KM
643 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
644 void __iomem *addr = priv->base + fifo->port;
659d4954
KM
645 u8 *buf;
646 u32 data = 0;
647 int maxp = usbhs_pipe_get_maxpacket(pipe);
4bd04811 648 int rcv_len, len;
e8d548d5 649 int i, ret;
4bd04811 650 int total_len = 0;
e8d548d5 651
d3af90a5 652 ret = usbhsf_fifo_select(pipe, fifo, 0);
e8d548d5 653 if (ret < 0)
d77e3f4e 654 return 0;
e8d548d5 655
d3af90a5 656 ret = usbhsf_fifo_barrier(priv, fifo);
e8d548d5 657 if (ret < 0)
d77e3f4e 658 goto usbhs_fifo_read_busy;
e8d548d5 659
d3af90a5 660 rcv_len = usbhsf_fifo_rcv_len(priv, fifo);
e8d548d5 661
659d4954
KM
662 buf = pkt->buf + pkt->actual;
663 len = pkt->length - pkt->actual;
664 len = min(len, rcv_len);
665 total_len = len;
666
6ff5d09b
KM
667 /*
668 * update actual length first here to decide disable pipe.
669 * if this pipe keeps BUF status and all data were popped,
670 * then, next interrupt/token will be issued again
671 */
672 pkt->actual += total_len;
673
674 if ((pkt->actual == pkt->length) || /* receive all data */
675 (total_len < maxp)) { /* short packet */
676 *is_done = 1;
677 usbhsf_rx_irq_ctrl(pipe, 0);
8355b2b3 678 usbhs_pipe_running(pipe, 0);
93fb9127
YS
679 /*
680 * If function mode, since this controller is possible to enter
681 * Control Write status stage at this timing, this driver
682 * should not disable the pipe. If such a case happens, this
683 * controller is not able to complete the status stage.
684 */
685 if (!usbhs_mod_is_host(priv) && !usbhs_pipe_is_dcp(pipe))
686 usbhs_pipe_disable(pipe); /* disable pipe first */
6ff5d09b
KM
687 }
688
e8d548d5
KM
689 /*
690 * Buffer clear if Zero-Length packet
691 *
692 * see
693 * "Operation" - "FIFO Buffer Memory" - "FIFO Port Function"
694 */
695 if (0 == rcv_len) {
3edeee38 696 pkt->zero = 1;
d3af90a5 697 usbhsf_fifo_clear(pipe, fifo);
4bd04811 698 goto usbhs_fifo_read_end;
e8d548d5
KM
699 }
700
e8d548d5
KM
701 /*
702 * FIXME
703 *
704 * 32-bit access only
705 */
659d4954 706 if (len >= 4 && !((unsigned long)buf & 0x03)) {
e8d548d5
KM
707 ioread32_rep(addr, buf, len / 4);
708 len %= 4;
659d4954 709 buf += total_len - len;
e8d548d5
KM
710 }
711
712 /* the rest operation */
713 for (i = 0; i < len; i++) {
714 if (!(i & 0x03))
715 data = ioread32(addr);
716
717 buf[i] = (data >> ((i & 0x03) * 8)) & 0xff;
718 }
719
4bd04811 720usbhs_fifo_read_end:
97664a20
KM
721 dev_dbg(dev, " recv %d (%d/ %d/ %d/ %d)\n",
722 usbhs_pipe_number(pipe),
723 pkt->length, pkt->actual, *is_done, pkt->zero);
724
d77e3f4e
KM
725usbhs_fifo_read_busy:
726 usbhsf_fifo_unselect(pipe, fifo);
727
728 return ret;
e8d548d5 729}
dad67397 730
fcb42e23 731const struct usbhs_pkt_handle usbhs_fifo_pio_pop_handler = {
dad67397 732 .prepare = usbhsf_prepare_pop,
0cb7e61d 733 .try_run = usbhsf_pio_try_pop,
dad67397
KM
734};
735
736/*
233f519d 737 * DCP ctrol statge handler
dad67397 738 */
97664a20 739static int usbhsf_ctrl_stage_end(struct usbhs_pkt *pkt, int *is_done)
dad67397 740{
97664a20 741 usbhs_dcp_control_transfer_done(pkt->pipe);
dad67397 742
97664a20 743 *is_done = 1;
dad67397
KM
744
745 return 0;
746}
747
fcb42e23 748const struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler = {
dad67397
KM
749 .prepare = usbhsf_ctrl_stage_end,
750 .try_run = usbhsf_ctrl_stage_end,
751};
752
e73a9891
KM
753/*
754 * DMA fifo functions
755 */
756static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo,
757 struct usbhs_pkt *pkt)
758{
759 if (&usbhs_fifo_dma_push_handler == pkt->handler)
760 return fifo->tx_chan;
761
762 if (&usbhs_fifo_dma_pop_handler == pkt->handler)
763 return fifo->rx_chan;
764
765 return NULL;
766}
767
768static struct usbhs_fifo *usbhsf_get_dma_fifo(struct usbhs_priv *priv,
769 struct usbhs_pkt *pkt)
770{
771 struct usbhs_fifo *fifo;
3a2634a5 772 int i;
e73a9891 773
3a2634a5
YS
774 usbhs_for_each_dfifo(priv, fifo, i) {
775 if (usbhsf_dma_chan_get(fifo, pkt) &&
776 !usbhsf_fifo_is_busy(fifo))
777 return fifo;
778 }
e73a9891
KM
779
780 return NULL;
781}
782
783#define usbhsf_dma_start(p, f) __usbhsf_dma_ctrl(p, f, DREQE)
784#define usbhsf_dma_stop(p, f) __usbhsf_dma_ctrl(p, f, 0)
785static void __usbhsf_dma_ctrl(struct usbhs_pipe *pipe,
786 struct usbhs_fifo *fifo,
787 u16 dreqe)
788{
789 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
790
791 usbhs_bset(priv, fifo->sel, DREQE, dreqe);
792}
793
e73a9891
KM
794static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map)
795{
796 struct usbhs_pipe *pipe = pkt->pipe;
797 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
798 struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv);
c3cdcac7
YS
799 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
800 struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt);
e73a9891 801
c3cdcac7 802 return info->dma_map_ctrl(chan->device->dev, pkt, map);
e73a9891
KM
803}
804
805static void usbhsf_dma_complete(void *arg);
6e4b74e4 806static void xfer_work(struct work_struct *work)
e73a9891 807{
6e4b74e4 808 struct usbhs_pkt *pkt = container_of(work, struct usbhs_pkt, work);
e73a9891 809 struct usbhs_pipe *pipe = pkt->pipe;
4fdef698 810 struct usbhs_fifo *fifo;
e73a9891 811 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
e73a9891 812 struct dma_async_tx_descriptor *desc;
4fdef698 813 struct dma_chan *chan;
e73a9891 814 struct device *dev = usbhs_priv_to_dev(priv);
55ba4e5e 815 enum dma_transfer_direction dir;
4fdef698
YS
816 unsigned long flags;
817
818 usbhs_lock(priv, flags);
819 fifo = usbhs_pipe_to_fifo(pipe);
820 if (!fifo)
821 goto xfer_work_end;
e73a9891 822
4fdef698 823 chan = usbhsf_dma_chan_get(fifo, pkt);
55ba4e5e 824 dir = usbhs_pipe_is_dir_in(pipe) ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV;
e73a9891 825
2f0de9d8
KM
826 desc = dmaengine_prep_slave_single(chan, pkt->dma + pkt->actual,
827 pkt->trans, dir,
16052827 828 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
e73a9891 829 if (!desc)
4fdef698 830 goto xfer_work_end;
e73a9891
KM
831
832 desc->callback = usbhsf_dma_complete;
833 desc->callback_param = pipe;
834
ab330cf3
YS
835 pkt->cookie = dmaengine_submit(desc);
836 if (pkt->cookie < 0) {
e73a9891 837 dev_err(dev, "Failed to submit dma descriptor\n");
4fdef698 838 goto xfer_work_end;
e73a9891
KM
839 }
840
841 dev_dbg(dev, " %s %d (%d/ %d)\n",
842 fifo->name, usbhs_pipe_number(pipe), pkt->length, pkt->zero);
843
8355b2b3 844 usbhs_pipe_running(pipe, 1);
e73a9891 845 usbhsf_dma_start(pipe, fifo);
9b53d9af 846 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->trans);
e73a9891 847 dma_async_issue_pending(chan);
9b53d9af 848 usbhs_pipe_enable(pipe);
4fdef698
YS
849
850xfer_work_end:
851 usbhs_unlock(priv, flags);
e73a9891
KM
852}
853
233f519d
KM
854/*
855 * DMA push handler
856 */
e73a9891
KM
857static int usbhsf_dma_prepare_push(struct usbhs_pkt *pkt, int *is_done)
858{
859 struct usbhs_pipe *pipe = pkt->pipe;
860 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
861 struct usbhs_fifo *fifo;
862 int len = pkt->length - pkt->actual;
863 int ret;
ab330cf3 864 uintptr_t align_mask;
e73a9891
KM
865
866 if (usbhs_pipe_is_busy(pipe))
867 return 0;
868
869 /* use PIO if packet is less than pio_dma_border or pipe is DCP */
870 if ((len < usbhs_get_dparam(priv, pio_dma_border)) ||
700aa7ff 871 usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC))
e73a9891
KM
872 goto usbhsf_pio_prepare_push;
873
ab330cf3
YS
874 /* check data length if this driver don't use USB-DMAC */
875 if (!usbhs_get_dparam(priv, has_usb_dmac) && len & 0x7)
e73a9891
KM
876 goto usbhsf_pio_prepare_push;
877
ab330cf3
YS
878 /* check buffer alignment */
879 align_mask = usbhs_get_dparam(priv, has_usb_dmac) ?
880 USBHS_USB_DMAC_XFER_SIZE - 1 : 0x7;
881 if ((uintptr_t)(pkt->buf + pkt->actual) & align_mask)
9a12d097
KM
882 goto usbhsf_pio_prepare_push;
883
8355b2b3
YS
884 /* return at this time if the pipe is running */
885 if (usbhs_pipe_is_running(pipe))
886 return 0;
887
e73a9891
KM
888 /* get enable DMA fifo */
889 fifo = usbhsf_get_dma_fifo(priv, pkt);
890 if (!fifo)
891 goto usbhsf_pio_prepare_push;
892
e73a9891
KM
893 ret = usbhsf_fifo_select(pipe, fifo, 0);
894 if (ret < 0)
e789ece1
YS
895 goto usbhsf_pio_prepare_push;
896
897 if (usbhsf_dma_map(pkt) < 0)
898 goto usbhsf_pio_prepare_push_unselect;
e73a9891
KM
899
900 pkt->trans = len;
901
6490865c 902 usbhsf_tx_irq_ctrl(pipe, 0);
6e4b74e4
GL
903 INIT_WORK(&pkt->work, xfer_work);
904 schedule_work(&pkt->work);
e73a9891
KM
905
906 return 0;
907
e789ece1
YS
908usbhsf_pio_prepare_push_unselect:
909 usbhsf_fifo_unselect(pipe, fifo);
e73a9891
KM
910usbhsf_pio_prepare_push:
911 /*
912 * change handler to PIO
913 */
914 pkt->handler = &usbhs_fifo_pio_push_handler;
915
916 return pkt->handler->prepare(pkt, is_done);
917}
918
919static int usbhsf_dma_push_done(struct usbhs_pkt *pkt, int *is_done)
920{
921 struct usbhs_pipe *pipe = pkt->pipe;
c0ed8b23 922 int is_short = pkt->trans % usbhs_pipe_get_maxpacket(pipe);
e73a9891 923
c0ed8b23
YS
924 pkt->actual += pkt->trans;
925
926 if (pkt->actual < pkt->length)
927 *is_done = 0; /* there are remainder data */
928 else if (is_short)
929 *is_done = 1; /* short packet */
930 else
931 *is_done = !pkt->zero; /* send zero packet? */
e73a9891 932
8355b2b3 933 usbhs_pipe_running(pipe, !*is_done);
e73a9891
KM
934
935 usbhsf_dma_stop(pipe, pipe->fifo);
936 usbhsf_dma_unmap(pkt);
937 usbhsf_fifo_unselect(pipe, pipe->fifo);
938
c0ed8b23
YS
939 if (!*is_done) {
940 /* change handler to PIO */
941 pkt->handler = &usbhs_fifo_pio_push_handler;
942 return pkt->handler->try_run(pkt, is_done);
943 }
944
e73a9891
KM
945 return 0;
946}
947
fcb42e23 948const struct usbhs_pkt_handle usbhs_fifo_dma_push_handler = {
e73a9891
KM
949 .prepare = usbhsf_dma_prepare_push,
950 .dma_done = usbhsf_dma_push_done,
951};
952
233f519d
KM
953/*
954 * DMA pop handler
955 */
ab330cf3
YS
956
957static int usbhsf_dma_prepare_pop_with_rx_irq(struct usbhs_pkt *pkt,
958 int *is_done)
959{
960 return usbhsf_prepare_pop(pkt, is_done);
961}
962
963static int usbhsf_dma_prepare_pop_with_usb_dmac(struct usbhs_pkt *pkt,
964 int *is_done)
965{
966 struct usbhs_pipe *pipe = pkt->pipe;
967 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
968 struct usbhs_fifo *fifo;
969 int ret;
970
971 if (usbhs_pipe_is_busy(pipe))
972 return 0;
973
974 /* use PIO if packet is less than pio_dma_border or pipe is DCP */
975 if ((pkt->length < usbhs_get_dparam(priv, pio_dma_border)) ||
700aa7ff 976 usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC))
ab330cf3
YS
977 goto usbhsf_pio_prepare_pop;
978
979 fifo = usbhsf_get_dma_fifo(priv, pkt);
980 if (!fifo)
981 goto usbhsf_pio_prepare_pop;
982
983 if ((uintptr_t)pkt->buf & (USBHS_USB_DMAC_XFER_SIZE - 1))
984 goto usbhsf_pio_prepare_pop;
985
986 usbhs_pipe_config_change_bfre(pipe, 1);
987
988 ret = usbhsf_fifo_select(pipe, fifo, 0);
989 if (ret < 0)
990 goto usbhsf_pio_prepare_pop;
991
992 if (usbhsf_dma_map(pkt) < 0)
993 goto usbhsf_pio_prepare_pop_unselect;
994
995 /* DMA */
996
997 /*
998 * usbhs_fifo_dma_pop_handler :: prepare
999 * enabled irq to come here.
1000 * but it is no longer needed for DMA. disable it.
1001 */
1002 usbhsf_rx_irq_ctrl(pipe, 0);
1003
1004 pkt->trans = pkt->length;
1005
1006 INIT_WORK(&pkt->work, xfer_work);
1007 schedule_work(&pkt->work);
1008
1009 return 0;
1010
1011usbhsf_pio_prepare_pop_unselect:
1012 usbhsf_fifo_unselect(pipe, fifo);
1013usbhsf_pio_prepare_pop:
1014
1015 /*
1016 * change handler to PIO
1017 */
1018 pkt->handler = &usbhs_fifo_pio_pop_handler;
1019 usbhs_pipe_config_change_bfre(pipe, 0);
1020
1021 return pkt->handler->prepare(pkt, is_done);
1022}
1023
1024static int usbhsf_dma_prepare_pop(struct usbhs_pkt *pkt, int *is_done)
1025{
1026 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
1027
1028 if (usbhs_get_dparam(priv, has_usb_dmac))
1029 return usbhsf_dma_prepare_pop_with_usb_dmac(pkt, is_done);
1030 else
1031 return usbhsf_dma_prepare_pop_with_rx_irq(pkt, is_done);
1032}
1033
1034static int usbhsf_dma_try_pop_with_rx_irq(struct usbhs_pkt *pkt, int *is_done)
e73a9891
KM
1035{
1036 struct usbhs_pipe *pipe = pkt->pipe;
1037 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
1038 struct usbhs_fifo *fifo;
1039 int len, ret;
1040
1041 if (usbhs_pipe_is_busy(pipe))
1042 return 0;
1043
1044 if (usbhs_pipe_is_dcp(pipe))
1045 goto usbhsf_pio_prepare_pop;
1046
1047 /* get enable DMA fifo */
1048 fifo = usbhsf_get_dma_fifo(priv, pkt);
1049 if (!fifo)
1050 goto usbhsf_pio_prepare_pop;
1051
c9ae0c91 1052 if ((uintptr_t)(pkt->buf + pkt->actual) & 0x7) /* 8byte alignment */
9a12d097
KM
1053 goto usbhsf_pio_prepare_pop;
1054
e73a9891
KM
1055 ret = usbhsf_fifo_select(pipe, fifo, 0);
1056 if (ret < 0)
1057 goto usbhsf_pio_prepare_pop;
1058
1059 /* use PIO if packet is less than pio_dma_border */
1060 len = usbhsf_fifo_rcv_len(priv, fifo);
1061 len = min(pkt->length - pkt->actual, len);
77975eec 1062 if (len & 0x7) /* 8byte alignment */
e73a9891
KM
1063 goto usbhsf_pio_prepare_pop_unselect;
1064
1065 if (len < usbhs_get_dparam(priv, pio_dma_border))
1066 goto usbhsf_pio_prepare_pop_unselect;
1067
1068 ret = usbhsf_fifo_barrier(priv, fifo);
1069 if (ret < 0)
1070 goto usbhsf_pio_prepare_pop_unselect;
1071
1072 if (usbhsf_dma_map(pkt) < 0)
1073 goto usbhsf_pio_prepare_pop_unselect;
1074
1075 /* DMA */
1076
1077 /*
1078 * usbhs_fifo_dma_pop_handler :: prepare
1079 * enabled irq to come here.
1080 * but it is no longer needed for DMA. disable it.
1081 */
1082 usbhsf_rx_irq_ctrl(pipe, 0);
1083
1084 pkt->trans = len;
1085
6e4b74e4
GL
1086 INIT_WORK(&pkt->work, xfer_work);
1087 schedule_work(&pkt->work);
e73a9891
KM
1088
1089 return 0;
1090
1091usbhsf_pio_prepare_pop_unselect:
1092 usbhsf_fifo_unselect(pipe, fifo);
1093usbhsf_pio_prepare_pop:
1094
1095 /*
1096 * change handler to PIO
1097 */
1098 pkt->handler = &usbhs_fifo_pio_pop_handler;
1099
1100 return pkt->handler->try_run(pkt, is_done);
1101}
1102
ab330cf3
YS
1103static int usbhsf_dma_try_pop(struct usbhs_pkt *pkt, int *is_done)
1104{
1105 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
1106
1107 BUG_ON(usbhs_get_dparam(priv, has_usb_dmac));
1108
1109 return usbhsf_dma_try_pop_with_rx_irq(pkt, is_done);
1110}
1111
1112static int usbhsf_dma_pop_done_with_rx_irq(struct usbhs_pkt *pkt, int *is_done)
e73a9891
KM
1113{
1114 struct usbhs_pipe *pipe = pkt->pipe;
1115 int maxp = usbhs_pipe_get_maxpacket(pipe);
1116
1117 usbhsf_dma_stop(pipe, pipe->fifo);
1118 usbhsf_dma_unmap(pkt);
1119 usbhsf_fifo_unselect(pipe, pipe->fifo);
1120
1121 pkt->actual += pkt->trans;
1122
1123 if ((pkt->actual == pkt->length) || /* receive all data */
1124 (pkt->trans < maxp)) { /* short packet */
1125 *is_done = 1;
8355b2b3 1126 usbhs_pipe_running(pipe, 0);
e73a9891
KM
1127 } else {
1128 /* re-enable */
8355b2b3 1129 usbhs_pipe_running(pipe, 0);
e73a9891
KM
1130 usbhsf_prepare_pop(pkt, is_done);
1131 }
1132
1133 return 0;
1134}
1135
ab330cf3
YS
1136static size_t usbhs_dma_calc_received_size(struct usbhs_pkt *pkt,
1137 struct dma_chan *chan, int dtln)
1138{
1139 struct usbhs_pipe *pipe = pkt->pipe;
1140 struct dma_tx_state state;
1141 size_t received_size;
1142 int maxp = usbhs_pipe_get_maxpacket(pipe);
1143
1144 dmaengine_tx_status(chan, pkt->cookie, &state);
1145 received_size = pkt->length - state.residue;
1146
1147 if (dtln) {
1148 received_size -= USBHS_USB_DMAC_XFER_SIZE;
1149 received_size &= ~(maxp - 1);
1150 received_size += dtln;
1151 }
1152
1153 return received_size;
1154}
1155
1156static int usbhsf_dma_pop_done_with_usb_dmac(struct usbhs_pkt *pkt,
1157 int *is_done)
1158{
1159 struct usbhs_pipe *pipe = pkt->pipe;
1160 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
1161 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
1162 struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt);
1163 int rcv_len;
1164
1165 /*
1166 * Since the driver disables rx_irq in DMA mode, the interrupt handler
1167 * cannot the BRDYSTS. So, the function clears it here because the
1168 * driver may use PIO mode next time.
1169 */
1170 usbhs_xxxsts_clear(priv, BRDYSTS, usbhs_pipe_number(pipe));
1171
1172 rcv_len = usbhsf_fifo_rcv_len(priv, fifo);
1173 usbhsf_fifo_clear(pipe, fifo);
1174 pkt->actual = usbhs_dma_calc_received_size(pkt, chan, rcv_len);
1175
1176 usbhsf_dma_stop(pipe, fifo);
1177 usbhsf_dma_unmap(pkt);
1178 usbhsf_fifo_unselect(pipe, pipe->fifo);
1179
1180 /* The driver can assume the rx transaction is always "done" */
1181 *is_done = 1;
1182
1183 return 0;
1184}
1185
1186static int usbhsf_dma_pop_done(struct usbhs_pkt *pkt, int *is_done)
1187{
1188 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
1189
1190 if (usbhs_get_dparam(priv, has_usb_dmac))
1191 return usbhsf_dma_pop_done_with_usb_dmac(pkt, is_done);
1192 else
1193 return usbhsf_dma_pop_done_with_rx_irq(pkt, is_done);
1194}
1195
fcb42e23 1196const struct usbhs_pkt_handle usbhs_fifo_dma_pop_handler = {
ab330cf3 1197 .prepare = usbhsf_dma_prepare_pop,
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1198 .try_run = usbhsf_dma_try_pop,
1199 .dma_done = usbhsf_dma_pop_done
1200};
1201
1202/*
1203 * DMA setting
1204 */
1205static bool usbhsf_dma_filter(struct dma_chan *chan, void *param)
1206{
1207 struct sh_dmae_slave *slave = param;
1208
1209 /*
1210 * FIXME
1211 *
1212 * usbhs doesn't recognize id = 0 as valid DMA
1213 */
f19b7e0d 1214 if (0 == slave->shdma_slave.slave_id)
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1215 return false;
1216
1217 chan->private = slave;
1218
1219 return true;
1220}
1221
1222static void usbhsf_dma_quit(struct usbhs_priv *priv, struct usbhs_fifo *fifo)
1223{
1224 if (fifo->tx_chan)
1225 dma_release_channel(fifo->tx_chan);
1226 if (fifo->rx_chan)
1227 dma_release_channel(fifo->rx_chan);
1228
1229 fifo->tx_chan = NULL;
1230 fifo->rx_chan = NULL;
1231}
1232
6e3f53ab 1233static void usbhsf_dma_init_pdev(struct usbhs_fifo *fifo)
e73a9891 1234{
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1235 dma_cap_mask_t mask;
1236
1237 dma_cap_zero(mask);
1238 dma_cap_set(DMA_SLAVE, mask);
1239 fifo->tx_chan = dma_request_channel(mask, usbhsf_dma_filter,
1240 &fifo->tx_slave);
1241
1242 dma_cap_zero(mask);
1243 dma_cap_set(DMA_SLAVE, mask);
1244 fifo->rx_chan = dma_request_channel(mask, usbhsf_dma_filter,
1245 &fifo->rx_slave);
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1246}
1247
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1248static void usbhsf_dma_init_dt(struct device *dev, struct usbhs_fifo *fifo,
1249 int channel)
abd2dbf6 1250{
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1251 char name[16];
1252
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1253 /*
1254 * To avoid complex handing for DnFIFOs, the driver uses each
1255 * DnFIFO as TX or RX direction (not bi-direction).
1256 * So, the driver uses odd channels for TX, even channels for RX.
1257 */
1258 snprintf(name, sizeof(name), "ch%d", channel);
1259 if (channel & 1) {
1260 fifo->tx_chan = dma_request_slave_channel_reason(dev, name);
1261 if (IS_ERR(fifo->tx_chan))
1262 fifo->tx_chan = NULL;
1263 } else {
1264 fifo->rx_chan = dma_request_slave_channel_reason(dev, name);
1265 if (IS_ERR(fifo->rx_chan))
1266 fifo->rx_chan = NULL;
1267 }
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1268}
1269
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1270static void usbhsf_dma_init(struct usbhs_priv *priv, struct usbhs_fifo *fifo,
1271 int channel)
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1272{
1273 struct device *dev = usbhs_priv_to_dev(priv);
1274
abd2dbf6 1275 if (dev->of_node)
7a96b784 1276 usbhsf_dma_init_dt(dev, fifo, channel);
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1277 else
1278 usbhsf_dma_init_pdev(fifo);
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1279
1280 if (fifo->tx_chan || fifo->rx_chan)
4ce68805 1281 dev_dbg(dev, "enable DMAEngine (%s%s%s)\n",
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1282 fifo->name,
1283 fifo->tx_chan ? "[TX]" : " ",
1284 fifo->rx_chan ? "[RX]" : " ");
1285}
1286
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1287/*
1288 * irq functions
1289 */
1290static int usbhsf_irq_empty(struct usbhs_priv *priv,
1291 struct usbhs_irq_state *irq_state)
1292{
1293 struct usbhs_pipe *pipe;
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1294 struct device *dev = usbhs_priv_to_dev(priv);
1295 int i, ret;
1296
1297 if (!irq_state->bempsts) {
1298 dev_err(dev, "debug %s !!\n", __func__);
1299 return -EIO;
1300 }
1301
1302 dev_dbg(dev, "irq empty [0x%04x]\n", irq_state->bempsts);
1303
1304 /*
1305 * search interrupted "pipe"
1306 * not "uep".
1307 */
1308 usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
1309 if (!(irq_state->bempsts & (1 << i)))
1310 continue;
1311
51b8a021 1312 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN);
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1313 if (ret < 0)
1314 dev_err(dev, "irq_empty run_error %d : %d\n", i, ret);
1315 }
1316
1317 return 0;
1318}
1319
1320static int usbhsf_irq_ready(struct usbhs_priv *priv,
1321 struct usbhs_irq_state *irq_state)
1322{
1323 struct usbhs_pipe *pipe;
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1324 struct device *dev = usbhs_priv_to_dev(priv);
1325 int i, ret;
1326
1327 if (!irq_state->brdysts) {
1328 dev_err(dev, "debug %s !!\n", __func__);
1329 return -EIO;
1330 }
1331
1332 dev_dbg(dev, "irq ready [0x%04x]\n", irq_state->brdysts);
1333
1334 /*
1335 * search interrupted "pipe"
1336 * not "uep".
1337 */
1338 usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
1339 if (!(irq_state->brdysts & (1 << i)))
1340 continue;
1341
51b8a021 1342 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN);
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1343 if (ret < 0)
1344 dev_err(dev, "irq_ready run_error %d : %d\n", i, ret);
1345 }
1346
1347 return 0;
1348}
1349
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1350static void usbhsf_dma_complete(void *arg)
1351{
1352 struct usbhs_pipe *pipe = arg;
1353 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
1354 struct device *dev = usbhs_priv_to_dev(priv);
1355 int ret;
1356
51b8a021 1357 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_DMA_DONE);
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1358 if (ret < 0)
1359 dev_err(dev, "dma_complete run_error %d : %d\n",
1360 usbhs_pipe_number(pipe), ret);
1361}
1362
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1363void usbhs_fifo_clear_dcp(struct usbhs_pipe *pipe)
1364{
1365 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
1366 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
1367
1368 /* clear DCP FIFO of transmission */
1369 if (usbhsf_fifo_select(pipe, fifo, 1) < 0)
1370 return;
1371 usbhsf_fifo_clear(pipe, fifo);
1372 usbhsf_fifo_unselect(pipe, fifo);
1373
1374 /* clear DCP FIFO of reception */
1375 if (usbhsf_fifo_select(pipe, fifo, 0) < 0)
1376 return;
1377 usbhsf_fifo_clear(pipe, fifo);
1378 usbhsf_fifo_unselect(pipe, fifo);
1379}
1380
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1381/*
1382 * fifo init
1383 */
1384void usbhs_fifo_init(struct usbhs_priv *priv)
1385{
1386 struct usbhs_mod *mod = usbhs_mod_get_current(priv);
d77e3f4e 1387 struct usbhs_fifo *cfifo = usbhsf_get_cfifo(priv);
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1388 struct usbhs_fifo *dfifo;
1389 int i;
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1390
1391 mod->irq_empty = usbhsf_irq_empty;
1392 mod->irq_ready = usbhsf_irq_ready;
1393 mod->irq_bempsts = 0;
1394 mod->irq_brdysts = 0;
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1395
1396 cfifo->pipe = NULL;
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1397 usbhs_for_each_dfifo(priv, dfifo, i)
1398 dfifo->pipe = NULL;
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1399}
1400
1401void usbhs_fifo_quit(struct usbhs_priv *priv)
1402{
1403 struct usbhs_mod *mod = usbhs_mod_get_current(priv);
1404
1405 mod->irq_empty = NULL;
1406 mod->irq_ready = NULL;
1407 mod->irq_bempsts = 0;
1408 mod->irq_brdysts = 0;
1409}
d3af90a5 1410
53e734b1 1411#define __USBHS_DFIFO_INIT(priv, fifo, channel, fifo_port) \
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1412do { \
1413 fifo = usbhsf_get_dnfifo(priv, channel); \
1414 fifo->name = "D"#channel"FIFO"; \
53e734b1 1415 fifo->port = fifo_port; \
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1416 fifo->sel = D##channel##FIFOSEL; \
1417 fifo->ctr = D##channel##FIFOCTR; \
1418 fifo->tx_slave.shdma_slave.slave_id = \
1419 usbhs_get_dparam(priv, d##channel##_tx_id); \
1420 fifo->rx_slave.shdma_slave.slave_id = \
1421 usbhs_get_dparam(priv, d##channel##_rx_id); \
7a96b784 1422 usbhsf_dma_init(priv, fifo, channel); \
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1423} while (0)
1424
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1425#define USBHS_DFIFO_INIT(priv, fifo, channel) \
1426 __USBHS_DFIFO_INIT(priv, fifo, channel, D##channel##FIFO)
1427#define USBHS_DFIFO_INIT_NO_PORT(priv, fifo, channel) \
1428 __USBHS_DFIFO_INIT(priv, fifo, channel, 0)
1429
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1430int usbhs_fifo_probe(struct usbhs_priv *priv)
1431{
1432 struct usbhs_fifo *fifo;
1433
1434 /* CFIFO */
1435 fifo = usbhsf_get_cfifo(priv);
e73a9891 1436 fifo->name = "CFIFO";
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1437 fifo->port = CFIFO;
1438 fifo->sel = CFIFOSEL;
1439 fifo->ctr = CFIFOCTR;
1440
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1441 /* DFIFO */
1442 USBHS_DFIFO_INIT(priv, fifo, 0);
1443 USBHS_DFIFO_INIT(priv, fifo, 1);
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1444 USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 2);
1445 USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 3);
e73a9891 1446
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1447 return 0;
1448}
1449
1450void usbhs_fifo_remove(struct usbhs_priv *priv)
1451{
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1452 struct usbhs_fifo *fifo;
1453 int i;
1454
1455 usbhs_for_each_dfifo(priv, fifo, i)
1456 usbhsf_dma_quit(priv, fifo);
d3af90a5 1457}