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277164f0 NZ |
1 | /* |
2 | * Copyright (C) 2011 Marvell International Ltd. All rights reserved. | |
3 | * Author: Chao Xie <chao.xie@marvell.com> | |
4 | * Neil Zhang <zhangwm@marvell.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License as published by the | |
8 | * Free Software Foundation; either version 2 of the License, or (at your | |
9 | * option) any later version. | |
10 | */ | |
11 | ||
12 | #include <linux/module.h> | |
13 | #include <linux/kernel.h> | |
14 | #include <linux/init.h> | |
15 | #include <linux/io.h> | |
16 | #include <linux/uaccess.h> | |
17 | #include <linux/device.h> | |
18 | #include <linux/proc_fs.h> | |
19 | #include <linux/clk.h> | |
20 | #include <linux/workqueue.h> | |
21 | #include <linux/platform_device.h> | |
22 | ||
23 | #include <linux/usb.h> | |
24 | #include <linux/usb/ch9.h> | |
25 | #include <linux/usb/otg.h> | |
26 | #include <linux/usb/gadget.h> | |
27 | #include <linux/usb/hcd.h> | |
28 | #include <linux/platform_data/mv_usb.h> | |
29 | ||
94ae9843 | 30 | #include "phy-mv-usb.h" |
277164f0 NZ |
31 | |
32 | #define DRIVER_DESC "Marvell USB OTG transceiver driver" | |
33 | #define DRIVER_VERSION "Jan 20, 2010" | |
34 | ||
35 | MODULE_DESCRIPTION(DRIVER_DESC); | |
36 | MODULE_VERSION(DRIVER_VERSION); | |
37 | MODULE_LICENSE("GPL"); | |
38 | ||
39 | static const char driver_name[] = "mv-otg"; | |
40 | ||
41 | static char *state_string[] = { | |
42 | "undefined", | |
43 | "b_idle", | |
44 | "b_srp_init", | |
45 | "b_peripheral", | |
46 | "b_wait_acon", | |
47 | "b_host", | |
48 | "a_idle", | |
49 | "a_wait_vrise", | |
50 | "a_wait_bcon", | |
51 | "a_host", | |
52 | "a_suspend", | |
53 | "a_peripheral", | |
54 | "a_wait_vfall", | |
55 | "a_vbus_err" | |
56 | }; | |
57 | ||
b1c711d6 | 58 | static int mv_otg_set_vbus(struct usb_otg *otg, bool on) |
277164f0 | 59 | { |
b1c711d6 | 60 | struct mv_otg *mvotg = container_of(otg->phy, struct mv_otg, phy); |
277164f0 NZ |
61 | if (mvotg->pdata->set_vbus == NULL) |
62 | return -ENODEV; | |
63 | ||
64 | return mvotg->pdata->set_vbus(on); | |
65 | } | |
66 | ||
b1c711d6 | 67 | static int mv_otg_set_host(struct usb_otg *otg, |
277164f0 NZ |
68 | struct usb_bus *host) |
69 | { | |
70 | otg->host = host; | |
71 | ||
72 | return 0; | |
73 | } | |
74 | ||
b1c711d6 | 75 | static int mv_otg_set_peripheral(struct usb_otg *otg, |
277164f0 NZ |
76 | struct usb_gadget *gadget) |
77 | { | |
78 | otg->gadget = gadget; | |
79 | ||
80 | return 0; | |
81 | } | |
82 | ||
83 | static void mv_otg_run_state_machine(struct mv_otg *mvotg, | |
84 | unsigned long delay) | |
85 | { | |
86 | dev_dbg(&mvotg->pdev->dev, "transceiver is updated\n"); | |
87 | if (!mvotg->qwork) | |
88 | return; | |
89 | ||
90 | queue_delayed_work(mvotg->qwork, &mvotg->work, delay); | |
91 | } | |
92 | ||
93 | static void mv_otg_timer_await_bcon(unsigned long data) | |
94 | { | |
95 | struct mv_otg *mvotg = (struct mv_otg *) data; | |
96 | ||
97 | mvotg->otg_ctrl.a_wait_bcon_timeout = 1; | |
98 | ||
99 | dev_info(&mvotg->pdev->dev, "B Device No Response!\n"); | |
100 | ||
101 | if (spin_trylock(&mvotg->wq_lock)) { | |
102 | mv_otg_run_state_machine(mvotg, 0); | |
103 | spin_unlock(&mvotg->wq_lock); | |
104 | } | |
105 | } | |
106 | ||
107 | static int mv_otg_cancel_timer(struct mv_otg *mvotg, unsigned int id) | |
108 | { | |
109 | struct timer_list *timer; | |
110 | ||
111 | if (id >= OTG_TIMER_NUM) | |
112 | return -EINVAL; | |
113 | ||
114 | timer = &mvotg->otg_ctrl.timer[id]; | |
115 | ||
116 | if (timer_pending(timer)) | |
117 | del_timer(timer); | |
118 | ||
119 | return 0; | |
120 | } | |
121 | ||
122 | static int mv_otg_set_timer(struct mv_otg *mvotg, unsigned int id, | |
123 | unsigned long interval, | |
124 | void (*callback) (unsigned long)) | |
125 | { | |
126 | struct timer_list *timer; | |
127 | ||
128 | if (id >= OTG_TIMER_NUM) | |
129 | return -EINVAL; | |
130 | ||
131 | timer = &mvotg->otg_ctrl.timer[id]; | |
132 | if (timer_pending(timer)) { | |
133 | dev_err(&mvotg->pdev->dev, "Timer%d is already running\n", id); | |
134 | return -EBUSY; | |
135 | } | |
136 | ||
137 | init_timer(timer); | |
138 | timer->data = (unsigned long) mvotg; | |
139 | timer->function = callback; | |
140 | timer->expires = jiffies + interval; | |
141 | add_timer(timer); | |
142 | ||
143 | return 0; | |
144 | } | |
145 | ||
146 | static int mv_otg_reset(struct mv_otg *mvotg) | |
147 | { | |
148 | unsigned int loops; | |
149 | u32 tmp; | |
150 | ||
151 | /* Stop the controller */ | |
152 | tmp = readl(&mvotg->op_regs->usbcmd); | |
153 | tmp &= ~USBCMD_RUN_STOP; | |
154 | writel(tmp, &mvotg->op_regs->usbcmd); | |
155 | ||
156 | /* Reset the controller to get default values */ | |
157 | writel(USBCMD_CTRL_RESET, &mvotg->op_regs->usbcmd); | |
158 | ||
159 | loops = 500; | |
160 | while (readl(&mvotg->op_regs->usbcmd) & USBCMD_CTRL_RESET) { | |
161 | if (loops == 0) { | |
162 | dev_err(&mvotg->pdev->dev, | |
163 | "Wait for RESET completed TIMEOUT\n"); | |
164 | return -ETIMEDOUT; | |
165 | } | |
166 | loops--; | |
167 | udelay(20); | |
168 | } | |
169 | ||
170 | writel(0x0, &mvotg->op_regs->usbintr); | |
171 | tmp = readl(&mvotg->op_regs->usbsts); | |
172 | writel(tmp, &mvotg->op_regs->usbsts); | |
173 | ||
174 | return 0; | |
175 | } | |
176 | ||
177 | static void mv_otg_init_irq(struct mv_otg *mvotg) | |
178 | { | |
179 | u32 otgsc; | |
180 | ||
181 | mvotg->irq_en = OTGSC_INTR_A_SESSION_VALID | |
182 | | OTGSC_INTR_A_VBUS_VALID; | |
183 | mvotg->irq_status = OTGSC_INTSTS_A_SESSION_VALID | |
184 | | OTGSC_INTSTS_A_VBUS_VALID; | |
185 | ||
186 | if (mvotg->pdata->vbus == NULL) { | |
187 | mvotg->irq_en |= OTGSC_INTR_B_SESSION_VALID | |
188 | | OTGSC_INTR_B_SESSION_END; | |
189 | mvotg->irq_status |= OTGSC_INTSTS_B_SESSION_VALID | |
190 | | OTGSC_INTSTS_B_SESSION_END; | |
191 | } | |
192 | ||
193 | if (mvotg->pdata->id == NULL) { | |
194 | mvotg->irq_en |= OTGSC_INTR_USB_ID; | |
195 | mvotg->irq_status |= OTGSC_INTSTS_USB_ID; | |
196 | } | |
197 | ||
198 | otgsc = readl(&mvotg->op_regs->otgsc); | |
199 | otgsc |= mvotg->irq_en; | |
200 | writel(otgsc, &mvotg->op_regs->otgsc); | |
201 | } | |
202 | ||
203 | static void mv_otg_start_host(struct mv_otg *mvotg, int on) | |
204 | { | |
2053c2d1 | 205 | #ifdef CONFIG_USB |
b1c711d6 | 206 | struct usb_otg *otg = mvotg->phy.otg; |
277164f0 NZ |
207 | struct usb_hcd *hcd; |
208 | ||
209 | if (!otg->host) | |
210 | return; | |
211 | ||
212 | dev_info(&mvotg->pdev->dev, "%s host\n", on ? "start" : "stop"); | |
213 | ||
214 | hcd = bus_to_hcd(otg->host); | |
215 | ||
216 | if (on) | |
217 | usb_add_hcd(hcd, hcd->irq, IRQF_SHARED); | |
218 | else | |
219 | usb_remove_hcd(hcd); | |
2053c2d1 | 220 | #endif /* CONFIG_USB */ |
277164f0 NZ |
221 | } |
222 | ||
223 | static void mv_otg_start_periphrals(struct mv_otg *mvotg, int on) | |
224 | { | |
b1c711d6 | 225 | struct usb_otg *otg = mvotg->phy.otg; |
277164f0 NZ |
226 | |
227 | if (!otg->gadget) | |
228 | return; | |
229 | ||
b1c711d6 | 230 | dev_info(mvotg->phy.dev, "gadget %s\n", on ? "on" : "off"); |
277164f0 NZ |
231 | |
232 | if (on) | |
233 | usb_gadget_vbus_connect(otg->gadget); | |
234 | else | |
235 | usb_gadget_vbus_disconnect(otg->gadget); | |
236 | } | |
237 | ||
238 | static void otg_clock_enable(struct mv_otg *mvotg) | |
239 | { | |
df18feda | 240 | clk_prepare_enable(mvotg->clk); |
277164f0 NZ |
241 | } |
242 | ||
243 | static void otg_clock_disable(struct mv_otg *mvotg) | |
244 | { | |
df18feda | 245 | clk_disable_unprepare(mvotg->clk); |
277164f0 NZ |
246 | } |
247 | ||
248 | static int mv_otg_enable_internal(struct mv_otg *mvotg) | |
249 | { | |
250 | int retval = 0; | |
251 | ||
252 | if (mvotg->active) | |
253 | return 0; | |
254 | ||
255 | dev_dbg(&mvotg->pdev->dev, "otg enabled\n"); | |
256 | ||
257 | otg_clock_enable(mvotg); | |
258 | if (mvotg->pdata->phy_init) { | |
259 | retval = mvotg->pdata->phy_init(mvotg->phy_regs); | |
260 | if (retval) { | |
261 | dev_err(&mvotg->pdev->dev, | |
262 | "init phy error %d\n", retval); | |
263 | otg_clock_disable(mvotg); | |
264 | return retval; | |
265 | } | |
266 | } | |
267 | mvotg->active = 1; | |
268 | ||
269 | return 0; | |
270 | ||
271 | } | |
272 | ||
273 | static int mv_otg_enable(struct mv_otg *mvotg) | |
274 | { | |
275 | if (mvotg->clock_gating) | |
276 | return mv_otg_enable_internal(mvotg); | |
277 | ||
278 | return 0; | |
279 | } | |
280 | ||
281 | static void mv_otg_disable_internal(struct mv_otg *mvotg) | |
282 | { | |
283 | if (mvotg->active) { | |
284 | dev_dbg(&mvotg->pdev->dev, "otg disabled\n"); | |
285 | if (mvotg->pdata->phy_deinit) | |
286 | mvotg->pdata->phy_deinit(mvotg->phy_regs); | |
287 | otg_clock_disable(mvotg); | |
288 | mvotg->active = 0; | |
289 | } | |
290 | } | |
291 | ||
292 | static void mv_otg_disable(struct mv_otg *mvotg) | |
293 | { | |
294 | if (mvotg->clock_gating) | |
295 | mv_otg_disable_internal(mvotg); | |
296 | } | |
297 | ||
298 | static void mv_otg_update_inputs(struct mv_otg *mvotg) | |
299 | { | |
300 | struct mv_otg_ctrl *otg_ctrl = &mvotg->otg_ctrl; | |
301 | u32 otgsc; | |
302 | ||
303 | otgsc = readl(&mvotg->op_regs->otgsc); | |
304 | ||
305 | if (mvotg->pdata->vbus) { | |
306 | if (mvotg->pdata->vbus->poll() == VBUS_HIGH) { | |
307 | otg_ctrl->b_sess_vld = 1; | |
308 | otg_ctrl->b_sess_end = 0; | |
309 | } else { | |
310 | otg_ctrl->b_sess_vld = 0; | |
311 | otg_ctrl->b_sess_end = 1; | |
312 | } | |
313 | } else { | |
314 | otg_ctrl->b_sess_vld = !!(otgsc & OTGSC_STS_B_SESSION_VALID); | |
315 | otg_ctrl->b_sess_end = !!(otgsc & OTGSC_STS_B_SESSION_END); | |
316 | } | |
317 | ||
318 | if (mvotg->pdata->id) | |
319 | otg_ctrl->id = !!mvotg->pdata->id->poll(); | |
320 | else | |
321 | otg_ctrl->id = !!(otgsc & OTGSC_STS_USB_ID); | |
322 | ||
323 | if (mvotg->pdata->otg_force_a_bus_req && !otg_ctrl->id) | |
324 | otg_ctrl->a_bus_req = 1; | |
325 | ||
326 | otg_ctrl->a_sess_vld = !!(otgsc & OTGSC_STS_A_SESSION_VALID); | |
327 | otg_ctrl->a_vbus_vld = !!(otgsc & OTGSC_STS_A_VBUS_VALID); | |
328 | ||
329 | dev_dbg(&mvotg->pdev->dev, "%s: ", __func__); | |
330 | dev_dbg(&mvotg->pdev->dev, "id %d\n", otg_ctrl->id); | |
331 | dev_dbg(&mvotg->pdev->dev, "b_sess_vld %d\n", otg_ctrl->b_sess_vld); | |
332 | dev_dbg(&mvotg->pdev->dev, "b_sess_end %d\n", otg_ctrl->b_sess_end); | |
333 | dev_dbg(&mvotg->pdev->dev, "a_vbus_vld %d\n", otg_ctrl->a_vbus_vld); | |
334 | dev_dbg(&mvotg->pdev->dev, "a_sess_vld %d\n", otg_ctrl->a_sess_vld); | |
335 | } | |
336 | ||
337 | static void mv_otg_update_state(struct mv_otg *mvotg) | |
338 | { | |
339 | struct mv_otg_ctrl *otg_ctrl = &mvotg->otg_ctrl; | |
b1c711d6 HK |
340 | struct usb_phy *phy = &mvotg->phy; |
341 | int old_state = phy->state; | |
277164f0 NZ |
342 | |
343 | switch (old_state) { | |
344 | case OTG_STATE_UNDEFINED: | |
b1c711d6 | 345 | phy->state = OTG_STATE_B_IDLE; |
277164f0 NZ |
346 | /* FALL THROUGH */ |
347 | case OTG_STATE_B_IDLE: | |
348 | if (otg_ctrl->id == 0) | |
b1c711d6 | 349 | phy->state = OTG_STATE_A_IDLE; |
277164f0 | 350 | else if (otg_ctrl->b_sess_vld) |
b1c711d6 | 351 | phy->state = OTG_STATE_B_PERIPHERAL; |
277164f0 NZ |
352 | break; |
353 | case OTG_STATE_B_PERIPHERAL: | |
354 | if (!otg_ctrl->b_sess_vld || otg_ctrl->id == 0) | |
b1c711d6 | 355 | phy->state = OTG_STATE_B_IDLE; |
277164f0 NZ |
356 | break; |
357 | case OTG_STATE_A_IDLE: | |
358 | if (otg_ctrl->id) | |
b1c711d6 | 359 | phy->state = OTG_STATE_B_IDLE; |
277164f0 NZ |
360 | else if (!(otg_ctrl->a_bus_drop) && |
361 | (otg_ctrl->a_bus_req || otg_ctrl->a_srp_det)) | |
b1c711d6 | 362 | phy->state = OTG_STATE_A_WAIT_VRISE; |
277164f0 NZ |
363 | break; |
364 | case OTG_STATE_A_WAIT_VRISE: | |
365 | if (otg_ctrl->a_vbus_vld) | |
b1c711d6 | 366 | phy->state = OTG_STATE_A_WAIT_BCON; |
277164f0 NZ |
367 | break; |
368 | case OTG_STATE_A_WAIT_BCON: | |
369 | if (otg_ctrl->id || otg_ctrl->a_bus_drop | |
370 | || otg_ctrl->a_wait_bcon_timeout) { | |
371 | mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER); | |
372 | mvotg->otg_ctrl.a_wait_bcon_timeout = 0; | |
b1c711d6 | 373 | phy->state = OTG_STATE_A_WAIT_VFALL; |
277164f0 NZ |
374 | otg_ctrl->a_bus_req = 0; |
375 | } else if (!otg_ctrl->a_vbus_vld) { | |
376 | mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER); | |
377 | mvotg->otg_ctrl.a_wait_bcon_timeout = 0; | |
b1c711d6 | 378 | phy->state = OTG_STATE_A_VBUS_ERR; |
277164f0 NZ |
379 | } else if (otg_ctrl->b_conn) { |
380 | mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER); | |
381 | mvotg->otg_ctrl.a_wait_bcon_timeout = 0; | |
b1c711d6 | 382 | phy->state = OTG_STATE_A_HOST; |
277164f0 NZ |
383 | } |
384 | break; | |
385 | case OTG_STATE_A_HOST: | |
386 | if (otg_ctrl->id || !otg_ctrl->b_conn | |
387 | || otg_ctrl->a_bus_drop) | |
b1c711d6 | 388 | phy->state = OTG_STATE_A_WAIT_BCON; |
277164f0 | 389 | else if (!otg_ctrl->a_vbus_vld) |
b1c711d6 | 390 | phy->state = OTG_STATE_A_VBUS_ERR; |
277164f0 NZ |
391 | break; |
392 | case OTG_STATE_A_WAIT_VFALL: | |
393 | if (otg_ctrl->id | |
394 | || (!otg_ctrl->b_conn && otg_ctrl->a_sess_vld) | |
395 | || otg_ctrl->a_bus_req) | |
b1c711d6 | 396 | phy->state = OTG_STATE_A_IDLE; |
277164f0 NZ |
397 | break; |
398 | case OTG_STATE_A_VBUS_ERR: | |
399 | if (otg_ctrl->id || otg_ctrl->a_clr_err | |
400 | || otg_ctrl->a_bus_drop) { | |
401 | otg_ctrl->a_clr_err = 0; | |
b1c711d6 | 402 | phy->state = OTG_STATE_A_WAIT_VFALL; |
277164f0 NZ |
403 | } |
404 | break; | |
405 | default: | |
406 | break; | |
407 | } | |
408 | } | |
409 | ||
410 | static void mv_otg_work(struct work_struct *work) | |
411 | { | |
412 | struct mv_otg *mvotg; | |
b1c711d6 HK |
413 | struct usb_phy *phy; |
414 | struct usb_otg *otg; | |
277164f0 NZ |
415 | int old_state; |
416 | ||
63a13079 | 417 | mvotg = container_of(to_delayed_work(work), struct mv_otg, work); |
277164f0 NZ |
418 | |
419 | run: | |
420 | /* work queue is single thread, or we need spin_lock to protect */ | |
b1c711d6 HK |
421 | phy = &mvotg->phy; |
422 | otg = phy->otg; | |
423 | old_state = phy->state; | |
277164f0 NZ |
424 | |
425 | if (!mvotg->active) | |
426 | return; | |
427 | ||
428 | mv_otg_update_inputs(mvotg); | |
429 | mv_otg_update_state(mvotg); | |
430 | ||
b1c711d6 | 431 | if (old_state != phy->state) { |
277164f0 NZ |
432 | dev_info(&mvotg->pdev->dev, "change from state %s to %s\n", |
433 | state_string[old_state], | |
b1c711d6 | 434 | state_string[phy->state]); |
277164f0 | 435 | |
b1c711d6 | 436 | switch (phy->state) { |
277164f0 | 437 | case OTG_STATE_B_IDLE: |
b1c711d6 | 438 | otg->default_a = 0; |
277164f0 NZ |
439 | if (old_state == OTG_STATE_B_PERIPHERAL) |
440 | mv_otg_start_periphrals(mvotg, 0); | |
441 | mv_otg_reset(mvotg); | |
442 | mv_otg_disable(mvotg); | |
443 | break; | |
444 | case OTG_STATE_B_PERIPHERAL: | |
445 | mv_otg_enable(mvotg); | |
446 | mv_otg_start_periphrals(mvotg, 1); | |
447 | break; | |
448 | case OTG_STATE_A_IDLE: | |
b1c711d6 | 449 | otg->default_a = 1; |
277164f0 NZ |
450 | mv_otg_enable(mvotg); |
451 | if (old_state == OTG_STATE_A_WAIT_VFALL) | |
452 | mv_otg_start_host(mvotg, 0); | |
453 | mv_otg_reset(mvotg); | |
454 | break; | |
455 | case OTG_STATE_A_WAIT_VRISE: | |
b1c711d6 | 456 | mv_otg_set_vbus(otg, 1); |
277164f0 NZ |
457 | break; |
458 | case OTG_STATE_A_WAIT_BCON: | |
459 | if (old_state != OTG_STATE_A_HOST) | |
460 | mv_otg_start_host(mvotg, 1); | |
461 | mv_otg_set_timer(mvotg, A_WAIT_BCON_TIMER, | |
462 | T_A_WAIT_BCON, | |
463 | mv_otg_timer_await_bcon); | |
464 | /* | |
465 | * Now, we directly enter A_HOST. So set b_conn = 1 | |
466 | * here. In fact, it need host driver to notify us. | |
467 | */ | |
468 | mvotg->otg_ctrl.b_conn = 1; | |
469 | break; | |
470 | case OTG_STATE_A_HOST: | |
471 | break; | |
472 | case OTG_STATE_A_WAIT_VFALL: | |
473 | /* | |
474 | * Now, we has exited A_HOST. So set b_conn = 0 | |
475 | * here. In fact, it need host driver to notify us. | |
476 | */ | |
477 | mvotg->otg_ctrl.b_conn = 0; | |
b1c711d6 | 478 | mv_otg_set_vbus(otg, 0); |
277164f0 NZ |
479 | break; |
480 | case OTG_STATE_A_VBUS_ERR: | |
481 | break; | |
482 | default: | |
483 | break; | |
484 | } | |
485 | goto run; | |
486 | } | |
487 | } | |
488 | ||
489 | static irqreturn_t mv_otg_irq(int irq, void *dev) | |
490 | { | |
491 | struct mv_otg *mvotg = dev; | |
492 | u32 otgsc; | |
493 | ||
494 | otgsc = readl(&mvotg->op_regs->otgsc); | |
495 | writel(otgsc, &mvotg->op_regs->otgsc); | |
496 | ||
497 | /* | |
498 | * if we have vbus, then the vbus detection for B-device | |
499 | * will be done by mv_otg_inputs_irq(). | |
500 | */ | |
501 | if (mvotg->pdata->vbus) | |
502 | if ((otgsc & OTGSC_STS_USB_ID) && | |
503 | !(otgsc & OTGSC_INTSTS_USB_ID)) | |
504 | return IRQ_NONE; | |
505 | ||
506 | if ((otgsc & mvotg->irq_status) == 0) | |
507 | return IRQ_NONE; | |
508 | ||
509 | mv_otg_run_state_machine(mvotg, 0); | |
510 | ||
511 | return IRQ_HANDLED; | |
512 | } | |
513 | ||
514 | static irqreturn_t mv_otg_inputs_irq(int irq, void *dev) | |
515 | { | |
516 | struct mv_otg *mvotg = dev; | |
517 | ||
518 | /* The clock may disabled at this time */ | |
519 | if (!mvotg->active) { | |
520 | mv_otg_enable(mvotg); | |
521 | mv_otg_init_irq(mvotg); | |
522 | } | |
523 | ||
524 | mv_otg_run_state_machine(mvotg, 0); | |
525 | ||
526 | return IRQ_HANDLED; | |
527 | } | |
528 | ||
529 | static ssize_t | |
530 | get_a_bus_req(struct device *dev, struct device_attribute *attr, char *buf) | |
531 | { | |
532 | struct mv_otg *mvotg = dev_get_drvdata(dev); | |
533 | return scnprintf(buf, PAGE_SIZE, "%d\n", | |
534 | mvotg->otg_ctrl.a_bus_req); | |
535 | } | |
536 | ||
537 | static ssize_t | |
538 | set_a_bus_req(struct device *dev, struct device_attribute *attr, | |
539 | const char *buf, size_t count) | |
540 | { | |
541 | struct mv_otg *mvotg = dev_get_drvdata(dev); | |
542 | ||
543 | if (count > 2) | |
544 | return -1; | |
545 | ||
546 | /* We will use this interface to change to A device */ | |
b1c711d6 HK |
547 | if (mvotg->phy.state != OTG_STATE_B_IDLE |
548 | && mvotg->phy.state != OTG_STATE_A_IDLE) | |
277164f0 NZ |
549 | return -1; |
550 | ||
551 | /* The clock may disabled and we need to set irq for ID detected */ | |
552 | mv_otg_enable(mvotg); | |
553 | mv_otg_init_irq(mvotg); | |
554 | ||
555 | if (buf[0] == '1') { | |
556 | mvotg->otg_ctrl.a_bus_req = 1; | |
557 | mvotg->otg_ctrl.a_bus_drop = 0; | |
558 | dev_dbg(&mvotg->pdev->dev, | |
559 | "User request: a_bus_req = 1\n"); | |
560 | ||
561 | if (spin_trylock(&mvotg->wq_lock)) { | |
562 | mv_otg_run_state_machine(mvotg, 0); | |
563 | spin_unlock(&mvotg->wq_lock); | |
564 | } | |
565 | } | |
566 | ||
567 | return count; | |
568 | } | |
569 | ||
570 | static DEVICE_ATTR(a_bus_req, S_IRUGO | S_IWUSR, get_a_bus_req, | |
571 | set_a_bus_req); | |
572 | ||
573 | static ssize_t | |
574 | set_a_clr_err(struct device *dev, struct device_attribute *attr, | |
575 | const char *buf, size_t count) | |
576 | { | |
577 | struct mv_otg *mvotg = dev_get_drvdata(dev); | |
b1c711d6 | 578 | if (!mvotg->phy.otg->default_a) |
277164f0 NZ |
579 | return -1; |
580 | ||
581 | if (count > 2) | |
582 | return -1; | |
583 | ||
584 | if (buf[0] == '1') { | |
585 | mvotg->otg_ctrl.a_clr_err = 1; | |
586 | dev_dbg(&mvotg->pdev->dev, | |
587 | "User request: a_clr_err = 1\n"); | |
588 | } | |
589 | ||
590 | if (spin_trylock(&mvotg->wq_lock)) { | |
591 | mv_otg_run_state_machine(mvotg, 0); | |
592 | spin_unlock(&mvotg->wq_lock); | |
593 | } | |
594 | ||
595 | return count; | |
596 | } | |
597 | ||
598 | static DEVICE_ATTR(a_clr_err, S_IWUSR, NULL, set_a_clr_err); | |
599 | ||
600 | static ssize_t | |
601 | get_a_bus_drop(struct device *dev, struct device_attribute *attr, | |
602 | char *buf) | |
603 | { | |
604 | struct mv_otg *mvotg = dev_get_drvdata(dev); | |
605 | return scnprintf(buf, PAGE_SIZE, "%d\n", | |
606 | mvotg->otg_ctrl.a_bus_drop); | |
607 | } | |
608 | ||
609 | static ssize_t | |
610 | set_a_bus_drop(struct device *dev, struct device_attribute *attr, | |
611 | const char *buf, size_t count) | |
612 | { | |
613 | struct mv_otg *mvotg = dev_get_drvdata(dev); | |
b1c711d6 | 614 | if (!mvotg->phy.otg->default_a) |
277164f0 NZ |
615 | return -1; |
616 | ||
617 | if (count > 2) | |
618 | return -1; | |
619 | ||
620 | if (buf[0] == '0') { | |
621 | mvotg->otg_ctrl.a_bus_drop = 0; | |
622 | dev_dbg(&mvotg->pdev->dev, | |
623 | "User request: a_bus_drop = 0\n"); | |
624 | } else if (buf[0] == '1') { | |
625 | mvotg->otg_ctrl.a_bus_drop = 1; | |
626 | mvotg->otg_ctrl.a_bus_req = 0; | |
627 | dev_dbg(&mvotg->pdev->dev, | |
628 | "User request: a_bus_drop = 1\n"); | |
629 | dev_dbg(&mvotg->pdev->dev, | |
630 | "User request: and a_bus_req = 0\n"); | |
631 | } | |
632 | ||
633 | if (spin_trylock(&mvotg->wq_lock)) { | |
634 | mv_otg_run_state_machine(mvotg, 0); | |
635 | spin_unlock(&mvotg->wq_lock); | |
636 | } | |
637 | ||
638 | return count; | |
639 | } | |
640 | ||
641 | static DEVICE_ATTR(a_bus_drop, S_IRUGO | S_IWUSR, | |
642 | get_a_bus_drop, set_a_bus_drop); | |
643 | ||
644 | static struct attribute *inputs_attrs[] = { | |
645 | &dev_attr_a_bus_req.attr, | |
646 | &dev_attr_a_clr_err.attr, | |
647 | &dev_attr_a_bus_drop.attr, | |
648 | NULL, | |
649 | }; | |
650 | ||
651 | static struct attribute_group inputs_attr_group = { | |
652 | .name = "inputs", | |
653 | .attrs = inputs_attrs, | |
654 | }; | |
655 | ||
d07f4a82 | 656 | static int mv_otg_remove(struct platform_device *pdev) |
277164f0 NZ |
657 | { |
658 | struct mv_otg *mvotg = platform_get_drvdata(pdev); | |
277164f0 NZ |
659 | |
660 | sysfs_remove_group(&mvotg->pdev->dev.kobj, &inputs_attr_group); | |
661 | ||
277164f0 NZ |
662 | if (mvotg->qwork) { |
663 | flush_workqueue(mvotg->qwork); | |
664 | destroy_workqueue(mvotg->qwork); | |
665 | } | |
666 | ||
667 | mv_otg_disable(mvotg); | |
668 | ||
662dca54 | 669 | usb_remove_phy(&mvotg->phy); |
277164f0 | 670 | |
277164f0 NZ |
671 | return 0; |
672 | } | |
673 | ||
674 | static int mv_otg_probe(struct platform_device *pdev) | |
675 | { | |
19f9e188 | 676 | struct mv_usb_platform_data *pdata = dev_get_platdata(&pdev->dev); |
277164f0 | 677 | struct mv_otg *mvotg; |
b1c711d6 | 678 | struct usb_otg *otg; |
277164f0 | 679 | struct resource *r; |
df18feda | 680 | int retval = 0, i; |
277164f0 NZ |
681 | |
682 | if (pdata == NULL) { | |
683 | dev_err(&pdev->dev, "failed to get platform data\n"); | |
684 | return -ENODEV; | |
685 | } | |
686 | ||
df18feda | 687 | mvotg = devm_kzalloc(&pdev->dev, sizeof(*mvotg), GFP_KERNEL); |
277164f0 NZ |
688 | if (!mvotg) { |
689 | dev_err(&pdev->dev, "failed to allocate memory!\n"); | |
690 | return -ENOMEM; | |
691 | } | |
692 | ||
fb3dfe13 CX |
693 | otg = devm_kzalloc(&pdev->dev, sizeof(*otg), GFP_KERNEL); |
694 | if (!otg) | |
b1c711d6 | 695 | return -ENOMEM; |
b1c711d6 | 696 | |
277164f0 NZ |
697 | platform_set_drvdata(pdev, mvotg); |
698 | ||
699 | mvotg->pdev = pdev; | |
700 | mvotg->pdata = pdata; | |
701 | ||
df18feda CX |
702 | mvotg->clk = devm_clk_get(&pdev->dev, NULL); |
703 | if (IS_ERR(mvotg->clk)) | |
704 | return PTR_ERR(mvotg->clk); | |
277164f0 NZ |
705 | |
706 | mvotg->qwork = create_singlethread_workqueue("mv_otg_queue"); | |
707 | if (!mvotg->qwork) { | |
708 | dev_dbg(&pdev->dev, "cannot create workqueue for OTG\n"); | |
fb3dfe13 | 709 | return -ENOMEM; |
277164f0 NZ |
710 | } |
711 | ||
712 | INIT_DELAYED_WORK(&mvotg->work, mv_otg_work); | |
713 | ||
714 | /* OTG common part */ | |
715 | mvotg->pdev = pdev; | |
b1c711d6 HK |
716 | mvotg->phy.dev = &pdev->dev; |
717 | mvotg->phy.otg = otg; | |
718 | mvotg->phy.label = driver_name; | |
719 | mvotg->phy.state = OTG_STATE_UNDEFINED; | |
720 | ||
721 | otg->phy = &mvotg->phy; | |
722 | otg->set_host = mv_otg_set_host; | |
723 | otg->set_peripheral = mv_otg_set_peripheral; | |
724 | otg->set_vbus = mv_otg_set_vbus; | |
277164f0 NZ |
725 | |
726 | for (i = 0; i < OTG_TIMER_NUM; i++) | |
727 | init_timer(&mvotg->otg_ctrl.timer[i]); | |
728 | ||
729 | r = platform_get_resource_byname(mvotg->pdev, | |
730 | IORESOURCE_MEM, "phyregs"); | |
731 | if (r == NULL) { | |
732 | dev_err(&pdev->dev, "no phy I/O memory resource defined\n"); | |
733 | retval = -ENODEV; | |
734 | goto err_destroy_workqueue; | |
735 | } | |
736 | ||
fb3dfe13 | 737 | mvotg->phy_regs = devm_ioremap(&pdev->dev, r->start, resource_size(r)); |
277164f0 NZ |
738 | if (mvotg->phy_regs == NULL) { |
739 | dev_err(&pdev->dev, "failed to map phy I/O memory\n"); | |
740 | retval = -EFAULT; | |
741 | goto err_destroy_workqueue; | |
742 | } | |
743 | ||
744 | r = platform_get_resource_byname(mvotg->pdev, | |
745 | IORESOURCE_MEM, "capregs"); | |
746 | if (r == NULL) { | |
747 | dev_err(&pdev->dev, "no I/O memory resource defined\n"); | |
748 | retval = -ENODEV; | |
fb3dfe13 | 749 | goto err_destroy_workqueue; |
277164f0 NZ |
750 | } |
751 | ||
fb3dfe13 | 752 | mvotg->cap_regs = devm_ioremap(&pdev->dev, r->start, resource_size(r)); |
277164f0 NZ |
753 | if (mvotg->cap_regs == NULL) { |
754 | dev_err(&pdev->dev, "failed to map I/O memory\n"); | |
755 | retval = -EFAULT; | |
fb3dfe13 | 756 | goto err_destroy_workqueue; |
277164f0 NZ |
757 | } |
758 | ||
759 | /* we will acces controller register, so enable the udc controller */ | |
760 | retval = mv_otg_enable_internal(mvotg); | |
761 | if (retval) { | |
762 | dev_err(&pdev->dev, "mv otg enable error %d\n", retval); | |
fb3dfe13 | 763 | goto err_destroy_workqueue; |
277164f0 NZ |
764 | } |
765 | ||
766 | mvotg->op_regs = | |
767 | (struct mv_otg_regs __iomem *) ((unsigned long) mvotg->cap_regs | |
768 | + (readl(mvotg->cap_regs) & CAPLENGTH_MASK)); | |
769 | ||
770 | if (pdata->id) { | |
fb3dfe13 CX |
771 | retval = devm_request_threaded_irq(&pdev->dev, pdata->id->irq, |
772 | NULL, mv_otg_inputs_irq, | |
773 | IRQF_ONESHOT, "id", mvotg); | |
277164f0 NZ |
774 | if (retval) { |
775 | dev_info(&pdev->dev, | |
776 | "Failed to request irq for ID\n"); | |
777 | pdata->id = NULL; | |
778 | } | |
779 | } | |
780 | ||
781 | if (pdata->vbus) { | |
782 | mvotg->clock_gating = 1; | |
fb3dfe13 CX |
783 | retval = devm_request_threaded_irq(&pdev->dev, pdata->vbus->irq, |
784 | NULL, mv_otg_inputs_irq, | |
785 | IRQF_ONESHOT, "vbus", mvotg); | |
277164f0 NZ |
786 | if (retval) { |
787 | dev_info(&pdev->dev, | |
788 | "Failed to request irq for VBUS, " | |
789 | "disable clock gating\n"); | |
790 | mvotg->clock_gating = 0; | |
791 | pdata->vbus = NULL; | |
792 | } | |
793 | } | |
794 | ||
795 | if (pdata->disable_otg_clock_gating) | |
796 | mvotg->clock_gating = 0; | |
797 | ||
798 | mv_otg_reset(mvotg); | |
799 | mv_otg_init_irq(mvotg); | |
800 | ||
801 | r = platform_get_resource(mvotg->pdev, IORESOURCE_IRQ, 0); | |
802 | if (r == NULL) { | |
803 | dev_err(&pdev->dev, "no IRQ resource defined\n"); | |
804 | retval = -ENODEV; | |
805 | goto err_disable_clk; | |
806 | } | |
807 | ||
808 | mvotg->irq = r->start; | |
fb3dfe13 | 809 | if (devm_request_irq(&pdev->dev, mvotg->irq, mv_otg_irq, IRQF_SHARED, |
277164f0 NZ |
810 | driver_name, mvotg)) { |
811 | dev_err(&pdev->dev, "Request irq %d for OTG failed\n", | |
812 | mvotg->irq); | |
813 | mvotg->irq = 0; | |
814 | retval = -ENODEV; | |
815 | goto err_disable_clk; | |
816 | } | |
817 | ||
662dca54 | 818 | retval = usb_add_phy(&mvotg->phy, USB_PHY_TYPE_USB2); |
277164f0 NZ |
819 | if (retval < 0) { |
820 | dev_err(&pdev->dev, "can't register transceiver, %d\n", | |
821 | retval); | |
fb3dfe13 | 822 | goto err_disable_clk; |
277164f0 NZ |
823 | } |
824 | ||
825 | retval = sysfs_create_group(&pdev->dev.kobj, &inputs_attr_group); | |
826 | if (retval < 0) { | |
827 | dev_dbg(&pdev->dev, | |
828 | "Can't register sysfs attr group: %d\n", retval); | |
fb3dfe13 | 829 | goto err_remove_phy; |
277164f0 NZ |
830 | } |
831 | ||
832 | spin_lock_init(&mvotg->wq_lock); | |
833 | if (spin_trylock(&mvotg->wq_lock)) { | |
834 | mv_otg_run_state_machine(mvotg, 2 * HZ); | |
835 | spin_unlock(&mvotg->wq_lock); | |
836 | } | |
837 | ||
838 | dev_info(&pdev->dev, | |
839 | "successful probe OTG device %s clock gating.\n", | |
840 | mvotg->clock_gating ? "with" : "without"); | |
841 | ||
842 | return 0; | |
843 | ||
fb3dfe13 | 844 | err_remove_phy: |
662dca54 | 845 | usb_remove_phy(&mvotg->phy); |
277164f0 | 846 | err_disable_clk: |
277164f0 | 847 | mv_otg_disable_internal(mvotg); |
277164f0 NZ |
848 | err_destroy_workqueue: |
849 | flush_workqueue(mvotg->qwork); | |
850 | destroy_workqueue(mvotg->qwork); | |
277164f0 | 851 | |
277164f0 NZ |
852 | return retval; |
853 | } | |
854 | ||
855 | #ifdef CONFIG_PM | |
856 | static int mv_otg_suspend(struct platform_device *pdev, pm_message_t state) | |
857 | { | |
858 | struct mv_otg *mvotg = platform_get_drvdata(pdev); | |
859 | ||
b1c711d6 | 860 | if (mvotg->phy.state != OTG_STATE_B_IDLE) { |
277164f0 NZ |
861 | dev_info(&pdev->dev, |
862 | "OTG state is not B_IDLE, it is %d!\n", | |
b1c711d6 | 863 | mvotg->phy.state); |
277164f0 NZ |
864 | return -EAGAIN; |
865 | } | |
866 | ||
867 | if (!mvotg->clock_gating) | |
868 | mv_otg_disable_internal(mvotg); | |
869 | ||
870 | return 0; | |
871 | } | |
872 | ||
873 | static int mv_otg_resume(struct platform_device *pdev) | |
874 | { | |
875 | struct mv_otg *mvotg = platform_get_drvdata(pdev); | |
876 | u32 otgsc; | |
877 | ||
878 | if (!mvotg->clock_gating) { | |
879 | mv_otg_enable_internal(mvotg); | |
880 | ||
881 | otgsc = readl(&mvotg->op_regs->otgsc); | |
882 | otgsc |= mvotg->irq_en; | |
883 | writel(otgsc, &mvotg->op_regs->otgsc); | |
884 | ||
885 | if (spin_trylock(&mvotg->wq_lock)) { | |
886 | mv_otg_run_state_machine(mvotg, 0); | |
887 | spin_unlock(&mvotg->wq_lock); | |
888 | } | |
889 | } | |
890 | return 0; | |
891 | } | |
892 | #endif | |
893 | ||
894 | static struct platform_driver mv_otg_driver = { | |
895 | .probe = mv_otg_probe, | |
d07f4a82 | 896 | .remove = mv_otg_remove, |
277164f0 NZ |
897 | .driver = { |
898 | .owner = THIS_MODULE, | |
899 | .name = driver_name, | |
900 | }, | |
901 | #ifdef CONFIG_PM | |
902 | .suspend = mv_otg_suspend, | |
903 | .resume = mv_otg_resume, | |
904 | #endif | |
905 | }; | |
ca21dda6 | 906 | module_platform_driver(mv_otg_driver); |