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Merge tag 'pm-4.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
[linux-2.6-block.git] / drivers / usb / musb / musb_core.h
CommitLineData
550a7375
FB		 1/*
2 * MUSB OTG driver defines
3 *
4 * Copyright 2005 Mentor Graphics Corporation
5 * Copyright (C) 2005-2006 by Texas Instruments
6 * Copyright (C) 2006-2007 Nokia Corporation
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
23 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
25 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 */
34
35#ifndef __MUSB_CORE_H__
36#define __MUSB_CORE_H__
37
38#include <linux/slab.h>
39#include <linux/list.h>
40#include <linux/interrupt.h>
550a7375 41#include <linux/errno.h>
f7f9d63e 42#include <linux/timer.h>
550a7375
FB		 43#include <linux/device.h>
44#include <linux/usb/ch9.h>
45#include <linux/usb/gadget.h>
46#include <linux/usb.h>
47#include <linux/usb/otg.h>
48#include <linux/usb/musb.h>
3e3101d5 49#include <linux/phy/phy.h>
8ed1fb79 50#include <linux/workqueue.h>
550a7375
FB		 51
52struct musb;
53struct musb_hw_ep;
54struct musb_ep;
55
0ded2f14
CC		 56/* Helper defines for struct musb->hwvers */
57#define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f)
58#define MUSB_HWVERS_MINOR(x) (x & 0x3ff)
59#define MUSB_HWVERS_RC 0x8000
60#define MUSB_HWVERS_1300 0x52C
61#define MUSB_HWVERS_1400 0x590
62#define MUSB_HWVERS_1800 0x720
63#define MUSB_HWVERS_1900 0x784
64#define MUSB_HWVERS_2000 0x800
550a7375
FB		 65
66#include "musb_debug.h"
67#include "musb_dma.h"
68
550a7375 69#include "musb_io.h"
550a7375
FB		 70
71#include "musb_gadget.h"
27729aad 72#include <linux/usb/hcd.h>
550a7375
FB		 73#include "musb_host.h"
74
550a7375
FB		 75/* NOTE: otg and peripheral-only state machines start at B_IDLE.
76 * OTG or host-only go to A_IDLE when ID is sensed.
77 */
78#define is_peripheral_active(m) (!(m)->is_host)
79#define is_host_active(m) ((m)->is_host)
80
9ad96e69
DM		 81enum {
82 MUSB_PORT_MODE_HOST = 1,
83 MUSB_PORT_MODE_GADGET,
84 MUSB_PORT_MODE_DUAL_ROLE,
85};
86
550a7375
FB		 87/****************************** CONSTANTS ********************************/
88
89#ifndef MUSB_C_NUM_EPS
90#define MUSB_C_NUM_EPS ((u8)16)
91#endif
92
93#ifndef MUSB_MAX_END0_PACKET
94#define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
95#endif
96
97/* host side ep0 states */
98enum musb_h_ep0_state {
99 MUSB_EP0_IDLE,
100 MUSB_EP0_START, /* expect ack of setup */
101 MUSB_EP0_IN, /* expect IN DATA */
102 MUSB_EP0_OUT, /* expect ack of OUT DATA */
103 MUSB_EP0_STATUS, /* expect ack of STATUS */
104} __attribute__ ((packed));
105
106/* peripheral side ep0 states */
107enum musb_g_ep0_state {
a5073b52
SS		 108 MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */
109 MUSB_EP0_STAGE_SETUP, /* received SETUP */
550a7375
FB		 110 MUSB_EP0_STAGE_TX, /* IN data */
111 MUSB_EP0_STAGE_RX, /* OUT data */
112 MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */
113 MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */
114 MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */
115} __attribute__ ((packed));
116
f7f9d63e
DB		 117/*
118 * OTG protocol constants. See USB OTG 1.3 spec,
119 * sections 5.5 "Device Timings" and 6.6.5 "Timers".
120 */
550a7375 121#define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */
f7f9d63e
DB		 122#define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */
123#define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */
124#define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */
125
550a7375
FB		 126/****************************** FUNCTIONS ********************************/
127
128#define MUSB_HST_MODE(_musb)\
129 { (_musb)->is_host = true; }
130#define MUSB_DEV_MODE(_musb) \
131 { (_musb)->is_host = false; }
132
133#define test_devctl_hst_mode(_x) \
134 (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
135
136#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
137
138/******************************** TYPES *************************************/
139
5450ac88
TL		 140struct musb_io;
141
3ca8abb8
FB		 142/**
143 * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
5450ac88
TL		 144 * @quirks: flags for platform specific quirks
145 * @enable: enable device
146 * @disable: disable device
147 * @ep_offset: returns the end point offset
148 * @ep_select: selects the specified end point
149 * @fifo_mode: sets the fifo mode
150 * @fifo_offset: returns the fifo offset
151 * @readb: read 8 bits
152 * @writeb: write 8 bits
153 * @readw: read 16 bits
154 * @writew: write 16 bits
155 * @readl: read 32 bits
156 * @writel: write 32 bits
157 * @read_fifo: reads the fifo
158 * @write_fifo: writes to fifo
7f6283ed
TL		 159 * @dma_init: platform specific dma init function
160 * @dma_exit: platform specific dma exit function
3ca8abb8
FB		 161 * @init: turns on clocks, sets up platform-specific registers, etc
162 * @exit: undoes @init
3ca8abb8 163 * @set_mode: forcefully changes operating mode
b28a6432
FB		 164 * @try_idle: tries to idle the IP
165 * @recover: platform-specific babble recovery
3ca8abb8
FB		 166 * @vbus_status: returns vbus status if possible
167 * @set_vbus: forces vbus status
9ea35331 168 * @adjust_channel_params: pre check for standard dma channel_program func
591fa9dd
HG		 169 * @pre_root_reset_end: called before the root usb port reset flag gets cleared
170 * @post_root_reset_end: called after the root usb port reset flag gets cleared
8055555f 171 * @phy_callback: optional callback function for the phy to call
3ca8abb8
FB		 172 */
173struct musb_platform_ops {
5450ac88 174
1fa07c37 175#define MUSB_G_NO_SKB_RESERVE BIT(9)
593bc462 176#define MUSB_DA8XX BIT(8)
a926ed11 177#define MUSB_PRESERVE_SESSION BIT(7)
5450ac88
TL		 178#define MUSB_DMA_UX500 BIT(6)
179#define MUSB_DMA_CPPI41 BIT(5)
180#define MUSB_DMA_CPPI BIT(4)
181#define MUSB_DMA_TUSB_OMAP BIT(3)
182#define MUSB_DMA_INVENTRA BIT(2)
183#define MUSB_IN_TUSB BIT(1)
184#define MUSB_INDEXED_EP BIT(0)
185 u32 quirks;
186
3ca8abb8
FB		 187 int (*init)(struct musb *musb);
188 int (*exit)(struct musb *musb);
189
3ca8abb8
FB		 190 void (*enable)(struct musb *musb);
191 void (*disable)(struct musb *musb);
192
5450ac88
TL		 193 u32 (*ep_offset)(u8 epnum, u16 offset);
194 void (*ep_select)(void __iomem *mbase, u8 epnum);
195 u16 fifo_mode;
196 u32 (*fifo_offset)(u8 epnum);
6cc2af6d 197 u32 (*busctl_offset)(u8 epnum, u16 offset);
5450ac88
TL		 198 u8 (*readb)(const void __iomem *addr, unsigned offset);
199 void (*writeb)(void __iomem *addr, unsigned offset, u8 data);
200 u16 (*readw)(const void __iomem *addr, unsigned offset);
201 void (*writew)(void __iomem *addr, unsigned offset, u16 data);
202 u32 (*readl)(const void __iomem *addr, unsigned offset);
203 void (*writel)(void __iomem *addr, unsigned offset, u32 data);
204 void (*read_fifo)(struct musb_hw_ep *hw_ep, u16 len, u8 *buf);
205 void (*write_fifo)(struct musb_hw_ep *hw_ep, u16 len, const u8 *buf);
7f6283ed
TL		 206 struct dma_controller *
207 (*dma_init) (struct musb *musb, void __iomem *base);
208 void (*dma_exit)(struct dma_controller *c);
3ca8abb8
FB		 209 int (*set_mode)(struct musb *musb, u8 mode);
210 void (*try_idle)(struct musb *musb, unsigned long timeout);
b28a6432 211 int (*recover)(struct musb *musb);
3ca8abb8
FB		 212
213 int (*vbus_status)(struct musb *musb);
214 void (*set_vbus)(struct musb *musb, int on);
13254307
MF		 215
216 int (*adjust_channel_params)(struct dma_channel *channel,
217 u16 packet_sz, u8 *mode,
218 dma_addr_t *dma_addr, u32 *len);
591fa9dd
HG		 219 void (*pre_root_reset_end)(struct musb *musb);
220 void (*post_root_reset_end)(struct musb *musb);
12b7db2b 221 int (*phy_callback)(enum musb_vbus_id_status status);
6def85a3 222 void (*clear_ep_rxintr)(struct musb *musb, int epnum);
3ca8abb8
FB		 223};
224
550a7375
FB		 225/*
226 * struct musb_hw_ep - endpoint hardware (bidirectional)
227 *
228 * Ordered slightly for better cacheline locality.
229 */
230struct musb_hw_ep {
231 struct musb *musb;
232 void __iomem *fifo;
233 void __iomem *regs;
234
ebf39920 235#if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
550a7375
FB		 236 void __iomem *conf;
237#endif
238
239 /* index in musb->endpoints[] */
240 u8 epnum;
241
242 /* hardware configuration, possibly dynamic */
243 bool is_shared_fifo;
244 bool tx_double_buffered;
245 bool rx_double_buffered;
246 u16 max_packet_sz_tx;
247 u16 max_packet_sz_rx;
248
249 struct dma_channel *tx_channel;
250 struct dma_channel *rx_channel;
251
ebf39920 252#if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
550a7375
FB		 253 /* TUSB has "asynchronous" and "synchronous" dma modes */
254 dma_addr_t fifo_async;
255 dma_addr_t fifo_sync;
256 void __iomem *fifo_sync_va;
257#endif
258
550a7375
FB		 259 /* currently scheduled peripheral endpoint */
260 struct musb_qh *in_qh;
261 struct musb_qh *out_qh;
262
263 u8 rx_reinit;
264 u8 tx_reinit;
550a7375 265
550a7375
FB		 266 /* peripheral side */
267 struct musb_ep ep_in; /* TX */
268 struct musb_ep ep_out; /* RX */
550a7375
FB		 269};
270
ad1adb89 271static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep)
550a7375 272{
550a7375 273 return next_request(&hw_ep->ep_in);
550a7375
FB		 274}
275
ad1adb89 276static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep)
550a7375 277{
550a7375 278 return next_request(&hw_ep->ep_out);
550a7375
FB		 279}
280
7421107b
FB		 281struct musb_csr_regs {
282 /* FIFO registers */
283 u16 txmaxp, txcsr, rxmaxp, rxcsr;
284 u16 rxfifoadd, txfifoadd;
285 u8 txtype, txinterval, rxtype, rxinterval;
286 u8 rxfifosz, txfifosz;
287 u8 txfunaddr, txhubaddr, txhubport;
288 u8 rxfunaddr, rxhubaddr, rxhubport;
289};
290
291struct musb_context_registers {
292
7421107b 293 u8 power;
7421107b
FB		 294 u8 intrusbe;
295 u16 frame;
296 u8 index, testmode;
297
298 u8 devctl, busctl, misc;
e25bec16 299 u32 otg_interfsel;
7421107b
FB		 300
301 struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
302};
303
550a7375
FB		 304/*
305 * struct musb - Driver instance data.
306 */
307struct musb {
308 /* device lock */
309 spinlock_t lock;
ea2f35c0 310 spinlock_t list_lock; /* resume work list lock */
743411b3 311
5450ac88 312 struct musb_io io;
743411b3 313 const struct musb_platform_ops *ops;
7421107b 314 struct musb_context_registers context;
743411b3 315
550a7375 316 irqreturn_t (*isr)(int, void *);
2bff3916 317 struct delayed_work irq_work;
8ed1fb79
DM		 318 struct delayed_work deassert_reset_work;
319 struct delayed_work finish_resume_work;
517bafff 320 struct delayed_work gadget_work;
32c3b94e 321 u16 hwvers;
550a7375 322
af5ec14d 323 u16 intrrxe;
b18d26f6 324 u16 intrtxe;
550a7375
FB		 325/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
326#define MUSB_PORT_STAT_RESUME (1 << 31)
327
328 u32 port1_status;
329
550a7375
FB		 330 unsigned long rh_timer;
331
332 enum musb_h_ep0_state ep0_stage;
333
334 /* bulk traffic normally dedicates endpoint hardware, and each
335 * direction has its own ring of host side endpoints.
336 * we try to progress the transfer at the head of each endpoint's
337 * queue until it completes or NAKs too much; then we try the next
338 * endpoint.
339 */
340 struct musb_hw_ep *bulk_ep;
341
342 struct list_head control; /* of musb_qh */
343 struct list_head in_bulk; /* of musb_qh */
344 struct list_head out_bulk; /* of musb_qh */
ea2f35c0 345 struct list_head pending_list; /* pending work list */
f7f9d63e
DB		 346
347 struct timer_list otg_timer;
594632ef 348 struct notifier_block nb;
550a7375 349
550a7375
FB		 350 struct dma_controller *dma_controller;
351
352 struct device *controller;
353 void __iomem *ctrl_base;
354 void __iomem *mregs;
355
ebf39920 356#if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
550a7375
FB		 357 dma_addr_t async;
358 dma_addr_t sync;
359 void __iomem *sync_va;
8c240dc1 360 u8 tusb_revision;
550a7375
FB		 361#endif
362
363 /* passed down from chip/board specific irq handlers */
364 u8 int_usb;
365 u16 int_rx;
366 u16 int_tx;
367
86753811 368 struct usb_phy *xceiv;
3e3101d5 369 struct phy *phy;
550a7375
FB		 370
371 int nIrq;
c48a5155 372 unsigned irq_wake:1;
550a7375
FB		 373
374 struct musb_hw_ep endpoints[MUSB_C_NUM_EPS];
375#define control_ep endpoints
376
377#define VBUSERR_RETRY_COUNT 3
378 u16 vbuserr_retry;
379 u16 epmask;
380 u8 nr_endpoints;
381
550a7375
FB		 382 int (*board_set_power)(int state);
383
550a7375
FB		 384 u8 min_power; /* vbus for periph, in mA/2 */
385
9ad96e69 386 int port_mode; /* MUSB_PORT_MODE_* */
467d5c98 387 bool session;
2bff3916 388 unsigned long quirk_retries;
550a7375
FB		 389 bool is_host;
390
391 int a_wait_bcon; /* VBUS timeout in msecs */
392 unsigned long idle_timeout; /* Next timeout in jiffies */
393
c723bd6e 394 unsigned is_initialized:1;
ea2f35c0 395 unsigned is_runtime_suspended:1;
c723bd6e 396
550a7375
FB		 397 /* active means connected and not suspended */
398 unsigned is_active:1;
399
400 unsigned is_multipoint:1;
550a7375 401
a483d706
AKG		 402 unsigned hb_iso_rx:1; /* high bandwidth iso rx? */
403 unsigned hb_iso_tx:1; /* high bandwidth iso tx? */
51bf0d0e 404 unsigned dyn_fifo:1; /* dynamic FIFO supported? */
a483d706 405
7ed069c1 406 unsigned bulk_split:1;
550a7375 407#define can_bulk_split(musb,type) \
7ed069c1 408 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
550a7375 409
7ed069c1 410 unsigned bulk_combine:1;
550a7375 411#define can_bulk_combine(musb,type) \
7ed069c1 412 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
550a7375 413
550a7375
FB		 414 /* is_suspended means USB B_PERIPHERAL suspend */
415 unsigned is_suspended:1;
416
417 /* may_wakeup means remote wakeup is enabled */
418 unsigned may_wakeup:1;
419
420 /* is_self_powered is reported in device status and the
421 * config descriptor. is_bus_powered means B_PERIPHERAL
422 * draws some VBUS current; both can be true.
423 */
424 unsigned is_self_powered:1;
425 unsigned is_bus_powered:1;
426
427 unsigned set_address:1;
428 unsigned test_mode:1;
429 unsigned softconnect:1;
5990378b
FB		 430
431 u8 address;
432 u8 test_mode_nr;
433 u16 ackpend; /* ep0 */
434 enum musb_g_ep0_state ep0_state;
435 struct usb_gadget g; /* the gadget */
436 struct usb_gadget_driver *gadget_driver; /* its driver */
74c2e936 437 struct usb_hcd *hcd; /* the usb hcd */
5990378b 438
06624818
FB		 439 /*
440 * FIXME: Remove this flag.
441 *
442 * This is only added to allow Blackfin to work
443 * with current driver. For some unknown reason
444 * Blackfin doesn't work with double buffering
445 * and that's enabled by default.
446 *
447 * We added this flag to forcefully disable double
448 * buffering until we get it working.
449 */
fc87e080 450 unsigned double_buffer_not_ok:1;
550a7375 451
ead22caf 452 const struct musb_hdrc_config *config;
ca6d1b13 453
8d2421e6
AKG		 454 int xceiv_old_state;
455#ifdef CONFIG_DEBUG_FS
456 struct dentry *debugfs_root;
550a7375
FB		 457#endif
458};
459
6cc2af6d
HG		 460/* This must be included after struct musb is defined */
461#include "musb_regs.h"
462
550a7375
FB		 463static inline struct musb *gadget_to_musb(struct usb_gadget *g)
464{
465 return container_of(g, struct musb, g);
466}
550a7375 467
c6cf8b00
BW		 468#ifdef CONFIG_BLACKFIN
469static inline int musb_read_fifosize(struct musb *musb,
470 struct musb_hw_ep *hw_ep, u8 epnum)
471{
472 musb->nr_endpoints++;
473 musb->epmask |= (1 << epnum);
474
475 if (epnum < 5) {
476 hw_ep->max_packet_sz_tx = 128;
477 hw_ep->max_packet_sz_rx = 128;
478 } else {
479 hw_ep->max_packet_sz_tx = 1024;
480 hw_ep->max_packet_sz_rx = 1024;
481 }
482 hw_ep->is_shared_fifo = false;
483
484 return 0;
485}
486
487static inline void musb_configure_ep0(struct musb *musb)
488{
489 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
490 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
491 musb->endpoints[0].is_shared_fifo = true;
492}
493
494#else
495
496static inline int musb_read_fifosize(struct musb *musb,
497 struct musb_hw_ep *hw_ep, u8 epnum)
498{
a156544b 499 void __iomem *mbase = musb->mregs;
c6cf8b00
BW		 500 u8 reg = 0;
501
502 /* read from core using indexed model */
d026e9c7 503 reg = musb_readb(mbase, musb->io.ep_offset(epnum, MUSB_FIFOSIZE));
c6cf8b00
BW		 504 /* 0's returned when no more endpoints */
505 if (!reg)
506 return -ENODEV;
507
508 musb->nr_endpoints++;
509 musb->epmask |= (1 << epnum);
510
511 hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
512
513 /* shared TX/RX FIFO? */
514 if ((reg & 0xf0) == 0xf0) {
515 hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
516 hw_ep->is_shared_fifo = true;
517 return 0;
518 } else {
519 hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
520 hw_ep->is_shared_fifo = false;
521 }
522
523 return 0;
524}
525
526static inline void musb_configure_ep0(struct musb *musb)
527{
528 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
529 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
32233716 530 musb->endpoints[0].is_shared_fifo = true;
c6cf8b00
BW		 531}
532#endif /* CONFIG_BLACKFIN */
533
550a7375
FB		 534
535/***************************** Glue it together *****************************/
536
537extern const char musb_driver_name[];
538
550a7375 539extern void musb_stop(struct musb *musb);
001dd84a 540extern void musb_start(struct musb *musb);
550a7375
FB		 541
542extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
543extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
544
545extern void musb_load_testpacket(struct musb *);
546
547extern irqreturn_t musb_interrupt(struct musb *);
548
550a7375
FB		 549extern void musb_hnp_stop(struct musb *musb);
550
ea2f35c0
TL		 551int musb_queue_resume_work(struct musb *musb,
552 int (*callback)(struct musb *musb, void *data),
553 void *data);
554
743411b3
FB		 555static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
556{
557 if (musb->ops->set_vbus)
558 musb->ops->set_vbus(musb, is_on);
559}
560
561static inline void musb_platform_enable(struct musb *musb)
562{
563 if (musb->ops->enable)
564 musb->ops->enable(musb);
565}
566
567static inline void musb_platform_disable(struct musb *musb)
568{
569 if (musb->ops->disable)
570 musb->ops->disable(musb);
571}
572
573static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
574{
575 if (!musb->ops->set_mode)
576 return 0;
577
578 return musb->ops->set_mode(musb, mode);
579}
580
581static inline void musb_platform_try_idle(struct musb *musb,
582 unsigned long timeout)
583{
584 if (musb->ops->try_idle)
585 musb->ops->try_idle(musb, timeout);
586}
587
b28a6432 588static inline int musb_platform_recover(struct musb *musb)
1e42d20c 589{
b28a6432
FB		 590 if (!musb->ops->recover)
591 return 0;
d871c622 592
b28a6432 593 return musb->ops->recover(musb);
1e42d20c
DM		 594}
595
743411b3
FB		 596static inline int musb_platform_get_vbus_status(struct musb *musb)
597{
598 if (!musb->ops->vbus_status)
3bbafac8 599 return -EINVAL;
743411b3
FB		 600
601 return musb->ops->vbus_status(musb);
602}
603
604static inline int musb_platform_init(struct musb *musb)
605{
606 if (!musb->ops->init)
607 return -EINVAL;
608
609 return musb->ops->init(musb);
610}
611
612static inline int musb_platform_exit(struct musb *musb)
613{
614 if (!musb->ops->exit)
615 return -EINVAL;
616
617 return musb->ops->exit(musb);
618}
619
591fa9dd
HG		 620static inline void musb_platform_pre_root_reset_end(struct musb *musb)
621{
622 if (musb->ops->pre_root_reset_end)
623 musb->ops->pre_root_reset_end(musb);
624}
625
626static inline void musb_platform_post_root_reset_end(struct musb *musb)
627{
628 if (musb->ops->post_root_reset_end)
629 musb->ops->post_root_reset_end(musb);
630}
631
6def85a3
BL		 632static inline void musb_platform_clear_ep_rxintr(struct musb *musb, int epnum)
633{
634 if (musb->ops->clear_ep_rxintr)
635 musb->ops->clear_ep_rxintr(musb, epnum);
636}
637
830fc64c
PK		 638/*
639 * gets the "dr_mode" property from DT and converts it into musb_mode
640 * if the property is not found or not recognized returns MUSB_OTG
641 */
642extern enum musb_mode musb_get_mode(struct device *dev);
643
550a7375 644#endif /* __MUSB_CORE_H__ */
Linux 6.x block layer and io_uring tree(s)