Commit | Line | Data |
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66d4eadd SS |
1 | /* |
2 | * xHCI host controller driver PCI Bus Glue. | |
3 | * | |
4 | * Copyright (C) 2008 Intel Corp. | |
5 | * | |
6 | * Author: Sarah Sharp | |
7 | * Some code borrowed from the Linux EHCI driver. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, but | |
14 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
15 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
16 | * for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software Foundation, | |
20 | * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | #include <linux/pci.h> | |
24 | ||
25 | #include "xhci.h" | |
26 | ||
ac9d8fe7 SS |
27 | /* Device for a quirk */ |
28 | #define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73 | |
29 | #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000 | |
30 | ||
66d4eadd SS |
31 | static const char hcd_name[] = "xhci_hcd"; |
32 | ||
33 | /* called after powerup, by probe or system-pm "wakeup" */ | |
34 | static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev) | |
35 | { | |
36 | /* | |
37 | * TODO: Implement finding debug ports later. | |
38 | * TODO: see if there are any quirks that need to be added to handle | |
39 | * new extended capabilities. | |
40 | */ | |
41 | ||
42 | /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */ | |
43 | if (!pci_set_mwi(pdev)) | |
44 | xhci_dbg(xhci, "MWI active\n"); | |
45 | ||
46 | xhci_dbg(xhci, "Finished xhci_pci_reinit\n"); | |
47 | return 0; | |
48 | } | |
49 | ||
50 | /* called during probe() after chip reset completes */ | |
51 | static int xhci_pci_setup(struct usb_hcd *hcd) | |
52 | { | |
53 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
54 | struct pci_dev *pdev = to_pci_dev(hcd->self.controller); | |
55 | int retval; | |
006d5820 | 56 | u32 temp; |
66d4eadd | 57 | |
bc88d2eb | 58 | hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2; |
4c1bd3d7 | 59 | |
b02d0ed6 SS |
60 | xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL); |
61 | if (!xhci) | |
62 | return -ENOMEM; | |
63 | *((struct xhci_hcd **) hcd->hcd_priv) = xhci; | |
64 | xhci->main_hcd = hcd; | |
65 | ||
66d4eadd SS |
66 | xhci->cap_regs = hcd->regs; |
67 | xhci->op_regs = hcd->regs + | |
68 | HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase)); | |
69 | xhci->run_regs = hcd->regs + | |
70 | (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK); | |
71 | /* Cache read-only capability registers */ | |
72 | xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1); | |
73 | xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2); | |
74 | xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3); | |
ac1c1b7f SS |
75 | xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase); |
76 | xhci->hci_version = HC_VERSION(xhci->hcc_params); | |
66d4eadd SS |
77 | xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params); |
78 | xhci_print_registers(xhci); | |
79 | ||
ac9d8fe7 SS |
80 | /* Look for vendor-specific quirks */ |
81 | if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC && | |
82 | pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK && | |
83 | pdev->revision == 0x0) { | |
84 | xhci->quirks |= XHCI_RESET_EP_QUIRK; | |
85 | xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure" | |
86 | " endpoint cmd after reset endpoint\n"); | |
87 | } | |
0238634d SS |
88 | if (pdev->vendor == PCI_VENDOR_ID_NEC) |
89 | xhci->quirks |= XHCI_NEC_HOST; | |
ac9d8fe7 | 90 | |
66d4eadd SS |
91 | /* Make sure the HC is halted. */ |
92 | retval = xhci_halt(xhci); | |
93 | if (retval) | |
b02d0ed6 | 94 | goto error; |
66d4eadd SS |
95 | |
96 | xhci_dbg(xhci, "Resetting HCD\n"); | |
97 | /* Reset the internal HC memory state and registers. */ | |
98 | retval = xhci_reset(xhci); | |
99 | if (retval) | |
b02d0ed6 | 100 | goto error; |
66d4eadd SS |
101 | xhci_dbg(xhci, "Reset complete\n"); |
102 | ||
006d5820 SS |
103 | temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params); |
104 | if (HCC_64BIT_ADDR(temp)) { | |
105 | xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n"); | |
106 | dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)); | |
107 | } else { | |
108 | dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32)); | |
109 | } | |
110 | ||
66d4eadd SS |
111 | xhci_dbg(xhci, "Calling HCD init\n"); |
112 | /* Initialize HCD and host controller data structures. */ | |
113 | retval = xhci_init(hcd); | |
114 | if (retval) | |
b02d0ed6 | 115 | goto error; |
66d4eadd SS |
116 | xhci_dbg(xhci, "Called HCD init\n"); |
117 | ||
118 | pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn); | |
119 | xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn); | |
120 | ||
121 | /* Find any debug ports */ | |
b02d0ed6 SS |
122 | retval = xhci_pci_reinit(xhci, pdev); |
123 | if (!retval) | |
124 | return retval; | |
125 | ||
126 | error: | |
127 | kfree(xhci); | |
128 | return retval; | |
129 | } | |
130 | ||
131 | static void xhci_pci_remove(struct pci_dev *dev) | |
132 | { | |
133 | struct xhci_hcd *xhci; | |
134 | ||
135 | xhci = hcd_to_xhci(pci_get_drvdata(dev)); | |
136 | usb_hcd_pci_remove(dev); | |
137 | kfree(xhci); | |
66d4eadd SS |
138 | } |
139 | ||
5535b1d5 AX |
140 | #ifdef CONFIG_PM |
141 | static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup) | |
142 | { | |
143 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
144 | int retval = 0; | |
145 | ||
146 | if (hcd->state != HC_STATE_SUSPENDED) | |
147 | return -EINVAL; | |
148 | ||
149 | retval = xhci_suspend(xhci); | |
150 | ||
151 | return retval; | |
152 | } | |
153 | ||
154 | static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated) | |
155 | { | |
156 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); | |
157 | int retval = 0; | |
158 | ||
159 | retval = xhci_resume(xhci, hibernated); | |
160 | return retval; | |
161 | } | |
162 | #endif /* CONFIG_PM */ | |
163 | ||
66d4eadd SS |
164 | static const struct hc_driver xhci_pci_hc_driver = { |
165 | .description = hcd_name, | |
166 | .product_desc = "xHCI Host Controller", | |
b02d0ed6 | 167 | .hcd_priv_size = sizeof(struct xhci_hcd *), |
66d4eadd SS |
168 | |
169 | /* | |
170 | * generic hardware linkage | |
171 | */ | |
7f84eef0 | 172 | .irq = xhci_irq, |
66d4eadd SS |
173 | .flags = HCD_MEMORY | HCD_USB3, |
174 | ||
175 | /* | |
176 | * basic lifecycle operations | |
177 | */ | |
178 | .reset = xhci_pci_setup, | |
179 | .start = xhci_run, | |
5535b1d5 AX |
180 | #ifdef CONFIG_PM |
181 | .pci_suspend = xhci_pci_suspend, | |
182 | .pci_resume = xhci_pci_resume, | |
183 | #endif | |
66d4eadd SS |
184 | .stop = xhci_stop, |
185 | .shutdown = xhci_shutdown, | |
186 | ||
3ffbba95 SS |
187 | /* |
188 | * managing i/o requests and associated device resources | |
189 | */ | |
d0e96f5a SS |
190 | .urb_enqueue = xhci_urb_enqueue, |
191 | .urb_dequeue = xhci_urb_dequeue, | |
3ffbba95 SS |
192 | .alloc_dev = xhci_alloc_dev, |
193 | .free_dev = xhci_free_dev, | |
eab1cafc SS |
194 | .alloc_streams = xhci_alloc_streams, |
195 | .free_streams = xhci_free_streams, | |
f94e0186 SS |
196 | .add_endpoint = xhci_add_endpoint, |
197 | .drop_endpoint = xhci_drop_endpoint, | |
a1587d97 | 198 | .endpoint_reset = xhci_endpoint_reset, |
f94e0186 SS |
199 | .check_bandwidth = xhci_check_bandwidth, |
200 | .reset_bandwidth = xhci_reset_bandwidth, | |
3ffbba95 | 201 | .address_device = xhci_address_device, |
b356b7c7 | 202 | .update_hub_device = xhci_update_hub_device, |
f0615c45 | 203 | .reset_device = xhci_discover_or_reset_device, |
3ffbba95 | 204 | |
66d4eadd SS |
205 | /* |
206 | * scheduling support | |
207 | */ | |
208 | .get_frame_number = xhci_get_frame, | |
209 | ||
0f2a7930 SS |
210 | /* Root hub support */ |
211 | .hub_control = xhci_hub_control, | |
212 | .hub_status_data = xhci_hub_status_data, | |
9777e3ce AX |
213 | .bus_suspend = xhci_bus_suspend, |
214 | .bus_resume = xhci_bus_resume, | |
66d4eadd SS |
215 | }; |
216 | ||
217 | /*-------------------------------------------------------------------------*/ | |
218 | ||
219 | /* PCI driver selection metadata; PCI hotplugging uses this */ | |
220 | static const struct pci_device_id pci_ids[] = { { | |
221 | /* handle any USB 3.0 xHCI controller */ | |
222 | PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0), | |
223 | .driver_data = (unsigned long) &xhci_pci_hc_driver, | |
224 | }, | |
225 | { /* end: all zeroes */ } | |
226 | }; | |
227 | MODULE_DEVICE_TABLE(pci, pci_ids); | |
228 | ||
229 | /* pci driver glue; this is a "new style" PCI driver module */ | |
230 | static struct pci_driver xhci_pci_driver = { | |
231 | .name = (char *) hcd_name, | |
232 | .id_table = pci_ids, | |
233 | ||
234 | .probe = usb_hcd_pci_probe, | |
b02d0ed6 | 235 | .remove = xhci_pci_remove, |
66d4eadd SS |
236 | /* suspend and resume implemented later */ |
237 | ||
238 | .shutdown = usb_hcd_pci_shutdown, | |
5535b1d5 AX |
239 | #ifdef CONFIG_PM_SLEEP |
240 | .driver = { | |
241 | .pm = &usb_hcd_pci_pm_ops | |
242 | }, | |
243 | #endif | |
66d4eadd SS |
244 | }; |
245 | ||
326b4810 | 246 | int xhci_register_pci(void) |
66d4eadd SS |
247 | { |
248 | return pci_register_driver(&xhci_pci_driver); | |
249 | } | |
250 | ||
326b4810 | 251 | void xhci_unregister_pci(void) |
66d4eadd SS |
252 | { |
253 | pci_unregister_driver(&xhci_pci_driver); | |
254 | } |