[linux-2.6-block.git] / drivers / usb / host / xhci-hub.c

/*
 * xHCI host controller driver
 *
 * Copyright (C) 2008 Intel Corp.
 *
 * Author: Sarah Sharp
 * Some code borrowed from the Linux EHCI driver.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
 * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 * for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software Foundation,
 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <asm/unaligned.h>

#include "xhci.h"

static void xhci_hub_descriptor(struct xhci_hcd *xhci,
		struct usb_hub_descriptor *desc)
{
	int ports;
	u16 temp;

	ports = HCS_MAX_PORTS(xhci->hcs_params1);

	/* USB 3.0 hubs have a different descriptor, but we fake this for now */
	desc->bDescriptorType = 0x29;
	desc->bPwrOn2PwrGood = 10;	/* xhci section 5.4.9 says 20ms max */
	desc->bHubContrCurrent = 0;

	desc->bNbrPorts = ports;
	temp = 1 + (ports / 8);
	desc->bDescLength = 7 + 2 * temp;

	/* Why does core/hcd.h define bitmap?  It's just confusing. */
	memset(&desc->DeviceRemovable[0], 0, temp);
	memset(&desc->DeviceRemovable[temp], 0xff, temp);

	/* Ugh, these should be #defines, FIXME */
	/* Using table 11-13 in USB 2.0 spec. */
	temp = 0;
	/* Bits 1:0 - support port power switching, or power always on */
	if (HCC_PPC(xhci->hcc_params))
		temp |= 0x0001;
	else
		temp |= 0x0002;
	/* Bit  2 - root hubs are not part of a compound device */
	/* Bits 4:3 - individual port over current protection */
	temp |= 0x0008;
	/* Bits 6:5 - no TTs in root ports */
	/* Bit  7 - no port indicators */
	desc->wHubCharacteristics = (__force __u16) cpu_to_le16(temp);
}

static unsigned int xhci_port_speed(unsigned int port_status)
{
	if (DEV_LOWSPEED(port_status))
		return USB_PORT_STAT_LOW_SPEED;
	if (DEV_HIGHSPEED(port_status))
		return USB_PORT_STAT_HIGH_SPEED;
	if (DEV_SUPERSPEED(port_status))
		return USB_PORT_STAT_SUPER_SPEED;
	/*
	 * FIXME: Yes, we should check for full speed, but the core uses that as
	 * a default in portspeed() in usb/core/hub.c (which is the only place
	 * USB_PORT_STAT_*_SPEED is used).
	 */
	return 0;
}

/*
 * These bits are Read Only (RO) and should be saved and written to the
 * registers: 0, 3, 10:13, 30
 * connect status, over-current status, port speed, and device removable.
 * connect status and port speed are also sticky - meaning they're in
 * the AUX well and they aren't changed by a hot, warm, or cold reset.
 */
#define	XHCI_PORT_RO	((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
/*
 * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
 * bits 5:8, 9, 14:15, 25:27
 * link state, port power, port indicator state, "wake on" enable state
 */
#define XHCI_PORT_RWS	((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
/*
 * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
 * bit 4 (port reset)
 */
#define	XHCI_PORT_RW1S	((1<<4))
/*
 * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
 * bits 1, 17, 18, 19, 20, 21, 22, 23
 * port enable/disable, and
 * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
 * over-current, reset, link state, and L1 change
 */
#define XHCI_PORT_RW1CS	((1<<1) | (0x7f<<17))
/*
 * Bit 16 is RW, and writing a '1' to it causes the link state control to be
 * latched in
 */
#define	XHCI_PORT_RW	((1<<16))
/*
 * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
 * bits 2, 24, 28:31
 */
#define	XHCI_PORT_RZ	((1<<2) | (1<<24) | (0xf<<28))

/*
 * Given a port state, this function returns a value that would result in the
 * port being in the same state, if the value was written to the port status
 * control register.
 * Save Read Only (RO) bits and save read/write bits where
 * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
 * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
 */
u32 xhci_port_state_to_neutral(u32 state)
{
	/* Save read-only status and port state */
	return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
}

/*
 * find slot id based on port number.
 */
int xhci_find_slot_id_by_port(struct xhci_hcd *xhci, u16 port)
{
	int slot_id;
	int i;

	slot_id = 0;
	for (i = 0; i < MAX_HC_SLOTS; i++) {
		if (!xhci->devs[i])
			continue;
		if (xhci->devs[i]->port == port) {
			slot_id = i;
			break;
		}
	}

	return slot_id;
}

/*
 * Stop device
 * It issues stop endpoint command for EP 0 to 30. And wait the last command
 * to complete.
 * suspend will set to 1, if suspend bit need to set in command.
 */
static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
{
	struct xhci_virt_device *virt_dev;
	struct xhci_command *cmd;
	unsigned long flags;
	int timeleft;
	int ret;
	int i;

	ret = 0;
	virt_dev = xhci->devs[slot_id];
	cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
	if (!cmd) {
		xhci_dbg(xhci, "Couldn't allocate command structure.\n");
		return -ENOMEM;
	}

	spin_lock_irqsave(&xhci->lock, flags);
	for (i = LAST_EP_INDEX; i > 0; i--) {
		if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue)
			xhci_queue_stop_endpoint(xhci, slot_id, i, suspend);
	}
	cmd->command_trb = xhci->cmd_ring->enqueue;
	list_add_tail(&cmd->cmd_list, &virt_dev->cmd_list);
	xhci_queue_stop_endpoint(xhci, slot_id, 0, suspend);
	xhci_ring_cmd_db(xhci);
	spin_unlock_irqrestore(&xhci->lock, flags);

	/* Wait for last stop endpoint command to finish */
	timeleft = wait_for_completion_interruptible_timeout(
			cmd->completion,
			USB_CTRL_SET_TIMEOUT);
	if (timeleft <= 0) {
		xhci_warn(xhci, "%s while waiting for stop endpoint command\n",
				timeleft == 0 ? "Timeout" : "Signal");
		spin_lock_irqsave(&xhci->lock, flags);
		/* The timeout might have raced with the event ring handler, so
		 * only delete from the list if the item isn't poisoned.
		 */
		if (cmd->cmd_list.next != LIST_POISON1)
			list_del(&cmd->cmd_list);
		spin_unlock_irqrestore(&xhci->lock, flags);
		ret = -ETIME;
		goto command_cleanup;
	}

command_cleanup:
	xhci_free_command(xhci, cmd);
	return ret;
}

/*
 * Ring device, it rings the all doorbells unconditionally.
 */
void xhci_ring_device(struct xhci_hcd *xhci, int slot_id)
{
	int i;

	for (i = 0; i < LAST_EP_INDEX + 1; i++)
		if (xhci->devs[slot_id]->eps[i].ring &&
		    xhci->devs[slot_id]->eps[i].ring->dequeue)
			xhci_ring_ep_doorbell(xhci, slot_id, i, 0);

	return;
}

static void xhci_disable_port(struct xhci_hcd *xhci, u16 wIndex,
		u32 __iomem *addr, u32 port_status)
{
	/* Write 1 to disable the port */
	xhci_writel(xhci, port_status | PORT_PE, addr);
	port_status = xhci_readl(xhci, addr);
	xhci_dbg(xhci, "disable port, actual port %d status  = 0x%x\n",
			wIndex, port_status);
}

static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
		u16 wIndex, u32 __iomem *addr, u32 port_status)
{
	char *port_change_bit;
	u32 status;

	switch (wValue) {
	case USB_PORT_FEAT_C_RESET:
		status = PORT_RC;
		port_change_bit = "reset";
		break;
	case USB_PORT_FEAT_C_CONNECTION:
		status = PORT_CSC;
		port_change_bit = "connect";
		break;
	case USB_PORT_FEAT_C_OVER_CURRENT:
		status = PORT_OCC;
		port_change_bit = "over-current";
		break;
	case USB_PORT_FEAT_C_ENABLE:
		status = PORT_PEC;
		port_change_bit = "enable/disable";
		break;
	case USB_PORT_FEAT_C_SUSPEND:
		status = PORT_PLC;
		port_change_bit = "suspend/resume";
		break;
	default:
		/* Should never happen */
		return;
	}
	/* Change bits are all write 1 to clear */
	xhci_writel(xhci, port_status | status, addr);
	port_status = xhci_readl(xhci, addr);
	xhci_dbg(xhci, "clear port %s change, actual port %d status  = 0x%x\n",
			port_change_bit, wIndex, port_status);
}

int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
		u16 wIndex, char *buf, u16 wLength)
{
	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);
	int ports;
	unsigned long flags;
	u32 temp, temp1, status;
	int retval = 0;
	u32 __iomem *addr;
	int slot_id;

	ports = HCS_MAX_PORTS(xhci->hcs_params1);

	spin_lock_irqsave(&xhci->lock, flags);
	switch (typeReq) {
	case GetHubStatus:
		/* No power source, over-current reported per port */
		memset(buf, 0, 4);
		break;
	case GetHubDescriptor:
		xhci_hub_descriptor(xhci, (struct usb_hub_descriptor *) buf);
		break;
	case GetPortStatus:
		if (!wIndex || wIndex > ports)
			goto error;
		wIndex--;
		status = 0;
		addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);
		temp = xhci_readl(xhci, addr);
		xhci_dbg(xhci, "get port status, actual port %d status  = 0x%x\n", wIndex, temp);

		/* wPortChange bits */
		if (temp & PORT_CSC)
			status |= USB_PORT_STAT_C_CONNECTION << 16;
		if (temp & PORT_PEC)
			status |= USB_PORT_STAT_C_ENABLE << 16;
		if ((temp & PORT_OCC))
			status |= USB_PORT_STAT_C_OVERCURRENT << 16;
		/*
		 * FIXME ignoring reset and USB 2.1/3.0 specific
		 * changes
		 */
		if ((temp & PORT_PLS_MASK) == XDEV_U3
			&& (temp & PORT_POWER))
			status |= 1 << USB_PORT_FEAT_SUSPEND;
		if ((temp & PORT_PLS_MASK) == XDEV_RESUME) {
			if ((temp & PORT_RESET) || !(temp & PORT_PE))
				goto error;
			if (!DEV_SUPERSPEED(temp) && time_after_eq(jiffies,
						xhci->resume_done[wIndex])) {
				xhci_dbg(xhci, "Resume USB2 port %d\n",
					wIndex + 1);
				xhci->resume_done[wIndex] = 0;
				temp1 = xhci_port_state_to_neutral(temp);
				temp1 &= ~PORT_PLS_MASK;
				temp1 |= PORT_LINK_STROBE | XDEV_U0;
				xhci_writel(xhci, temp1, addr);

				xhci_dbg(xhci, "set port %d resume\n",
					wIndex + 1);
				slot_id = xhci_find_slot_id_by_port(xhci,
								 wIndex + 1);
				if (!slot_id) {
					xhci_dbg(xhci, "slot_id is zero\n");
					goto error;
				}
				xhci_ring_device(xhci, slot_id);
				xhci->port_c_suspend[wIndex >> 5] |=
						1 << (wIndex & 31);
				xhci->suspended_ports[wIndex >> 5] &=
						~(1 << (wIndex & 31));
			}
		}
		if ((temp & PORT_PLS_MASK) == XDEV_U0
			&& (temp & PORT_POWER)
			&& (xhci->suspended_ports[wIndex >> 5] &
			    (1 << (wIndex & 31)))) {
			xhci->suspended_ports[wIndex >> 5] &=
					~(1 << (wIndex & 31));
			xhci->port_c_suspend[wIndex >> 5] |=
					1 << (wIndex & 31);
		}
		if (temp & PORT_CONNECT) {
			status |= USB_PORT_STAT_CONNECTION;
			status |= xhci_port_speed(temp);
		}
		if (temp & PORT_PE)
			status |= USB_PORT_STAT_ENABLE;
		if (temp & PORT_OC)
			status |= USB_PORT_STAT_OVERCURRENT;
		if (temp & PORT_RESET)
			status |= USB_PORT_STAT_RESET;
		if (temp & PORT_POWER)
			status |= USB_PORT_STAT_POWER;
		if (xhci->port_c_suspend[wIndex >> 5] & (1 << (wIndex & 31)))
			status |= 1 << USB_PORT_FEAT_C_SUSPEND;
		xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
		put_unaligned(cpu_to_le32(status), (__le32 *) buf);
		break;
	case SetPortFeature:
		wIndex &= 0xff;
		if (!wIndex || wIndex > ports)
			goto error;
		wIndex--;
		addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);
		temp = xhci_readl(xhci, addr);
		temp = xhci_port_state_to_neutral(temp);
		switch (wValue) {
		case USB_PORT_FEAT_SUSPEND:
			temp = xhci_readl(xhci, addr);
			/* In spec software should not attempt to suspend
			 * a port unless the port reports that it is in the
			 * enabled (PED = ‘1’,PLS < ‘3’) state.
			 */
			if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)
				|| (temp & PORT_PLS_MASK) >= XDEV_U3) {
				xhci_warn(xhci, "USB core suspending device "
					  "not in U0/U1/U2.\n");
				goto error;
			}

			slot_id = xhci_find_slot_id_by_port(xhci, wIndex + 1);
			if (!slot_id) {
				xhci_warn(xhci, "slot_id is zero\n");
				goto error;
			}
			/* unlock to execute stop endpoint commands */
			spin_unlock_irqrestore(&xhci->lock, flags);
			xhci_stop_device(xhci, slot_id, 1);
			spin_lock_irqsave(&xhci->lock, flags);

			temp = xhci_port_state_to_neutral(temp);
			temp &= ~PORT_PLS_MASK;
			temp |= PORT_LINK_STROBE | XDEV_U3;
			xhci_writel(xhci, temp, addr);

			spin_unlock_irqrestore(&xhci->lock, flags);
			msleep(10); /* wait device to enter */
			spin_lock_irqsave(&xhci->lock, flags);

			temp = xhci_readl(xhci, addr);
			xhci->suspended_ports[wIndex >> 5] |=
					1 << (wIndex & (31));
			break;
		case USB_PORT_FEAT_POWER:
			/*
			 * Turn on ports, even if there isn't per-port switching.
			 * HC will report connect events even before this is set.
			 * However, khubd will ignore the roothub events until
			 * the roothub is registered.
			 */
			xhci_writel(xhci, temp | PORT_POWER, addr);

			temp = xhci_readl(xhci, addr);
			xhci_dbg(xhci, "set port power, actual port %d status  = 0x%x\n", wIndex, temp);
			break;
		case USB_PORT_FEAT_RESET:
			temp = (temp | PORT_RESET);
			xhci_writel(xhci, temp, addr);

			temp = xhci_readl(xhci, addr);
			xhci_dbg(xhci, "set port reset, actual port %d status  = 0x%x\n", wIndex, temp);
			break;
		default:
			goto error;
		}
		temp = xhci_readl(xhci, addr); /* unblock any posted writes */
		break;
	case ClearPortFeature:
		if (!wIndex || wIndex > ports)
			goto error;
		wIndex--;
		addr = &xhci->op_regs->port_status_base +
			NUM_PORT_REGS*(wIndex & 0xff);
		temp = xhci_readl(xhci, addr);
		temp = xhci_port_state_to_neutral(temp);
		switch (wValue) {
		case USB_PORT_FEAT_SUSPEND:
			temp = xhci_readl(xhci, addr);
			xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n");
			xhci_dbg(xhci, "PORTSC %04x\n", temp);
			if (temp & PORT_RESET)
				goto error;
			if (temp & XDEV_U3) {
				if ((temp & PORT_PE) == 0)
					goto error;
				if (DEV_SUPERSPEED(temp)) {
					temp = xhci_port_state_to_neutral(temp);
					temp &= ~PORT_PLS_MASK;
					temp |= PORT_LINK_STROBE | XDEV_U0;
					xhci_writel(xhci, temp, addr);
					xhci_readl(xhci, addr);
				} else {
					temp = xhci_port_state_to_neutral(temp);
					temp &= ~PORT_PLS_MASK;
					temp |= PORT_LINK_STROBE | XDEV_RESUME;
					xhci_writel(xhci, temp, addr);

					spin_unlock_irqrestore(&xhci->lock,
							       flags);
					msleep(20);
					spin_lock_irqsave(&xhci->lock, flags);

					temp = xhci_readl(xhci, addr);
					temp = xhci_port_state_to_neutral(temp);
					temp &= ~PORT_PLS_MASK;
					temp |= PORT_LINK_STROBE | XDEV_U0;
					xhci_writel(xhci, temp, addr);
				}
				xhci->port_c_suspend[wIndex >> 5] |=
						1 << (wIndex & 31);
			}

			slot_id = xhci_find_slot_id_by_port(xhci, wIndex + 1);
			if (!slot_id) {
				xhci_dbg(xhci, "slot_id is zero\n");
				goto error;
			}
			xhci_ring_device(xhci, slot_id);
			break;
		case USB_PORT_FEAT_C_SUSPEND:
			xhci->port_c_suspend[wIndex >> 5] &=
					~(1 << (wIndex & 31));
		case USB_PORT_FEAT_C_RESET:
		case USB_PORT_FEAT_C_CONNECTION:
		case USB_PORT_FEAT_C_OVER_CURRENT:
		case USB_PORT_FEAT_C_ENABLE:
			xhci_clear_port_change_bit(xhci, wValue, wIndex,
					addr, temp);
			break;
		case USB_PORT_FEAT_ENABLE:
			xhci_disable_port(xhci, wIndex, addr, temp);
			break;
		default:
			goto error;
		}
		break;
	default:
error:
		/* "stall" on error */
		retval = -EPIPE;
	}
	spin_unlock_irqrestore(&xhci->lock, flags);
	return retval;
}

/*
 * Returns 0 if the status hasn't changed, or the number of bytes in buf.
 * Ports are 0-indexed from the HCD point of view,
 * and 1-indexed from the USB core pointer of view.
 *
 * Note that the status change bits will be cleared as soon as a port status
 * change event is generated, so we use the saved status from that event.
 */
int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
{
	unsigned long flags;
	u32 temp, status;
	u32 mask;
	int i, retval;
	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);
	int ports;
	u32 __iomem *addr;

	ports = HCS_MAX_PORTS(xhci->hcs_params1);

	/* Initial status is no changes */
	retval = (ports + 8) / 8;
	memset(buf, 0, retval);
	status = 0;

	mask = PORT_CSC | PORT_PEC | PORT_OCC;

	spin_lock_irqsave(&xhci->lock, flags);
	/* For each port, did anything change?  If so, set that bit in buf. */
	for (i = 0; i < ports; i++) {
		addr = &xhci->op_regs->port_status_base +
			NUM_PORT_REGS*i;
		temp = xhci_readl(xhci, addr);
		if ((temp & mask) != 0 ||
			(xhci->port_c_suspend[i >> 5] &	1 << (i & 31)) ||
			(xhci->resume_done[i] && time_after_eq(
			    jiffies, xhci->resume_done[i]))) {
			buf[(i + 1) / 8] |= 1 << (i + 1) % 8;
			status = 1;
		}
	}
	spin_unlock_irqrestore(&xhci->lock, flags);
	return status ? retval : 0;
}
Commit	Line	Data
0f2a7930 SS	1	/*
	2	* xHCI host controller driver
	3	*
	4	* Copyright (C) 2008 Intel Corp.
	5	*
	6	* Author: Sarah Sharp
	7	* Some code borrowed from the Linux EHCI driver.
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*
	13	* This program is distributed in the hope that it will be useful, but
	14	* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
	15	* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
	16	* for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software Foundation,
	20	* Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	21	*/
	22
	23	#include <asm/unaligned.h>
	24
	25	#include "xhci.h"
	26
	27	static void xhci_hub_descriptor(struct xhci_hcd *xhci,
	28	struct usb_hub_descriptor *desc)
	29	{
	30	int ports;
	31	u16 temp;
	32
	33	ports = HCS_MAX_PORTS(xhci->hcs_params1);
	34
	35	/* USB 3.0 hubs have a different descriptor, but we fake this for now */
	36	desc->bDescriptorType = 0x29;
	37	desc->bPwrOn2PwrGood = 10; /* xhci section 5.4.9 says 20ms max */
	38	desc->bHubContrCurrent = 0;
	39
	40	desc->bNbrPorts = ports;
	41	temp = 1 + (ports / 8);
	42	desc->bDescLength = 7 + 2 * temp;
	43
	44	/* Why does core/hcd.h define bitmap? It's just confusing. */
	45	memset(&desc->DeviceRemovable[0], 0, temp);
	46	memset(&desc->DeviceRemovable[temp], 0xff, temp);
	47
	48	/* Ugh, these should be #defines, FIXME */
	49	/* Using table 11-13 in USB 2.0 spec. */
	50	temp = 0;
	51	/* Bits 1:0 - support port power switching, or power always on */
	52	if (HCC_PPC(xhci->hcc_params))
	53	temp \|= 0x0001;
	54	else
	55	temp \|= 0x0002;
	56	/* Bit 2 - root hubs are not part of a compound device */
	57	/* Bits 4:3 - individual port over current protection */
	58	temp \|= 0x0008;
	59	/* Bits 6:5 - no TTs in root ports */
	60	/* Bit 7 - no port indicators */
	61	desc->wHubCharacteristics = (__force __u16) cpu_to_le16(temp);
	62	}
	63
	64	static unsigned int xhci_port_speed(unsigned int port_status)
65	{
66	if (DEV_LOWSPEED(port_status))
288ead45	67	return USB_PORT_STAT_LOW_SPEED;
0f2a7930	68	if (DEV_HIGHSPEED(port_status))
288ead45	69	return USB_PORT_STAT_HIGH_SPEED;
0f2a7930	70	if (DEV_SUPERSPEED(port_status))
288ead45	71	return USB_PORT_STAT_SUPER_SPEED;
0f2a7930 SS	72	/*
	73	* FIXME: Yes, we should check for full speed, but the core uses that as
	74	* a default in portspeed() in usb/core/hub.c (which is the only place
288ead45	75	* USB_PORT_STAT_*_SPEED is used).
0f2a7930 SS	76	*/
	77	return 0;
	78	}
	79
	80	/*
	81	* These bits are Read Only (RO) and should be saved and written to the
	82	* registers: 0, 3, 10:13, 30
	83	* connect status, over-current status, port speed, and device removable.
	84	* connect status and port speed are also sticky - meaning they're in
	85	* the AUX well and they aren't changed by a hot, warm, or cold reset.
	86	*/
	87	#define XHCI_PORT_RO ((1<<0) \| (1<<3) \| (0xf<<10) \| (1<<30))
	88	/*
	89	* These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
	90	* bits 5:8, 9, 14:15, 25:27
	91	* link state, port power, port indicator state, "wake on" enable state
	92	*/
	93	#define XHCI_PORT_RWS ((0xf<<5) \| (1<<9) \| (0x3<<14) \| (0x7<<25))
	94	/*
	95	* These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
	96	* bit 4 (port reset)
	97	*/
	98	#define XHCI_PORT_RW1S ((1<<4))
	99	/*
	100	* These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
	101	* bits 1, 17, 18, 19, 20, 21, 22, 23
	102	* port enable/disable, and
	103	* change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
	104	* over-current, reset, link state, and L1 change
	105	*/
	106	#define XHCI_PORT_RW1CS ((1<<1) \| (0x7f<<17))
	107	/*
	108	* Bit 16 is RW, and writing a '1' to it causes the link state control to be
	109	* latched in
	110	*/
	111	#define XHCI_PORT_RW ((1<<16))
	112	/*
	113	* These bits are Reserved Zero (RsvdZ) and zero should be written to them:
	114	* bits 2, 24, 28:31
	115	*/
	116	#define XHCI_PORT_RZ ((1<<2) \| (1<<24) \| (0xf<<28))
	117
	118	/*
	119	* Given a port state, this function returns a value that would result in the
	120	* port being in the same state, if the value was written to the port status
	121	* control register.
	122	* Save Read Only (RO) bits and save read/write bits where
	123	* writing a 0 clears the bit and writing a 1 sets the bit (RWS).
	124	* For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
	125	*/
56192531	126	u32 xhci_port_state_to_neutral(u32 state)
0f2a7930 SS	127	{
	128	/* Save read-only status and port state */
	129	return (state & XHCI_PORT_RO) \| (state & XHCI_PORT_RWS);
	130	}
	131
be88fe4f AX	132	/*
	133	* find slot id based on port number.
	134	*/
56192531	135	int xhci_find_slot_id_by_port(struct xhci_hcd *xhci, u16 port)
be88fe4f AX	136	{
	137	int slot_id;
	138	int i;
	139
	140	slot_id = 0;
	141	for (i = 0; i < MAX_HC_SLOTS; i++) {
	142	if (!xhci->devs[i])
	143	continue;
	144	if (xhci->devs[i]->port == port) {
	145	slot_id = i;
	146	break;
	147	}
	148	}
	149
	150	return slot_id;
	151	}
	152
	153	/*
	154	* Stop device
	155	* It issues stop endpoint command for EP 0 to 30. And wait the last command
	156	* to complete.
	157	* suspend will set to 1, if suspend bit need to set in command.
	158	*/
	159	static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
	160	{
	161	struct xhci_virt_device *virt_dev;
	162	struct xhci_command *cmd;
	163	unsigned long flags;
	164	int timeleft;
	165	int ret;
	166	int i;
	167
	168	ret = 0;
	169	virt_dev = xhci->devs[slot_id];
	170	cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
	171	if (!cmd) {
	172	xhci_dbg(xhci, "Couldn't allocate command structure.\n");
	173	return -ENOMEM;
	174	}
	175
	176	spin_lock_irqsave(&xhci->lock, flags);
	177	for (i = LAST_EP_INDEX; i > 0; i--) {
	178	if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue)
	179	xhci_queue_stop_endpoint(xhci, slot_id, i, suspend);
	180	}
	181	cmd->command_trb = xhci->cmd_ring->enqueue;
	182	list_add_tail(&cmd->cmd_list, &virt_dev->cmd_list);
	183	xhci_queue_stop_endpoint(xhci, slot_id, 0, suspend);
	184	xhci_ring_cmd_db(xhci);
	185	spin_unlock_irqrestore(&xhci->lock, flags);
	186
	187	/* Wait for last stop endpoint command to finish */
	188	timeleft = wait_for_completion_interruptible_timeout(
	189	cmd->completion,
	190	USB_CTRL_SET_TIMEOUT);
	191	if (timeleft <= 0) {
	192	xhci_warn(xhci, "%s while waiting for stop endpoint command\n",
	193	timeleft == 0 ? "Timeout" : "Signal");
	194	spin_lock_irqsave(&xhci->lock, flags);
	195	/* The timeout might have raced with the event ring handler, so
	196	* only delete from the list if the item isn't poisoned.
	197	*/
	198	if (cmd->cmd_list.next != LIST_POISON1)
	199	list_del(&cmd->cmd_list);
200	spin_unlock_irqrestore(&xhci->lock, flags);
201	ret = -ETIME;
202	goto command_cleanup;
203	}
204
205	command_cleanup:
206	xhci_free_command(xhci, cmd);
207	return ret;
208	}
209
210	/*
211	* Ring device, it rings the all doorbells unconditionally.
212	*/
56192531	213	void xhci_ring_device(struct xhci_hcd *xhci, int slot_id)
be88fe4f AX	214	{
	215	int i;
	216
	217	for (i = 0; i < LAST_EP_INDEX + 1; i++)
	218	if (xhci->devs[slot_id]->eps[i].ring &&
	219	xhci->devs[slot_id]->eps[i].ring->dequeue)
	220	xhci_ring_ep_doorbell(xhci, slot_id, i, 0);
	221
	222	return;
	223	}
	224
6219c047 SS	225	static void xhci_disable_port(struct xhci_hcd *xhci, u16 wIndex,
	226	u32 __iomem *addr, u32 port_status)
	227	{
	228	/* Write 1 to disable the port */
	229	xhci_writel(xhci, port_status \| PORT_PE, addr);
	230	port_status = xhci_readl(xhci, addr);
	231	xhci_dbg(xhci, "disable port, actual port %d status = 0x%x\n",
	232	wIndex, port_status);
	233	}
	234
34fb562a SS	235	static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
	236	u16 wIndex, u32 __iomem *addr, u32 port_status)
	237	{
	238	char *port_change_bit;
	239	u32 status;
	240
	241	switch (wValue) {
	242	case USB_PORT_FEAT_C_RESET:
	243	status = PORT_RC;
	244	port_change_bit = "reset";
	245	break;
	246	case USB_PORT_FEAT_C_CONNECTION:
	247	status = PORT_CSC;
	248	port_change_bit = "connect";
	249	break;
	250	case USB_PORT_FEAT_C_OVER_CURRENT:
	251	status = PORT_OCC;
	252	port_change_bit = "over-current";
	253	break;
6219c047 SS	254	case USB_PORT_FEAT_C_ENABLE:
	255	status = PORT_PEC;
	256	port_change_bit = "enable/disable";
	257	break;
be88fe4f AX	258	case USB_PORT_FEAT_C_SUSPEND:
	259	status = PORT_PLC;
	260	port_change_bit = "suspend/resume";
	261	break;
34fb562a SS	262	default:
	263	/* Should never happen */
	264	return;
	265	}
	266	/* Change bits are all write 1 to clear */
	267	xhci_writel(xhci, port_status \| status, addr);
	268	port_status = xhci_readl(xhci, addr);
	269	xhci_dbg(xhci, "clear port %s change, actual port %d status = 0x%x\n",
	270	port_change_bit, wIndex, port_status);
	271	}
	272
0f2a7930 SS	273	int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
	274	u16 wIndex, char *buf, u16 wLength)
	275	{
	276	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
	277	int ports;
	278	unsigned long flags;
56192531	279	u32 temp, temp1, status;
0f2a7930 SS	280	int retval = 0;
0f2a7930 SS	281	u32 __iomem *addr;
be88fe4f	282	int slot_id;
0f2a7930 SS	283
	284	ports = HCS_MAX_PORTS(xhci->hcs_params1);
	285
	286	spin_lock_irqsave(&xhci->lock, flags);
	287	switch (typeReq) {
	288	case GetHubStatus:
	289	/* No power source, over-current reported per port */
	290	memset(buf, 0, 4);
	291	break;
	292	case GetHubDescriptor:
	293	xhci_hub_descriptor(xhci, (struct usb_hub_descriptor *) buf);
	294	break;
	295	case GetPortStatus:
	296	if (!wIndex \|\| wIndex > ports)
	297	goto error;
	298	wIndex--;
	299	status = 0;
	300	addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);
	301	temp = xhci_readl(xhci, addr);
	302	xhci_dbg(xhci, "get port status, actual port %d status = 0x%x\n", wIndex, temp);
	303
	304	/* wPortChange bits */
	305	if (temp & PORT_CSC)
749da5f8	306	status \|= USB_PORT_STAT_C_CONNECTION << 16;
0f2a7930	307	if (temp & PORT_PEC)
749da5f8	308	status \|= USB_PORT_STAT_C_ENABLE << 16;
0f2a7930	309	if ((temp & PORT_OCC))
749da5f8	310	status \|= USB_PORT_STAT_C_OVERCURRENT << 16;
0f2a7930	311	/*
be88fe4f	312	* FIXME ignoring reset and USB 2.1/3.0 specific
0f2a7930 SS	313	* changes
0f2a7930 SS	314	*/
be88fe4f AX	315	if ((temp & PORT_PLS_MASK) == XDEV_U3
	316	&& (temp & PORT_POWER))
	317	status \|= 1 << USB_PORT_FEAT_SUSPEND;
56192531 AX	318	if ((temp & PORT_PLS_MASK) == XDEV_RESUME) {
	319	if ((temp & PORT_RESET) \|\| !(temp & PORT_PE))
	320	goto error;
	321	if (!DEV_SUPERSPEED(temp) && time_after_eq(jiffies,
	322	xhci->resume_done[wIndex])) {
	323	xhci_dbg(xhci, "Resume USB2 port %d\n",
	324	wIndex + 1);
	325	xhci->resume_done[wIndex] = 0;
	326	temp1 = xhci_port_state_to_neutral(temp);
	327	temp1 &= ~PORT_PLS_MASK;
	328	temp1 \|= PORT_LINK_STROBE \| XDEV_U0;
	329	xhci_writel(xhci, temp1, addr);
	330
	331	xhci_dbg(xhci, "set port %d resume\n",
	332	wIndex + 1);
	333	slot_id = xhci_find_slot_id_by_port(xhci,
	334	wIndex + 1);
	335	if (!slot_id) {
	336	xhci_dbg(xhci, "slot_id is zero\n");
	337	goto error;
	338	}
	339	xhci_ring_device(xhci, slot_id);
	340	xhci->port_c_suspend[wIndex >> 5] \|=
	341	1 << (wIndex & 31);
	342	xhci->suspended_ports[wIndex >> 5] &=
	343	~(1 << (wIndex & 31));
	344	}
	345	}
be88fe4f AX	346	if ((temp & PORT_PLS_MASK) == XDEV_U0
	347	&& (temp & PORT_POWER)
	348	&& (xhci->suspended_ports[wIndex >> 5] &
	349	(1 << (wIndex & 31)))) {
	350	xhci->suspended_ports[wIndex >> 5] &=
	351	~(1 << (wIndex & 31));
	352	xhci->port_c_suspend[wIndex >> 5] \|=
	353	1 << (wIndex & 31);
	354	}
0f2a7930	355	if (temp & PORT_CONNECT) {
749da5f8	356	status \|= USB_PORT_STAT_CONNECTION;
0f2a7930 SS	357	status \|= xhci_port_speed(temp);
	358	}
	359	if (temp & PORT_PE)
749da5f8	360	status \|= USB_PORT_STAT_ENABLE;
0f2a7930	361	if (temp & PORT_OC)
749da5f8	362	status \|= USB_PORT_STAT_OVERCURRENT;
0f2a7930	363	if (temp & PORT_RESET)
749da5f8	364	status \|= USB_PORT_STAT_RESET;
0f2a7930	365	if (temp & PORT_POWER)
749da5f8	366	status \|= USB_PORT_STAT_POWER;
be88fe4f AX	367	if (xhci->port_c_suspend[wIndex >> 5] & (1 << (wIndex & 31)))
be88fe4f AX	368	status \|= 1 << USB_PORT_FEAT_C_SUSPEND;
0f2a7930 SS	369	xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
	370	put_unaligned(cpu_to_le32(status), (__le32 *) buf);
	371	break;
	372	case SetPortFeature:
	373	wIndex &= 0xff;
	374	if (!wIndex \|\| wIndex > ports)
	375	goto error;
	376	wIndex--;
	377	addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);
	378	temp = xhci_readl(xhci, addr);
	379	temp = xhci_port_state_to_neutral(temp);
	380	switch (wValue) {
be88fe4f AX	381	case USB_PORT_FEAT_SUSPEND:
	382	temp = xhci_readl(xhci, addr);
	383	/* In spec software should not attempt to suspend
	384	* a port unless the port reports that it is in the
	385	* enabled (PED = ‘1’,PLS < ‘3’) state.
	386	*/
	387	if ((temp & PORT_PE) == 0 \|\| (temp & PORT_RESET)
	388	\|\| (temp & PORT_PLS_MASK) >= XDEV_U3) {
	389	xhci_warn(xhci, "USB core suspending device "
	390	"not in U0/U1/U2.\n");
	391	goto error;
	392	}
	393
	394	slot_id = xhci_find_slot_id_by_port(xhci, wIndex + 1);
	395	if (!slot_id) {
	396	xhci_warn(xhci, "slot_id is zero\n");
	397	goto error;
	398	}
	399	/* unlock to execute stop endpoint commands */
	400	spin_unlock_irqrestore(&xhci->lock, flags);
	401	xhci_stop_device(xhci, slot_id, 1);
	402	spin_lock_irqsave(&xhci->lock, flags);
	403
	404	temp = xhci_port_state_to_neutral(temp);
	405	temp &= ~PORT_PLS_MASK;
	406	temp \|= PORT_LINK_STROBE \| XDEV_U3;
	407	xhci_writel(xhci, temp, addr);
	408
	409	spin_unlock_irqrestore(&xhci->lock, flags);
	410	msleep(10); /* wait device to enter */
	411	spin_lock_irqsave(&xhci->lock, flags);
	412
	413	temp = xhci_readl(xhci, addr);
	414	xhci->suspended_ports[wIndex >> 5] \|=
	415	1 << (wIndex & (31));
	416	break;
0f2a7930 SS	417	case USB_PORT_FEAT_POWER:
	418	/*
	419	* Turn on ports, even if there isn't per-port switching.
	420	* HC will report connect events even before this is set.
	421	* However, khubd will ignore the roothub events until
	422	* the roothub is registered.
	423	*/
	424	xhci_writel(xhci, temp \| PORT_POWER, addr);
	425
	426	temp = xhci_readl(xhci, addr);
	427	xhci_dbg(xhci, "set port power, actual port %d status = 0x%x\n", wIndex, temp);
	428	break;
	429	case USB_PORT_FEAT_RESET:
	430	temp = (temp \| PORT_RESET);
	431	xhci_writel(xhci, temp, addr);
	432
	433	temp = xhci_readl(xhci, addr);
	434	xhci_dbg(xhci, "set port reset, actual port %d status = 0x%x\n", wIndex, temp);
	435	break;
	436	default:
	437	goto error;
	438	}
	439	temp = xhci_readl(xhci, addr); /* unblock any posted writes */
	440	break;
	441	case ClearPortFeature:
	442	if (!wIndex \|\| wIndex > ports)
	443	goto error;
	444	wIndex--;
	445	addr = &xhci->op_regs->port_status_base +
	446	NUM_PORT_REGS*(wIndex & 0xff);
	447	temp = xhci_readl(xhci, addr);
	448	temp = xhci_port_state_to_neutral(temp);
	449	switch (wValue) {
be88fe4f AX	450	case USB_PORT_FEAT_SUSPEND:
	451	temp = xhci_readl(xhci, addr);
	452	xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n");
	453	xhci_dbg(xhci, "PORTSC %04x\n", temp);
	454	if (temp & PORT_RESET)
	455	goto error;
	456	if (temp & XDEV_U3) {
	457	if ((temp & PORT_PE) == 0)
	458	goto error;
	459	if (DEV_SUPERSPEED(temp)) {
	460	temp = xhci_port_state_to_neutral(temp);
	461	temp &= ~PORT_PLS_MASK;
	462	temp \|= PORT_LINK_STROBE \| XDEV_U0;
	463	xhci_writel(xhci, temp, addr);
	464	xhci_readl(xhci, addr);
	465	} else {
	466	temp = xhci_port_state_to_neutral(temp);
	467	temp &= ~PORT_PLS_MASK;
	468	temp \|= PORT_LINK_STROBE \| XDEV_RESUME;
	469	xhci_writel(xhci, temp, addr);
	470
	471	spin_unlock_irqrestore(&xhci->lock,
	472	flags);
	473	msleep(20);
	474	spin_lock_irqsave(&xhci->lock, flags);
	475
	476	temp = xhci_readl(xhci, addr);
	477	temp = xhci_port_state_to_neutral(temp);
	478	temp &= ~PORT_PLS_MASK;
	479	temp \|= PORT_LINK_STROBE \| XDEV_U0;
	480	xhci_writel(xhci, temp, addr);
	481	}
	482	xhci->port_c_suspend[wIndex >> 5] \|=
	483	1 << (wIndex & 31);
	484	}
	485
	486	slot_id = xhci_find_slot_id_by_port(xhci, wIndex + 1);
	487	if (!slot_id) {
	488	xhci_dbg(xhci, "slot_id is zero\n");
	489	goto error;
	490	}
	491	xhci_ring_device(xhci, slot_id);
	492	break;
	493	case USB_PORT_FEAT_C_SUSPEND:
	494	xhci->port_c_suspend[wIndex >> 5] &=
	495	~(1 << (wIndex & 31));
0f2a7930	496	case USB_PORT_FEAT_C_RESET:
0f2a7930	497	case USB_PORT_FEAT_C_CONNECTION:
0f2a7930	498	case USB_PORT_FEAT_C_OVER_CURRENT:
6219c047	499	case USB_PORT_FEAT_C_ENABLE:
34fb562a SS	500	xhci_clear_port_change_bit(xhci, wValue, wIndex,
34fb562a SS	501	addr, temp);
0f2a7930	502	break;
6219c047 SS	503	case USB_PORT_FEAT_ENABLE:
	504	xhci_disable_port(xhci, wIndex, addr, temp);
	505	break;
0f2a7930 SS	506	default:
	507	goto error;
	508	}
0f2a7930 SS	509	break;
	510	default:
	511	error:
	512	/* "stall" on error */
	513	retval = -EPIPE;
	514	}
	515	spin_unlock_irqrestore(&xhci->lock, flags);
	516	return retval;
	517	}
	518
	519	/*
	520	* Returns 0 if the status hasn't changed, or the number of bytes in buf.
	521	* Ports are 0-indexed from the HCD point of view,
	522	* and 1-indexed from the USB core pointer of view.
0f2a7930 SS	523	*
	524	* Note that the status change bits will be cleared as soon as a port status
	525	* change event is generated, so we use the saved status from that event.
	526	*/
	527	int xhci_hub_status_data(struct usb_hcd hcd, char buf)
	528	{
	529	unsigned long flags;
	530	u32 temp, status;
56192531	531	u32 mask;
0f2a7930 SS	532	int i, retval;
	533	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
	534	int ports;
	535	u32 __iomem *addr;
	536
	537	ports = HCS_MAX_PORTS(xhci->hcs_params1);
	538
	539	/* Initial status is no changes */
419a8e81 WG	540	retval = (ports + 8) / 8;
419a8e81 WG	541	memset(buf, 0, retval);
0f2a7930	542	status = 0;
0f2a7930	543
56192531 AX	544	mask = PORT_CSC \| PORT_PEC \| PORT_OCC;
56192531 AX	545
0f2a7930 SS	546	spin_lock_irqsave(&xhci->lock, flags);
	547	/* For each port, did anything change? If so, set that bit in buf. */
	548	for (i = 0; i < ports; i++) {
	549	addr = &xhci->op_regs->port_status_base +
	550	NUM_PORT_REGS*i;
	551	temp = xhci_readl(xhci, addr);
56192531 AX	552	if ((temp & mask) != 0 \|\|
	553	(xhci->port_c_suspend[i >> 5] & 1 << (i & 31)) \|\|
	554	(xhci->resume_done[i] && time_after_eq(
	555	jiffies, xhci->resume_done[i]))) {
419a8e81	556	buf[(i + 1) / 8] \|= 1 << (i + 1) % 8;
0f2a7930 SS	557	status = 1;
	558	}
	559	}
	560	spin_unlock_irqrestore(&xhci->lock, flags);
	561	return status ? retval : 0;
	562	}