projects / linux-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
xhci: Refactor bus suspend state into a struct.
[linux-block.git] / drivers / usb / host / xhci-hub.c
CommitLineData
0f2a7930
SS		 1/*
2 * xHCI host controller driver
3 *
4 * Copyright (C) 2008 Intel Corp.
5 *
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <asm/unaligned.h>
24
25#include "xhci.h"
26
9777e3ce
AX		 27#define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
28#define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_WRC | PORT_OCC | \
29 PORT_RC | PORT_PLC | PORT_PE)
30
0f2a7930
SS		 31static void xhci_hub_descriptor(struct xhci_hcd *xhci,
32 struct usb_hub_descriptor *desc)
33{
34 int ports;
35 u16 temp;
36
37 ports = HCS_MAX_PORTS(xhci->hcs_params1);
38
39 /* USB 3.0 hubs have a different descriptor, but we fake this for now */
40 desc->bDescriptorType = 0x29;
41 desc->bPwrOn2PwrGood = 10; /* xhci section 5.4.9 says 20ms max */
42 desc->bHubContrCurrent = 0;
43
44 desc->bNbrPorts = ports;
45 temp = 1 + (ports / 8);
46 desc->bDescLength = 7 + 2 * temp;
47
dbe79bbe
JY		 48 memset(&desc->u.hs.DeviceRemovable[0], 0, temp);
49 memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp);
0f2a7930
SS		 50
51 /* Ugh, these should be #defines, FIXME */
52 /* Using table 11-13 in USB 2.0 spec. */
53 temp = 0;
54 /* Bits 1:0 - support port power switching, or power always on */
55 if (HCC_PPC(xhci->hcc_params))
56 temp |= 0x0001;
57 else
58 temp |= 0x0002;
59 /* Bit 2 - root hubs are not part of a compound device */
60 /* Bits 4:3 - individual port over current protection */
61 temp |= 0x0008;
62 /* Bits 6:5 - no TTs in root ports */
63 /* Bit 7 - no port indicators */
64 desc->wHubCharacteristics = (__force __u16) cpu_to_le16(temp);
65}
66
67static unsigned int xhci_port_speed(unsigned int port_status)
68{
69 if (DEV_LOWSPEED(port_status))
288ead45 70 return USB_PORT_STAT_LOW_SPEED;
0f2a7930 71 if (DEV_HIGHSPEED(port_status))
288ead45 72 return USB_PORT_STAT_HIGH_SPEED;
0f2a7930 73 if (DEV_SUPERSPEED(port_status))
288ead45 74 return USB_PORT_STAT_SUPER_SPEED;
0f2a7930
SS		 75 /*
76 * FIXME: Yes, we should check for full speed, but the core uses that as
77 * a default in portspeed() in usb/core/hub.c (which is the only place
288ead45 78 * USB_PORT_STAT_*_SPEED is used).
0f2a7930
SS		 79 */
80 return 0;
81}
82
83/*
84 * These bits are Read Only (RO) and should be saved and written to the
85 * registers: 0, 3, 10:13, 30
86 * connect status, over-current status, port speed, and device removable.
87 * connect status and port speed are also sticky - meaning they're in
88 * the AUX well and they aren't changed by a hot, warm, or cold reset.
89 */
90#define XHCI_PORT_RO ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
91/*
92 * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
93 * bits 5:8, 9, 14:15, 25:27
94 * link state, port power, port indicator state, "wake on" enable state
95 */
96#define XHCI_PORT_RWS ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
97/*
98 * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
99 * bit 4 (port reset)
100 */
101#define XHCI_PORT_RW1S ((1<<4))
102/*
103 * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
104 * bits 1, 17, 18, 19, 20, 21, 22, 23
105 * port enable/disable, and
106 * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
107 * over-current, reset, link state, and L1 change
108 */
109#define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
110/*
111 * Bit 16 is RW, and writing a '1' to it causes the link state control to be
112 * latched in
113 */
114#define XHCI_PORT_RW ((1<<16))
115/*
116 * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
117 * bits 2, 24, 28:31
118 */
119#define XHCI_PORT_RZ ((1<<2) | (1<<24) | (0xf<<28))
120
121/*
122 * Given a port state, this function returns a value that would result in the
123 * port being in the same state, if the value was written to the port status
124 * control register.
125 * Save Read Only (RO) bits and save read/write bits where
126 * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
127 * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
128 */
56192531 129u32 xhci_port_state_to_neutral(u32 state)
0f2a7930
SS		 130{
131 /* Save read-only status and port state */
132 return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
133}
134
be88fe4f
AX		 135/*
136 * find slot id based on port number.
137 */
56192531 138int xhci_find_slot_id_by_port(struct xhci_hcd *xhci, u16 port)
be88fe4f
AX		 139{
140 int slot_id;
141 int i;
142
143 slot_id = 0;
144 for (i = 0; i < MAX_HC_SLOTS; i++) {
145 if (!xhci->devs[i])
146 continue;
147 if (xhci->devs[i]->port == port) {
148 slot_id = i;
149 break;
150 }
151 }
152
153 return slot_id;
154}
155
156/*
157 * Stop device
158 * It issues stop endpoint command for EP 0 to 30. And wait the last command
159 * to complete.
160 * suspend will set to 1, if suspend bit need to set in command.
161 */
162static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
163{
164 struct xhci_virt_device *virt_dev;
165 struct xhci_command *cmd;
166 unsigned long flags;
167 int timeleft;
168 int ret;
169 int i;
170
171 ret = 0;
172 virt_dev = xhci->devs[slot_id];
173 cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
174 if (!cmd) {
175 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
176 return -ENOMEM;
177 }
178
179 spin_lock_irqsave(&xhci->lock, flags);
180 for (i = LAST_EP_INDEX; i > 0; i--) {
181 if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue)
182 xhci_queue_stop_endpoint(xhci, slot_id, i, suspend);
183 }
184 cmd->command_trb = xhci->cmd_ring->enqueue;
185 list_add_tail(&cmd->cmd_list, &virt_dev->cmd_list);
186 xhci_queue_stop_endpoint(xhci, slot_id, 0, suspend);
187 xhci_ring_cmd_db(xhci);
188 spin_unlock_irqrestore(&xhci->lock, flags);
189
190 /* Wait for last stop endpoint command to finish */
191 timeleft = wait_for_completion_interruptible_timeout(
192 cmd->completion,
193 USB_CTRL_SET_TIMEOUT);
194 if (timeleft <= 0) {
195 xhci_warn(xhci, "%s while waiting for stop endpoint command\n",
196 timeleft == 0 ? "Timeout" : "Signal");
197 spin_lock_irqsave(&xhci->lock, flags);
198 /* The timeout might have raced with the event ring handler, so
199 * only delete from the list if the item isn't poisoned.
200 */
201 if (cmd->cmd_list.next != LIST_POISON1)
202 list_del(&cmd->cmd_list);
203 spin_unlock_irqrestore(&xhci->lock, flags);
204 ret = -ETIME;
205 goto command_cleanup;
206 }
207
208command_cleanup:
209 xhci_free_command(xhci, cmd);
210 return ret;
211}
212
213/*
214 * Ring device, it rings the all doorbells unconditionally.
215 */
56192531 216void xhci_ring_device(struct xhci_hcd *xhci, int slot_id)
be88fe4f
AX		 217{
218 int i;
219
220 for (i = 0; i < LAST_EP_INDEX + 1; i++)
221 if (xhci->devs[slot_id]->eps[i].ring &&
222 xhci->devs[slot_id]->eps[i].ring->dequeue)
223 xhci_ring_ep_doorbell(xhci, slot_id, i, 0);
224
225 return;
226}
227
6219c047
SS		 228static void xhci_disable_port(struct xhci_hcd *xhci, u16 wIndex,
229 u32 __iomem *addr, u32 port_status)
230{
6dd0a3a7
SS		 231 /* Don't allow the USB core to disable SuperSpeed ports. */
232 if (xhci->port_array[wIndex] == 0x03) {
233 xhci_dbg(xhci, "Ignoring request to disable "
234 "SuperSpeed port.\n");
235 return;
236 }
237
6219c047
SS		 238 /* Write 1 to disable the port */
239 xhci_writel(xhci, port_status | PORT_PE, addr);
240 port_status = xhci_readl(xhci, addr);
241 xhci_dbg(xhci, "disable port, actual port %d status = 0x%x\n",
242 wIndex, port_status);
243}
244
34fb562a
SS		 245static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
246 u16 wIndex, u32 __iomem *addr, u32 port_status)
247{
248 char *port_change_bit;
249 u32 status;
250
251 switch (wValue) {
252 case USB_PORT_FEAT_C_RESET:
253 status = PORT_RC;
254 port_change_bit = "reset";
255 break;
256 case USB_PORT_FEAT_C_CONNECTION:
257 status = PORT_CSC;
258 port_change_bit = "connect";
259 break;
260 case USB_PORT_FEAT_C_OVER_CURRENT:
261 status = PORT_OCC;
262 port_change_bit = "over-current";
263 break;
6219c047
SS		 264 case USB_PORT_FEAT_C_ENABLE:
265 status = PORT_PEC;
266 port_change_bit = "enable/disable";
267 break;
be88fe4f
AX		 268 case USB_PORT_FEAT_C_SUSPEND:
269 status = PORT_PLC;
270 port_change_bit = "suspend/resume";
271 break;
34fb562a
SS		 272 default:
273 /* Should never happen */
274 return;
275 }
276 /* Change bits are all write 1 to clear */
277 xhci_writel(xhci, port_status | status, addr);
278 port_status = xhci_readl(xhci, addr);
279 xhci_dbg(xhci, "clear port %s change, actual port %d status = 0x%x\n",
280 port_change_bit, wIndex, port_status);
281}
282
0f2a7930
SS		 283int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
284 u16 wIndex, char *buf, u16 wLength)
285{
286 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
287 int ports;
288 unsigned long flags;
56192531 289 u32 temp, temp1, status;
0f2a7930 290 int retval = 0;
5308a91b
SS		 291 u32 __iomem *port_array[15 + USB_MAXCHILDREN];
292 int i;
be88fe4f 293 int slot_id;
20b67cf5 294 struct xhci_bus_state *bus_state;
0f2a7930
SS		 295
296 ports = HCS_MAX_PORTS(xhci->hcs_params1);
5308a91b
SS		 297 for (i = 0; i < ports; i++) {
298 if (i < xhci->num_usb3_ports)
299 port_array[i] = xhci->usb3_ports[i];
300 else
301 port_array[i] =
302 xhci->usb2_ports[i - xhci->num_usb3_ports];
303 }
20b67cf5 304 bus_state = &xhci->bus_state[hcd_index(hcd)];
0f2a7930
SS		 305
306 spin_lock_irqsave(&xhci->lock, flags);
307 switch (typeReq) {
308 case GetHubStatus:
309 /* No power source, over-current reported per port */
310 memset(buf, 0, 4);
311 break;
312 case GetHubDescriptor:
313 xhci_hub_descriptor(xhci, (struct usb_hub_descriptor *) buf);
314 break;
315 case GetPortStatus:
316 if (!wIndex || wIndex > ports)
317 goto error;
318 wIndex--;
319 status = 0;
5308a91b 320 temp = xhci_readl(xhci, port_array[wIndex]);
0f2a7930
SS		 321 xhci_dbg(xhci, "get port status, actual port %d status = 0x%x\n", wIndex, temp);
322
323 /* wPortChange bits */
324 if (temp & PORT_CSC)
749da5f8 325 status |= USB_PORT_STAT_C_CONNECTION << 16;
0f2a7930 326 if (temp & PORT_PEC)
749da5f8 327 status |= USB_PORT_STAT_C_ENABLE << 16;
0f2a7930 328 if ((temp & PORT_OCC))
749da5f8 329 status |= USB_PORT_STAT_C_OVERCURRENT << 16;
0f2a7930 330 /*
be88fe4f 331 * FIXME ignoring reset and USB 2.1/3.0 specific
0f2a7930
SS		 332 * changes
333 */
be88fe4f
AX		 334 if ((temp & PORT_PLS_MASK) == XDEV_U3
335 && (temp & PORT_POWER))
336 status |= 1 << USB_PORT_FEAT_SUSPEND;
56192531
AX		 337 if ((temp & PORT_PLS_MASK) == XDEV_RESUME) {
338 if ((temp & PORT_RESET) || !(temp & PORT_PE))
339 goto error;
340 if (!DEV_SUPERSPEED(temp) && time_after_eq(jiffies,
20b67cf5 341 bus_state->resume_done[wIndex])) {
56192531
AX		 342 xhci_dbg(xhci, "Resume USB2 port %d\n",
343 wIndex + 1);
20b67cf5 344 bus_state->resume_done[wIndex] = 0;
56192531
AX		 345 temp1 = xhci_port_state_to_neutral(temp);
346 temp1 &= ~PORT_PLS_MASK;
347 temp1 |= PORT_LINK_STROBE | XDEV_U0;
5308a91b 348 xhci_writel(xhci, temp1, port_array[wIndex]);
56192531
AX		 349
350 xhci_dbg(xhci, "set port %d resume\n",
351 wIndex + 1);
352 slot_id = xhci_find_slot_id_by_port(xhci,
353 wIndex + 1);
354 if (!slot_id) {
355 xhci_dbg(xhci, "slot_id is zero\n");
356 goto error;
357 }
358 xhci_ring_device(xhci, slot_id);
20b67cf5
SS		 359 bus_state->port_c_suspend |= 1 << wIndex;
360 bus_state->suspended_ports &= ~(1 << wIndex);
56192531
AX		 361 }
362 }
be88fe4f
AX		 363 if ((temp & PORT_PLS_MASK) == XDEV_U0
364 && (temp & PORT_POWER)
20b67cf5
SS		 365 && (bus_state->suspended_ports & (1 << wIndex))) {
366 bus_state->suspended_ports &= ~(1 << wIndex);
367 bus_state->port_c_suspend |= 1 << wIndex;
be88fe4f 368 }
0f2a7930 369 if (temp & PORT_CONNECT) {
749da5f8 370 status |= USB_PORT_STAT_CONNECTION;
0f2a7930
SS		 371 status |= xhci_port_speed(temp);
372 }
373 if (temp & PORT_PE)
749da5f8 374 status |= USB_PORT_STAT_ENABLE;
0f2a7930 375 if (temp & PORT_OC)
749da5f8 376 status |= USB_PORT_STAT_OVERCURRENT;
0f2a7930 377 if (temp & PORT_RESET)
749da5f8 378 status |= USB_PORT_STAT_RESET;
0f2a7930 379 if (temp & PORT_POWER)
749da5f8 380 status |= USB_PORT_STAT_POWER;
20b67cf5 381 if (bus_state->port_c_suspend & (1 << wIndex))
be88fe4f 382 status |= 1 << USB_PORT_FEAT_C_SUSPEND;
0f2a7930
SS		 383 xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
384 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
385 break;
386 case SetPortFeature:
387 wIndex &= 0xff;
388 if (!wIndex || wIndex > ports)
389 goto error;
390 wIndex--;
5308a91b 391 temp = xhci_readl(xhci, port_array[wIndex]);
0f2a7930
SS		 392 temp = xhci_port_state_to_neutral(temp);
393 switch (wValue) {
be88fe4f 394 case USB_PORT_FEAT_SUSPEND:
5308a91b 395 temp = xhci_readl(xhci, port_array[wIndex]);
be88fe4f
AX		 396 /* In spec software should not attempt to suspend
397 * a port unless the port reports that it is in the
398 * enabled (PED = ‘1’,PLS < ‘3’) state.
399 */
400 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)
401 || (temp & PORT_PLS_MASK) >= XDEV_U3) {
402 xhci_warn(xhci, "USB core suspending device "
403 "not in U0/U1/U2.\n");
404 goto error;
405 }
406
407 slot_id = xhci_find_slot_id_by_port(xhci, wIndex + 1);
408 if (!slot_id) {
409 xhci_warn(xhci, "slot_id is zero\n");
410 goto error;
411 }
412 /* unlock to execute stop endpoint commands */
413 spin_unlock_irqrestore(&xhci->lock, flags);
414 xhci_stop_device(xhci, slot_id, 1);
415 spin_lock_irqsave(&xhci->lock, flags);
416
417 temp = xhci_port_state_to_neutral(temp);
418 temp &= ~PORT_PLS_MASK;
419 temp |= PORT_LINK_STROBE | XDEV_U3;
5308a91b 420 xhci_writel(xhci, temp, port_array[wIndex]);
be88fe4f
AX		 421
422 spin_unlock_irqrestore(&xhci->lock, flags);
423 msleep(10); /* wait device to enter */
424 spin_lock_irqsave(&xhci->lock, flags);
425
5308a91b 426 temp = xhci_readl(xhci, port_array[wIndex]);
20b67cf5 427 bus_state->suspended_ports |= 1 << wIndex;
be88fe4f 428 break;
0f2a7930
SS		 429 case USB_PORT_FEAT_POWER:
430 /*
431 * Turn on ports, even if there isn't per-port switching.
432 * HC will report connect events even before this is set.
433 * However, khubd will ignore the roothub events until
434 * the roothub is registered.
435 */
5308a91b
SS		 436 xhci_writel(xhci, temp | PORT_POWER,
437 port_array[wIndex]);
0f2a7930 438
5308a91b 439 temp = xhci_readl(xhci, port_array[wIndex]);
0f2a7930
SS		 440 xhci_dbg(xhci, "set port power, actual port %d status = 0x%x\n", wIndex, temp);
441 break;
442 case USB_PORT_FEAT_RESET:
443 temp = (temp | PORT_RESET);
5308a91b 444 xhci_writel(xhci, temp, port_array[wIndex]);
0f2a7930 445
5308a91b 446 temp = xhci_readl(xhci, port_array[wIndex]);
0f2a7930
SS		 447 xhci_dbg(xhci, "set port reset, actual port %d status = 0x%x\n", wIndex, temp);
448 break;
449 default:
450 goto error;
451 }
5308a91b
SS		 452 /* unblock any posted writes */
453 temp = xhci_readl(xhci, port_array[wIndex]);
0f2a7930
SS		 454 break;
455 case ClearPortFeature:
456 if (!wIndex || wIndex > ports)
457 goto error;
458 wIndex--;
5308a91b 459 temp = xhci_readl(xhci, port_array[wIndex]);
0f2a7930
SS		 460 temp = xhci_port_state_to_neutral(temp);
461 switch (wValue) {
be88fe4f 462 case USB_PORT_FEAT_SUSPEND:
5308a91b 463 temp = xhci_readl(xhci, port_array[wIndex]);
be88fe4f
AX		 464 xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n");
465 xhci_dbg(xhci, "PORTSC %04x\n", temp);
466 if (temp & PORT_RESET)
467 goto error;
468 if (temp & XDEV_U3) {
469 if ((temp & PORT_PE) == 0)
470 goto error;
471 if (DEV_SUPERSPEED(temp)) {
472 temp = xhci_port_state_to_neutral(temp);
473 temp &= ~PORT_PLS_MASK;
474 temp |= PORT_LINK_STROBE | XDEV_U0;
5308a91b
SS		 475 xhci_writel(xhci, temp,
476 port_array[wIndex]);
477 xhci_readl(xhci, port_array[wIndex]);
be88fe4f
AX		 478 } else {
479 temp = xhci_port_state_to_neutral(temp);
480 temp &= ~PORT_PLS_MASK;
481 temp |= PORT_LINK_STROBE | XDEV_RESUME;
5308a91b
SS		 482 xhci_writel(xhci, temp,
483 port_array[wIndex]);
be88fe4f
AX		 484
485 spin_unlock_irqrestore(&xhci->lock,
486 flags);
487 msleep(20);
488 spin_lock_irqsave(&xhci->lock, flags);
489
5308a91b
SS		 490 temp = xhci_readl(xhci,
491 port_array[wIndex]);
be88fe4f
AX		 492 temp = xhci_port_state_to_neutral(temp);
493 temp &= ~PORT_PLS_MASK;
494 temp |= PORT_LINK_STROBE | XDEV_U0;
5308a91b
SS		 495 xhci_writel(xhci, temp,
496 port_array[wIndex]);
be88fe4f 497 }
20b67cf5 498 bus_state->port_c_suspend |= 1 << wIndex;
be88fe4f
AX		 499 }
500
501 slot_id = xhci_find_slot_id_by_port(xhci, wIndex + 1);
502 if (!slot_id) {
503 xhci_dbg(xhci, "slot_id is zero\n");
504 goto error;
505 }
506 xhci_ring_device(xhci, slot_id);
507 break;
508 case USB_PORT_FEAT_C_SUSPEND:
20b67cf5 509 bus_state->port_c_suspend &= ~(1 << wIndex);
0f2a7930 510 case USB_PORT_FEAT_C_RESET:
0f2a7930 511 case USB_PORT_FEAT_C_CONNECTION:
0f2a7930 512 case USB_PORT_FEAT_C_OVER_CURRENT:
6219c047 513 case USB_PORT_FEAT_C_ENABLE:
34fb562a 514 xhci_clear_port_change_bit(xhci, wValue, wIndex,
5308a91b 515 port_array[wIndex], temp);
0f2a7930 516 break;
6219c047 517 case USB_PORT_FEAT_ENABLE:
5308a91b
SS		 518 xhci_disable_port(xhci, wIndex,
519 port_array[wIndex], temp);
6219c047 520 break;
0f2a7930
SS		 521 default:
522 goto error;
523 }
0f2a7930
SS		 524 break;
525 default:
526error:
527 /* "stall" on error */
528 retval = -EPIPE;
529 }
530 spin_unlock_irqrestore(&xhci->lock, flags);
531 return retval;
532}
533
534/*
535 * Returns 0 if the status hasn't changed, or the number of bytes in buf.
536 * Ports are 0-indexed from the HCD point of view,
537 * and 1-indexed from the USB core pointer of view.
0f2a7930
SS		 538 *
539 * Note that the status change bits will be cleared as soon as a port status
540 * change event is generated, so we use the saved status from that event.
541 */
542int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
543{
544 unsigned long flags;
545 u32 temp, status;
56192531 546 u32 mask;
0f2a7930
SS		 547 int i, retval;
548 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
549 int ports;
5308a91b 550 u32 __iomem *port_array[15 + USB_MAXCHILDREN];
20b67cf5 551 struct xhci_bus_state *bus_state;
0f2a7930
SS		 552
553 ports = HCS_MAX_PORTS(xhci->hcs_params1);
5308a91b
SS		 554 for (i = 0; i < ports; i++) {
555 if (i < xhci->num_usb3_ports)
556 port_array[i] = xhci->usb3_ports[i];
557 else
558 port_array[i] =
559 xhci->usb2_ports[i - xhci->num_usb3_ports];
560 }
20b67cf5 561 bus_state = &xhci->bus_state[hcd_index(hcd)];
0f2a7930
SS		 562
563 /* Initial status is no changes */
419a8e81
WG		 564 retval = (ports + 8) / 8;
565 memset(buf, 0, retval);
0f2a7930 566 status = 0;
0f2a7930 567
56192531
AX		 568 mask = PORT_CSC | PORT_PEC | PORT_OCC;
569
0f2a7930
SS		 570 spin_lock_irqsave(&xhci->lock, flags);
571 /* For each port, did anything change? If so, set that bit in buf. */
572 for (i = 0; i < ports; i++) {
5308a91b 573 temp = xhci_readl(xhci, port_array[i]);
56192531 574 if ((temp & mask) != 0 ||
20b67cf5
SS		 575 (bus_state->port_c_suspend & 1 << i) ||
576 (bus_state->resume_done[i] && time_after_eq(
577 jiffies, bus_state->resume_done[i]))) {
419a8e81 578 buf[(i + 1) / 8] |= 1 << (i + 1) % 8;
0f2a7930
SS		 579 status = 1;
580 }
581 }
582 spin_unlock_irqrestore(&xhci->lock, flags);
583 return status ? retval : 0;
584}
9777e3ce
AX		 585
586#ifdef CONFIG_PM
587
588int xhci_bus_suspend(struct usb_hcd *hcd)
589{
590 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
518e848e 591 int max_ports, port_index;
5308a91b
SS		 592 u32 __iomem *port_array[15 + USB_MAXCHILDREN];
593 int i;
20b67cf5 594 struct xhci_bus_state *bus_state;
9777e3ce
AX		 595 unsigned long flags;
596
597 xhci_dbg(xhci, "suspend root hub\n");
518e848e 598 max_ports = HCS_MAX_PORTS(xhci->hcs_params1);
5308a91b
SS		 599 for (i = 0; i < max_ports; i++) {
600 if (i < xhci->num_usb3_ports)
601 port_array[i] = xhci->usb3_ports[i];
602 else
603 port_array[i] =
604 xhci->usb2_ports[i - xhci->num_usb3_ports];
605 }
20b67cf5 606 bus_state = &xhci->bus_state[hcd_index(hcd)];
9777e3ce
AX		 607
608 spin_lock_irqsave(&xhci->lock, flags);
609
610 if (hcd->self.root_hub->do_remote_wakeup) {
518e848e
SS		 611 port_index = max_ports;
612 while (port_index--) {
20b67cf5 613 if (bus_state->resume_done[port_index] != 0) {
9777e3ce
AX		 614 spin_unlock_irqrestore(&xhci->lock, flags);
615 xhci_dbg(xhci, "suspend failed because "
616 "port %d is resuming\n",
518e848e 617 port_index + 1);
9777e3ce
AX		 618 return -EBUSY;
619 }
620 }
621 }
622
518e848e 623 port_index = max_ports;
20b67cf5 624 bus_state->bus_suspended = 0;
518e848e 625 while (port_index--) {
9777e3ce 626 /* suspend the port if the port is not suspended */
9777e3ce
AX		 627 u32 t1, t2;
628 int slot_id;
629
5308a91b 630 t1 = xhci_readl(xhci, port_array[port_index]);
9777e3ce
AX		 631 t2 = xhci_port_state_to_neutral(t1);
632
633 if ((t1 & PORT_PE) && !(t1 & PORT_PLS_MASK)) {
518e848e
SS		 634 xhci_dbg(xhci, "port %d not suspended\n", port_index);
635 slot_id = xhci_find_slot_id_by_port(xhci,
636 port_index + 1);
9777e3ce
AX		 637 if (slot_id) {
638 spin_unlock_irqrestore(&xhci->lock, flags);
639 xhci_stop_device(xhci, slot_id, 1);
640 spin_lock_irqsave(&xhci->lock, flags);
641 }
642 t2 &= ~PORT_PLS_MASK;
643 t2 |= PORT_LINK_STROBE | XDEV_U3;
20b67cf5 644 set_bit(port_index, &bus_state->bus_suspended);
9777e3ce
AX		 645 }
646 if (hcd->self.root_hub->do_remote_wakeup) {
647 if (t1 & PORT_CONNECT) {
648 t2 |= PORT_WKOC_E | PORT_WKDISC_E;
649 t2 &= ~PORT_WKCONN_E;
650 } else {
651 t2 |= PORT_WKOC_E | PORT_WKCONN_E;
652 t2 &= ~PORT_WKDISC_E;
653 }
654 } else
655 t2 &= ~PORT_WAKE_BITS;
656
657 t1 = xhci_port_state_to_neutral(t1);
658 if (t1 != t2)
5308a91b 659 xhci_writel(xhci, t2, port_array[port_index]);
9777e3ce
AX		 660
661 if (DEV_HIGHSPEED(t1)) {
662 /* enable remote wake up for USB 2.0 */
663 u32 __iomem *addr;
664 u32 tmp;
665
5308a91b
SS		 666 /* Add one to the port status register address to get
667 * the port power control register address.
668 */
669 addr = port_array[port_index] + 1;
9777e3ce
AX		 670 tmp = xhci_readl(xhci, addr);
671 tmp |= PORT_RWE;
672 xhci_writel(xhci, tmp, addr);
673 }
674 }
675 hcd->state = HC_STATE_SUSPENDED;
20b67cf5 676 bus_state->next_statechange = jiffies + msecs_to_jiffies(10);
9777e3ce
AX		 677 spin_unlock_irqrestore(&xhci->lock, flags);
678 return 0;
679}
680
681int xhci_bus_resume(struct usb_hcd *hcd)
682{
683 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
518e848e 684 int max_ports, port_index;
5308a91b
SS		 685 u32 __iomem *port_array[15 + USB_MAXCHILDREN];
686 int i;
20b67cf5 687 struct xhci_bus_state *bus_state;
9777e3ce
AX		 688 u32 temp;
689 unsigned long flags;
690
691 xhci_dbg(xhci, "resume root hub\n");
518e848e 692 max_ports = HCS_MAX_PORTS(xhci->hcs_params1);
5308a91b
SS		 693 for (i = 0; i < max_ports; i++) {
694 if (i < xhci->num_usb3_ports)
695 port_array[i] = xhci->usb3_ports[i];
696 else
697 port_array[i] =
698 xhci->usb2_ports[i - xhci->num_usb3_ports];
699 }
20b67cf5 700 bus_state = &xhci->bus_state[hcd_index(hcd)];
9777e3ce 701
20b67cf5 702 if (time_before(jiffies, bus_state->next_statechange))
9777e3ce
AX		 703 msleep(5);
704
705 spin_lock_irqsave(&xhci->lock, flags);
706 if (!HCD_HW_ACCESSIBLE(hcd)) {
707 spin_unlock_irqrestore(&xhci->lock, flags);
708 return -ESHUTDOWN;
709 }
710
711 /* delay the irqs */
712 temp = xhci_readl(xhci, &xhci->op_regs->command);
713 temp &= ~CMD_EIE;
714 xhci_writel(xhci, temp, &xhci->op_regs->command);
715
518e848e
SS		 716 port_index = max_ports;
717 while (port_index--) {
9777e3ce
AX		 718 /* Check whether need resume ports. If needed
719 resume port and disable remote wakeup */
9777e3ce
AX		 720 u32 temp;
721 int slot_id;
722
5308a91b 723 temp = xhci_readl(xhci, port_array[port_index]);
9777e3ce
AX		 724 if (DEV_SUPERSPEED(temp))
725 temp &= ~(PORT_RWC_BITS | PORT_CEC | PORT_WAKE_BITS);
726 else
727 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
20b67cf5 728 if (test_bit(port_index, &bus_state->bus_suspended) &&
9777e3ce
AX		 729 (temp & PORT_PLS_MASK)) {
730 if (DEV_SUPERSPEED(temp)) {
731 temp = xhci_port_state_to_neutral(temp);
732 temp &= ~PORT_PLS_MASK;
733 temp |= PORT_LINK_STROBE | XDEV_U0;
5308a91b 734 xhci_writel(xhci, temp, port_array[port_index]);
9777e3ce
AX		 735 } else {
736 temp = xhci_port_state_to_neutral(temp);
737 temp &= ~PORT_PLS_MASK;
738 temp |= PORT_LINK_STROBE | XDEV_RESUME;
5308a91b 739 xhci_writel(xhci, temp, port_array[port_index]);
9777e3ce
AX		 740
741 spin_unlock_irqrestore(&xhci->lock, flags);
742 msleep(20);
743 spin_lock_irqsave(&xhci->lock, flags);
744
5308a91b 745 temp = xhci_readl(xhci, port_array[port_index]);
9777e3ce
AX		 746 temp = xhci_port_state_to_neutral(temp);
747 temp &= ~PORT_PLS_MASK;
748 temp |= PORT_LINK_STROBE | XDEV_U0;
5308a91b 749 xhci_writel(xhci, temp, port_array[port_index]);
9777e3ce 750 }
518e848e 751 slot_id = xhci_find_slot_id_by_port(xhci, port_index + 1);
9777e3ce
AX		 752 if (slot_id)
753 xhci_ring_device(xhci, slot_id);
754 } else
5308a91b 755 xhci_writel(xhci, temp, port_array[port_index]);
9777e3ce
AX		 756
757 if (DEV_HIGHSPEED(temp)) {
758 /* disable remote wake up for USB 2.0 */
759 u32 __iomem *addr;
760 u32 tmp;
761
5308a91b
SS		 762 /* Add one to the port status register address to get
763 * the port power control register address.
764 */
765 addr = port_array[port_index] + 1;
9777e3ce
AX		 766 tmp = xhci_readl(xhci, addr);
767 tmp &= ~PORT_RWE;
768 xhci_writel(xhci, tmp, addr);
769 }
770 }
771
772 (void) xhci_readl(xhci, &xhci->op_regs->command);
773
20b67cf5 774 bus_state->next_statechange = jiffies + msecs_to_jiffies(5);
9777e3ce
AX		 775 /* re-enable irqs */
776 temp = xhci_readl(xhci, &xhci->op_regs->command);
777 temp |= CMD_EIE;
778 xhci_writel(xhci, temp, &xhci->op_regs->command);
779 temp = xhci_readl(xhci, &xhci->op_regs->command);
780
781 spin_unlock_irqrestore(&xhci->lock, flags);
782 return 0;
783}
784
436a3890 785#endif /* CONFIG_PM */
Linux 6.x block layer and io_uring tree(s)