Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Universal Host Controller Interface driver for USB. | |
3 | * | |
4 | * Maintainer: Alan Stern <stern@rowland.harvard.edu> | |
5 | * | |
6 | * (C) Copyright 1999 Linus Torvalds | |
7 | * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com | |
8 | * (C) Copyright 1999 Randy Dunlap | |
9 | * (C) Copyright 1999 Georg Acher, acher@in.tum.de | |
10 | * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de | |
11 | * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch | |
12 | * (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu | |
13 | */ | |
14 | ||
bef4665a | 15 | static const __u8 root_hub_hub_des[] = |
1da177e4 LT |
16 | { |
17 | 0x09, /* __u8 bLength; */ | |
18 | 0x29, /* __u8 bDescriptorType; Hub-descriptor */ | |
19 | 0x02, /* __u8 bNbrPorts; */ | |
20 | 0x0a, /* __u16 wHubCharacteristics; */ | |
21 | 0x00, /* (per-port OC, no power switching) */ | |
22 | 0x01, /* __u8 bPwrOn2pwrGood; 2ms */ | |
23 | 0x00, /* __u8 bHubContrCurrent; 0 mA */ | |
24 | 0x00, /* __u8 DeviceRemovable; *** 7 Ports max *** */ | |
25 | 0xff /* __u8 PortPwrCtrlMask; *** 7 ports max *** */ | |
26 | }; | |
27 | ||
28 | #define UHCI_RH_MAXCHILD 7 | |
29 | ||
30 | /* must write as zeroes */ | |
31 | #define WZ_BITS (USBPORTSC_RES2 | USBPORTSC_RES3 | USBPORTSC_RES4) | |
32 | ||
33 | /* status change bits: nonzero writes will clear */ | |
34 | #define RWC_BITS (USBPORTSC_OCC | USBPORTSC_PEC | USBPORTSC_CSC) | |
35 | ||
88018158 AS |
36 | /* suspend/resume bits: port suspended or port resuming */ |
37 | #define SUSPEND_BITS (USBPORTSC_SUSP | USBPORTSC_RD) | |
38 | ||
f5946f82 AS |
39 | /* A port that either is connected or has a changed-bit set will prevent |
40 | * us from AUTO_STOPPING. | |
41 | */ | |
42 | static int any_ports_active(struct uhci_hcd *uhci) | |
43 | { | |
44 | int port; | |
45 | ||
46 | for (port = 0; port < uhci->rh_numports; ++port) { | |
9faa091a | 47 | if ((uhci_readw(uhci, USBPORTSC1 + port * 2) & |
f5946f82 AS |
48 | (USBPORTSC_CCS | RWC_BITS)) || |
49 | test_bit(port, &uhci->port_c_suspend)) | |
50 | return 1; | |
51 | } | |
52 | return 0; | |
53 | } | |
54 | ||
6c1b445c | 55 | static inline int get_hub_status_data(struct uhci_hcd *uhci, char *buf) |
1da177e4 | 56 | { |
1da177e4 | 57 | int port; |
5f8364b7 AS |
58 | int mask = RWC_BITS; |
59 | ||
60 | /* Some boards (both VIA and Intel apparently) report bogus | |
61 | * overcurrent indications, causing massive log spam unless | |
62 | * we completely ignore them. This doesn't seem to be a problem | |
63 | * with the chipset so much as with the way it is connected on | |
64 | * the motherboard; if the overcurrent input is left to float | |
65 | * then it may constantly register false positives. */ | |
66 | if (ignore_oc) | |
67 | mask &= ~USBPORTSC_OCC; | |
1da177e4 LT |
68 | |
69 | *buf = 0; | |
70 | for (port = 0; port < uhci->rh_numports; ++port) { | |
9faa091a | 71 | if ((uhci_readw(uhci, USBPORTSC1 + port * 2) & mask) || |
1da177e4 LT |
72 | test_bit(port, &uhci->port_c_suspend)) |
73 | *buf |= (1 << (port + 1)); | |
74 | } | |
1da177e4 LT |
75 | return !!*buf; |
76 | } | |
77 | ||
78 | #define OK(x) len = (x); break | |
79 | ||
80 | #define CLR_RH_PORTSTAT(x) \ | |
9faa091a | 81 | status = uhci_readw(uhci, port_addr); \ |
1da177e4 LT |
82 | status &= ~(RWC_BITS|WZ_BITS); \ |
83 | status &= ~(x); \ | |
84 | status |= RWC_BITS & (x); \ | |
9faa091a | 85 | uhci_writew(uhci, status, port_addr) |
1da177e4 LT |
86 | |
87 | #define SET_RH_PORTSTAT(x) \ | |
9faa091a | 88 | status = uhci_readw(uhci, port_addr); \ |
1da177e4 LT |
89 | status |= (x); \ |
90 | status &= ~(RWC_BITS|WZ_BITS); \ | |
9faa091a | 91 | uhci_writew(uhci, status, port_addr) |
1da177e4 LT |
92 | |
93 | /* UHCI controllers don't automatically stop resume signalling after 20 msec, | |
94 | * so we have to poll and check timeouts in order to take care of it. | |
95 | */ | |
96 | static void uhci_finish_suspend(struct uhci_hcd *uhci, int port, | |
97 | unsigned long port_addr) | |
98 | { | |
99 | int status; | |
de06a3b8 | 100 | int i; |
1da177e4 | 101 | |
9faa091a | 102 | if (uhci_readw(uhci, port_addr) & SUSPEND_BITS) { |
88018158 | 103 | CLR_RH_PORTSTAT(SUSPEND_BITS); |
8e326406 AS |
104 | if (test_bit(port, &uhci->resuming_ports)) |
105 | set_bit(port, &uhci->port_c_suspend); | |
1da177e4 LT |
106 | |
107 | /* The controller won't actually turn off the RD bit until | |
108 | * it has had a chance to send a low-speed EOP sequence, | |
de06a3b8 AS |
109 | * which is supposed to take 3 bit times (= 2 microseconds). |
110 | * Experiments show that some controllers take longer, so | |
111 | * we'll poll for completion. */ | |
112 | for (i = 0; i < 10; ++i) { | |
9faa091a | 113 | if (!(uhci_readw(uhci, port_addr) & SUSPEND_BITS)) |
de06a3b8 AS |
114 | break; |
115 | udelay(1); | |
116 | } | |
1da177e4 | 117 | } |
8e326406 | 118 | clear_bit(port, &uhci->resuming_ports); |
1da177e4 LT |
119 | } |
120 | ||
ae557175 AS |
121 | /* Wait for the UHCI controller in HP's iLO2 server management chip. |
122 | * It can take up to 250 us to finish a reset and set the CSC bit. | |
123 | */ | |
9faa091a | 124 | static void wait_for_HP(struct uhci_hcd *uhci, unsigned long port_addr) |
ae557175 AS |
125 | { |
126 | int i; | |
127 | ||
128 | for (i = 10; i < 250; i += 10) { | |
9faa091a | 129 | if (uhci_readw(uhci, port_addr) & USBPORTSC_CSC) |
ae557175 AS |
130 | return; |
131 | udelay(10); | |
132 | } | |
133 | /* Log a warning? */ | |
134 | } | |
135 | ||
1da177e4 LT |
136 | static void uhci_check_ports(struct uhci_hcd *uhci) |
137 | { | |
138 | unsigned int port; | |
139 | unsigned long port_addr; | |
140 | int status; | |
141 | ||
142 | for (port = 0; port < uhci->rh_numports; ++port) { | |
9faa091a JA |
143 | port_addr = USBPORTSC1 + 2 * port; |
144 | status = uhci_readw(uhci, port_addr); | |
1da177e4 LT |
145 | if (unlikely(status & USBPORTSC_PR)) { |
146 | if (time_after_eq(jiffies, uhci->ports_timeout)) { | |
147 | CLR_RH_PORTSTAT(USBPORTSC_PR); | |
148 | udelay(10); | |
149 | ||
ae557175 AS |
150 | /* HP's server management chip requires |
151 | * a longer delay. */ | |
dfeca7a8 | 152 | if (uhci->wait_for_hp) |
9faa091a | 153 | wait_for_HP(uhci, port_addr); |
ae557175 | 154 | |
1da177e4 LT |
155 | /* If the port was enabled before, turning |
156 | * reset on caused a port enable change. | |
157 | * Turning reset off causes a port connect | |
158 | * status change. Clear these changes. */ | |
159 | CLR_RH_PORTSTAT(USBPORTSC_CSC | USBPORTSC_PEC); | |
160 | SET_RH_PORTSTAT(USBPORTSC_PE); | |
161 | } | |
162 | } | |
163 | if (unlikely(status & USBPORTSC_RD)) { | |
164 | if (!test_bit(port, &uhci->resuming_ports)) { | |
165 | ||
166 | /* Port received a wakeup request */ | |
167 | set_bit(port, &uhci->resuming_ports); | |
168 | uhci->ports_timeout = jiffies + | |
49d0f078 | 169 | msecs_to_jiffies(25); |
6c1b445c AS |
170 | |
171 | /* Make sure we see the port again | |
172 | * after the resuming period is over. */ | |
173 | mod_timer(&uhci_to_hcd(uhci)->rh_timer, | |
174 | uhci->ports_timeout); | |
1da177e4 LT |
175 | } else if (time_after_eq(jiffies, |
176 | uhci->ports_timeout)) { | |
177 | uhci_finish_suspend(uhci, port, port_addr); | |
178 | } | |
179 | } | |
180 | } | |
181 | } | |
182 | ||
6c1b445c AS |
183 | static int uhci_hub_status_data(struct usb_hcd *hcd, char *buf) |
184 | { | |
185 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | |
186 | unsigned long flags; | |
1f09df8b | 187 | int status = 0; |
6c1b445c AS |
188 | |
189 | spin_lock_irqsave(&uhci->lock, flags); | |
6c1b445c | 190 | |
7d12e780 | 191 | uhci_scan_schedule(uhci); |
541c7d43 | 192 | if (!HCD_HW_ACCESSIBLE(hcd) || uhci->dead) |
1f09df8b | 193 | goto done; |
6c1b445c | 194 | uhci_check_ports(uhci); |
1f09df8b | 195 | |
6c1b445c AS |
196 | status = get_hub_status_data(uhci, buf); |
197 | ||
198 | switch (uhci->rh_state) { | |
199 | case UHCI_RH_SUSPENDING: | |
200 | case UHCI_RH_SUSPENDED: | |
201 | /* if port change, ask to be resumed */ | |
ee0b9be8 | 202 | if (status || uhci->resuming_ports) |
6c1b445c AS |
203 | usb_hcd_resume_root_hub(hcd); |
204 | break; | |
205 | ||
206 | case UHCI_RH_AUTO_STOPPED: | |
207 | /* if port change, auto start */ | |
208 | if (status) | |
209 | wakeup_rh(uhci); | |
210 | break; | |
211 | ||
212 | case UHCI_RH_RUNNING: | |
213 | /* are any devices attached? */ | |
214 | if (!any_ports_active(uhci)) { | |
215 | uhci->rh_state = UHCI_RH_RUNNING_NODEVS; | |
216 | uhci->auto_stop_time = jiffies + HZ; | |
217 | } | |
218 | break; | |
219 | ||
220 | case UHCI_RH_RUNNING_NODEVS: | |
221 | /* auto-stop if nothing connected for 1 second */ | |
222 | if (any_ports_active(uhci)) | |
223 | uhci->rh_state = UHCI_RH_RUNNING; | |
224 | else if (time_after_eq(jiffies, uhci->auto_stop_time)) | |
225 | suspend_rh(uhci, UHCI_RH_AUTO_STOPPED); | |
226 | break; | |
227 | ||
228 | default: | |
229 | break; | |
230 | } | |
231 | ||
232 | done: | |
233 | spin_unlock_irqrestore(&uhci->lock, flags); | |
234 | return status; | |
235 | } | |
236 | ||
1da177e4 LT |
237 | /* size of returned buffer is part of USB spec */ |
238 | static int uhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, | |
239 | u16 wIndex, char *buf, u16 wLength) | |
240 | { | |
241 | struct uhci_hcd *uhci = hcd_to_uhci(hcd); | |
242 | int status, lstatus, retval = 0, len = 0; | |
243 | unsigned int port = wIndex - 1; | |
9faa091a | 244 | unsigned long port_addr = USBPORTSC1 + 2 * port; |
1da177e4 LT |
245 | u16 wPortChange, wPortStatus; |
246 | unsigned long flags; | |
247 | ||
541c7d43 | 248 | if (!HCD_HW_ACCESSIBLE(hcd) || uhci->dead) |
a8bed8b6 AS |
249 | return -ETIMEDOUT; |
250 | ||
1da177e4 LT |
251 | spin_lock_irqsave(&uhci->lock, flags); |
252 | switch (typeReq) { | |
253 | ||
254 | case GetHubStatus: | |
255 | *(__le32 *)buf = cpu_to_le32(0); | |
256 | OK(4); /* hub power */ | |
257 | case GetPortStatus: | |
258 | if (port >= uhci->rh_numports) | |
259 | goto err; | |
260 | ||
261 | uhci_check_ports(uhci); | |
9faa091a | 262 | status = uhci_readw(uhci, port_addr); |
1da177e4 LT |
263 | |
264 | /* Intel controllers report the OverCurrent bit active on. | |
265 | * VIA controllers report it active off, so we'll adjust the | |
266 | * bit value. (It's not standardized in the UHCI spec.) | |
267 | */ | |
dfeca7a8 | 268 | if (uhci->oc_low) |
1da177e4 LT |
269 | status ^= USBPORTSC_OC; |
270 | ||
271 | /* UHCI doesn't support C_RESET (always false) */ | |
272 | wPortChange = lstatus = 0; | |
273 | if (status & USBPORTSC_CSC) | |
274 | wPortChange |= USB_PORT_STAT_C_CONNECTION; | |
275 | if (status & USBPORTSC_PEC) | |
276 | wPortChange |= USB_PORT_STAT_C_ENABLE; | |
5f8364b7 | 277 | if ((status & USBPORTSC_OCC) && !ignore_oc) |
1da177e4 LT |
278 | wPortChange |= USB_PORT_STAT_C_OVERCURRENT; |
279 | ||
280 | if (test_bit(port, &uhci->port_c_suspend)) { | |
281 | wPortChange |= USB_PORT_STAT_C_SUSPEND; | |
282 | lstatus |= 1; | |
283 | } | |
1da177e4 LT |
284 | if (test_bit(port, &uhci->resuming_ports)) |
285 | lstatus |= 4; | |
286 | ||
287 | /* UHCI has no power switching (always on) */ | |
288 | wPortStatus = USB_PORT_STAT_POWER; | |
289 | if (status & USBPORTSC_CCS) | |
290 | wPortStatus |= USB_PORT_STAT_CONNECTION; | |
291 | if (status & USBPORTSC_PE) { | |
292 | wPortStatus |= USB_PORT_STAT_ENABLE; | |
88018158 | 293 | if (status & SUSPEND_BITS) |
1da177e4 LT |
294 | wPortStatus |= USB_PORT_STAT_SUSPEND; |
295 | } | |
296 | if (status & USBPORTSC_OC) | |
297 | wPortStatus |= USB_PORT_STAT_OVERCURRENT; | |
298 | if (status & USBPORTSC_PR) | |
299 | wPortStatus |= USB_PORT_STAT_RESET; | |
300 | if (status & USBPORTSC_LSDA) | |
301 | wPortStatus |= USB_PORT_STAT_LOW_SPEED; | |
302 | ||
303 | if (wPortChange) | |
304 | dev_dbg(uhci_dev(uhci), "port %d portsc %04x,%02x\n", | |
305 | wIndex, status, lstatus); | |
306 | ||
307 | *(__le16 *)buf = cpu_to_le16(wPortStatus); | |
308 | *(__le16 *)(buf + 2) = cpu_to_le16(wPortChange); | |
309 | OK(4); | |
310 | case SetHubFeature: /* We don't implement these */ | |
311 | case ClearHubFeature: | |
312 | switch (wValue) { | |
313 | case C_HUB_OVER_CURRENT: | |
314 | case C_HUB_LOCAL_POWER: | |
315 | OK(0); | |
316 | default: | |
317 | goto err; | |
318 | } | |
319 | break; | |
320 | case SetPortFeature: | |
321 | if (port >= uhci->rh_numports) | |
322 | goto err; | |
323 | ||
324 | switch (wValue) { | |
325 | case USB_PORT_FEAT_SUSPEND: | |
1da177e4 LT |
326 | SET_RH_PORTSTAT(USBPORTSC_SUSP); |
327 | OK(0); | |
328 | case USB_PORT_FEAT_RESET: | |
329 | SET_RH_PORTSTAT(USBPORTSC_PR); | |
330 | ||
331 | /* Reset terminates Resume signalling */ | |
332 | uhci_finish_suspend(uhci, port, port_addr); | |
333 | ||
334 | /* USB v2.0 7.1.7.5 */ | |
335 | uhci->ports_timeout = jiffies + msecs_to_jiffies(50); | |
336 | OK(0); | |
337 | case USB_PORT_FEAT_POWER: | |
338 | /* UHCI has no power switching */ | |
339 | OK(0); | |
340 | default: | |
341 | goto err; | |
342 | } | |
343 | break; | |
344 | case ClearPortFeature: | |
345 | if (port >= uhci->rh_numports) | |
346 | goto err; | |
347 | ||
348 | switch (wValue) { | |
349 | case USB_PORT_FEAT_ENABLE: | |
350 | CLR_RH_PORTSTAT(USBPORTSC_PE); | |
351 | ||
352 | /* Disable terminates Resume signalling */ | |
353 | uhci_finish_suspend(uhci, port, port_addr); | |
354 | OK(0); | |
355 | case USB_PORT_FEAT_C_ENABLE: | |
356 | CLR_RH_PORTSTAT(USBPORTSC_PEC); | |
357 | OK(0); | |
358 | case USB_PORT_FEAT_SUSPEND: | |
9faa091a | 359 | if (!(uhci_readw(uhci, port_addr) & USBPORTSC_SUSP)) { |
8e326406 AS |
360 | |
361 | /* Make certain the port isn't suspended */ | |
362 | uhci_finish_suspend(uhci, port, port_addr); | |
363 | } else if (!test_and_set_bit(port, | |
1da177e4 LT |
364 | &uhci->resuming_ports)) { |
365 | SET_RH_PORTSTAT(USBPORTSC_RD); | |
366 | ||
367 | /* The controller won't allow RD to be set | |
368 | * if the port is disabled. When this happens | |
369 | * just skip the Resume signalling. | |
370 | */ | |
9faa091a JA |
371 | if (!(uhci_readw(uhci, port_addr) & |
372 | USBPORTSC_RD)) | |
1da177e4 LT |
373 | uhci_finish_suspend(uhci, port, |
374 | port_addr); | |
375 | else | |
376 | /* USB v2.0 7.1.7.7 */ | |
377 | uhci->ports_timeout = jiffies + | |
378 | msecs_to_jiffies(20); | |
379 | } | |
380 | OK(0); | |
381 | case USB_PORT_FEAT_C_SUSPEND: | |
382 | clear_bit(port, &uhci->port_c_suspend); | |
383 | OK(0); | |
384 | case USB_PORT_FEAT_POWER: | |
385 | /* UHCI has no power switching */ | |
386 | goto err; | |
387 | case USB_PORT_FEAT_C_CONNECTION: | |
388 | CLR_RH_PORTSTAT(USBPORTSC_CSC); | |
389 | OK(0); | |
390 | case USB_PORT_FEAT_C_OVER_CURRENT: | |
391 | CLR_RH_PORTSTAT(USBPORTSC_OCC); | |
392 | OK(0); | |
393 | case USB_PORT_FEAT_C_RESET: | |
394 | /* this driver won't report these */ | |
395 | OK(0); | |
396 | default: | |
397 | goto err; | |
398 | } | |
399 | break; | |
400 | case GetHubDescriptor: | |
401 | len = min_t(unsigned int, sizeof(root_hub_hub_des), wLength); | |
402 | memcpy(buf, root_hub_hub_des, len); | |
403 | if (len > 2) | |
404 | buf[2] = uhci->rh_numports; | |
405 | OK(len); | |
406 | default: | |
407 | err: | |
408 | retval = -EPIPE; | |
409 | } | |
410 | spin_unlock_irqrestore(&uhci->lock, flags); | |
411 | ||
412 | return retval; | |
413 | } |