Commit | Line | Data |
---|---|---|
5fd54ace | 1 | // SPDX-License-Identifier: GPL-1.0+ |
1da177e4 LT |
2 | /* |
3 | * OHCI HCD (Host Controller Driver) for USB. | |
4 | * | |
5 | * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> | |
6 | * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net> | |
dd9048af | 7 | * |
1da177e4 LT |
8 | * [ Initialisation is based on Linus' ] |
9 | * [ uhci code and gregs ohci fragments ] | |
10 | * [ (C) Copyright 1999 Linus Torvalds ] | |
11 | * [ (C) Copyright 1999 Gregory P. Smith] | |
dd9048af | 12 | * |
1da177e4 LT |
13 | * PCI Bus Glue |
14 | * | |
15 | * This file is licenced under the GPL. | |
16 | */ | |
dd9048af | 17 | |
ab1666c1 | 18 | #include <linux/io.h> |
c1117afb MG |
19 | #include <linux/kernel.h> |
20 | #include <linux/module.h> | |
21 | #include <linux/pci.h> | |
22 | #include <linux/usb.h> | |
23 | #include <linux/usb/hcd.h> | |
24 | ||
25 | #include "ohci.h" | |
26 | #include "pci-quirks.h" | |
27 | ||
28 | #define DRIVER_DESC "OHCI PCI platform driver" | |
29 | ||
30 | static const char hcd_name[] = "ohci-pci"; | |
ab1666c1 LY |
31 | |
32 | ||
1da177e4 LT |
33 | /*-------------------------------------------------------------------------*/ |
34 | ||
931384fb DB |
35 | static int broken_suspend(struct usb_hcd *hcd) |
36 | { | |
37 | device_init_wakeup(&hcd->self.root_hub->dev, 0); | |
38 | return 0; | |
39 | } | |
40 | ||
4302a595 BH |
41 | /* AMD 756, for most chips (early revs), corrupts register |
42 | * values on read ... so enable the vendor workaround. | |
43 | */ | |
931384fb | 44 | static int ohci_quirk_amd756(struct usb_hcd *hcd) |
1da177e4 LT |
45 | { |
46 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); | |
47 | ||
4302a595 BH |
48 | ohci->flags = OHCI_QUIRK_AMD756; |
49 | ohci_dbg (ohci, "AMD756 erratum 4 workaround\n"); | |
50 | ||
51 | /* also erratum 10 (suspend/resume issues) */ | |
931384fb | 52 | return broken_suspend(hcd); |
1da177e4 LT |
53 | } |
54 | ||
4302a595 BH |
55 | /* Apple's OHCI driver has a lot of bizarre workarounds |
56 | * for this chip. Evidently control and bulk lists | |
57 | * can get confused. (B&W G3 models, and ...) | |
58 | */ | |
931384fb | 59 | static int ohci_quirk_opti(struct usb_hcd *hcd) |
1da177e4 LT |
60 | { |
61 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); | |
1da177e4 | 62 | |
4302a595 BH |
63 | ohci_dbg (ohci, "WARNING: OPTi workarounds unavailable\n"); |
64 | ||
65 | return 0; | |
66 | } | |
67 | ||
68 | /* Check for NSC87560. We have to look at the bridge (fn1) to | |
69 | * identify the USB (fn2). This quirk might apply to more or | |
70 | * even all NSC stuff. | |
71 | */ | |
931384fb | 72 | static int ohci_quirk_ns(struct usb_hcd *hcd) |
4302a595 BH |
73 | { |
74 | struct pci_dev *pdev = to_pci_dev(hcd->self.controller); | |
75 | struct pci_dev *b; | |
76 | ||
77 | b = pci_get_slot (pdev->bus, PCI_DEVFN (PCI_SLOT (pdev->devfn), 1)); | |
78 | if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO | |
79 | && b->vendor == PCI_VENDOR_ID_NS) { | |
80 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); | |
81 | ||
82 | ohci->flags |= OHCI_QUIRK_SUPERIO; | |
83 | ohci_dbg (ohci, "Using NSC SuperIO setup\n"); | |
84 | } | |
85 | pci_dev_put(b); | |
86 | ||
87 | return 0; | |
88 | } | |
89 | ||
90 | /* Check for Compaq's ZFMicro chipset, which needs short | |
91 | * delays before control or bulk queues get re-activated | |
92 | * in finish_unlinks() | |
93 | */ | |
931384fb | 94 | static int ohci_quirk_zfmicro(struct usb_hcd *hcd) |
4302a595 BH |
95 | { |
96 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); | |
97 | ||
98 | ohci->flags |= OHCI_QUIRK_ZFMICRO; | |
89a0fd18 | 99 | ohci_dbg(ohci, "enabled Compaq ZFMicro chipset quirks\n"); |
4302a595 BH |
100 | |
101 | return 0; | |
102 | } | |
103 | ||
11d1a4aa BH |
104 | /* Check for Toshiba SCC OHCI which has big endian registers |
105 | * and little endian in memory data structures | |
106 | */ | |
931384fb | 107 | static int ohci_quirk_toshiba_scc(struct usb_hcd *hcd) |
11d1a4aa BH |
108 | { |
109 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); | |
110 | ||
111 | /* That chip is only present in the southbridge of some | |
112 | * cell based platforms which are supposed to select | |
113 | * CONFIG_USB_OHCI_BIG_ENDIAN_MMIO. We verify here if | |
114 | * that was the case though. | |
115 | */ | |
116 | #ifdef CONFIG_USB_OHCI_BIG_ENDIAN_MMIO | |
117 | ohci->flags |= OHCI_QUIRK_BE_MMIO; | |
118 | ohci_dbg (ohci, "enabled big endian Toshiba quirk\n"); | |
119 | return 0; | |
120 | #else | |
121 | ohci_err (ohci, "unsupported big endian Toshiba quirk\n"); | |
122 | return -ENXIO; | |
123 | #endif | |
124 | } | |
4302a595 | 125 | |
d576bb9f MH |
126 | /* Check for NEC chip and apply quirk for allegedly lost interrupts. |
127 | */ | |
89a0fd18 MN |
128 | |
129 | static void ohci_quirk_nec_worker(struct work_struct *work) | |
130 | { | |
131 | struct ohci_hcd *ohci = container_of(work, struct ohci_hcd, nec_work); | |
132 | int status; | |
133 | ||
89a0fd18 MN |
134 | status = ohci_restart(ohci); |
135 | if (status != 0) | |
136 | ohci_err(ohci, "Restarting NEC controller failed in %s, %d\n", | |
137 | "ohci_restart", status); | |
138 | } | |
139 | ||
d576bb9f MH |
140 | static int ohci_quirk_nec(struct usb_hcd *hcd) |
141 | { | |
142 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); | |
143 | ||
144 | ohci->flags |= OHCI_QUIRK_NEC; | |
89a0fd18 | 145 | INIT_WORK(&ohci->nec_work, ohci_quirk_nec_worker); |
d576bb9f MH |
146 | ohci_dbg (ohci, "enabled NEC chipset lost interrupt quirk\n"); |
147 | ||
148 | return 0; | |
149 | } | |
150 | ||
ab1666c1 LY |
151 | static int ohci_quirk_amd700(struct usb_hcd *hcd) |
152 | { | |
153 | struct ohci_hcd *ohci = hcd_to_ohci(hcd); | |
ab1666c1 | 154 | |
ad93562b AX |
155 | if (usb_amd_find_chipset_info()) |
156 | ohci->flags |= OHCI_QUIRK_AMD_PLL; | |
157 | ||
a1f17a87 | 158 | /* SB800 needs pre-fetch fix */ |
02c123ee | 159 | if (usb_amd_prefetch_quirk()) { |
a1f17a87 LY |
160 | ohci->flags |= OHCI_QUIRK_AMD_PREFETCH; |
161 | ohci_dbg(ohci, "enabled AMD prefetch quirk\n"); | |
162 | } | |
163 | ||
c1db30a2 | 164 | ohci->flags |= OHCI_QUIRK_GLOBAL_SUSPEND; |
ab1666c1 LY |
165 | return 0; |
166 | } | |
167 | ||
21a60f6e GH |
168 | static int ohci_quirk_qemu(struct usb_hcd *hcd) |
169 | { | |
170 | struct ohci_hcd *ohci = hcd_to_ohci(hcd); | |
171 | ||
172 | ohci->flags |= OHCI_QUIRK_QEMU; | |
173 | ohci_dbg(ohci, "enabled qemu quirk\n"); | |
174 | return 0; | |
175 | } | |
176 | ||
4302a595 BH |
177 | /* List of quirks for OHCI */ |
178 | static const struct pci_device_id ohci_pci_quirks[] = { | |
179 | { | |
180 | PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x740c), | |
181 | .driver_data = (unsigned long)ohci_quirk_amd756, | |
182 | }, | |
183 | { | |
184 | PCI_DEVICE(PCI_VENDOR_ID_OPTI, 0xc861), | |
185 | .driver_data = (unsigned long)ohci_quirk_opti, | |
186 | }, | |
187 | { | |
188 | PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_ANY_ID), | |
189 | .driver_data = (unsigned long)ohci_quirk_ns, | |
190 | }, | |
191 | { | |
192 | PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xa0f8), | |
193 | .driver_data = (unsigned long)ohci_quirk_zfmicro, | |
194 | }, | |
11d1a4aa BH |
195 | { |
196 | PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, 0x01b6), | |
197 | .driver_data = (unsigned long)ohci_quirk_toshiba_scc, | |
198 | }, | |
d576bb9f MH |
199 | { |
200 | PCI_DEVICE(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB), | |
201 | .driver_data = (unsigned long)ohci_quirk_nec, | |
202 | }, | |
931384fb DB |
203 | { |
204 | /* Toshiba portege 4000 */ | |
205 | .vendor = PCI_VENDOR_ID_AL, | |
206 | .device = 0x5237, | |
8ab5e8c0 | 207 | .subvendor = PCI_VENDOR_ID_TOSHIBA, |
931384fb DB |
208 | .subdevice = 0x0004, |
209 | .driver_data = (unsigned long) broken_suspend, | |
210 | }, | |
33f73e56 RA |
211 | { |
212 | PCI_DEVICE(PCI_VENDOR_ID_ITE, 0x8152), | |
213 | .driver_data = (unsigned long) broken_suspend, | |
214 | }, | |
ab1666c1 LY |
215 | { |
216 | PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4397), | |
217 | .driver_data = (unsigned long)ohci_quirk_amd700, | |
218 | }, | |
219 | { | |
220 | PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4398), | |
221 | .driver_data = (unsigned long)ohci_quirk_amd700, | |
222 | }, | |
223 | { | |
224 | PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4399), | |
225 | .driver_data = (unsigned long)ohci_quirk_amd700, | |
226 | }, | |
21a60f6e GH |
227 | { |
228 | .vendor = PCI_VENDOR_ID_APPLE, | |
229 | .device = 0x003f, | |
230 | .subvendor = PCI_SUBVENDOR_ID_REDHAT_QUMRANET, | |
231 | .subdevice = PCI_SUBDEVICE_ID_QEMU, | |
232 | .driver_data = (unsigned long)ohci_quirk_qemu, | |
233 | }, | |
ab1666c1 | 234 | |
4302a595 BH |
235 | /* FIXME for some of the early AMD 760 southbridges, OHCI |
236 | * won't work at all. blacklist them. | |
6a9062f3 | 237 | */ |
11d1a4aa | 238 | |
4302a595 BH |
239 | {}, |
240 | }; | |
241 | ||
242 | static int ohci_pci_reset (struct usb_hcd *hcd) | |
243 | { | |
244 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); | |
c1117afb | 245 | struct pci_dev *pdev = to_pci_dev(hcd->self.controller); |
4302a595 BH |
246 | int ret = 0; |
247 | ||
6a9062f3 | 248 | if (hcd->self.controller) { |
4302a595 | 249 | const struct pci_device_id *quirk_id; |
1da177e4 | 250 | |
4302a595 BH |
251 | quirk_id = pci_match_id(ohci_pci_quirks, pdev); |
252 | if (quirk_id != NULL) { | |
253 | int (*quirk)(struct usb_hcd *ohci); | |
254 | quirk = (void *)quirk_id->driver_data; | |
255 | ret = quirk(hcd); | |
1da177e4 | 256 | } |
4302a595 | 257 | } |
1da177e4 | 258 | |
c1117afb MG |
259 | if (ret == 0) |
260 | ret = ohci_setup(hcd); | |
261 | /* | |
262 | * After ohci setup RWC may not be set for add-in PCI cards. | |
263 | * This transfers PCI PM wakeup capabilities. | |
264 | */ | |
265 | if (device_can_wakeup(&pdev->dev)) | |
266 | ohci->hc_control |= OHCI_CTRL_RWC; | |
4302a595 | 267 | return ret; |
1da177e4 LT |
268 | } |
269 | ||
c1117afb | 270 | static struct hc_driver __read_mostly ohci_pci_hc_driver; |
1da177e4 | 271 | |
c1117afb MG |
272 | static const struct ohci_driver_overrides pci_overrides __initconst = { |
273 | .product_desc = "OHCI PCI host controller", | |
1da177e4 | 274 | .reset = ohci_pci_reset, |
1da177e4 LT |
275 | }; |
276 | ||
1da177e4 LT |
277 | static const struct pci_device_id pci_ids [] = { { |
278 | /* handle any USB OHCI controller */ | |
c67808ee | 279 | PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI, ~0), |
1da177e4 | 280 | .driver_data = (unsigned long) &ohci_pci_hc_driver, |
3a0bac06 AR |
281 | }, { |
282 | /* The device in the ConneXT I/O hub has no class reg */ | |
283 | PCI_VDEVICE(STMICRO, PCI_DEVICE_ID_STMICRO_USB_OHCI), | |
284 | .driver_data = (unsigned long) &ohci_pci_hc_driver, | |
1da177e4 LT |
285 | }, { /* end: all zeroes */ } |
286 | }; | |
287 | MODULE_DEVICE_TABLE (pci, pci_ids); | |
288 | ||
289 | /* pci driver glue; this is a "new style" PCI driver module */ | |
290 | static struct pci_driver ohci_pci_driver = { | |
291 | .name = (char *) hcd_name, | |
292 | .id_table = pci_ids, | |
293 | ||
294 | .probe = usb_hcd_pci_probe, | |
295 | .remove = usb_hcd_pci_remove, | |
abb30641 | 296 | .shutdown = usb_hcd_pci_shutdown, |
1da177e4 | 297 | |
69820e01 | 298 | #ifdef CONFIG_PM |
abb30641 AS |
299 | .driver = { |
300 | .pm = &usb_hcd_pci_pm_ops | |
301 | }, | |
1da177e4 LT |
302 | #endif |
303 | }; | |
c1117afb MG |
304 | |
305 | static int __init ohci_pci_init(void) | |
306 | { | |
307 | if (usb_disabled()) | |
308 | return -ENODEV; | |
309 | ||
310 | pr_info("%s: " DRIVER_DESC "\n", hcd_name); | |
311 | ||
312 | ohci_init_driver(&ohci_pci_hc_driver, &pci_overrides); | |
9a11899c | 313 | |
d3474049 | 314 | #ifdef CONFIG_PM |
9a11899c AS |
315 | /* Entries for the PCI suspend/resume callbacks are special */ |
316 | ohci_pci_hc_driver.pci_suspend = ohci_suspend; | |
317 | ohci_pci_hc_driver.pci_resume = ohci_resume; | |
d3474049 | 318 | #endif |
9a11899c | 319 | |
c1117afb MG |
320 | return pci_register_driver(&ohci_pci_driver); |
321 | } | |
322 | module_init(ohci_pci_init); | |
323 | ||
324 | static void __exit ohci_pci_cleanup(void) | |
325 | { | |
326 | pci_unregister_driver(&ohci_pci_driver); | |
327 | } | |
328 | module_exit(ohci_pci_cleanup); | |
329 | ||
330 | MODULE_DESCRIPTION(DRIVER_DESC); | |
331 | MODULE_LICENSE("GPL"); | |
05c92da0 | 332 | MODULE_SOFTDEP("pre: ehci_pci"); |