Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * OHCI HCD (Host Controller Driver) for USB. | |
3 | * | |
4 | * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> | |
5 | * (C) Copyright 2000-2005 David Brownell | |
6 | * (C) Copyright 2002 Hewlett-Packard Company | |
7 | * | |
8 | * OMAP Bus Glue | |
9 | * | |
10 | * Modified for OMAP by Tony Lindgren <tony@atomide.com> | |
11 | * Based on the 2.4 OMAP OHCI driver originally done by MontaVista Software Inc. | |
12 | * and on ohci-sa1111.c by Christopher Hoover <ch@hpl.hp.com> | |
13 | * | |
14 | * This file is licenced under the GPL. | |
15 | */ | |
16 | ||
17 | #include <asm/hardware.h> | |
18 | #include <asm/io.h> | |
19 | #include <asm/mach-types.h> | |
20 | ||
1da177e4 LT |
21 | #include <asm/arch/mux.h> |
22 | #include <asm/arch/irqs.h> | |
23 | #include <asm/arch/gpio.h> | |
24 | #include <asm/arch/fpga.h> | |
25 | #include <asm/arch/usb.h> | |
26 | #include <asm/hardware/clock.h> | |
27 | ||
28 | ||
29 | /* OMAP-1510 OHCI has its own MMU for DMA */ | |
30 | #define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */ | |
31 | #define OMAP1510_LB_CLOCK_DIV 0xfffec10c | |
32 | #define OMAP1510_LB_MMU_CTL 0xfffec208 | |
33 | #define OMAP1510_LB_MMU_LCK 0xfffec224 | |
34 | #define OMAP1510_LB_MMU_LD_TLB 0xfffec228 | |
35 | #define OMAP1510_LB_MMU_CAM_H 0xfffec22c | |
36 | #define OMAP1510_LB_MMU_CAM_L 0xfffec230 | |
37 | #define OMAP1510_LB_MMU_RAM_H 0xfffec234 | |
38 | #define OMAP1510_LB_MMU_RAM_L 0xfffec238 | |
39 | ||
40 | ||
41 | #ifndef CONFIG_ARCH_OMAP | |
42 | #error "This file is OMAP bus glue. CONFIG_OMAP must be defined." | |
43 | #endif | |
44 | ||
45 | #ifdef CONFIG_TPS65010 | |
46 | #include <asm/arch/tps65010.h> | |
47 | #else | |
48 | ||
49 | #define LOW 0 | |
50 | #define HIGH 1 | |
51 | ||
52 | #define GPIO1 1 | |
53 | ||
54 | static inline int tps65010_set_gpio_out_value(unsigned gpio, unsigned value) | |
55 | { | |
56 | return 0; | |
57 | } | |
58 | ||
59 | #endif | |
60 | ||
61 | extern int usb_disabled(void); | |
62 | extern int ocpi_enable(void); | |
63 | ||
64 | static struct clk *usb_host_ck; | |
65 | ||
66 | static void omap_ohci_clock_power(int on) | |
67 | { | |
68 | if (on) { | |
69 | clk_enable(usb_host_ck); | |
70 | /* guesstimate for T5 == 1x 32K clock + APLL lock time */ | |
71 | udelay(100); | |
72 | } else { | |
73 | clk_disable(usb_host_ck); | |
74 | } | |
75 | } | |
76 | ||
77 | /* | |
78 | * Board specific gang-switched transceiver power on/off. | |
79 | * NOTE: OSK supplies power from DC, not battery. | |
80 | */ | |
81 | static int omap_ohci_transceiver_power(int on) | |
82 | { | |
83 | if (on) { | |
84 | if (machine_is_omap_innovator() && cpu_is_omap1510()) | |
85 | fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL) | |
86 | | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), | |
87 | INNOVATOR_FPGA_CAM_USB_CONTROL); | |
88 | else if (machine_is_omap_osk()) | |
89 | tps65010_set_gpio_out_value(GPIO1, LOW); | |
90 | } else { | |
91 | if (machine_is_omap_innovator() && cpu_is_omap1510()) | |
92 | fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL) | |
93 | & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), | |
94 | INNOVATOR_FPGA_CAM_USB_CONTROL); | |
95 | else if (machine_is_omap_osk()) | |
96 | tps65010_set_gpio_out_value(GPIO1, HIGH); | |
97 | } | |
98 | ||
99 | return 0; | |
100 | } | |
101 | ||
102 | /* | |
103 | * OMAP-1510 specific Local Bus clock on/off | |
104 | */ | |
105 | static int omap_1510_local_bus_power(int on) | |
106 | { | |
107 | if (on) { | |
108 | omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL); | |
109 | udelay(200); | |
110 | } else { | |
111 | omap_writel(0, OMAP1510_LB_MMU_CTL); | |
112 | } | |
113 | ||
114 | return 0; | |
115 | } | |
116 | ||
117 | /* | |
118 | * OMAP-1510 specific Local Bus initialization | |
119 | * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE. | |
120 | * See also arch/mach-omap/memory.h for __virt_to_dma() and | |
121 | * __dma_to_virt() which need to match with the physical | |
122 | * Local Bus address below. | |
123 | */ | |
124 | static int omap_1510_local_bus_init(void) | |
125 | { | |
126 | unsigned int tlb; | |
127 | unsigned long lbaddr, physaddr; | |
128 | ||
129 | omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4, | |
130 | OMAP1510_LB_CLOCK_DIV); | |
131 | ||
132 | /* Configure the Local Bus MMU table */ | |
133 | for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) { | |
134 | lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET; | |
135 | physaddr = tlb * 0x00100000 + PHYS_OFFSET; | |
136 | omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H); | |
137 | omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc, | |
138 | OMAP1510_LB_MMU_CAM_L); | |
139 | omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H); | |
140 | omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L); | |
141 | omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK); | |
142 | omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB); | |
143 | } | |
144 | ||
145 | /* Enable the walking table */ | |
146 | omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL); | |
147 | udelay(200); | |
148 | ||
149 | return 0; | |
150 | } | |
151 | ||
152 | #ifdef CONFIG_USB_OTG | |
153 | ||
154 | static void start_hnp(struct ohci_hcd *ohci) | |
155 | { | |
156 | const unsigned port = ohci_to_hcd(ohci)->self.otg_port - 1; | |
157 | unsigned long flags; | |
158 | ||
159 | otg_start_hnp(ohci->transceiver); | |
160 | ||
161 | local_irq_save(flags); | |
162 | ohci->transceiver->state = OTG_STATE_A_SUSPEND; | |
163 | writel (RH_PS_PSS, &ohci->regs->roothub.portstatus [port]); | |
164 | OTG_CTRL_REG &= ~OTG_A_BUSREQ; | |
165 | local_irq_restore(flags); | |
166 | } | |
167 | ||
168 | #endif | |
169 | ||
170 | /*-------------------------------------------------------------------------*/ | |
171 | ||
172 | static int omap_start_hc(struct ohci_hcd *ohci, struct platform_device *pdev) | |
173 | { | |
174 | struct omap_usb_config *config = pdev->dev.platform_data; | |
175 | int need_transceiver = (config->otg != 0); | |
176 | int ret; | |
177 | ||
178 | dev_dbg(&pdev->dev, "starting USB Controller\n"); | |
179 | ||
180 | if (config->otg) { | |
181 | ohci_to_hcd(ohci)->self.otg_port = config->otg; | |
182 | /* default/minimum OTG power budget: 8 mA */ | |
bc96c0ad | 183 | ohci_to_hcd(ohci)->power_budget = 8; |
1da177e4 LT |
184 | } |
185 | ||
186 | /* boards can use OTG transceivers in non-OTG modes */ | |
187 | need_transceiver = need_transceiver | |
188 | || machine_is_omap_h2() || machine_is_omap_h3(); | |
189 | ||
190 | if (cpu_is_omap16xx()) | |
191 | ocpi_enable(); | |
192 | ||
193 | #ifdef CONFIG_ARCH_OMAP_OTG | |
194 | if (need_transceiver) { | |
195 | ohci->transceiver = otg_get_transceiver(); | |
196 | if (ohci->transceiver) { | |
197 | int status = otg_set_host(ohci->transceiver, | |
198 | &ohci_to_hcd(ohci)->self); | |
199 | dev_dbg(&pdev->dev, "init %s transceiver, status %d\n", | |
200 | ohci->transceiver->label, status); | |
201 | if (status) { | |
202 | if (ohci->transceiver) | |
203 | put_device(ohci->transceiver->dev); | |
204 | return status; | |
205 | } | |
206 | } else { | |
207 | dev_err(&pdev->dev, "can't find transceiver\n"); | |
208 | return -ENODEV; | |
209 | } | |
210 | } | |
211 | #endif | |
212 | ||
213 | omap_ohci_clock_power(1); | |
214 | ||
215 | if (cpu_is_omap1510()) { | |
216 | omap_1510_local_bus_power(1); | |
217 | omap_1510_local_bus_init(); | |
218 | } | |
219 | ||
220 | if ((ret = ohci_init(ohci)) < 0) | |
221 | return ret; | |
222 | ||
223 | /* board-specific power switching and overcurrent support */ | |
224 | if (machine_is_omap_osk() || machine_is_omap_innovator()) { | |
225 | u32 rh = roothub_a (ohci); | |
226 | ||
227 | /* power switching (ganged by default) */ | |
228 | rh &= ~RH_A_NPS; | |
229 | ||
230 | /* TPS2045 switch for internal transceiver (port 1) */ | |
231 | if (machine_is_omap_osk()) { | |
bc96c0ad | 232 | ohci_to_hcd(ohci)->power_budget = 250; |
1da177e4 LT |
233 | |
234 | rh &= ~RH_A_NOCP; | |
235 | ||
236 | /* gpio9 for overcurrent detction */ | |
237 | omap_cfg_reg(W8_1610_GPIO9); | |
238 | omap_request_gpio(9); | |
239 | omap_set_gpio_direction(9, 1 /* IN */); | |
240 | ||
241 | /* for paranoia's sake: disable USB.PUEN */ | |
242 | omap_cfg_reg(W4_USB_HIGHZ); | |
243 | } | |
244 | ohci_writel(ohci, rh, &ohci->regs->roothub.a); | |
245 | distrust_firmware = 0; | |
246 | } | |
247 | ||
248 | /* FIXME khubd hub requests should manage power switching */ | |
249 | omap_ohci_transceiver_power(1); | |
250 | ||
251 | /* board init will have already handled HMC and mux setup. | |
252 | * any external transceiver should already be initialized | |
253 | * too, so all configured ports use the right signaling now. | |
254 | */ | |
255 | ||
256 | return 0; | |
257 | } | |
258 | ||
259 | static void omap_stop_hc(struct platform_device *pdev) | |
260 | { | |
261 | dev_dbg(&pdev->dev, "stopping USB Controller\n"); | |
262 | omap_ohci_clock_power(0); | |
263 | } | |
264 | ||
265 | ||
266 | /*-------------------------------------------------------------------------*/ | |
267 | ||
268 | void usb_hcd_omap_remove (struct usb_hcd *, struct platform_device *); | |
269 | ||
270 | /* configure so an HC device and id are always provided */ | |
271 | /* always called with process context; sleeping is OK */ | |
272 | ||
273 | ||
274 | /** | |
275 | * usb_hcd_omap_probe - initialize OMAP-based HCDs | |
276 | * Context: !in_interrupt() | |
277 | * | |
278 | * Allocates basic resources for this USB host controller, and | |
279 | * then invokes the start() method for the HCD associated with it | |
280 | * through the hotplug entry's driver_data. | |
281 | */ | |
282 | int usb_hcd_omap_probe (const struct hc_driver *driver, | |
283 | struct platform_device *pdev) | |
284 | { | |
285 | int retval; | |
286 | struct usb_hcd *hcd = 0; | |
287 | struct ohci_hcd *ohci; | |
288 | ||
289 | if (pdev->num_resources != 2) { | |
290 | printk(KERN_ERR "hcd probe: invalid num_resources: %i\n", | |
291 | pdev->num_resources); | |
292 | return -ENODEV; | |
293 | } | |
294 | ||
295 | if (pdev->resource[0].flags != IORESOURCE_MEM | |
296 | || pdev->resource[1].flags != IORESOURCE_IRQ) { | |
297 | printk(KERN_ERR "hcd probe: invalid resource type\n"); | |
298 | return -ENODEV; | |
299 | } | |
300 | ||
301 | usb_host_ck = clk_get(0, "usb_hhc_ck"); | |
302 | if (IS_ERR(usb_host_ck)) | |
303 | return PTR_ERR(usb_host_ck); | |
304 | ||
305 | hcd = usb_create_hcd (driver, &pdev->dev, pdev->dev.bus_id); | |
306 | if (!hcd) { | |
307 | retval = -ENOMEM; | |
308 | goto err0; | |
309 | } | |
310 | hcd->rsrc_start = pdev->resource[0].start; | |
311 | hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1; | |
312 | ||
313 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { | |
314 | dev_dbg(&pdev->dev, "request_mem_region failed\n"); | |
315 | retval = -EBUSY; | |
316 | goto err1; | |
317 | } | |
318 | ||
319 | hcd->regs = (void __iomem *) (int) IO_ADDRESS(hcd->rsrc_start); | |
320 | ||
321 | ohci = hcd_to_ohci(hcd); | |
322 | ohci_hcd_init(ohci); | |
323 | ||
324 | retval = omap_start_hc(ohci, pdev); | |
325 | if (retval < 0) | |
326 | goto err2; | |
327 | ||
328 | retval = usb_add_hcd(hcd, platform_get_irq(pdev, 0), SA_INTERRUPT); | |
329 | if (retval == 0) | |
330 | return retval; | |
331 | ||
332 | omap_stop_hc(pdev); | |
333 | err2: | |
334 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); | |
335 | err1: | |
336 | usb_put_hcd(hcd); | |
337 | err0: | |
338 | clk_put(usb_host_ck); | |
339 | return retval; | |
340 | } | |
341 | ||
342 | ||
343 | /* may be called with controller, bus, and devices active */ | |
344 | ||
345 | /** | |
346 | * usb_hcd_omap_remove - shutdown processing for OMAP-based HCDs | |
347 | * @dev: USB Host Controller being removed | |
348 | * Context: !in_interrupt() | |
349 | * | |
350 | * Reverses the effect of usb_hcd_omap_probe(), first invoking | |
351 | * the HCD's stop() method. It is always called from a thread | |
352 | * context, normally "rmmod", "apmd", or something similar. | |
353 | * | |
354 | */ | |
355 | void usb_hcd_omap_remove (struct usb_hcd *hcd, struct platform_device *pdev) | |
356 | { | |
357 | usb_remove_hcd(hcd); | |
358 | if (machine_is_omap_osk()) | |
359 | omap_free_gpio(9); | |
360 | omap_stop_hc(pdev); | |
361 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); | |
362 | usb_put_hcd(hcd); | |
363 | clk_put(usb_host_ck); | |
364 | } | |
365 | ||
366 | /*-------------------------------------------------------------------------*/ | |
367 | ||
368 | static int __devinit | |
369 | ohci_omap_start (struct usb_hcd *hcd) | |
370 | { | |
371 | struct omap_usb_config *config; | |
372 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); | |
373 | int ret; | |
374 | ||
375 | config = hcd->self.controller->platform_data; | |
376 | if (config->otg || config->rwc) | |
377 | writel(OHCI_CTRL_RWC, &ohci->regs->control); | |
378 | ||
379 | if ((ret = ohci_run (ohci)) < 0) { | |
380 | dev_err(hcd->self.controller, "can't start\n"); | |
381 | ohci_stop (hcd); | |
382 | return ret; | |
383 | } | |
384 | return 0; | |
385 | } | |
386 | ||
387 | /*-------------------------------------------------------------------------*/ | |
388 | ||
389 | static const struct hc_driver ohci_omap_hc_driver = { | |
390 | .description = hcd_name, | |
391 | .product_desc = "OMAP OHCI", | |
392 | .hcd_priv_size = sizeof(struct ohci_hcd), | |
393 | ||
394 | /* | |
395 | * generic hardware linkage | |
396 | */ | |
397 | .irq = ohci_irq, | |
398 | .flags = HCD_USB11 | HCD_MEMORY, | |
399 | ||
400 | /* | |
401 | * basic lifecycle operations | |
402 | */ | |
403 | .start = ohci_omap_start, | |
404 | .stop = ohci_stop, | |
405 | ||
406 | /* | |
407 | * managing i/o requests and associated device resources | |
408 | */ | |
409 | .urb_enqueue = ohci_urb_enqueue, | |
410 | .urb_dequeue = ohci_urb_dequeue, | |
411 | .endpoint_disable = ohci_endpoint_disable, | |
412 | ||
413 | /* | |
414 | * scheduling support | |
415 | */ | |
416 | .get_frame_number = ohci_get_frame, | |
417 | ||
418 | /* | |
419 | * root hub support | |
420 | */ | |
421 | .hub_status_data = ohci_hub_status_data, | |
422 | .hub_control = ohci_hub_control, | |
8ad7fe16 | 423 | #ifdef CONFIG_PM |
0c0382e3 AS |
424 | .bus_suspend = ohci_bus_suspend, |
425 | .bus_resume = ohci_bus_resume, | |
1da177e4 LT |
426 | #endif |
427 | .start_port_reset = ohci_start_port_reset, | |
428 | }; | |
429 | ||
430 | /*-------------------------------------------------------------------------*/ | |
431 | ||
432 | static int ohci_hcd_omap_drv_probe(struct device *dev) | |
433 | { | |
434 | return usb_hcd_omap_probe(&ohci_omap_hc_driver, | |
435 | to_platform_device(dev)); | |
436 | } | |
437 | ||
438 | static int ohci_hcd_omap_drv_remove(struct device *dev) | |
439 | { | |
440 | struct platform_device *pdev = to_platform_device(dev); | |
441 | struct usb_hcd *hcd = dev_get_drvdata(dev); | |
442 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); | |
443 | ||
444 | usb_hcd_omap_remove(hcd, pdev); | |
445 | if (ohci->transceiver) { | |
446 | (void) otg_set_host(ohci->transceiver, 0); | |
447 | put_device(ohci->transceiver->dev); | |
448 | } | |
449 | dev_set_drvdata(dev, NULL); | |
450 | ||
451 | return 0; | |
452 | } | |
453 | ||
454 | /*-------------------------------------------------------------------------*/ | |
455 | ||
456 | #ifdef CONFIG_PM | |
457 | ||
9480e307 | 458 | static int ohci_omap_suspend(struct device *dev, pm_message_t message) |
1da177e4 LT |
459 | { |
460 | struct ohci_hcd *ohci = hcd_to_ohci(dev_get_drvdata(dev)); | |
f197b2c5 DB |
461 | |
462 | if (time_before(jiffies, ohci->next_statechange)) | |
463 | msleep(5); | |
464 | ohci->next_statechange = jiffies; | |
465 | ||
466 | omap_ohci_clock_power(0); | |
467 | ohci_to_hcd(ohci)->state = HC_STATE_SUSPENDED; | |
468 | dev->power.power_state = PMSG_SUSPEND; | |
469 | return 0; | |
1da177e4 LT |
470 | } |
471 | ||
9480e307 | 472 | static int ohci_omap_resume(struct device *dev) |
1da177e4 LT |
473 | { |
474 | struct ohci_hcd *ohci = hcd_to_ohci(dev_get_drvdata(dev)); | |
1da177e4 | 475 | |
b404a5b0 | 476 | if (time_before(jiffies, ohci->next_statechange)) |
477 | msleep(5); | |
478 | ohci->next_statechange = jiffies; | |
f197b2c5 | 479 | |
b404a5b0 | 480 | omap_ohci_clock_power(1); |
f197b2c5 DB |
481 | dev->power.power_state = PMSG_ON; |
482 | usb_hcd_resume_root_hub(dev_get_drvdata(dev)); | |
483 | return 0; | |
1da177e4 LT |
484 | } |
485 | ||
486 | #endif | |
487 | ||
488 | /*-------------------------------------------------------------------------*/ | |
489 | ||
490 | /* | |
491 | * Driver definition to register with the OMAP bus | |
492 | */ | |
493 | static struct device_driver ohci_hcd_omap_driver = { | |
494 | .name = "ohci", | |
efa400db | 495 | .owner = THIS_MODULE, |
1da177e4 LT |
496 | .bus = &platform_bus_type, |
497 | .probe = ohci_hcd_omap_drv_probe, | |
498 | .remove = ohci_hcd_omap_drv_remove, | |
499 | #ifdef CONFIG_PM | |
500 | .suspend = ohci_omap_suspend, | |
501 | .resume = ohci_omap_resume, | |
502 | #endif | |
503 | }; | |
504 | ||
505 | static int __init ohci_hcd_omap_init (void) | |
506 | { | |
507 | printk (KERN_DEBUG "%s: " DRIVER_INFO " (OMAP)\n", hcd_name); | |
508 | if (usb_disabled()) | |
509 | return -ENODEV; | |
510 | ||
511 | pr_debug("%s: block sizes: ed %Zd td %Zd\n", hcd_name, | |
512 | sizeof (struct ed), sizeof (struct td)); | |
513 | ||
514 | return driver_register(&ohci_hcd_omap_driver); | |
515 | } | |
516 | ||
517 | static void __exit ohci_hcd_omap_cleanup (void) | |
518 | { | |
519 | driver_unregister(&ohci_hcd_omap_driver); | |
520 | } | |
521 | ||
522 | module_init (ohci_hcd_omap_init); | |
523 | module_exit (ohci_hcd_omap_cleanup); |