Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * OHCI HCD (Host Controller Driver) for USB. | |
3 | * | |
4 | * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> | |
5 | * (C) Copyright 2000-2005 David Brownell | |
6 | * (C) Copyright 2002 Hewlett-Packard Company | |
bd35078f | 7 | * |
1da177e4 LT |
8 | * OMAP Bus Glue |
9 | * | |
10 | * Modified for OMAP by Tony Lindgren <tony@atomide.com> | |
11 | * Based on the 2.4 OMAP OHCI driver originally done by MontaVista Software Inc. | |
12 | * and on ohci-sa1111.c by Christopher Hoover <ch@hpl.hp.com> | |
13 | * | |
14 | * This file is licenced under the GPL. | |
15 | */ | |
16 | ||
d54b5caa | 17 | #include <linux/signal.h> /* IRQF_DISABLED */ |
4e57b681 | 18 | #include <linux/jiffies.h> |
d052d1be | 19 | #include <linux/platform_device.h> |
f8ce2547 | 20 | #include <linux/clk.h> |
944e1bff | 21 | #include <linux/gpio.h> |
4e57b681 | 22 | |
a09e64fb | 23 | #include <mach/hardware.h> |
1da177e4 LT |
24 | #include <asm/io.h> |
25 | #include <asm/mach-types.h> | |
26 | ||
a09e64fb RK |
27 | #include <mach/mux.h> |
28 | #include <mach/irqs.h> | |
a09e64fb RK |
29 | #include <mach/fpga.h> |
30 | #include <mach/usb.h> | |
1da177e4 LT |
31 | |
32 | ||
33 | /* OMAP-1510 OHCI has its own MMU for DMA */ | |
34 | #define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */ | |
35 | #define OMAP1510_LB_CLOCK_DIV 0xfffec10c | |
36 | #define OMAP1510_LB_MMU_CTL 0xfffec208 | |
37 | #define OMAP1510_LB_MMU_LCK 0xfffec224 | |
38 | #define OMAP1510_LB_MMU_LD_TLB 0xfffec228 | |
39 | #define OMAP1510_LB_MMU_CAM_H 0xfffec22c | |
40 | #define OMAP1510_LB_MMU_CAM_L 0xfffec230 | |
41 | #define OMAP1510_LB_MMU_RAM_H 0xfffec234 | |
42 | #define OMAP1510_LB_MMU_RAM_L 0xfffec238 | |
43 | ||
44 | ||
45 | #ifndef CONFIG_ARCH_OMAP | |
46 | #error "This file is OMAP bus glue. CONFIG_OMAP must be defined." | |
47 | #endif | |
48 | ||
49 | #ifdef CONFIG_TPS65010 | |
6d16bfb5 | 50 | #include <linux/i2c/tps65010.h> |
1da177e4 LT |
51 | #else |
52 | ||
53 | #define LOW 0 | |
54 | #define HIGH 1 | |
55 | ||
56 | #define GPIO1 1 | |
57 | ||
58 | static inline int tps65010_set_gpio_out_value(unsigned gpio, unsigned value) | |
59 | { | |
60 | return 0; | |
61 | } | |
62 | ||
63 | #endif | |
64 | ||
65 | extern int usb_disabled(void); | |
66 | extern int ocpi_enable(void); | |
67 | ||
68 | static struct clk *usb_host_ck; | |
bd35078f DB |
69 | static struct clk *usb_dc_ck; |
70 | static int host_enabled; | |
71 | static int host_initialized; | |
1da177e4 LT |
72 | |
73 | static void omap_ohci_clock_power(int on) | |
74 | { | |
75 | if (on) { | |
bd35078f | 76 | clk_enable(usb_dc_ck); |
1da177e4 LT |
77 | clk_enable(usb_host_ck); |
78 | /* guesstimate for T5 == 1x 32K clock + APLL lock time */ | |
79 | udelay(100); | |
80 | } else { | |
81 | clk_disable(usb_host_ck); | |
bd35078f | 82 | clk_disable(usb_dc_ck); |
1da177e4 LT |
83 | } |
84 | } | |
85 | ||
86 | /* | |
87 | * Board specific gang-switched transceiver power on/off. | |
88 | * NOTE: OSK supplies power from DC, not battery. | |
89 | */ | |
90 | static int omap_ohci_transceiver_power(int on) | |
91 | { | |
92 | if (on) { | |
93 | if (machine_is_omap_innovator() && cpu_is_omap1510()) | |
94 | fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL) | |
bd35078f | 95 | | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), |
1da177e4 LT |
96 | INNOVATOR_FPGA_CAM_USB_CONTROL); |
97 | else if (machine_is_omap_osk()) | |
98 | tps65010_set_gpio_out_value(GPIO1, LOW); | |
99 | } else { | |
100 | if (machine_is_omap_innovator() && cpu_is_omap1510()) | |
101 | fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL) | |
bd35078f | 102 | & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), |
1da177e4 LT |
103 | INNOVATOR_FPGA_CAM_USB_CONTROL); |
104 | else if (machine_is_omap_osk()) | |
105 | tps65010_set_gpio_out_value(GPIO1, HIGH); | |
106 | } | |
107 | ||
108 | return 0; | |
109 | } | |
110 | ||
bd35078f | 111 | #ifdef CONFIG_ARCH_OMAP15XX |
1da177e4 LT |
112 | /* |
113 | * OMAP-1510 specific Local Bus clock on/off | |
114 | */ | |
115 | static int omap_1510_local_bus_power(int on) | |
116 | { | |
117 | if (on) { | |
118 | omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL); | |
119 | udelay(200); | |
120 | } else { | |
121 | omap_writel(0, OMAP1510_LB_MMU_CTL); | |
122 | } | |
123 | ||
124 | return 0; | |
125 | } | |
126 | ||
127 | /* | |
128 | * OMAP-1510 specific Local Bus initialization | |
129 | * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE. | |
bd35078f DB |
130 | * See also arch/mach-omap/memory.h for __virt_to_dma() and |
131 | * __dma_to_virt() which need to match with the physical | |
1da177e4 LT |
132 | * Local Bus address below. |
133 | */ | |
134 | static int omap_1510_local_bus_init(void) | |
135 | { | |
136 | unsigned int tlb; | |
137 | unsigned long lbaddr, physaddr; | |
138 | ||
bd35078f | 139 | omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4, |
1da177e4 LT |
140 | OMAP1510_LB_CLOCK_DIV); |
141 | ||
142 | /* Configure the Local Bus MMU table */ | |
143 | for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) { | |
144 | lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET; | |
145 | physaddr = tlb * 0x00100000 + PHYS_OFFSET; | |
146 | omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H); | |
bd35078f | 147 | omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc, |
1da177e4 LT |
148 | OMAP1510_LB_MMU_CAM_L); |
149 | omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H); | |
150 | omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L); | |
151 | omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK); | |
152 | omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB); | |
153 | } | |
154 | ||
155 | /* Enable the walking table */ | |
156 | omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL); | |
157 | udelay(200); | |
158 | ||
159 | return 0; | |
160 | } | |
bd35078f DB |
161 | #else |
162 | #define omap_1510_local_bus_power(x) {} | |
163 | #define omap_1510_local_bus_init() {} | |
164 | #endif | |
1da177e4 LT |
165 | |
166 | #ifdef CONFIG_USB_OTG | |
167 | ||
168 | static void start_hnp(struct ohci_hcd *ohci) | |
169 | { | |
170 | const unsigned port = ohci_to_hcd(ohci)->self.otg_port - 1; | |
171 | unsigned long flags; | |
f35ae634 | 172 | u32 l; |
1da177e4 LT |
173 | |
174 | otg_start_hnp(ohci->transceiver); | |
175 | ||
176 | local_irq_save(flags); | |
177 | ohci->transceiver->state = OTG_STATE_A_SUSPEND; | |
178 | writel (RH_PS_PSS, &ohci->regs->roothub.portstatus [port]); | |
f35ae634 TL |
179 | l = omap_readl(OTG_CTRL); |
180 | l &= ~OTG_A_BUSREQ; | |
181 | omap_writel(l, OTG_CTRL); | |
1da177e4 LT |
182 | local_irq_restore(flags); |
183 | } | |
184 | ||
185 | #endif | |
186 | ||
187 | /*-------------------------------------------------------------------------*/ | |
188 | ||
bd35078f | 189 | static int ohci_omap_init(struct usb_hcd *hcd) |
1da177e4 | 190 | { |
bd35078f DB |
191 | struct ohci_hcd *ohci = hcd_to_ohci(hcd); |
192 | struct omap_usb_config *config = hcd->self.controller->platform_data; | |
1da177e4 LT |
193 | int need_transceiver = (config->otg != 0); |
194 | int ret; | |
195 | ||
bd35078f | 196 | dev_dbg(hcd->self.controller, "starting USB Controller\n"); |
1da177e4 LT |
197 | |
198 | if (config->otg) { | |
199 | ohci_to_hcd(ohci)->self.otg_port = config->otg; | |
200 | /* default/minimum OTG power budget: 8 mA */ | |
bc96c0ad | 201 | ohci_to_hcd(ohci)->power_budget = 8; |
1da177e4 LT |
202 | } |
203 | ||
204 | /* boards can use OTG transceivers in non-OTG modes */ | |
205 | need_transceiver = need_transceiver | |
206 | || machine_is_omap_h2() || machine_is_omap_h3(); | |
207 | ||
208 | if (cpu_is_omap16xx()) | |
209 | ocpi_enable(); | |
210 | ||
c3df1a26 | 211 | #ifdef CONFIG_USB_OTG |
1da177e4 LT |
212 | if (need_transceiver) { |
213 | ohci->transceiver = otg_get_transceiver(); | |
214 | if (ohci->transceiver) { | |
215 | int status = otg_set_host(ohci->transceiver, | |
216 | &ohci_to_hcd(ohci)->self); | |
bd35078f | 217 | dev_dbg(hcd->self.controller, "init %s transceiver, status %d\n", |
1da177e4 LT |
218 | ohci->transceiver->label, status); |
219 | if (status) { | |
220 | if (ohci->transceiver) | |
221 | put_device(ohci->transceiver->dev); | |
222 | return status; | |
223 | } | |
224 | } else { | |
bd35078f | 225 | dev_err(hcd->self.controller, "can't find transceiver\n"); |
1da177e4 LT |
226 | return -ENODEV; |
227 | } | |
e8b24450 | 228 | ohci->start_hnp = start_hnp; |
1da177e4 LT |
229 | } |
230 | #endif | |
231 | ||
232 | omap_ohci_clock_power(1); | |
233 | ||
9b466c3b | 234 | if (cpu_is_omap15xx()) { |
1da177e4 LT |
235 | omap_1510_local_bus_power(1); |
236 | omap_1510_local_bus_init(); | |
237 | } | |
238 | ||
239 | if ((ret = ohci_init(ohci)) < 0) | |
240 | return ret; | |
241 | ||
242 | /* board-specific power switching and overcurrent support */ | |
243 | if (machine_is_omap_osk() || machine_is_omap_innovator()) { | |
244 | u32 rh = roothub_a (ohci); | |
245 | ||
246 | /* power switching (ganged by default) */ | |
247 | rh &= ~RH_A_NPS; | |
248 | ||
249 | /* TPS2045 switch for internal transceiver (port 1) */ | |
250 | if (machine_is_omap_osk()) { | |
bc96c0ad | 251 | ohci_to_hcd(ohci)->power_budget = 250; |
1da177e4 LT |
252 | |
253 | rh &= ~RH_A_NOCP; | |
254 | ||
255 | /* gpio9 for overcurrent detction */ | |
256 | omap_cfg_reg(W8_1610_GPIO9); | |
944e1bff | 257 | gpio_request(9, "OHCI overcurrent"); |
40e3925b | 258 | gpio_direction_input(9); |
1da177e4 LT |
259 | |
260 | /* for paranoia's sake: disable USB.PUEN */ | |
261 | omap_cfg_reg(W4_USB_HIGHZ); | |
262 | } | |
263 | ohci_writel(ohci, rh, &ohci->regs->roothub.a); | |
1133cd8a | 264 | ohci->flags &= ~OHCI_QUIRK_HUB_POWER; |
bd35078f DB |
265 | } else if (machine_is_nokia770()) { |
266 | /* We require a self-powered hub, which should have | |
267 | * plenty of power. */ | |
268 | ohci_to_hcd(ohci)->power_budget = 0; | |
1da177e4 LT |
269 | } |
270 | ||
271 | /* FIXME khubd hub requests should manage power switching */ | |
272 | omap_ohci_transceiver_power(1); | |
273 | ||
274 | /* board init will have already handled HMC and mux setup. | |
275 | * any external transceiver should already be initialized | |
276 | * too, so all configured ports use the right signaling now. | |
277 | */ | |
278 | ||
279 | return 0; | |
280 | } | |
281 | ||
bd35078f | 282 | static void ohci_omap_stop(struct usb_hcd *hcd) |
1da177e4 | 283 | { |
bd35078f | 284 | dev_dbg(hcd->self.controller, "stopping USB Controller\n"); |
1da177e4 LT |
285 | omap_ohci_clock_power(0); |
286 | } | |
287 | ||
288 | ||
289 | /*-------------------------------------------------------------------------*/ | |
290 | ||
1da177e4 LT |
291 | /** |
292 | * usb_hcd_omap_probe - initialize OMAP-based HCDs | |
293 | * Context: !in_interrupt() | |
294 | * | |
295 | * Allocates basic resources for this USB host controller, and | |
296 | * then invokes the start() method for the HCD associated with it | |
297 | * through the hotplug entry's driver_data. | |
298 | */ | |
bd35078f | 299 | static int usb_hcd_omap_probe (const struct hc_driver *driver, |
1da177e4 LT |
300 | struct platform_device *pdev) |
301 | { | |
48944738 | 302 | int retval, irq; |
1da177e4 LT |
303 | struct usb_hcd *hcd = 0; |
304 | struct ohci_hcd *ohci; | |
305 | ||
306 | if (pdev->num_resources != 2) { | |
bd35078f | 307 | printk(KERN_ERR "hcd probe: invalid num_resources: %i\n", |
1da177e4 LT |
308 | pdev->num_resources); |
309 | return -ENODEV; | |
310 | } | |
311 | ||
bd35078f | 312 | if (pdev->resource[0].flags != IORESOURCE_MEM |
1da177e4 LT |
313 | || pdev->resource[1].flags != IORESOURCE_IRQ) { |
314 | printk(KERN_ERR "hcd probe: invalid resource type\n"); | |
315 | return -ENODEV; | |
316 | } | |
317 | ||
953a7e84 | 318 | usb_host_ck = clk_get(&pdev->dev, "usb_hhc_ck"); |
1da177e4 LT |
319 | if (IS_ERR(usb_host_ck)) |
320 | return PTR_ERR(usb_host_ck); | |
321 | ||
9b466c3b | 322 | if (!cpu_is_omap15xx()) |
953a7e84 | 323 | usb_dc_ck = clk_get(&pdev->dev, "usb_dc_ck"); |
bd35078f | 324 | else |
953a7e84 | 325 | usb_dc_ck = clk_get(&pdev->dev, "lb_ck"); |
bd35078f DB |
326 | |
327 | if (IS_ERR(usb_dc_ck)) { | |
328 | clk_put(usb_host_ck); | |
329 | return PTR_ERR(usb_dc_ck); | |
330 | } | |
331 | ||
332 | ||
7071a3ce | 333 | hcd = usb_create_hcd (driver, &pdev->dev, dev_name(&pdev->dev)); |
1da177e4 LT |
334 | if (!hcd) { |
335 | retval = -ENOMEM; | |
336 | goto err0; | |
337 | } | |
338 | hcd->rsrc_start = pdev->resource[0].start; | |
339 | hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1; | |
340 | ||
341 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { | |
342 | dev_dbg(&pdev->dev, "request_mem_region failed\n"); | |
343 | retval = -EBUSY; | |
344 | goto err1; | |
345 | } | |
346 | ||
55c381e4 RK |
347 | hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); |
348 | if (!hcd->regs) { | |
349 | dev_err(&pdev->dev, "can't ioremap OHCI HCD\n"); | |
350 | retval = -ENOMEM; | |
351 | goto err2; | |
352 | } | |
1da177e4 LT |
353 | |
354 | ohci = hcd_to_ohci(hcd); | |
355 | ohci_hcd_init(ohci); | |
356 | ||
bd35078f DB |
357 | host_initialized = 0; |
358 | host_enabled = 1; | |
1da177e4 | 359 | |
48944738 DV |
360 | irq = platform_get_irq(pdev, 0); |
361 | if (irq < 0) { | |
362 | retval = -ENXIO; | |
55c381e4 | 363 | goto err3; |
48944738 | 364 | } |
d54b5caa | 365 | retval = usb_add_hcd(hcd, irq, IRQF_DISABLED); |
bd35078f | 366 | if (retval) |
55c381e4 | 367 | goto err3; |
bd35078f DB |
368 | |
369 | host_initialized = 1; | |
370 | ||
371 | if (!host_enabled) | |
372 | omap_ohci_clock_power(0); | |
1da177e4 | 373 | |
bd35078f | 374 | return 0; |
55c381e4 RK |
375 | err3: |
376 | iounmap(hcd->regs); | |
1da177e4 LT |
377 | err2: |
378 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); | |
379 | err1: | |
380 | usb_put_hcd(hcd); | |
381 | err0: | |
bd35078f | 382 | clk_put(usb_dc_ck); |
1da177e4 LT |
383 | clk_put(usb_host_ck); |
384 | return retval; | |
385 | } | |
386 | ||
387 | ||
388 | /* may be called with controller, bus, and devices active */ | |
389 | ||
390 | /** | |
391 | * usb_hcd_omap_remove - shutdown processing for OMAP-based HCDs | |
392 | * @dev: USB Host Controller being removed | |
393 | * Context: !in_interrupt() | |
394 | * | |
395 | * Reverses the effect of usb_hcd_omap_probe(), first invoking | |
396 | * the HCD's stop() method. It is always called from a thread | |
397 | * context, normally "rmmod", "apmd", or something similar. | |
1da177e4 | 398 | */ |
bd35078f DB |
399 | static inline void |
400 | usb_hcd_omap_remove (struct usb_hcd *hcd, struct platform_device *pdev) | |
1da177e4 | 401 | { |
bd35078f DB |
402 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); |
403 | ||
1da177e4 | 404 | usb_remove_hcd(hcd); |
bd35078f DB |
405 | if (ohci->transceiver) { |
406 | (void) otg_set_host(ohci->transceiver, 0); | |
407 | put_device(ohci->transceiver->dev); | |
408 | } | |
1da177e4 | 409 | if (machine_is_omap_osk()) |
944e1bff | 410 | gpio_free(9); |
55c381e4 | 411 | iounmap(hcd->regs); |
1da177e4 LT |
412 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); |
413 | usb_put_hcd(hcd); | |
bd35078f | 414 | clk_put(usb_dc_ck); |
1da177e4 LT |
415 | clk_put(usb_host_ck); |
416 | } | |
417 | ||
418 | /*-------------------------------------------------------------------------*/ | |
419 | ||
bd35078f | 420 | static int |
1da177e4 LT |
421 | ohci_omap_start (struct usb_hcd *hcd) |
422 | { | |
423 | struct omap_usb_config *config; | |
424 | struct ohci_hcd *ohci = hcd_to_ohci (hcd); | |
425 | int ret; | |
426 | ||
bd35078f DB |
427 | if (!host_enabled) |
428 | return 0; | |
1da177e4 | 429 | config = hcd->self.controller->platform_data; |
d413984a DB |
430 | if (config->otg || config->rwc) { |
431 | ohci->hc_control = OHCI_CTRL_RWC; | |
1da177e4 | 432 | writel(OHCI_CTRL_RWC, &ohci->regs->control); |
d413984a | 433 | } |
1da177e4 LT |
434 | |
435 | if ((ret = ohci_run (ohci)) < 0) { | |
436 | dev_err(hcd->self.controller, "can't start\n"); | |
437 | ohci_stop (hcd); | |
438 | return ret; | |
439 | } | |
440 | return 0; | |
441 | } | |
442 | ||
443 | /*-------------------------------------------------------------------------*/ | |
444 | ||
445 | static const struct hc_driver ohci_omap_hc_driver = { | |
446 | .description = hcd_name, | |
447 | .product_desc = "OMAP OHCI", | |
448 | .hcd_priv_size = sizeof(struct ohci_hcd), | |
449 | ||
450 | /* | |
451 | * generic hardware linkage | |
452 | */ | |
453 | .irq = ohci_irq, | |
454 | .flags = HCD_USB11 | HCD_MEMORY, | |
455 | ||
456 | /* | |
457 | * basic lifecycle operations | |
458 | */ | |
bd35078f | 459 | .reset = ohci_omap_init, |
1da177e4 | 460 | .start = ohci_omap_start, |
bd35078f | 461 | .stop = ohci_omap_stop, |
dd9048af | 462 | .shutdown = ohci_shutdown, |
1da177e4 LT |
463 | |
464 | /* | |
465 | * managing i/o requests and associated device resources | |
466 | */ | |
467 | .urb_enqueue = ohci_urb_enqueue, | |
468 | .urb_dequeue = ohci_urb_dequeue, | |
469 | .endpoint_disable = ohci_endpoint_disable, | |
470 | ||
471 | /* | |
472 | * scheduling support | |
473 | */ | |
474 | .get_frame_number = ohci_get_frame, | |
475 | ||
476 | /* | |
477 | * root hub support | |
478 | */ | |
479 | .hub_status_data = ohci_hub_status_data, | |
480 | .hub_control = ohci_hub_control, | |
8ad7fe16 | 481 | #ifdef CONFIG_PM |
0c0382e3 AS |
482 | .bus_suspend = ohci_bus_suspend, |
483 | .bus_resume = ohci_bus_resume, | |
1da177e4 LT |
484 | #endif |
485 | .start_port_reset = ohci_start_port_reset, | |
486 | }; | |
487 | ||
488 | /*-------------------------------------------------------------------------*/ | |
489 | ||
3ae5eaec | 490 | static int ohci_hcd_omap_drv_probe(struct platform_device *dev) |
1da177e4 | 491 | { |
3ae5eaec | 492 | return usb_hcd_omap_probe(&ohci_omap_hc_driver, dev); |
1da177e4 LT |
493 | } |
494 | ||
3ae5eaec | 495 | static int ohci_hcd_omap_drv_remove(struct platform_device *dev) |
1da177e4 | 496 | { |
3ae5eaec | 497 | struct usb_hcd *hcd = platform_get_drvdata(dev); |
1da177e4 | 498 | |
3ae5eaec | 499 | usb_hcd_omap_remove(hcd, dev); |
3ae5eaec | 500 | platform_set_drvdata(dev, NULL); |
1da177e4 LT |
501 | |
502 | return 0; | |
503 | } | |
504 | ||
505 | /*-------------------------------------------------------------------------*/ | |
506 | ||
507 | #ifdef CONFIG_PM | |
508 | ||
3ae5eaec | 509 | static int ohci_omap_suspend(struct platform_device *dev, pm_message_t message) |
1da177e4 | 510 | { |
3ae5eaec | 511 | struct ohci_hcd *ohci = hcd_to_ohci(platform_get_drvdata(dev)); |
f197b2c5 DB |
512 | |
513 | if (time_before(jiffies, ohci->next_statechange)) | |
514 | msleep(5); | |
515 | ohci->next_statechange = jiffies; | |
516 | ||
517 | omap_ohci_clock_power(0); | |
518 | ohci_to_hcd(ohci)->state = HC_STATE_SUSPENDED; | |
f197b2c5 | 519 | return 0; |
1da177e4 LT |
520 | } |
521 | ||
3ae5eaec | 522 | static int ohci_omap_resume(struct platform_device *dev) |
1da177e4 | 523 | { |
43bbb7e0 AS |
524 | struct usb_hcd *hcd = platform_get_drvdata(dev); |
525 | struct ohci_hcd *ohci = hcd_to_ohci(hcd); | |
1da177e4 | 526 | |
b404a5b0 | 527 | if (time_before(jiffies, ohci->next_statechange)) |
528 | msleep(5); | |
529 | ohci->next_statechange = jiffies; | |
f197b2c5 | 530 | |
b404a5b0 | 531 | omap_ohci_clock_power(1); |
43bbb7e0 | 532 | ohci_finish_controller_resume(hcd); |
f197b2c5 | 533 | return 0; |
1da177e4 LT |
534 | } |
535 | ||
536 | #endif | |
537 | ||
538 | /*-------------------------------------------------------------------------*/ | |
539 | ||
540 | /* | |
541 | * Driver definition to register with the OMAP bus | |
542 | */ | |
3ae5eaec | 543 | static struct platform_driver ohci_hcd_omap_driver = { |
1da177e4 LT |
544 | .probe = ohci_hcd_omap_drv_probe, |
545 | .remove = ohci_hcd_omap_drv_remove, | |
dd9048af | 546 | .shutdown = usb_hcd_platform_shutdown, |
1da177e4 LT |
547 | #ifdef CONFIG_PM |
548 | .suspend = ohci_omap_suspend, | |
549 | .resume = ohci_omap_resume, | |
550 | #endif | |
3ae5eaec RK |
551 | .driver = { |
552 | .owner = THIS_MODULE, | |
553 | .name = "ohci", | |
554 | }, | |
1da177e4 LT |
555 | }; |
556 | ||
f4fce61d | 557 | MODULE_ALIAS("platform:ohci"); |