Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * OHCI HCD (Host Controller Driver) for USB. | |
3 | * | |
4 | * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> | |
5 | * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net> | |
6 | * (C) Copyright 2002 Hewlett-Packard Company | |
7 | * | |
8 | * Bus Glue for AMD Alchemy Au1xxx | |
9 | * | |
10 | * Written by Christopher Hoover <ch@hpl.hp.com> | |
ac310bb5 | 11 | * Based on fragments of previous driver by Russell King et al. |
1da177e4 LT |
12 | * |
13 | * Modified for LH7A404 from ohci-sa1111.c | |
14 | * by Durgesh Pattamatta <pattamattad@sharpsec.com> | |
15 | * Modified for AMD Alchemy Au1xxx | |
16 | * by Matt Porter <mporter@kernel.crashing.org> | |
17 | * | |
18 | * This file is licenced under the GPL. | |
19 | */ | |
20 | ||
d052d1be | 21 | #include <linux/platform_device.h> |
de25968c | 22 | #include <linux/signal.h> |
d052d1be | 23 | |
1da177e4 LT |
24 | #include <asm/mach-au1x00/au1000.h> |
25 | ||
d5fb7f1b JC |
26 | #ifndef CONFIG_SOC_AU1200 |
27 | ||
1da177e4 LT |
28 | #define USBH_ENABLE_BE (1<<0) |
29 | #define USBH_ENABLE_C (1<<1) | |
30 | #define USBH_ENABLE_E (1<<2) | |
31 | #define USBH_ENABLE_CE (1<<3) | |
32 | #define USBH_ENABLE_RD (1<<4) | |
33 | ||
34 | #ifdef __LITTLE_ENDIAN | |
35 | #define USBH_ENABLE_INIT (USBH_ENABLE_CE | USBH_ENABLE_E | USBH_ENABLE_C) | |
36 | #elif __BIG_ENDIAN | |
53c81a34 ML |
37 | #define USBH_ENABLE_INIT (USBH_ENABLE_CE | USBH_ENABLE_E | USBH_ENABLE_C | \ |
38 | USBH_ENABLE_BE) | |
1da177e4 LT |
39 | #else |
40 | #error not byte order defined | |
41 | #endif | |
42 | ||
d5fb7f1b JC |
43 | #else /* Au1200 */ |
44 | ||
45 | #define USB_HOST_CONFIG (USB_MSR_BASE + USB_MSR_MCFG) | |
46 | #define USB_MCFG_PFEN (1<<31) | |
47 | #define USB_MCFG_RDCOMB (1<<30) | |
48 | #define USB_MCFG_SSDEN (1<<23) | |
49 | #define USB_MCFG_OHCCLKEN (1<<16) | |
53c81a34 | 50 | #ifdef CONFIG_DMA_COHERENT |
d5fb7f1b | 51 | #define USB_MCFG_UCAM (1<<7) |
53c81a34 ML |
52 | #else |
53 | #define USB_MCFG_UCAM (0) | |
54 | #endif | |
d5fb7f1b JC |
55 | #define USB_MCFG_OBMEN (1<<1) |
56 | #define USB_MCFG_OMEMEN (1<<0) | |
57 | ||
58 | #define USBH_ENABLE_CE USB_MCFG_OHCCLKEN | |
53c81a34 ML |
59 | |
60 | #define USBH_ENABLE_INIT (USB_MCFG_PFEN | USB_MCFG_RDCOMB | \ | |
61 | USBH_ENABLE_CE | USB_MCFG_SSDEN | \ | |
62 | USB_MCFG_UCAM | \ | |
63 | USB_MCFG_OBMEN | USB_MCFG_OMEMEN) | |
64 | ||
d5fb7f1b JC |
65 | #define USBH_DISABLE (USB_MCFG_OBMEN | USB_MCFG_OMEMEN) |
66 | ||
67 | #endif /* Au1200 */ | |
68 | ||
1da177e4 LT |
69 | extern int usb_disabled(void); |
70 | ||
53c81a34 | 71 | static void au1xxx_start_ohc(void) |
1da177e4 | 72 | { |
1da177e4 | 73 | /* enable host controller */ |
d5fb7f1b | 74 | #ifndef CONFIG_SOC_AU1200 |
1da177e4 | 75 | au_writel(USBH_ENABLE_CE, USB_HOST_CONFIG); |
53c81a34 | 76 | au_sync(); |
1da177e4 LT |
77 | udelay(1000); |
78 | ||
53c81a34 ML |
79 | au_writel(au_readl(USB_HOST_CONFIG) | USBH_ENABLE_INIT, USB_HOST_CONFIG); |
80 | au_sync(); | |
d5fb7f1b | 81 | udelay(1000); |
d5fb7f1b | 82 | |
1da177e4 LT |
83 | /* wait for reset complete (read register twice; see au1500 errata) */ |
84 | while (au_readl(USB_HOST_CONFIG), | |
85 | !(au_readl(USB_HOST_CONFIG) & USBH_ENABLE_RD)) | |
86 | udelay(1000); | |
87 | ||
d5fb7f1b | 88 | #else /* Au1200 */ |
53c81a34 ML |
89 | au_writel(au_readl(USB_HOST_CONFIG) | USBH_ENABLE_CE, USB_HOST_CONFIG); |
90 | au_sync(); | |
d5fb7f1b | 91 | udelay(1000); |
53c81a34 ML |
92 | |
93 | au_writel(au_readl(USB_HOST_CONFIG) | USBH_ENABLE_INIT, USB_HOST_CONFIG); | |
94 | au_sync(); | |
95 | udelay(2000); | |
d5fb7f1b | 96 | #endif /* Au1200 */ |
1da177e4 LT |
97 | } |
98 | ||
53c81a34 | 99 | static void au1xxx_stop_ohc(void) |
1da177e4 | 100 | { |
53c81a34 ML |
101 | #ifdef CONFIG_SOC_AU1200 |
102 | /* Disable mem */ | |
103 | au_writel(au_readl(USB_HOST_CONFIG) & ~USBH_DISABLE, USB_HOST_CONFIG); | |
104 | au_sync(); | |
105 | udelay(1000); | |
d5fb7f1b | 106 | #endif |
53c81a34 ML |
107 | /* Disable clock */ |
108 | au_writel(au_readl(USB_HOST_CONFIG) & ~USBH_ENABLE_CE, USB_HOST_CONFIG); | |
109 | au_sync(); | |
1da177e4 LT |
110 | } |
111 | ||
53c81a34 | 112 | static int __devinit ohci_au1xxx_start(struct usb_hcd *hcd) |
1da177e4 | 113 | { |
53c81a34 ML |
114 | struct ohci_hcd *ohci = hcd_to_ohci(hcd); |
115 | int ret; | |
1da177e4 | 116 | |
53c81a34 | 117 | ohci_dbg(ohci, "ohci_au1xxx_start, ohci:%p", ohci); |
1da177e4 | 118 | |
53c81a34 | 119 | if ((ret = ohci_init(ohci)) < 0) |
1da177e4 LT |
120 | return ret; |
121 | ||
53c81a34 | 122 | if ((ret = ohci_run(ohci)) < 0) { |
1da177e4 | 123 | err ("can't start %s", hcd->self.bus_name); |
53c81a34 | 124 | ohci_stop(hcd); |
1da177e4 LT |
125 | return ret; |
126 | } | |
127 | ||
128 | return 0; | |
129 | } | |
130 | ||
1da177e4 LT |
131 | static const struct hc_driver ohci_au1xxx_hc_driver = { |
132 | .description = hcd_name, | |
133 | .product_desc = "Au1xxx OHCI", | |
134 | .hcd_priv_size = sizeof(struct ohci_hcd), | |
135 | ||
136 | /* | |
137 | * generic hardware linkage | |
138 | */ | |
139 | .irq = ohci_irq, | |
140 | .flags = HCD_USB11 | HCD_MEMORY, | |
141 | ||
142 | /* | |
143 | * basic lifecycle operations | |
144 | */ | |
145 | .start = ohci_au1xxx_start, | |
1da177e4 | 146 | .stop = ohci_stop, |
dd9048af | 147 | .shutdown = ohci_shutdown, |
1da177e4 LT |
148 | |
149 | /* | |
150 | * managing i/o requests and associated device resources | |
151 | */ | |
152 | .urb_enqueue = ohci_urb_enqueue, | |
153 | .urb_dequeue = ohci_urb_dequeue, | |
154 | .endpoint_disable = ohci_endpoint_disable, | |
155 | ||
156 | /* | |
157 | * scheduling support | |
158 | */ | |
159 | .get_frame_number = ohci_get_frame, | |
160 | ||
161 | /* | |
162 | * root hub support | |
163 | */ | |
164 | .hub_status_data = ohci_hub_status_data, | |
165 | .hub_control = ohci_hub_control, | |
9293677a | 166 | #ifdef CONFIG_PM |
0c0382e3 AS |
167 | .bus_suspend = ohci_bus_suspend, |
168 | .bus_resume = ohci_bus_resume, | |
9293677a DB |
169 | #endif |
170 | .start_port_reset = ohci_start_port_reset, | |
1da177e4 LT |
171 | }; |
172 | ||
3ae5eaec | 173 | static int ohci_hcd_au1xxx_drv_probe(struct platform_device *pdev) |
1da177e4 | 174 | { |
1da177e4 | 175 | int ret; |
53c81a34 | 176 | struct usb_hcd *hcd; |
1da177e4 LT |
177 | |
178 | if (usb_disabled()) | |
179 | return -ENODEV; | |
180 | ||
53c81a34 ML |
181 | #if defined(CONFIG_SOC_AU1200) && defined(CONFIG_DMA_COHERENT) |
182 | /* Au1200 AB USB does not support coherent memory */ | |
183 | if (!(read_c0_prid() & 0xff)) { | |
184 | printk(KERN_INFO "%s: this is chip revision AB !!\n", | |
185 | pdev->name); | |
186 | printk(KERN_INFO "%s: update your board or re-configure " | |
187 | "the kernel\n", pdev->name); | |
188 | return -ENODEV; | |
189 | } | |
190 | #endif | |
191 | ||
192 | if (pdev->resource[1].flags != IORESOURCE_IRQ) { | |
193 | pr_debug("resource[1] is not IORESOURCE_IRQ\n"); | |
194 | return -ENOMEM; | |
195 | } | |
196 | ||
197 | hcd = usb_create_hcd(&ohci_au1xxx_hc_driver, &pdev->dev, "au1xxx"); | |
198 | if (!hcd) | |
199 | return -ENOMEM; | |
200 | ||
201 | hcd->rsrc_start = pdev->resource[0].start; | |
202 | hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1; | |
203 | ||
204 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { | |
205 | pr_debug("request_mem_region failed\n"); | |
206 | ret = -EBUSY; | |
207 | goto err1; | |
208 | } | |
209 | ||
210 | hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); | |
211 | if (!hcd->regs) { | |
212 | pr_debug("ioremap failed\n"); | |
213 | ret = -ENOMEM; | |
214 | goto err2; | |
215 | } | |
216 | ||
217 | au1xxx_start_ohc(); | |
218 | ohci_hcd_init(hcd_to_ohci(hcd)); | |
219 | ||
220 | ret = usb_add_hcd(hcd, pdev->resource[1].start, | |
221 | IRQF_DISABLED | IRQF_SHARED); | |
222 | if (ret == 0) { | |
223 | platform_set_drvdata(pdev, hcd); | |
224 | return ret; | |
225 | } | |
226 | ||
227 | au1xxx_stop_ohc(); | |
228 | iounmap(hcd->regs); | |
229 | err2: | |
230 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); | |
231 | err1: | |
232 | usb_put_hcd(hcd); | |
1da177e4 LT |
233 | return ret; |
234 | } | |
235 | ||
3ae5eaec | 236 | static int ohci_hcd_au1xxx_drv_remove(struct platform_device *pdev) |
1da177e4 | 237 | { |
3ae5eaec | 238 | struct usb_hcd *hcd = platform_get_drvdata(pdev); |
1da177e4 | 239 | |
53c81a34 ML |
240 | usb_remove_hcd(hcd); |
241 | au1xxx_stop_ohc(); | |
242 | iounmap(hcd->regs); | |
243 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); | |
244 | usb_put_hcd(hcd); | |
245 | platform_set_drvdata(pdev, NULL); | |
246 | ||
1da177e4 LT |
247 | return 0; |
248 | } | |
53c81a34 | 249 | |
42bfc7b4 ML |
250 | #ifdef CONFIG_PM |
251 | static int ohci_hcd_au1xxx_drv_suspend(struct platform_device *pdev, | |
252 | pm_message_t message) | |
1da177e4 | 253 | { |
42bfc7b4 ML |
254 | struct usb_hcd *hcd = platform_get_drvdata(pdev); |
255 | struct ohci_hcd *ohci = hcd_to_ohci(hcd); | |
256 | unsigned long flags; | |
257 | int rc; | |
258 | ||
259 | rc = 0; | |
260 | ||
261 | /* Root hub was already suspended. Disable irq emission and | |
262 | * mark HW unaccessible, bail out if RH has been resumed. Use | |
263 | * the spinlock to properly synchronize with possible pending | |
264 | * RH suspend or resume activity. | |
265 | * | |
266 | * This is still racy as hcd->state is manipulated outside of | |
267 | * any locks =P But that will be a different fix. | |
268 | */ | |
269 | spin_lock_irqsave(&ohci->lock, flags); | |
270 | if (hcd->state != HC_STATE_SUSPENDED) { | |
271 | rc = -EINVAL; | |
272 | goto bail; | |
273 | } | |
274 | ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable); | |
275 | (void)ohci_readl(ohci, &ohci->regs->intrdisable); | |
1da177e4 | 276 | |
42bfc7b4 ML |
277 | /* make sure snapshot being resumed re-enumerates everything */ |
278 | if (message.event == PM_EVENT_PRETHAW) | |
279 | ohci_usb_reset(ohci); | |
280 | ||
281 | clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); | |
282 | ||
283 | au1xxx_stop_ohc(); | |
284 | bail: | |
285 | spin_unlock_irqrestore(&ohci->lock, flags); | |
286 | ||
287 | return rc; | |
1da177e4 | 288 | } |
42bfc7b4 ML |
289 | |
290 | static int ohci_hcd_au1xxx_drv_resume(struct platform_device *pdev) | |
1da177e4 | 291 | { |
42bfc7b4 ML |
292 | struct usb_hcd *hcd = platform_get_drvdata(pdev); |
293 | ||
294 | au1xxx_start_ohc(); | |
295 | ||
296 | set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); | |
297 | ohci_finish_controller_resume(hcd); | |
1da177e4 LT |
298 | |
299 | return 0; | |
300 | } | |
42bfc7b4 ML |
301 | #else |
302 | #define ohci_hcd_au1xxx_drv_suspend NULL | |
303 | #define ohci_hcd_au1xxx_drv_resume NULL | |
304 | #endif | |
1da177e4 | 305 | |
3ae5eaec | 306 | static struct platform_driver ohci_hcd_au1xxx_driver = { |
1da177e4 LT |
307 | .probe = ohci_hcd_au1xxx_drv_probe, |
308 | .remove = ohci_hcd_au1xxx_drv_remove, | |
dd9048af | 309 | .shutdown = usb_hcd_platform_shutdown, |
42bfc7b4 ML |
310 | .suspend = ohci_hcd_au1xxx_drv_suspend, |
311 | .resume = ohci_hcd_au1xxx_drv_resume, | |
3ae5eaec RK |
312 | .driver = { |
313 | .name = "au1xxx-ohci", | |
314 | .owner = THIS_MODULE, | |
315 | }, | |
1da177e4 LT |
316 | }; |
317 | ||
f4fce61d | 318 | MODULE_ALIAS("platform:au1xxx-ohci"); |