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USB: replace remaining __FUNCTION__ occurrences
[linux-block.git] / drivers / usb / host / ehci-sched.c
CommitLineData
1da177e4
LT		 1/*
2 * Copyright (c) 2001-2004 by David Brownell
3 * Copyright (c) 2003 Michal Sojka, for high-speed iso transfers
53bd6a60 4 *
1da177e4
LT		 5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software Foundation,
17 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */
19
20/* this file is part of ehci-hcd.c */
21
22/*-------------------------------------------------------------------------*/
23
24/*
25 * EHCI scheduled transaction support: interrupt, iso, split iso
26 * These are called "periodic" transactions in the EHCI spec.
27 *
28 * Note that for interrupt transfers, the QH/QTD manipulation is shared
29 * with the "asynchronous" transaction support (control/bulk transfers).
30 * The only real difference is in how interrupt transfers are scheduled.
31 *
32 * For ISO, we make an "iso_stream" head to serve the same role as a QH.
33 * It keeps track of every ITD (or SITD) that's linked, and holds enough
34 * pre-calculated schedule data to make appending to the queue be quick.
35 */
36
37static int ehci_get_frame (struct usb_hcd *hcd);
38
39/*-------------------------------------------------------------------------*/
40
41/*
42 * periodic_next_shadow - return "next" pointer on shadow list
43 * @periodic: host pointer to qh/itd/sitd
44 * @tag: hardware tag for type of this record
45 */
46static union ehci_shadow *
6dbd682b
SR		 47periodic_next_shadow(struct ehci_hcd *ehci, union ehci_shadow *periodic,
48 __hc32 tag)
1da177e4 49{
6dbd682b 50 switch (hc32_to_cpu(ehci, tag)) {
1da177e4
LT		 51 case Q_TYPE_QH:
52 return &periodic->qh->qh_next;
53 case Q_TYPE_FSTN:
54 return &periodic->fstn->fstn_next;
55 case Q_TYPE_ITD:
56 return &periodic->itd->itd_next;
57 // case Q_TYPE_SITD:
58 default:
59 return &periodic->sitd->sitd_next;
60 }
61}
62
63/* caller must hold ehci->lock */
64static void periodic_unlink (struct ehci_hcd *ehci, unsigned frame, void *ptr)
65{
6dbd682b
SR		 66 union ehci_shadow *prev_p = &ehci->pshadow[frame];
67 __hc32 *hw_p = &ehci->periodic[frame];
1da177e4
LT		 68 union ehci_shadow here = *prev_p;
69
70 /* find predecessor of "ptr"; hw and shadow lists are in sync */
71 while (here.ptr && here.ptr != ptr) {
6dbd682b
SR		 72 prev_p = periodic_next_shadow(ehci, prev_p,
73 Q_NEXT_TYPE(ehci, *hw_p));
1da177e4
LT		 74 hw_p = here.hw_next;
75 here = *prev_p;
76 }
77 /* an interrupt entry (at list end) could have been shared */
78 if (!here.ptr)
79 return;
80
81 /* update shadow and hardware lists ... the old "next" pointers
82 * from ptr may still be in use, the caller updates them.
83 */
6dbd682b
SR		 84 *prev_p = *periodic_next_shadow(ehci, &here,
85 Q_NEXT_TYPE(ehci, *hw_p));
1da177e4
LT		 86 *hw_p = *here.hw_next;
87}
88
89/* how many of the uframe's 125 usecs are allocated? */
90static unsigned short
91periodic_usecs (struct ehci_hcd *ehci, unsigned frame, unsigned uframe)
92{
6dbd682b 93 __hc32 *hw_p = &ehci->periodic [frame];
1da177e4
LT		 94 union ehci_shadow *q = &ehci->pshadow [frame];
95 unsigned usecs = 0;
96
97 while (q->ptr) {
6dbd682b 98 switch (hc32_to_cpu(ehci, Q_NEXT_TYPE(ehci, *hw_p))) {
1da177e4
LT		 99 case Q_TYPE_QH:
100 /* is it in the S-mask? */
6dbd682b 101 if (q->qh->hw_info2 & cpu_to_hc32(ehci, 1 << uframe))
1da177e4
LT		 102 usecs += q->qh->usecs;
103 /* ... or C-mask? */
6dbd682b
SR		 104 if (q->qh->hw_info2 & cpu_to_hc32(ehci,
105 1 << (8 + uframe)))
1da177e4
LT		 106 usecs += q->qh->c_usecs;
107 hw_p = &q->qh->hw_next;
108 q = &q->qh->qh_next;
109 break;
110 // case Q_TYPE_FSTN:
111 default:
112 /* for "save place" FSTNs, count the relevant INTR
113 * bandwidth from the previous frame
114 */
6dbd682b 115 if (q->fstn->hw_prev != EHCI_LIST_END(ehci)) {
1da177e4
LT		 116 ehci_dbg (ehci, "ignoring FSTN cost ...\n");
117 }
118 hw_p = &q->fstn->hw_next;
119 q = &q->fstn->fstn_next;
120 break;
121 case Q_TYPE_ITD:
3b6fcfd0
KW		 122 if (q->itd->hw_transaction[uframe])
123 usecs += q->itd->stream->usecs;
1da177e4
LT		 124 hw_p = &q->itd->hw_next;
125 q = &q->itd->itd_next;
126 break;
127 case Q_TYPE_SITD:
128 /* is it in the S-mask? (count SPLIT, DATA) */
6dbd682b
SR		 129 if (q->sitd->hw_uframe & cpu_to_hc32(ehci,
130 1 << uframe)) {
1da177e4 131 if (q->sitd->hw_fullspeed_ep &
6dbd682b 132 cpu_to_hc32(ehci, 1<<31))
1da177e4
LT		 133 usecs += q->sitd->stream->usecs;
134 else /* worst case for OUT start-split */
135 usecs += HS_USECS_ISO (188);
136 }
137
138 /* ... C-mask? (count CSPLIT, DATA) */
139 if (q->sitd->hw_uframe &
6dbd682b 140 cpu_to_hc32(ehci, 1 << (8 + uframe))) {
1da177e4
LT		 141 /* worst case for IN complete-split */
142 usecs += q->sitd->stream->c_usecs;
143 }
144
145 hw_p = &q->sitd->hw_next;
146 q = &q->sitd->sitd_next;
147 break;
148 }
149 }
150#ifdef DEBUG
151 if (usecs > 100)
152 ehci_err (ehci, "uframe %d sched overrun: %d usecs\n",
153 frame * 8 + uframe, usecs);
154#endif
155 return usecs;
156}
157
158/*-------------------------------------------------------------------------*/
159
160static int same_tt (struct usb_device *dev1, struct usb_device *dev2)
161{
162 if (!dev1->tt || !dev2->tt)
163 return 0;
164 if (dev1->tt != dev2->tt)
165 return 0;
166 if (dev1->tt->multi)
167 return dev1->ttport == dev2->ttport;
168 else
169 return 1;
170}
171
ba47f66b
DS		 172#ifdef CONFIG_USB_EHCI_TT_NEWSCHED
173
174/* Which uframe does the low/fullspeed transfer start in?
175 *
176 * The parameter is the mask of ssplits in "H-frame" terms
177 * and this returns the transfer start uframe in "B-frame" terms,
178 * which allows both to match, e.g. a ssplit in "H-frame" uframe 0
179 * will cause a transfer in "B-frame" uframe 0. "B-frames" lag
180 * "H-frames" by 1 uframe. See the EHCI spec sec 4.5 and figure 4.7.
181 */
6dbd682b 182static inline unsigned char tt_start_uframe(struct ehci_hcd *ehci, __hc32 mask)
ba47f66b 183{
6dbd682b 184 unsigned char smask = QH_SMASK & hc32_to_cpu(ehci, mask);
ba47f66b
DS		 185 if (!smask) {
186 ehci_err(ehci, "invalid empty smask!\n");
187 /* uframe 7 can't have bw so this will indicate failure */
188 return 7;
189 }
190 return ffs(smask) - 1;
191}
192
193static const unsigned char
194max_tt_usecs[] = { 125, 125, 125, 125, 125, 125, 30, 0 };
195
196/* carryover low/fullspeed bandwidth that crosses uframe boundries */
197static inline void carryover_tt_bandwidth(unsigned short tt_usecs[8])
198{
199 int i;
200 for (i=0; i<7; i++) {
201 if (max_tt_usecs[i] < tt_usecs[i]) {
202 tt_usecs[i+1] += tt_usecs[i] - max_tt_usecs[i];
203 tt_usecs[i] = max_tt_usecs[i];
204 }
205 }
206}
207
208/* How many of the tt's periodic downstream 1000 usecs are allocated?
209 *
210 * While this measures the bandwidth in terms of usecs/uframe,
211 * the low/fullspeed bus has no notion of uframes, so any particular
212 * low/fullspeed transfer can "carry over" from one uframe to the next,
213 * since the TT just performs downstream transfers in sequence.
214 *
dc0d5c1e 215 * For example two separate 100 usec transfers can start in the same uframe,
ba47f66b
DS		 216 * and the second one would "carry over" 75 usecs into the next uframe.
217 */
218static void
219periodic_tt_usecs (
220 struct ehci_hcd *ehci,
221 struct usb_device *dev,
222 unsigned frame,
223 unsigned short tt_usecs[8]
224)
225{
6dbd682b 226 __hc32 *hw_p = &ehci->periodic [frame];
ba47f66b
DS		 227 union ehci_shadow *q = &ehci->pshadow [frame];
228 unsigned char uf;
229
230 memset(tt_usecs, 0, 16);
231
232 while (q->ptr) {
6dbd682b 233 switch (hc32_to_cpu(ehci, Q_NEXT_TYPE(ehci, *hw_p))) {
ba47f66b
DS		 234 case Q_TYPE_ITD:
235 hw_p = &q->itd->hw_next;
236 q = &q->itd->itd_next;
237 continue;
238 case Q_TYPE_QH:
239 if (same_tt(dev, q->qh->dev)) {
240 uf = tt_start_uframe(ehci, q->qh->hw_info2);
241 tt_usecs[uf] += q->qh->tt_usecs;
242 }
243 hw_p = &q->qh->hw_next;
244 q = &q->qh->qh_next;
245 continue;
246 case Q_TYPE_SITD:
247 if (same_tt(dev, q->sitd->urb->dev)) {
248 uf = tt_start_uframe(ehci, q->sitd->hw_uframe);
249 tt_usecs[uf] += q->sitd->stream->tt_usecs;
250 }
251 hw_p = &q->sitd->hw_next;
252 q = &q->sitd->sitd_next;
253 continue;
254 // case Q_TYPE_FSTN:
255 default:
6dbd682b
SR		 256 ehci_dbg(ehci, "ignoring periodic frame %d FSTN\n",
257 frame);
ba47f66b
DS		 258 hw_p = &q->fstn->hw_next;
259 q = &q->fstn->fstn_next;
260 }
261 }
262
263 carryover_tt_bandwidth(tt_usecs);
264
265 if (max_tt_usecs[7] < tt_usecs[7])
266 ehci_err(ehci, "frame %d tt sched overrun: %d usecs\n",
267 frame, tt_usecs[7] - max_tt_usecs[7]);
268}
269
270/*
271 * Return true if the device's tt's downstream bus is available for a
272 * periodic transfer of the specified length (usecs), starting at the
273 * specified frame/uframe. Note that (as summarized in section 11.19
274 * of the usb 2.0 spec) TTs can buffer multiple transactions for each
275 * uframe.
276 *
277 * The uframe parameter is when the fullspeed/lowspeed transfer
278 * should be executed in "B-frame" terms, which is the same as the
279 * highspeed ssplit's uframe (which is in "H-frame" terms). For example
280 * a ssplit in "H-frame" 0 causes a transfer in "B-frame" 0.
281 * See the EHCI spec sec 4.5 and fig 4.7.
282 *
283 * This checks if the full/lowspeed bus, at the specified starting uframe,
284 * has the specified bandwidth available, according to rules listed
285 * in USB 2.0 spec section 11.18.1 fig 11-60.
286 *
287 * This does not check if the transfer would exceed the max ssplit
288 * limit of 16, specified in USB 2.0 spec section 11.18.4 requirement #4,
289 * since proper scheduling limits ssplits to less than 16 per uframe.
290 */
291static int tt_available (
292 struct ehci_hcd *ehci,
293 unsigned period,
294 struct usb_device *dev,
295 unsigned frame,
296 unsigned uframe,
297 u16 usecs
298)
299{
300 if ((period == 0) || (uframe >= 7)) /* error */
301 return 0;
302
303 for (; frame < ehci->periodic_size; frame += period) {
304 unsigned short tt_usecs[8];
305
306 periodic_tt_usecs (ehci, dev, frame, tt_usecs);
307
308 ehci_vdbg(ehci, "tt frame %d check %d usecs start uframe %d in"
309 " schedule %d/%d/%d/%d/%d/%d/%d/%d\n",
310 frame, usecs, uframe,
311 tt_usecs[0], tt_usecs[1], tt_usecs[2], tt_usecs[3],
312 tt_usecs[4], tt_usecs[5], tt_usecs[6], tt_usecs[7]);
313
314 if (max_tt_usecs[uframe] <= tt_usecs[uframe]) {
315 ehci_vdbg(ehci, "frame %d uframe %d fully scheduled\n",
316 frame, uframe);
317 return 0;
318 }
319
320 /* special case for isoc transfers larger than 125us:
321 * the first and each subsequent fully used uframe
322 * must be empty, so as to not illegally delay
323 * already scheduled transactions
324 */
325 if (125 < usecs) {
326 int ufs = (usecs / 125) - 1;
327 int i;
328 for (i = uframe; i < (uframe + ufs) && i < 8; i++)
329 if (0 < tt_usecs[i]) {
330 ehci_vdbg(ehci,
331 "multi-uframe xfer can't fit "
332 "in frame %d uframe %d\n",
333 frame, i);
334 return 0;
335 }
336 }
337
338 tt_usecs[uframe] += usecs;
339
340 carryover_tt_bandwidth(tt_usecs);
341
342 /* fail if the carryover pushed bw past the last uframe's limit */
343 if (max_tt_usecs[7] < tt_usecs[7]) {
344 ehci_vdbg(ehci,
345 "tt unavailable usecs %d frame %d uframe %d\n",
346 usecs, frame, uframe);
347 return 0;
348 }
349 }
350
351 return 1;
352}
353
354#else
355
1da177e4
LT		 356/* return true iff the device's transaction translator is available
357 * for a periodic transfer starting at the specified frame, using
358 * all the uframes in the mask.
359 */
360static int tt_no_collision (
361 struct ehci_hcd *ehci,
362 unsigned period,
363 struct usb_device *dev,
364 unsigned frame,
365 u32 uf_mask
366)
367{
368 if (period == 0) /* error */
369 return 0;
370
371 /* note bandwidth wastage: split never follows csplit
372 * (different dev or endpoint) until the next uframe.
373 * calling convention doesn't make that distinction.
374 */
375 for (; frame < ehci->periodic_size; frame += period) {
376 union ehci_shadow here;
6dbd682b 377 __hc32 type;
1da177e4
LT		 378
379 here = ehci->pshadow [frame];
6dbd682b 380 type = Q_NEXT_TYPE(ehci, ehci->periodic [frame]);
1da177e4 381 while (here.ptr) {
6dbd682b 382 switch (hc32_to_cpu(ehci, type)) {
1da177e4 383 case Q_TYPE_ITD:
6dbd682b 384 type = Q_NEXT_TYPE(ehci, here.itd->hw_next);
1da177e4
LT		 385 here = here.itd->itd_next;
386 continue;
387 case Q_TYPE_QH:
388 if (same_tt (dev, here.qh->dev)) {
389 u32 mask;
390
6dbd682b
SR		 391 mask = hc32_to_cpu(ehci,
392 here.qh->hw_info2);
1da177e4
LT		 393 /* "knows" no gap is needed */
394 mask |= mask >> 8;
395 if (mask & uf_mask)
396 break;
397 }
6dbd682b 398 type = Q_NEXT_TYPE(ehci, here.qh->hw_next);
1da177e4
LT		 399 here = here.qh->qh_next;
400 continue;
401 case Q_TYPE_SITD:
402 if (same_tt (dev, here.sitd->urb->dev)) {
403 u16 mask;
404
6dbd682b 405 mask = hc32_to_cpu(ehci, here.sitd
1da177e4
LT		 406 ->hw_uframe);
407 /* FIXME assumes no gap for IN! */
408 mask |= mask >> 8;
409 if (mask & uf_mask)
410 break;
411 }
6dbd682b 412 type = Q_NEXT_TYPE(ehci, here.sitd->hw_next);
1da177e4
LT		 413 here = here.sitd->sitd_next;
414 continue;
415 // case Q_TYPE_FSTN:
416 default:
417 ehci_dbg (ehci,
418 "periodic frame %d bogus type %d\n",
419 frame, type);
420 }
421
422 /* collision or error */
423 return 0;
424 }
425 }
426
427 /* no collision */
428 return 1;
429}
430
ba47f66b
DS		 431#endif /* CONFIG_USB_EHCI_TT_NEWSCHED */
432
1da177e4
LT		 433/*-------------------------------------------------------------------------*/
434
435static int enable_periodic (struct ehci_hcd *ehci)
436{
437 u32 cmd;
438 int status;
439
440 /* did clearing PSE did take effect yet?
441 * takes effect only at frame boundaries...
442 */
c765d4ca
KW		 443 status = handshake_on_error_set_halt(ehci, &ehci->regs->status,
444 STS_PSS, 0, 9 * 125);
445 if (status)
1da177e4 446 return status;
1da177e4 447
083522d7
BH		 448 cmd = ehci_readl(ehci, &ehci->regs->command) | CMD_PSE;
449 ehci_writel(ehci, cmd, &ehci->regs->command);
1da177e4
LT		 450 /* posted write ... PSS happens later */
451 ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
452
453 /* make sure ehci_work scans these */
083522d7
BH		 454 ehci->next_uframe = ehci_readl(ehci, &ehci->regs->frame_index)
455 % (ehci->periodic_size << 3);
1da177e4
LT		 456 return 0;
457}
458
459static int disable_periodic (struct ehci_hcd *ehci)
460{
461 u32 cmd;
462 int status;
463
464 /* did setting PSE not take effect yet?
465 * takes effect only at frame boundaries...
466 */
c765d4ca
KW		 467 status = handshake_on_error_set_halt(ehci, &ehci->regs->status,
468 STS_PSS, STS_PSS, 9 * 125);
469 if (status)
1da177e4 470 return status;
1da177e4 471
083522d7
BH		 472 cmd = ehci_readl(ehci, &ehci->regs->command) & ~CMD_PSE;
473 ehci_writel(ehci, cmd, &ehci->regs->command);
1da177e4
LT		 474 /* posted write ... */
475
476 ehci->next_uframe = -1;
477 return 0;
478}
479
480/*-------------------------------------------------------------------------*/
481
482/* periodic schedule slots have iso tds (normal or split) first, then a
483 * sparse tree for active interrupt transfers.
484 *
485 * this just links in a qh; caller guarantees uframe masks are set right.
486 * no FSTN support (yet; ehci 0.96+)
487 */
488static int qh_link_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh)
489{
490 unsigned i;
491 unsigned period = qh->period;
492
493 dev_dbg (&qh->dev->dev,
494 "link qh%d-%04x/%p start %d [%d/%d us]\n",
6dbd682b 495 period, hc32_to_cpup(ehci, &qh->hw_info2) & (QH_CMASK | QH_SMASK),
1da177e4
LT		 496 qh, qh->start, qh->usecs, qh->c_usecs);
497
498 /* high bandwidth, or otherwise every microframe */
499 if (period == 0)
500 period = 1;
501
502 for (i = qh->start; i < ehci->periodic_size; i += period) {
6dbd682b
SR		 503 union ehci_shadow *prev = &ehci->pshadow[i];
504 __hc32 *hw_p = &ehci->periodic[i];
1da177e4 505 union ehci_shadow here = *prev;
6dbd682b 506 __hc32 type = 0;
1da177e4
LT		 507
508 /* skip the iso nodes at list head */
509 while (here.ptr) {
6dbd682b
SR		 510 type = Q_NEXT_TYPE(ehci, *hw_p);
511 if (type == cpu_to_hc32(ehci, Q_TYPE_QH))
1da177e4 512 break;
6dbd682b 513 prev = periodic_next_shadow(ehci, prev, type);
1da177e4
LT		 514 hw_p = &here.qh->hw_next;
515 here = *prev;
516 }
517
518 /* sorting each branch by period (slow-->fast)
519 * enables sharing interior tree nodes
520 */
521 while (here.ptr && qh != here.qh) {
522 if (qh->period > here.qh->period)
523 break;
524 prev = &here.qh->qh_next;
525 hw_p = &here.qh->hw_next;
526 here = *prev;
527 }
528 /* link in this qh, unless some earlier pass did that */
529 if (qh != here.qh) {
530 qh->qh_next = here;
531 if (here.qh)
532 qh->hw_next = *hw_p;
533 wmb ();
534 prev->qh = qh;
6dbd682b 535 *hw_p = QH_NEXT (ehci, qh->qh_dma);
1da177e4
LT		 536 }
537 }
538 qh->qh_state = QH_STATE_LINKED;
539 qh_get (qh);
540
541 /* update per-qh bandwidth for usbfs */
542 ehci_to_hcd(ehci)->self.bandwidth_allocated += qh->period
543 ? ((qh->usecs + qh->c_usecs) / qh->period)
544 : (qh->usecs * 8);
545
546 /* maybe enable periodic schedule processing */
547 if (!ehci->periodic_sched++)
548 return enable_periodic (ehci);
549
550 return 0;
551}
552
553static void qh_unlink_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh)
554{
555 unsigned i;
556 unsigned period;
557
558 // FIXME:
559 // IF this isn't high speed
560 // and this qh is active in the current uframe
561 // (and overlay token SplitXstate is false?)
562 // THEN
6dbd682b 563 // qh->hw_info1 |= __constant_cpu_to_hc32(1 << 7 /* "ignore" */);
1da177e4
LT		 564
565 /* high bandwidth, or otherwise part of every microframe */
566 if ((period = qh->period) == 0)
567 period = 1;
568
569 for (i = qh->start; i < ehci->periodic_size; i += period)
570 periodic_unlink (ehci, i, qh);
571
572 /* update per-qh bandwidth for usbfs */
573 ehci_to_hcd(ehci)->self.bandwidth_allocated -= qh->period
574 ? ((qh->usecs + qh->c_usecs) / qh->period)
575 : (qh->usecs * 8);
576
577 dev_dbg (&qh->dev->dev,
578 "unlink qh%d-%04x/%p start %d [%d/%d us]\n",
7dedacf4 579 qh->period,
6dbd682b 580 hc32_to_cpup(ehci, &qh->hw_info2) & (QH_CMASK | QH_SMASK),
1da177e4
LT		 581 qh, qh->start, qh->usecs, qh->c_usecs);
582
583 /* qh->qh_next still "live" to HC */
584 qh->qh_state = QH_STATE_UNLINK;
585 qh->qh_next.ptr = NULL;
586 qh_put (qh);
587
588 /* maybe turn off periodic schedule */
589 ehci->periodic_sched--;
590 if (!ehci->periodic_sched)
591 (void) disable_periodic (ehci);
592}
593
594static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh)
595{
596 unsigned wait;
597
598 qh_unlink_periodic (ehci, qh);
599
600 /* simple/paranoid: always delay, expecting the HC needs to read
601 * qh->hw_next or finish a writeback after SPLIT/CSPLIT ... and
602 * expect khubd to clean up after any CSPLITs we won't issue.
603 * active high speed queues may need bigger delays...
604 */
605 if (list_empty (&qh->qtd_list)
6dbd682b 606 || (cpu_to_hc32(ehci, QH_CMASK)
1da177e4
LT		 607 & qh->hw_info2) != 0)
608 wait = 2;
609 else
610 wait = 55; /* worst case: 3 * 1024 */
611
612 udelay (wait);
613 qh->qh_state = QH_STATE_IDLE;
6dbd682b 614 qh->hw_next = EHCI_LIST_END(ehci);
1da177e4
LT		 615 wmb ();
616}
617
618/*-------------------------------------------------------------------------*/
619
620static int check_period (
53bd6a60 621 struct ehci_hcd *ehci,
1da177e4
LT		 622 unsigned frame,
623 unsigned uframe,
624 unsigned period,
625 unsigned usecs
626) {
627 int claimed;
628
629 /* complete split running into next frame?
630 * given FSTN support, we could sometimes check...
631 */
632 if (uframe >= 8)
633 return 0;
634
635 /*
636 * 80% periodic == 100 usec/uframe available
53bd6a60 637 * convert "usecs we need" to "max already claimed"
1da177e4
LT		 638 */
639 usecs = 100 - usecs;
640
641 /* we "know" 2 and 4 uframe intervals were rejected; so
642 * for period 0, check _every_ microframe in the schedule.
643 */
644 if (unlikely (period == 0)) {
645 do {
646 for (uframe = 0; uframe < 7; uframe++) {
647 claimed = periodic_usecs (ehci, frame, uframe);
648 if (claimed > usecs)
649 return 0;
650 }
651 } while ((frame += 1) < ehci->periodic_size);
652
653 /* just check the specified uframe, at that period */
654 } else {
655 do {
656 claimed = periodic_usecs (ehci, frame, uframe);
657 if (claimed > usecs)
658 return 0;
659 } while ((frame += period) < ehci->periodic_size);
660 }
661
662 // success!
663 return 1;
664}
665
666static int check_intr_schedule (
53bd6a60 667 struct ehci_hcd *ehci,
1da177e4
LT		 668 unsigned frame,
669 unsigned uframe,
670 const struct ehci_qh *qh,
6dbd682b 671 __hc32 *c_maskp
1da177e4
LT		 672)
673{
53bd6a60 674 int retval = -ENOSPC;
ba47f66b 675 u8 mask = 0;
1da177e4
LT		 676
677 if (qh->c_usecs && uframe >= 6) /* FSTN territory? */
678 goto done;
679
680 if (!check_period (ehci, frame, uframe, qh->period, qh->usecs))
681 goto done;
682 if (!qh->c_usecs) {
683 retval = 0;
684 *c_maskp = 0;
685 goto done;
686 }
687
ba47f66b
DS		 688#ifdef CONFIG_USB_EHCI_TT_NEWSCHED
689 if (tt_available (ehci, qh->period, qh->dev, frame, uframe,
690 qh->tt_usecs)) {
691 unsigned i;
692
693 /* TODO : this may need FSTN for SSPLIT in uframe 5. */
694 for (i=uframe+1; i<8 && i<uframe+4; i++)
695 if (!check_period (ehci, frame, i,
696 qh->period, qh->c_usecs))
697 goto done;
698 else
699 mask |= 1 << i;
700
701 retval = 0;
702
6dbd682b 703 *c_maskp = cpu_to_hc32(ehci, mask << 8);
ba47f66b
DS		 704 }
705#else
1da177e4
LT		 706 /* Make sure this tt's buffer is also available for CSPLITs.
707 * We pessimize a bit; probably the typical full speed case
708 * doesn't need the second CSPLIT.
53bd6a60 709 *
1da177e4
LT		 710 * NOTE: both SPLIT and CSPLIT could be checked in just
711 * one smart pass...
712 */
713 mask = 0x03 << (uframe + qh->gap_uf);
6dbd682b 714 *c_maskp = cpu_to_hc32(ehci, mask << 8);
1da177e4
LT		 715
716 mask |= 1 << uframe;
717 if (tt_no_collision (ehci, qh->period, qh->dev, frame, mask)) {
718 if (!check_period (ehci, frame, uframe + qh->gap_uf + 1,
719 qh->period, qh->c_usecs))
720 goto done;
721 if (!check_period (ehci, frame, uframe + qh->gap_uf,
722 qh->period, qh->c_usecs))
723 goto done;
724 retval = 0;
725 }
ba47f66b 726#endif
1da177e4
LT		 727done:
728 return retval;
729}
730
731/* "first fit" scheduling policy used the first time through,
732 * or when the previous schedule slot can't be re-used.
733 */
6dbd682b 734static int qh_schedule(struct ehci_hcd *ehci, struct ehci_qh *qh)
1da177e4 735{
53bd6a60 736 int status;
1da177e4 737 unsigned uframe;
6dbd682b 738 __hc32 c_mask;
1da177e4
LT		 739 unsigned frame; /* 0..(qh->period - 1), or NO_FRAME */
740
741 qh_refresh(ehci, qh);
6dbd682b 742 qh->hw_next = EHCI_LIST_END(ehci);
1da177e4
LT		 743 frame = qh->start;
744
745 /* reuse the previous schedule slots, if we can */
746 if (frame < qh->period) {
6dbd682b 747 uframe = ffs(hc32_to_cpup(ehci, &qh->hw_info2) & QH_SMASK);
1da177e4
LT		 748 status = check_intr_schedule (ehci, frame, --uframe,
749 qh, &c_mask);
750 } else {
751 uframe = 0;
752 c_mask = 0;
753 status = -ENOSPC;
754 }
755
756 /* else scan the schedule to find a group of slots such that all
757 * uframes have enough periodic bandwidth available.
758 */
759 if (status) {
760 /* "normal" case, uframing flexible except with splits */
761 if (qh->period) {
762 frame = qh->period - 1;
763 do {
764 for (uframe = 0; uframe < 8; uframe++) {
765 status = check_intr_schedule (ehci,
766 frame, uframe, qh,
767 &c_mask);
768 if (status == 0)
769 break;
770 }
771 } while (status && frame--);
772
773 /* qh->period == 0 means every uframe */
774 } else {
775 frame = 0;
776 status = check_intr_schedule (ehci, 0, 0, qh, &c_mask);
777 }
778 if (status)
779 goto done;
780 qh->start = frame;
781
782 /* reset S-frame and (maybe) C-frame masks */
6dbd682b 783 qh->hw_info2 &= cpu_to_hc32(ehci, ~(QH_CMASK | QH_SMASK));
1da177e4 784 qh->hw_info2 |= qh->period
6dbd682b
SR		 785 ? cpu_to_hc32(ehci, 1 << uframe)
786 : cpu_to_hc32(ehci, QH_SMASK);
1da177e4
LT		 787 qh->hw_info2 |= c_mask;
788 } else
789 ehci_dbg (ehci, "reused qh %p schedule\n", qh);
790
791 /* stuff into the periodic schedule */
53bd6a60 792 status = qh_link_periodic (ehci, qh);
1da177e4
LT		 793done:
794 return status;
795}
796
797static int intr_submit (
798 struct ehci_hcd *ehci,
1da177e4
LT		 799 struct urb *urb,
800 struct list_head *qtd_list,
55016f10 801 gfp_t mem_flags
1da177e4
LT		 802) {
803 unsigned epnum;
804 unsigned long flags;
805 struct ehci_qh *qh;
e9df41c5 806 int status;
1da177e4
LT		 807 struct list_head empty;
808
809 /* get endpoint and transfer/schedule data */
e9df41c5 810 epnum = urb->ep->desc.bEndpointAddress;
1da177e4
LT		 811
812 spin_lock_irqsave (&ehci->lock, flags);
813
8de98402 814 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
6dbd682b 815 &ehci_to_hcd(ehci)->flags))) {
8de98402 816 status = -ESHUTDOWN;
e9df41c5 817 goto done_not_linked;
8de98402 818 }
e9df41c5
AS		 819 status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
820 if (unlikely(status))
821 goto done_not_linked;
8de98402 822
1da177e4
LT		 823 /* get qh and force any scheduling errors */
824 INIT_LIST_HEAD (&empty);
e9df41c5 825 qh = qh_append_tds(ehci, urb, &empty, epnum, &urb->ep->hcpriv);
1da177e4
LT		 826 if (qh == NULL) {
827 status = -ENOMEM;
828 goto done;
829 }
830 if (qh->qh_state == QH_STATE_IDLE) {
831 if ((status = qh_schedule (ehci, qh)) != 0)
832 goto done;
833 }
834
835 /* then queue the urb's tds to the qh */
e9df41c5 836 qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
1da177e4
LT		 837 BUG_ON (qh == NULL);
838
839 /* ... update usbfs periodic stats */
840 ehci_to_hcd(ehci)->self.bandwidth_int_reqs++;
841
842done:
e9df41c5
AS		 843 if (unlikely(status))
844 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
845done_not_linked:
1da177e4
LT		 846 spin_unlock_irqrestore (&ehci->lock, flags);
847 if (status)
848 qtd_list_free (ehci, urb, qtd_list);
849
850 return status;
851}
852
853/*-------------------------------------------------------------------------*/
854
855/* ehci_iso_stream ops work with both ITD and SITD */
856
857static struct ehci_iso_stream *
55016f10 858iso_stream_alloc (gfp_t mem_flags)
1da177e4
LT		 859{
860 struct ehci_iso_stream *stream;
861
7b842b6e 862 stream = kzalloc(sizeof *stream, mem_flags);
1da177e4 863 if (likely (stream != NULL)) {
1da177e4
LT		 864 INIT_LIST_HEAD(&stream->td_list);
865 INIT_LIST_HEAD(&stream->free_list);
866 stream->next_uframe = -1;
867 stream->refcount = 1;
868 }
869 return stream;
870}
871
872static void
873iso_stream_init (
874 struct ehci_hcd *ehci,
875 struct ehci_iso_stream *stream,
876 struct usb_device *dev,
877 int pipe,
878 unsigned interval
879)
880{
881 static const u8 smask_out [] = { 0x01, 0x03, 0x07, 0x0f, 0x1f, 0x3f };
882
883 u32 buf1;
884 unsigned epnum, maxp;
885 int is_input;
886 long bandwidth;
887
888 /*
889 * this might be a "high bandwidth" highspeed endpoint,
890 * as encoded in the ep descriptor's wMaxPacket field
891 */
892 epnum = usb_pipeendpoint (pipe);
893 is_input = usb_pipein (pipe) ? USB_DIR_IN : 0;
894 maxp = usb_maxpacket(dev, pipe, !is_input);
895 if (is_input) {
896 buf1 = (1 << 11);
897 } else {
898 buf1 = 0;
899 }
900
901 /* knows about ITD vs SITD */
902 if (dev->speed == USB_SPEED_HIGH) {
903 unsigned multi = hb_mult(maxp);
904
905 stream->highspeed = 1;
906
907 maxp = max_packet(maxp);
908 buf1 |= maxp;
909 maxp *= multi;
910
6dbd682b
SR		 911 stream->buf0 = cpu_to_hc32(ehci, (epnum << 8) | dev->devnum);
912 stream->buf1 = cpu_to_hc32(ehci, buf1);
913 stream->buf2 = cpu_to_hc32(ehci, multi);
1da177e4
LT		 914
915 /* usbfs wants to report the average usecs per frame tied up
916 * when transfers on this endpoint are scheduled ...
917 */
918 stream->usecs = HS_USECS_ISO (maxp);
919 bandwidth = stream->usecs * 8;
920 bandwidth /= 1 << (interval - 1);
921
922 } else {
923 u32 addr;
d0384200 924 int think_time;
469d0229 925 int hs_transfers;
1da177e4
LT		 926
927 addr = dev->ttport << 24;
928 if (!ehci_is_TDI(ehci)
929 || (dev->tt->hub !=
930 ehci_to_hcd(ehci)->self.root_hub))
931 addr |= dev->tt->hub->devnum << 16;
932 addr |= epnum << 8;
933 addr |= dev->devnum;
934 stream->usecs = HS_USECS_ISO (maxp);
d0384200 935 think_time = dev->tt ? dev->tt->think_time : 0;
936 stream->tt_usecs = NS_TO_US (think_time + usb_calc_bus_time (
937 dev->speed, is_input, 1, maxp));
469d0229 938 hs_transfers = max (1u, (maxp + 187) / 188);
1da177e4
LT		 939 if (is_input) {
940 u32 tmp;
941
942 addr |= 1 << 31;
943 stream->c_usecs = stream->usecs;
944 stream->usecs = HS_USECS_ISO (1);
945 stream->raw_mask = 1;
946
469d0229
CL		 947 /* c-mask as specified in USB 2.0 11.18.4 3.c */
948 tmp = (1 << (hs_transfers + 2)) - 1;
949 stream->raw_mask |= tmp << (8 + 2);
1da177e4 950 } else
469d0229 951 stream->raw_mask = smask_out [hs_transfers - 1];
1da177e4
LT		 952 bandwidth = stream->usecs + stream->c_usecs;
953 bandwidth /= 1 << (interval + 2);
954
955 /* stream->splits gets created from raw_mask later */
6dbd682b 956 stream->address = cpu_to_hc32(ehci, addr);
1da177e4
LT		 957 }
958 stream->bandwidth = bandwidth;
959
960 stream->udev = dev;
961
962 stream->bEndpointAddress = is_input | epnum;
963 stream->interval = interval;
964 stream->maxp = maxp;
965}
966
967static void
968iso_stream_put(struct ehci_hcd *ehci, struct ehci_iso_stream *stream)
969{
970 stream->refcount--;
971
972 /* free whenever just a dev->ep reference remains.
973 * not like a QH -- no persistent state (toggle, halt)
974 */
975 if (stream->refcount == 1) {
976 int is_in;
977
978 // BUG_ON (!list_empty(&stream->td_list));
979
980 while (!list_empty (&stream->free_list)) {
981 struct list_head *entry;
982
983 entry = stream->free_list.next;
984 list_del (entry);
985
986 /* knows about ITD vs SITD */
987 if (stream->highspeed) {
988 struct ehci_itd *itd;
989
990 itd = list_entry (entry, struct ehci_itd,
991 itd_list);
992 dma_pool_free (ehci->itd_pool, itd,
993 itd->itd_dma);
994 } else {
995 struct ehci_sitd *sitd;
996
997 sitd = list_entry (entry, struct ehci_sitd,
998 sitd_list);
999 dma_pool_free (ehci->sitd_pool, sitd,
1000 sitd->sitd_dma);
1001 }
1002 }
1003
1004 is_in = (stream->bEndpointAddress & USB_DIR_IN) ? 0x10 : 0;
1005 stream->bEndpointAddress &= 0x0f;
1006 stream->ep->hcpriv = NULL;
1007
1008 if (stream->rescheduled) {
1009 ehci_info (ehci, "ep%d%s-iso rescheduled "
1010 "%lu times in %lu seconds\n",
1011 stream->bEndpointAddress, is_in ? "in" : "out",
1012 stream->rescheduled,
1013 ((jiffies - stream->start)/HZ)
1014 );
1015 }
1016
1017 kfree(stream);
1018 }
1019}
1020
1021static inline struct ehci_iso_stream *
1022iso_stream_get (struct ehci_iso_stream *stream)
1023{
1024 if (likely (stream != NULL))
1025 stream->refcount++;
1026 return stream;
1027}
1028
1029static struct ehci_iso_stream *
1030iso_stream_find (struct ehci_hcd *ehci, struct urb *urb)
1031{
1032 unsigned epnum;
1033 struct ehci_iso_stream *stream;
1034 struct usb_host_endpoint *ep;
1035 unsigned long flags;
1036
1037 epnum = usb_pipeendpoint (urb->pipe);
1038 if (usb_pipein(urb->pipe))
1039 ep = urb->dev->ep_in[epnum];
1040 else
1041 ep = urb->dev->ep_out[epnum];
1042
1043 spin_lock_irqsave (&ehci->lock, flags);
1044 stream = ep->hcpriv;
1045
1046 if (unlikely (stream == NULL)) {
1047 stream = iso_stream_alloc(GFP_ATOMIC);
1048 if (likely (stream != NULL)) {
1049 /* dev->ep owns the initial refcount */
1050 ep->hcpriv = stream;
1051 stream->ep = ep;
1052 iso_stream_init(ehci, stream, urb->dev, urb->pipe,
1053 urb->interval);
1054 }
1055
1056 /* if dev->ep [epnum] is a QH, info1.maxpacket is nonzero */
1057 } else if (unlikely (stream->hw_info1 != 0)) {
1058 ehci_dbg (ehci, "dev %s ep%d%s, not iso??\n",
1059 urb->dev->devpath, epnum,
1060 usb_pipein(urb->pipe) ? "in" : "out");
1061 stream = NULL;
1062 }
1063
1064 /* caller guarantees an eventual matching iso_stream_put */
1065 stream = iso_stream_get (stream);
1066
1067 spin_unlock_irqrestore (&ehci->lock, flags);
1068 return stream;
1069}
1070
1071/*-------------------------------------------------------------------------*/
1072
1073/* ehci_iso_sched ops can be ITD-only or SITD-only */
1074
1075static struct ehci_iso_sched *
55016f10 1076iso_sched_alloc (unsigned packets, gfp_t mem_flags)
1da177e4
LT		 1077{
1078 struct ehci_iso_sched *iso_sched;
1079 int size = sizeof *iso_sched;
1080
1081 size += packets * sizeof (struct ehci_iso_packet);
80b6ca48 1082 iso_sched = kzalloc(size, mem_flags);
1da177e4 1083 if (likely (iso_sched != NULL)) {
1da177e4
LT		 1084 INIT_LIST_HEAD (&iso_sched->td_list);
1085 }
1086 return iso_sched;
1087}
1088
1089static inline void
6dbd682b
SR		 1090itd_sched_init(
1091 struct ehci_hcd *ehci,
1da177e4
LT		 1092 struct ehci_iso_sched *iso_sched,
1093 struct ehci_iso_stream *stream,
1094 struct urb *urb
1095)
1096{
1097 unsigned i;
1098 dma_addr_t dma = urb->transfer_dma;
1099
1100 /* how many uframes are needed for these transfers */
1101 iso_sched->span = urb->number_of_packets * stream->interval;
1102
1103 /* figure out per-uframe itd fields that we'll need later
1104 * when we fit new itds into the schedule.
1105 */
1106 for (i = 0; i < urb->number_of_packets; i++) {
1107 struct ehci_iso_packet *uframe = &iso_sched->packet [i];
1108 unsigned length;
1109 dma_addr_t buf;
1110 u32 trans;
1111
1112 length = urb->iso_frame_desc [i].length;
1113 buf = dma + urb->iso_frame_desc [i].offset;
1114
1115 trans = EHCI_ISOC_ACTIVE;
1116 trans |= buf & 0x0fff;
1117 if (unlikely (((i + 1) == urb->number_of_packets))
1118 && !(urb->transfer_flags & URB_NO_INTERRUPT))
1119 trans |= EHCI_ITD_IOC;
1120 trans |= length << 16;
6dbd682b 1121 uframe->transaction = cpu_to_hc32(ehci, trans);
1da177e4 1122
77078570 1123 /* might need to cross a buffer page within a uframe */
1da177e4
LT		 1124 uframe->bufp = (buf & ~(u64)0x0fff);
1125 buf += length;
1126 if (unlikely ((uframe->bufp != (buf & ~(u64)0x0fff))))
1127 uframe->cross = 1;
1128 }
1129}
1130
1131static void
1132iso_sched_free (
1133 struct ehci_iso_stream *stream,
1134 struct ehci_iso_sched *iso_sched
1135)
1136{
1137 if (!iso_sched)
1138 return;
1139 // caller must hold ehci->lock!
1140 list_splice (&iso_sched->td_list, &stream->free_list);
1141 kfree (iso_sched);
1142}
1143
1144static int
1145itd_urb_transaction (
1146 struct ehci_iso_stream *stream,
1147 struct ehci_hcd *ehci,
1148 struct urb *urb,
55016f10 1149 gfp_t mem_flags
1da177e4
LT		 1150)
1151{
1152 struct ehci_itd *itd;
1153 dma_addr_t itd_dma;
1154 int i;
1155 unsigned num_itds;
1156 struct ehci_iso_sched *sched;
1157 unsigned long flags;
1158
1159 sched = iso_sched_alloc (urb->number_of_packets, mem_flags);
1160 if (unlikely (sched == NULL))
1161 return -ENOMEM;
1162
6dbd682b 1163 itd_sched_init(ehci, sched, stream, urb);
1da177e4
LT		 1164
1165 if (urb->interval < 8)
1166 num_itds = 1 + (sched->span + 7) / 8;
1167 else
1168 num_itds = urb->number_of_packets;
1169
1170 /* allocate/init ITDs */
1171 spin_lock_irqsave (&ehci->lock, flags);
1172 for (i = 0; i < num_itds; i++) {
1173
1174 /* free_list.next might be cache-hot ... but maybe
1175 * the HC caches it too. avoid that issue for now.
1176 */
1177
1178 /* prefer previously-allocated itds */
1179 if (likely (!list_empty(&stream->free_list))) {
1180 itd = list_entry (stream->free_list.prev,
6dbd682b 1181 struct ehci_itd, itd_list);
1da177e4
LT		 1182 list_del (&itd->itd_list);
1183 itd_dma = itd->itd_dma;
3d01f0fe 1184 } else {
1da177e4
LT		 1185 spin_unlock_irqrestore (&ehci->lock, flags);
1186 itd = dma_pool_alloc (ehci->itd_pool, mem_flags,
1187 &itd_dma);
1188 spin_lock_irqsave (&ehci->lock, flags);
3d01f0fe
KW		 1189 if (!itd) {
1190 iso_sched_free(stream, sched);
1191 spin_unlock_irqrestore(&ehci->lock, flags);
1192 return -ENOMEM;
1193 }
1da177e4
LT		 1194 }
1195
1da177e4
LT		 1196 memset (itd, 0, sizeof *itd);
1197 itd->itd_dma = itd_dma;
1198 list_add (&itd->itd_list, &sched->td_list);
1199 }
1200 spin_unlock_irqrestore (&ehci->lock, flags);
1201
1202 /* temporarily store schedule info in hcpriv */
1203 urb->hcpriv = sched;
1204 urb->error_count = 0;
1205 return 0;
1206}
1207
1208/*-------------------------------------------------------------------------*/
1209
1210static inline int
1211itd_slot_ok (
1212 struct ehci_hcd *ehci,
1213 u32 mod,
1214 u32 uframe,
1215 u8 usecs,
1216 u32 period
1217)
1218{
1219 uframe %= period;
1220 do {
1221 /* can't commit more than 80% periodic == 100 usec */
1222 if (periodic_usecs (ehci, uframe >> 3, uframe & 0x7)
1223 > (100 - usecs))
1224 return 0;
1225
1226 /* we know urb->interval is 2^N uframes */
1227 uframe += period;
1228 } while (uframe < mod);
1229 return 1;
1230}
1231
1232static inline int
1233sitd_slot_ok (
1234 struct ehci_hcd *ehci,
1235 u32 mod,
1236 struct ehci_iso_stream *stream,
1237 u32 uframe,
1238 struct ehci_iso_sched *sched,
1239 u32 period_uframes
1240)
1241{
1242 u32 mask, tmp;
1243 u32 frame, uf;
1244
1245 mask = stream->raw_mask << (uframe & 7);
1246
1247 /* for IN, don't wrap CSPLIT into the next frame */
1248 if (mask & ~0xffff)
1249 return 0;
1250
1251 /* this multi-pass logic is simple, but performance may
1252 * suffer when the schedule data isn't cached.
1253 */
1254
1255 /* check bandwidth */
1256 uframe %= period_uframes;
1257 do {
1258 u32 max_used;
1259
1260 frame = uframe >> 3;
1261 uf = uframe & 7;
1262
ba47f66b
DS		 1263#ifdef CONFIG_USB_EHCI_TT_NEWSCHED
1264 /* The tt's fullspeed bus bandwidth must be available.
1265 * tt_available scheduling guarantees 10+% for control/bulk.
1266 */
1267 if (!tt_available (ehci, period_uframes << 3,
1268 stream->udev, frame, uf, stream->tt_usecs))
1269 return 0;
1270#else
1da177e4
LT		 1271 /* tt must be idle for start(s), any gap, and csplit.
1272 * assume scheduling slop leaves 10+% for control/bulk.
1273 */
1274 if (!tt_no_collision (ehci, period_uframes << 3,
1275 stream->udev, frame, mask))
1276 return 0;
ba47f66b 1277#endif
1da177e4
LT		 1278
1279 /* check starts (OUT uses more than one) */
1280 max_used = 100 - stream->usecs;
1281 for (tmp = stream->raw_mask & 0xff; tmp; tmp >>= 1, uf++) {
1282 if (periodic_usecs (ehci, frame, uf) > max_used)
1283 return 0;
1284 }
1285
1286 /* for IN, check CSPLIT */
1287 if (stream->c_usecs) {
0c734622 1288 uf = uframe & 7;
1da177e4
LT		 1289 max_used = 100 - stream->c_usecs;
1290 do {
1291 tmp = 1 << uf;
1292 tmp <<= 8;
1293 if ((stream->raw_mask & tmp) == 0)
1294 continue;
1295 if (periodic_usecs (ehci, frame, uf)
1296 > max_used)
1297 return 0;
1298 } while (++uf < 8);
1299 }
1300
1301 /* we know urb->interval is 2^N uframes */
1302 uframe += period_uframes;
1303 } while (uframe < mod);
1304
6dbd682b 1305 stream->splits = cpu_to_hc32(ehci, stream->raw_mask << (uframe & 7));
1da177e4
LT		 1306 return 1;
1307}
1308
1309/*
1310 * This scheduler plans almost as far into the future as it has actual
1311 * periodic schedule slots. (Affected by TUNE_FLS, which defaults to
1312 * "as small as possible" to be cache-friendlier.) That limits the size
1313 * transfers you can stream reliably; avoid more than 64 msec per urb.
1314 * Also avoid queue depths of less than ehci's worst irq latency (affected
1315 * by the per-urb URB_NO_INTERRUPT hint, the log2_irq_thresh module parameter,
1316 * and other factors); or more than about 230 msec total (for portability,
1317 * given EHCI_TUNE_FLS and the slop). Or, write a smarter scheduler!
1318 */
1319
1320#define SCHEDULE_SLOP 10 /* frames */
1321
1322static int
1323iso_stream_schedule (
1324 struct ehci_hcd *ehci,
1325 struct urb *urb,
1326 struct ehci_iso_stream *stream
1327)
1328{
1329 u32 now, start, max, period;
1330 int status;
1331 unsigned mod = ehci->periodic_size << 3;
1332 struct ehci_iso_sched *sched = urb->hcpriv;
1333
1334 if (sched->span > (mod - 8 * SCHEDULE_SLOP)) {
1335 ehci_dbg (ehci, "iso request %p too long\n", urb);
1336 status = -EFBIG;
1337 goto fail;
1338 }
1339
1340 if ((stream->depth + sched->span) > mod) {
1341 ehci_dbg (ehci, "request %p would overflow (%d+%d>%d)\n",
1342 urb, stream->depth, sched->span, mod);
1343 status = -EFBIG;
1344 goto fail;
1345 }
1346
083522d7 1347 now = ehci_readl(ehci, &ehci->regs->frame_index) % mod;
1da177e4
LT		 1348
1349 /* when's the last uframe this urb could start? */
1350 max = now + mod;
1351
1352 /* typical case: reuse current schedule. stream is still active,
1353 * and no gaps from host falling behind (irq delays etc)
1354 */
1355 if (likely (!list_empty (&stream->td_list))) {
1356 start = stream->next_uframe;
1357 if (start < now)
1358 start += mod;
1359 if (likely ((start + sched->span) < max))
1360 goto ready;
1361 /* else fell behind; someday, try to reschedule */
1362 status = -EL2NSYNC;
1363 goto fail;
1364 }
1365
1366 /* need to schedule; when's the next (u)frame we could start?
1367 * this is bigger than ehci->i_thresh allows; scheduling itself
1368 * isn't free, the slop should handle reasonably slow cpus. it
1369 * can also help high bandwidth if the dma and irq loads don't
1370 * jump until after the queue is primed.
1371 */
1372 start = SCHEDULE_SLOP * 8 + (now & ~0x07);
1373 start %= mod;
1374 stream->next_uframe = start;
1375
1376 /* NOTE: assumes URB_ISO_ASAP, to limit complexity/bugs */
1377
1378 period = urb->interval;
1379 if (!stream->highspeed)
1380 period <<= 3;
1381
1382 /* find a uframe slot with enough bandwidth */
1383 for (; start < (stream->next_uframe + period); start++) {
1384 int enough_space;
1385
1386 /* check schedule: enough space? */
1387 if (stream->highspeed)
1388 enough_space = itd_slot_ok (ehci, mod, start,
1389 stream->usecs, period);
1390 else {
1391 if ((start % 8) >= 6)
1392 continue;
1393 enough_space = sitd_slot_ok (ehci, mod, stream,
1394 start, sched, period);
1395 }
1396
1397 /* schedule it here if there's enough bandwidth */
1398 if (enough_space) {
1399 stream->next_uframe = start % mod;
1400 goto ready;
1401 }
1402 }
1403
1404 /* no room in the schedule */
1405 ehci_dbg (ehci, "iso %ssched full %p (now %d max %d)\n",
1406 list_empty (&stream->td_list) ? "" : "re",
1407 urb, now, max);
1408 status = -ENOSPC;
1409
1410fail:
1411 iso_sched_free (stream, sched);
1412 urb->hcpriv = NULL;
1413 return status;
1414
1415ready:
1416 /* report high speed start in uframes; full speed, in frames */
1417 urb->start_frame = stream->next_uframe;
1418 if (!stream->highspeed)
1419 urb->start_frame >>= 3;
1420 return 0;
1421}
1422
1423/*-------------------------------------------------------------------------*/
1424
1425static inline void
6dbd682b
SR		 1426itd_init(struct ehci_hcd *ehci, struct ehci_iso_stream *stream,
1427 struct ehci_itd *itd)
1da177e4
LT		 1428{
1429 int i;
1430
77078570 1431 /* it's been recently zeroed */
6dbd682b 1432 itd->hw_next = EHCI_LIST_END(ehci);
1da177e4
LT		 1433 itd->hw_bufp [0] = stream->buf0;
1434 itd->hw_bufp [1] = stream->buf1;
1435 itd->hw_bufp [2] = stream->buf2;
1436
1437 for (i = 0; i < 8; i++)
1438 itd->index[i] = -1;
1439
1440 /* All other fields are filled when scheduling */
1441}
1442
1443static inline void
6dbd682b
SR		 1444itd_patch(
1445 struct ehci_hcd *ehci,
1da177e4
LT		 1446 struct ehci_itd *itd,
1447 struct ehci_iso_sched *iso_sched,
1448 unsigned index,
77078570 1449 u16 uframe
1da177e4
LT		 1450)
1451{
1452 struct ehci_iso_packet *uf = &iso_sched->packet [index];
1453 unsigned pg = itd->pg;
1454
1455 // BUG_ON (pg == 6 && uf->cross);
1456
1457 uframe &= 0x07;
1458 itd->index [uframe] = index;
1459
6dbd682b
SR		 1460 itd->hw_transaction[uframe] = uf->transaction;
1461 itd->hw_transaction[uframe] |= cpu_to_hc32(ehci, pg << 12);
1462 itd->hw_bufp[pg] |= cpu_to_hc32(ehci, uf->bufp & ~(u32)0);
1463 itd->hw_bufp_hi[pg] |= cpu_to_hc32(ehci, (u32)(uf->bufp >> 32));
1da177e4
LT		 1464
1465 /* iso_frame_desc[].offset must be strictly increasing */
77078570 1466 if (unlikely (uf->cross)) {
1da177e4 1467 u64 bufp = uf->bufp + 4096;
6dbd682b 1468
1da177e4 1469 itd->pg = ++pg;
6dbd682b
SR		 1470 itd->hw_bufp[pg] |= cpu_to_hc32(ehci, bufp & ~(u32)0);
1471 itd->hw_bufp_hi[pg] |= cpu_to_hc32(ehci, (u32)(bufp >> 32));
1da177e4
LT		 1472 }
1473}
1474
1475static inline void
1476itd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_itd *itd)
1477{
1478 /* always prepend ITD/SITD ... only QH tree is order-sensitive */
1479 itd->itd_next = ehci->pshadow [frame];
1480 itd->hw_next = ehci->periodic [frame];
1481 ehci->pshadow [frame].itd = itd;
1482 itd->frame = frame;
1483 wmb ();
6dbd682b 1484 ehci->periodic[frame] = cpu_to_hc32(ehci, itd->itd_dma | Q_TYPE_ITD);
1da177e4
LT		 1485}
1486
1487/* fit urb's itds into the selected schedule slot; activate as needed */
1488static int
1489itd_link_urb (
1490 struct ehci_hcd *ehci,
1491 struct urb *urb,
1492 unsigned mod,
1493 struct ehci_iso_stream *stream
1494)
1495{
77078570 1496 int packet;
1da177e4
LT		 1497 unsigned next_uframe, uframe, frame;
1498 struct ehci_iso_sched *iso_sched = urb->hcpriv;
1499 struct ehci_itd *itd;
1500
1501 next_uframe = stream->next_uframe % mod;
1502
1503 if (unlikely (list_empty(&stream->td_list))) {
1504 ehci_to_hcd(ehci)->self.bandwidth_allocated
1505 += stream->bandwidth;
1506 ehci_vdbg (ehci,
1507 "schedule devp %s ep%d%s-iso period %d start %d.%d\n",
1508 urb->dev->devpath, stream->bEndpointAddress & 0x0f,
1509 (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out",
1510 urb->interval,
1511 next_uframe >> 3, next_uframe & 0x7);
1512 stream->start = jiffies;
1513 }
1514 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
1515
1516 /* fill iTDs uframe by uframe */
1517 for (packet = 0, itd = NULL; packet < urb->number_of_packets; ) {
1518 if (itd == NULL) {
1519 /* ASSERT: we have all necessary itds */
1520 // BUG_ON (list_empty (&iso_sched->td_list));
1521
1522 /* ASSERT: no itds for this endpoint in this uframe */
1523
1524 itd = list_entry (iso_sched->td_list.next,
1525 struct ehci_itd, itd_list);
1526 list_move_tail (&itd->itd_list, &stream->td_list);
1527 itd->stream = iso_stream_get (stream);
1528 itd->urb = usb_get_urb (urb);
6dbd682b 1529 itd_init (ehci, stream, itd);
1da177e4
LT		 1530 }
1531
1532 uframe = next_uframe & 0x07;
1533 frame = next_uframe >> 3;
1534
6dbd682b 1535 itd_patch(ehci, itd, iso_sched, packet, uframe);
1da177e4
LT		 1536
1537 next_uframe += stream->interval;
1538 stream->depth += stream->interval;
1539 next_uframe %= mod;
1540 packet++;
1541
1542 /* link completed itds into the schedule */
1543 if (((next_uframe >> 3) != frame)
1544 || packet == urb->number_of_packets) {
1545 itd_link (ehci, frame % ehci->periodic_size, itd);
1546 itd = NULL;
1547 }
1548 }
1549 stream->next_uframe = next_uframe;
1550
1551 /* don't need that schedule data any more */
1552 iso_sched_free (stream, iso_sched);
1553 urb->hcpriv = NULL;
1554
1555 timer_action (ehci, TIMER_IO_WATCHDOG);
1556 if (unlikely (!ehci->periodic_sched++))
1557 return enable_periodic (ehci);
1558 return 0;
1559}
1560
1561#define ISO_ERRS (EHCI_ISOC_BUF_ERR | EHCI_ISOC_BABBLE | EHCI_ISOC_XACTERR)
1562
30bf54e6
DB		 1563/* Process and recycle a completed ITD. Return true iff its urb completed,
1564 * and hence its completion callback probably added things to the hardware
1565 * schedule.
1566 *
1567 * Note that we carefully avoid recycling this descriptor until after any
1568 * completion callback runs, so that it won't be reused quickly. That is,
1569 * assuming (a) no more than two urbs per frame on this endpoint, and also
1570 * (b) only this endpoint's completions submit URBs. It seems some silicon
1571 * corrupts things if you reuse completed descriptors very quickly...
1572 */
1da177e4
LT		 1573static unsigned
1574itd_complete (
1575 struct ehci_hcd *ehci,
7d12e780 1576 struct ehci_itd *itd
1da177e4
LT		 1577) {
1578 struct urb *urb = itd->urb;
1579 struct usb_iso_packet_descriptor *desc;
1580 u32 t;
1581 unsigned uframe;
1582 int urb_index = -1;
1583 struct ehci_iso_stream *stream = itd->stream;
1584 struct usb_device *dev;
30bf54e6 1585 unsigned retval = false;
1da177e4
LT		 1586
1587 /* for each uframe with a packet */
1588 for (uframe = 0; uframe < 8; uframe++) {
1589 if (likely (itd->index[uframe] == -1))
1590 continue;
1591 urb_index = itd->index[uframe];
1592 desc = &urb->iso_frame_desc [urb_index];
1593
6dbd682b 1594 t = hc32_to_cpup(ehci, &itd->hw_transaction [uframe]);
1da177e4
LT		 1595 itd->hw_transaction [uframe] = 0;
1596 stream->depth -= stream->interval;
1597
1598 /* report transfer status */
1599 if (unlikely (t & ISO_ERRS)) {
1600 urb->error_count++;
1601 if (t & EHCI_ISOC_BUF_ERR)
1602 desc->status = usb_pipein (urb->pipe)
1603 ? -ENOSR /* hc couldn't read */
1604 : -ECOMM; /* hc couldn't write */
1605 else if (t & EHCI_ISOC_BABBLE)
1606 desc->status = -EOVERFLOW;
1607 else /* (t & EHCI_ISOC_XACTERR) */
1608 desc->status = -EPROTO;
1609
1610 /* HC need not update length with this error */
1611 if (!(t & EHCI_ISOC_BABBLE))
1612 desc->actual_length = EHCI_ITD_LENGTH (t);
1613 } else if (likely ((t & EHCI_ISOC_ACTIVE) == 0)) {
1614 desc->status = 0;
1615 desc->actual_length = EHCI_ITD_LENGTH (t);
1616 }
1617 }
1618
1da177e4
LT		 1619 /* handle completion now? */
1620 if (likely ((urb_index + 1) != urb->number_of_packets))
30bf54e6 1621 goto done;
1da177e4
LT		 1622
1623 /* ASSERT: it's really the last itd for this urb
1624 list_for_each_entry (itd, &stream->td_list, itd_list)
1625 BUG_ON (itd->urb == urb);
1626 */
1627
aa16ca30 1628 /* give urb back to the driver; completion often (re)submits */
6a8e87b2 1629 dev = urb->dev;
14c04c0f 1630 ehci_urb_done(ehci, urb, 0);
30bf54e6 1631 retval = true;
1da177e4 1632 urb = NULL;
1da177e4 1633 ehci->periodic_sched--;
1da177e4
LT		 1634 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
1635
1636 if (unlikely (list_empty (&stream->td_list))) {
1637 ehci_to_hcd(ehci)->self.bandwidth_allocated
1638 -= stream->bandwidth;
1639 ehci_vdbg (ehci,
1640 "deschedule devp %s ep%d%s-iso\n",
1641 dev->devpath, stream->bEndpointAddress & 0x0f,
1642 (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out");
1643 }
1644 iso_stream_put (ehci, stream);
30bf54e6
DB		 1645 /* OK to recycle this ITD now that its completion callback ran. */
1646done:
1647 usb_put_urb(urb);
1648 itd->urb = NULL;
1649 itd->stream = NULL;
1650 list_move(&itd->itd_list, &stream->free_list);
1651 iso_stream_put(ehci, stream);
1da177e4 1652
30bf54e6 1653 return retval;
1da177e4
LT		 1654}
1655
1656/*-------------------------------------------------------------------------*/
1657
5db539e4 1658static int itd_submit (struct ehci_hcd *ehci, struct urb *urb,
55016f10 1659 gfp_t mem_flags)
1da177e4
LT		 1660{
1661 int status = -EINVAL;
1662 unsigned long flags;
1663 struct ehci_iso_stream *stream;
1664
1665 /* Get iso_stream head */
1666 stream = iso_stream_find (ehci, urb);
1667 if (unlikely (stream == NULL)) {
1668 ehci_dbg (ehci, "can't get iso stream\n");
1669 return -ENOMEM;
1670 }
1671 if (unlikely (urb->interval != stream->interval)) {
1672 ehci_dbg (ehci, "can't change iso interval %d --> %d\n",
1673 stream->interval, urb->interval);
1674 goto done;
1675 }
1676
1677#ifdef EHCI_URB_TRACE
1678 ehci_dbg (ehci,
1679 "%s %s urb %p ep%d%s len %d, %d pkts %d uframes [%p]\n",
441b62c1 1680 __func__, urb->dev->devpath, urb,
1da177e4
LT		 1681 usb_pipeendpoint (urb->pipe),
1682 usb_pipein (urb->pipe) ? "in" : "out",
1683 urb->transfer_buffer_length,
1684 urb->number_of_packets, urb->interval,
1685 stream);
1686#endif
1687
1688 /* allocate ITDs w/o locking anything */
1689 status = itd_urb_transaction (stream, ehci, urb, mem_flags);
1690 if (unlikely (status < 0)) {
1691 ehci_dbg (ehci, "can't init itds\n");
1692 goto done;
1693 }
1694
1695 /* schedule ... need to lock */
1696 spin_lock_irqsave (&ehci->lock, flags);
8de98402 1697 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
e9df41c5 1698 &ehci_to_hcd(ehci)->flags))) {
8de98402 1699 status = -ESHUTDOWN;
e9df41c5
AS		 1700 goto done_not_linked;
1701 }
1702 status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
1703 if (unlikely(status))
1704 goto done_not_linked;
1705 status = iso_stream_schedule(ehci, urb, stream);
53bd6a60 1706 if (likely (status == 0))
1da177e4 1707 itd_link_urb (ehci, urb, ehci->periodic_size << 3, stream);
e9df41c5
AS		 1708 else
1709 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
1710done_not_linked:
1da177e4
LT		 1711 spin_unlock_irqrestore (&ehci->lock, flags);
1712
1713done:
1714 if (unlikely (status < 0))
1715 iso_stream_put (ehci, stream);
1716 return status;
1717}
1718
1da177e4
LT		 1719/*-------------------------------------------------------------------------*/
1720
1721/*
1722 * "Split ISO TDs" ... used for USB 1.1 devices going through the
1723 * TTs in USB 2.0 hubs. These need microframe scheduling.
1724 */
1725
1726static inline void
6dbd682b
SR		 1727sitd_sched_init(
1728 struct ehci_hcd *ehci,
1da177e4
LT		 1729 struct ehci_iso_sched *iso_sched,
1730 struct ehci_iso_stream *stream,
1731 struct urb *urb
1732)
1733{
1734 unsigned i;
1735 dma_addr_t dma = urb->transfer_dma;
1736
1737 /* how many frames are needed for these transfers */
1738 iso_sched->span = urb->number_of_packets * stream->interval;
1739
1740 /* figure out per-frame sitd fields that we'll need later
1741 * when we fit new sitds into the schedule.
1742 */
1743 for (i = 0; i < urb->number_of_packets; i++) {
1744 struct ehci_iso_packet *packet = &iso_sched->packet [i];
1745 unsigned length;
1746 dma_addr_t buf;
1747 u32 trans;
1748
1749 length = urb->iso_frame_desc [i].length & 0x03ff;
1750 buf = dma + urb->iso_frame_desc [i].offset;
1751
1752 trans = SITD_STS_ACTIVE;
1753 if (((i + 1) == urb->number_of_packets)
1754 && !(urb->transfer_flags & URB_NO_INTERRUPT))
1755 trans |= SITD_IOC;
1756 trans |= length << 16;
6dbd682b 1757 packet->transaction = cpu_to_hc32(ehci, trans);
1da177e4
LT		 1758
1759 /* might need to cross a buffer page within a td */
1760 packet->bufp = buf;
1761 packet->buf1 = (buf + length) & ~0x0fff;
1762 if (packet->buf1 != (buf & ~(u64)0x0fff))
1763 packet->cross = 1;
1764
53bd6a60 1765 /* OUT uses multiple start-splits */
1da177e4
LT		 1766 if (stream->bEndpointAddress & USB_DIR_IN)
1767 continue;
1768 length = (length + 187) / 188;
1769 if (length > 1) /* BEGIN vs ALL */
1770 length |= 1 << 3;
1771 packet->buf1 |= length;
1772 }
1773}
1774
1775static int
1776sitd_urb_transaction (
1777 struct ehci_iso_stream *stream,
1778 struct ehci_hcd *ehci,
1779 struct urb *urb,
55016f10 1780 gfp_t mem_flags
1da177e4
LT		 1781)
1782{
1783 struct ehci_sitd *sitd;
1784 dma_addr_t sitd_dma;
1785 int i;
1786 struct ehci_iso_sched *iso_sched;
1787 unsigned long flags;
1788
1789 iso_sched = iso_sched_alloc (urb->number_of_packets, mem_flags);
1790 if (iso_sched == NULL)
1791 return -ENOMEM;
1792
6dbd682b 1793 sitd_sched_init(ehci, iso_sched, stream, urb);
1da177e4
LT		 1794
1795 /* allocate/init sITDs */
1796 spin_lock_irqsave (&ehci->lock, flags);
1797 for (i = 0; i < urb->number_of_packets; i++) {
1798
1799 /* NOTE: for now, we don't try to handle wraparound cases
1800 * for IN (using sitd->hw_backpointer, like a FSTN), which
1801 * means we never need two sitds for full speed packets.
1802 */
1803
1804 /* free_list.next might be cache-hot ... but maybe
1805 * the HC caches it too. avoid that issue for now.
1806 */
1807
1808 /* prefer previously-allocated sitds */
1809 if (!list_empty(&stream->free_list)) {
1810 sitd = list_entry (stream->free_list.prev,
1811 struct ehci_sitd, sitd_list);
1812 list_del (&sitd->sitd_list);
1813 sitd_dma = sitd->sitd_dma;
3d01f0fe 1814 } else {
1da177e4
LT		 1815 spin_unlock_irqrestore (&ehci->lock, flags);
1816 sitd = dma_pool_alloc (ehci->sitd_pool, mem_flags,
1817 &sitd_dma);
1818 spin_lock_irqsave (&ehci->lock, flags);
3d01f0fe
KW		 1819 if (!sitd) {
1820 iso_sched_free(stream, iso_sched);
1821 spin_unlock_irqrestore(&ehci->lock, flags);
1822 return -ENOMEM;
1823 }
1da177e4
LT		 1824 }
1825
1da177e4
LT		 1826 memset (sitd, 0, sizeof *sitd);
1827 sitd->sitd_dma = sitd_dma;
1828 list_add (&sitd->sitd_list, &iso_sched->td_list);
1829 }
1830
1831 /* temporarily store schedule info in hcpriv */
1832 urb->hcpriv = iso_sched;
1833 urb->error_count = 0;
1834
1835 spin_unlock_irqrestore (&ehci->lock, flags);
1836 return 0;
1837}
1838
1839/*-------------------------------------------------------------------------*/
1840
1841static inline void
6dbd682b
SR		 1842sitd_patch(
1843 struct ehci_hcd *ehci,
1da177e4
LT		 1844 struct ehci_iso_stream *stream,
1845 struct ehci_sitd *sitd,
1846 struct ehci_iso_sched *iso_sched,
1847 unsigned index
1848)
1849{
1850 struct ehci_iso_packet *uf = &iso_sched->packet [index];
1851 u64 bufp = uf->bufp;
1852
6dbd682b 1853 sitd->hw_next = EHCI_LIST_END(ehci);
1da177e4
LT		 1854 sitd->hw_fullspeed_ep = stream->address;
1855 sitd->hw_uframe = stream->splits;
1856 sitd->hw_results = uf->transaction;
6dbd682b 1857 sitd->hw_backpointer = EHCI_LIST_END(ehci);
1da177e4
LT		 1858
1859 bufp = uf->bufp;
6dbd682b
SR		 1860 sitd->hw_buf[0] = cpu_to_hc32(ehci, bufp);
1861 sitd->hw_buf_hi[0] = cpu_to_hc32(ehci, bufp >> 32);
1da177e4 1862
6dbd682b 1863 sitd->hw_buf[1] = cpu_to_hc32(ehci, uf->buf1);
1da177e4
LT		 1864 if (uf->cross)
1865 bufp += 4096;
6dbd682b 1866 sitd->hw_buf_hi[1] = cpu_to_hc32(ehci, bufp >> 32);
1da177e4
LT		 1867 sitd->index = index;
1868}
1869
1870static inline void
1871sitd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_sitd *sitd)
1872{
1873 /* note: sitd ordering could matter (CSPLIT then SSPLIT) */
1874 sitd->sitd_next = ehci->pshadow [frame];
1875 sitd->hw_next = ehci->periodic [frame];
1876 ehci->pshadow [frame].sitd = sitd;
1877 sitd->frame = frame;
1878 wmb ();
6dbd682b 1879 ehci->periodic[frame] = cpu_to_hc32(ehci, sitd->sitd_dma | Q_TYPE_SITD);
1da177e4
LT		 1880}
1881
1882/* fit urb's sitds into the selected schedule slot; activate as needed */
1883static int
1884sitd_link_urb (
1885 struct ehci_hcd *ehci,
1886 struct urb *urb,
1887 unsigned mod,
1888 struct ehci_iso_stream *stream
1889)
1890{
1891 int packet;
1892 unsigned next_uframe;
1893 struct ehci_iso_sched *sched = urb->hcpriv;
1894 struct ehci_sitd *sitd;
1895
1896 next_uframe = stream->next_uframe;
1897
1898 if (list_empty(&stream->td_list)) {
1899 /* usbfs ignores TT bandwidth */
1900 ehci_to_hcd(ehci)->self.bandwidth_allocated
1901 += stream->bandwidth;
1902 ehci_vdbg (ehci,
1903 "sched devp %s ep%d%s-iso [%d] %dms/%04x\n",
1904 urb->dev->devpath, stream->bEndpointAddress & 0x0f,
1905 (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out",
1906 (next_uframe >> 3) % ehci->periodic_size,
6dbd682b 1907 stream->interval, hc32_to_cpu(ehci, stream->splits));
1da177e4
LT		 1908 stream->start = jiffies;
1909 }
1910 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
1911
1912 /* fill sITDs frame by frame */
1913 for (packet = 0, sitd = NULL;
1914 packet < urb->number_of_packets;
1915 packet++) {
1916
1917 /* ASSERT: we have all necessary sitds */
1918 BUG_ON (list_empty (&sched->td_list));
1919
1920 /* ASSERT: no itds for this endpoint in this frame */
1921
1922 sitd = list_entry (sched->td_list.next,
1923 struct ehci_sitd, sitd_list);
1924 list_move_tail (&sitd->sitd_list, &stream->td_list);
1925 sitd->stream = iso_stream_get (stream);
1926 sitd->urb = usb_get_urb (urb);
1927
6dbd682b 1928 sitd_patch(ehci, stream, sitd, sched, packet);
1da177e4
LT		 1929 sitd_link (ehci, (next_uframe >> 3) % ehci->periodic_size,
1930 sitd);
1931
1932 next_uframe += stream->interval << 3;
1933 stream->depth += stream->interval << 3;
1934 }
1935 stream->next_uframe = next_uframe % mod;
1936
1937 /* don't need that schedule data any more */
1938 iso_sched_free (stream, sched);
1939 urb->hcpriv = NULL;
1940
1941 timer_action (ehci, TIMER_IO_WATCHDOG);
1942 if (!ehci->periodic_sched++)
1943 return enable_periodic (ehci);
1944 return 0;
1945}
1946
1947/*-------------------------------------------------------------------------*/
1948
1949#define SITD_ERRS (SITD_STS_ERR | SITD_STS_DBE | SITD_STS_BABBLE \
53bd6a60 1950 | SITD_STS_XACT | SITD_STS_MMF)
1da177e4 1951
30bf54e6
DB		 1952/* Process and recycle a completed SITD. Return true iff its urb completed,
1953 * and hence its completion callback probably added things to the hardware
1954 * schedule.
1955 *
1956 * Note that we carefully avoid recycling this descriptor until after any
1957 * completion callback runs, so that it won't be reused quickly. That is,
1958 * assuming (a) no more than two urbs per frame on this endpoint, and also
1959 * (b) only this endpoint's completions submit URBs. It seems some silicon
1960 * corrupts things if you reuse completed descriptors very quickly...
1961 */
1da177e4
LT		 1962static unsigned
1963sitd_complete (
1964 struct ehci_hcd *ehci,
7d12e780 1965 struct ehci_sitd *sitd
1da177e4
LT		 1966) {
1967 struct urb *urb = sitd->urb;
1968 struct usb_iso_packet_descriptor *desc;
1969 u32 t;
1970 int urb_index = -1;
1971 struct ehci_iso_stream *stream = sitd->stream;
1972 struct usb_device *dev;
30bf54e6 1973 unsigned retval = false;
1da177e4
LT		 1974
1975 urb_index = sitd->index;
1976 desc = &urb->iso_frame_desc [urb_index];
6dbd682b 1977 t = hc32_to_cpup(ehci, &sitd->hw_results);
1da177e4
LT		 1978
1979 /* report transfer status */
1980 if (t & SITD_ERRS) {
1981 urb->error_count++;
1982 if (t & SITD_STS_DBE)
1983 desc->status = usb_pipein (urb->pipe)
1984 ? -ENOSR /* hc couldn't read */
1985 : -ECOMM; /* hc couldn't write */
1986 else if (t & SITD_STS_BABBLE)
1987 desc->status = -EOVERFLOW;
1988 else /* XACT, MMF, etc */
1989 desc->status = -EPROTO;
1990 } else {
1991 desc->status = 0;
1992 desc->actual_length = desc->length - SITD_LENGTH (t);
1993 }
1da177e4 1994 stream->depth -= stream->interval << 3;
1da177e4
LT		 1995
1996 /* handle completion now? */
1997 if ((urb_index + 1) != urb->number_of_packets)
30bf54e6 1998 goto done;
1da177e4
LT		 1999
2000 /* ASSERT: it's really the last sitd for this urb
2001 list_for_each_entry (sitd, &stream->td_list, sitd_list)
2002 BUG_ON (sitd->urb == urb);
2003 */
2004
aa16ca30 2005 /* give urb back to the driver; completion often (re)submits */
6a8e87b2 2006 dev = urb->dev;
14c04c0f 2007 ehci_urb_done(ehci, urb, 0);
30bf54e6 2008 retval = true;
1da177e4 2009 urb = NULL;
1da177e4 2010 ehci->periodic_sched--;
1da177e4
LT		 2011 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
2012
2013 if (list_empty (&stream->td_list)) {
2014 ehci_to_hcd(ehci)->self.bandwidth_allocated
2015 -= stream->bandwidth;
2016 ehci_vdbg (ehci,
2017 "deschedule devp %s ep%d%s-iso\n",
2018 dev->devpath, stream->bEndpointAddress & 0x0f,
2019 (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out");
2020 }
2021 iso_stream_put (ehci, stream);
30bf54e6
DB		 2022 /* OK to recycle this SITD now that its completion callback ran. */
2023done:
2024 usb_put_urb(urb);
2025 sitd->urb = NULL;
2026 sitd->stream = NULL;
2027 list_move(&sitd->sitd_list, &stream->free_list);
2028 iso_stream_put(ehci, stream);
1da177e4 2029
30bf54e6 2030 return retval;
1da177e4
LT		 2031}
2032
2033
5db539e4 2034static int sitd_submit (struct ehci_hcd *ehci, struct urb *urb,
55016f10 2035 gfp_t mem_flags)
1da177e4
LT		 2036{
2037 int status = -EINVAL;
2038 unsigned long flags;
2039 struct ehci_iso_stream *stream;
2040
2041 /* Get iso_stream head */
2042 stream = iso_stream_find (ehci, urb);
2043 if (stream == NULL) {
2044 ehci_dbg (ehci, "can't get iso stream\n");
2045 return -ENOMEM;
2046 }
2047 if (urb->interval != stream->interval) {
2048 ehci_dbg (ehci, "can't change iso interval %d --> %d\n",
2049 stream->interval, urb->interval);
2050 goto done;
2051 }
2052
2053#ifdef EHCI_URB_TRACE
2054 ehci_dbg (ehci,
2055 "submit %p dev%s ep%d%s-iso len %d\n",
2056 urb, urb->dev->devpath,
2057 usb_pipeendpoint (urb->pipe),
2058 usb_pipein (urb->pipe) ? "in" : "out",
2059 urb->transfer_buffer_length);
2060#endif
2061
2062 /* allocate SITDs */
2063 status = sitd_urb_transaction (stream, ehci, urb, mem_flags);
2064 if (status < 0) {
2065 ehci_dbg (ehci, "can't init sitds\n");
2066 goto done;
2067 }
2068
2069 /* schedule ... need to lock */
2070 spin_lock_irqsave (&ehci->lock, flags);
8de98402 2071 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
e9df41c5 2072 &ehci_to_hcd(ehci)->flags))) {
8de98402 2073 status = -ESHUTDOWN;
e9df41c5
AS		 2074 goto done_not_linked;
2075 }
2076 status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
2077 if (unlikely(status))
2078 goto done_not_linked;
2079 status = iso_stream_schedule(ehci, urb, stream);
53bd6a60 2080 if (status == 0)
1da177e4 2081 sitd_link_urb (ehci, urb, ehci->periodic_size << 3, stream);
e9df41c5
AS		 2082 else
2083 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
2084done_not_linked:
1da177e4
LT		 2085 spin_unlock_irqrestore (&ehci->lock, flags);
2086
2087done:
2088 if (status < 0)
2089 iso_stream_put (ehci, stream);
2090 return status;
2091}
2092
1da177e4
LT		 2093/*-------------------------------------------------------------------------*/
2094
2095static void
7d12e780 2096scan_periodic (struct ehci_hcd *ehci)
1da177e4
LT		 2097{
2098 unsigned frame, clock, now_uframe, mod;
2099 unsigned modified;
2100
2101 mod = ehci->periodic_size << 3;
2102
2103 /*
2104 * When running, scan from last scan point up to "now"
2105 * else clean up by scanning everything that's left.
2106 * Touches as few pages as possible: cache-friendly.
2107 */
2108 now_uframe = ehci->next_uframe;
2109 if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
083522d7 2110 clock = ehci_readl(ehci, &ehci->regs->frame_index);
1da177e4
LT		 2111 else
2112 clock = now_uframe + mod - 1;
2113 clock %= mod;
2114
2115 for (;;) {
2116 union ehci_shadow q, *q_p;
6dbd682b 2117 __hc32 type, *hw_p;
79592b72 2118 unsigned incomplete = false;
1da177e4 2119
1da177e4 2120 frame = now_uframe >> 3;
1da177e4
LT		 2121
2122restart:
2123 /* scan each element in frame's queue for completions */
2124 q_p = &ehci->pshadow [frame];
2125 hw_p = &ehci->periodic [frame];
2126 q.ptr = q_p->ptr;
6dbd682b 2127 type = Q_NEXT_TYPE(ehci, *hw_p);
1da177e4
LT		 2128 modified = 0;
2129
2130 while (q.ptr != NULL) {
2131 unsigned uf;
2132 union ehci_shadow temp;
2133 int live;
2134
2135 live = HC_IS_RUNNING (ehci_to_hcd(ehci)->state);
6dbd682b 2136 switch (hc32_to_cpu(ehci, type)) {
1da177e4
LT		 2137 case Q_TYPE_QH:
2138 /* handle any completions */
2139 temp.qh = qh_get (q.qh);
6dbd682b 2140 type = Q_NEXT_TYPE(ehci, q.qh->hw_next);
1da177e4 2141 q = q.qh->qh_next;
7d12e780 2142 modified = qh_completions (ehci, temp.qh);
1da177e4
LT		 2143 if (unlikely (list_empty (&temp.qh->qtd_list)))
2144 intr_deschedule (ehci, temp.qh);
2145 qh_put (temp.qh);
2146 break;
2147 case Q_TYPE_FSTN:
2148 /* for "save place" FSTNs, look at QH entries
2149 * in the previous frame for completions.
2150 */
6dbd682b 2151 if (q.fstn->hw_prev != EHCI_LIST_END(ehci)) {
1da177e4
LT		 2152 dbg ("ignoring completions from FSTNs");
2153 }
6dbd682b 2154 type = Q_NEXT_TYPE(ehci, q.fstn->hw_next);
1da177e4
LT		 2155 q = q.fstn->fstn_next;
2156 break;
2157 case Q_TYPE_ITD:
79592b72
DB		 2158 /* If this ITD is still active, leave it for
2159 * later processing ... check the next entry.
2160 */
1da177e4 2161 rmb ();
79592b72 2162 for (uf = 0; uf < 8 && live; uf++) {
1da177e4 2163 if (0 == (q.itd->hw_transaction [uf]
6dbd682b 2164 & ITD_ACTIVE(ehci)))
1da177e4 2165 continue;
79592b72 2166 incomplete = true;
1da177e4
LT		 2167 q_p = &q.itd->itd_next;
2168 hw_p = &q.itd->hw_next;
6dbd682b
SR		 2169 type = Q_NEXT_TYPE(ehci,
2170 q.itd->hw_next);
1da177e4
LT		 2171 q = *q_p;
2172 break;
2173 }
79592b72 2174 if (uf < 8 && live)
1da177e4
LT		 2175 break;
2176
79592b72
DB		 2177 /* Take finished ITDs out of the schedule
2178 * and process them: recycle, maybe report
2179 * URB completion. HC won't cache the
1da177e4
LT		 2180 * pointer for much longer, if at all.
2181 */
2182 *q_p = q.itd->itd_next;
2183 *hw_p = q.itd->hw_next;
6dbd682b 2184 type = Q_NEXT_TYPE(ehci, q.itd->hw_next);
1da177e4 2185 wmb();
7d12e780 2186 modified = itd_complete (ehci, q.itd);
1da177e4
LT		 2187 q = *q_p;
2188 break;
2189 case Q_TYPE_SITD:
79592b72
DB		 2190 /* If this SITD is still active, leave it for
2191 * later processing ... check the next entry.
2192 */
6dbd682b 2193 if ((q.sitd->hw_results & SITD_ACTIVE(ehci))
1da177e4 2194 && live) {
79592b72 2195 incomplete = true;
1da177e4
LT		 2196 q_p = &q.sitd->sitd_next;
2197 hw_p = &q.sitd->hw_next;
6dbd682b
SR		 2198 type = Q_NEXT_TYPE(ehci,
2199 q.sitd->hw_next);
1da177e4
LT		 2200 q = *q_p;
2201 break;
2202 }
79592b72
DB		 2203
2204 /* Take finished SITDs out of the schedule
2205 * and process them: recycle, maybe report
2206 * URB completion.
2207 */
1da177e4
LT		 2208 *q_p = q.sitd->sitd_next;
2209 *hw_p = q.sitd->hw_next;
6dbd682b 2210 type = Q_NEXT_TYPE(ehci, q.sitd->hw_next);
1da177e4 2211 wmb();
7d12e780 2212 modified = sitd_complete (ehci, q.sitd);
1da177e4
LT		 2213 q = *q_p;
2214 break;
2215 default:
2216 dbg ("corrupt type %d frame %d shadow %p",
2217 type, frame, q.ptr);
2218 // BUG ();
2219 q.ptr = NULL;
2220 }
2221
2222 /* assume completion callbacks modify the queue */
aa16ca30
DB		 2223 if (unlikely (modified)) {
2224 if (likely(ehci->periodic_sched > 0))
2225 goto restart;
2226 /* maybe we can short-circuit this scan! */
2227 disable_periodic(ehci);
2228 now_uframe = clock;
2229 break;
2230 }
1da177e4
LT		 2231 }
2232
79592b72
DB		 2233 /* If we can tell we caught up to the hardware, stop now.
2234 * We can't advance our scan without collecting the ISO
2235 * transfers that are still pending in this frame.
2236 */
2237 if (incomplete && HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) {
2238 ehci->next_uframe = now_uframe;
2239 break;
2240 }
1da177e4
LT		 2241
2242 // FIXME: this assumes we won't get lapped when
2243 // latencies climb; that should be rare, but...
2244 // detect it, and just go all the way around.
2245 // FLR might help detect this case, so long as latencies
2246 // don't exceed periodic_size msec (default 1.024 sec).
2247
2248 // FIXME: likewise assumes HC doesn't halt mid-scan
2249
2250 if (now_uframe == clock) {
2251 unsigned now;
2252
aa16ca30
DB		 2253 if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state)
2254 || ehci->periodic_sched == 0)
1da177e4
LT		 2255 break;
2256 ehci->next_uframe = now_uframe;
083522d7 2257 now = ehci_readl(ehci, &ehci->regs->frame_index) % mod;
1da177e4
LT		 2258 if (now_uframe == now)
2259 break;
2260
2261 /* rescan the rest of this frame, then ... */
2262 clock = now;
2263 } else {
2264 now_uframe++;
2265 now_uframe %= mod;
2266 }
53bd6a60 2267 }
1da177e4 2268}
Linux 6.x block layer and io_uring tree(s)