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1da177e4 LT |
1 | /* |
2 | * Copyright (c) 2000-2004 by David Brownell | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms of the GNU General Public License as published by the | |
6 | * Free Software Foundation; either version 2 of the License, or (at your | |
7 | * option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, but | |
10 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
11 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 | * for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software Foundation, | |
16 | * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
17 | */ | |
18 | ||
19 | #include <linux/config.h> | |
1da177e4 LT |
20 | #include <linux/module.h> |
21 | #include <linux/pci.h> | |
22 | #include <linux/dmapool.h> | |
23 | #include <linux/kernel.h> | |
24 | #include <linux/delay.h> | |
25 | #include <linux/ioport.h> | |
26 | #include <linux/sched.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/smp_lock.h> | |
29 | #include <linux/errno.h> | |
30 | #include <linux/init.h> | |
31 | #include <linux/timer.h> | |
32 | #include <linux/list.h> | |
33 | #include <linux/interrupt.h> | |
34 | #include <linux/reboot.h> | |
35 | #include <linux/usb.h> | |
36 | #include <linux/moduleparam.h> | |
37 | #include <linux/dma-mapping.h> | |
38 | ||
39 | #include "../core/hcd.h" | |
40 | ||
41 | #include <asm/byteorder.h> | |
42 | #include <asm/io.h> | |
43 | #include <asm/irq.h> | |
44 | #include <asm/system.h> | |
45 | #include <asm/unaligned.h> | |
46 | ||
47 | ||
48 | /*-------------------------------------------------------------------------*/ | |
49 | ||
50 | /* | |
51 | * EHCI hc_driver implementation ... experimental, incomplete. | |
52 | * Based on the final 1.0 register interface specification. | |
53 | * | |
54 | * USB 2.0 shows up in upcoming www.pcmcia.org technology. | |
55 | * First was PCMCIA, like ISA; then CardBus, which is PCI. | |
56 | * Next comes "CardBay", using USB 2.0 signals. | |
57 | * | |
58 | * Contains additional contributions by Brad Hards, Rory Bolt, and others. | |
59 | * Special thanks to Intel and VIA for providing host controllers to | |
60 | * test this driver on, and Cypress (including In-System Design) for | |
61 | * providing early devices for those host controllers to talk to! | |
62 | * | |
63 | * HISTORY: | |
64 | * | |
65 | * 2004-05-10 Root hub and PCI suspend/resume support; remote wakeup. (db) | |
66 | * 2004-02-24 Replace pci_* with generic dma_* API calls (dsaxena@plexity.net) | |
67 | * 2003-12-29 Rewritten high speed iso transfer support (by Michal Sojka, | |
68 | * <sojkam@centrum.cz>, updates by DB). | |
69 | * | |
70 | * 2002-11-29 Correct handling for hw async_next register. | |
71 | * 2002-08-06 Handling for bulk and interrupt transfers is mostly shared; | |
72 | * only scheduling is different, no arbitrary limitations. | |
73 | * 2002-07-25 Sanity check PCI reads, mostly for better cardbus support, | |
74 | * clean up HC run state handshaking. | |
75 | * 2002-05-24 Preliminary FS/LS interrupts, using scheduling shortcuts | |
76 | * 2002-05-11 Clear TT errors for FS/LS ctrl/bulk. Fill in some other | |
77 | * missing pieces: enabling 64bit dma, handoff from BIOS/SMM. | |
78 | * 2002-05-07 Some error path cleanups to report better errors; wmb(); | |
79 | * use non-CVS version id; better iso bandwidth claim. | |
80 | * 2002-04-19 Control/bulk/interrupt submit no longer uses giveback() on | |
81 | * errors in submit path. Bugfixes to interrupt scheduling/processing. | |
82 | * 2002-03-05 Initial high-speed ISO support; reduce ITD memory; shift | |
83 | * more checking to generic hcd framework (db). Make it work with | |
84 | * Philips EHCI; reduce PCI traffic; shorten IRQ path (Rory Bolt). | |
85 | * 2002-01-14 Minor cleanup; version synch. | |
86 | * 2002-01-08 Fix roothub handoff of FS/LS to companion controllers. | |
87 | * 2002-01-04 Control/Bulk queuing behaves. | |
88 | * | |
89 | * 2001-12-12 Initial patch version for Linux 2.5.1 kernel. | |
90 | * 2001-June Works with usb-storage and NEC EHCI on 2.4 | |
91 | */ | |
92 | ||
93 | #define DRIVER_VERSION "10 Dec 2004" | |
94 | #define DRIVER_AUTHOR "David Brownell" | |
95 | #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver" | |
96 | ||
97 | static const char hcd_name [] = "ehci_hcd"; | |
98 | ||
99 | ||
100 | #undef EHCI_VERBOSE_DEBUG | |
101 | #undef EHCI_URB_TRACE | |
102 | ||
103 | #ifdef DEBUG | |
104 | #define EHCI_STATS | |
105 | #endif | |
106 | ||
107 | /* magic numbers that can affect system performance */ | |
108 | #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */ | |
109 | #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */ | |
110 | #define EHCI_TUNE_RL_TT 0 | |
111 | #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */ | |
112 | #define EHCI_TUNE_MULT_TT 1 | |
113 | #define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */ | |
114 | ||
115 | #define EHCI_IAA_JIFFIES (HZ/100) /* arbitrary; ~10 msec */ | |
116 | #define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */ | |
117 | #define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */ | |
118 | #define EHCI_SHRINK_JIFFIES (HZ/200) /* async qh unlink delay */ | |
119 | ||
120 | /* Initial IRQ latency: faster than hw default */ | |
121 | static int log2_irq_thresh = 0; // 0 to 6 | |
122 | module_param (log2_irq_thresh, int, S_IRUGO); | |
123 | MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes"); | |
124 | ||
125 | /* initial park setting: slower than hw default */ | |
126 | static unsigned park = 0; | |
127 | module_param (park, uint, S_IRUGO); | |
128 | MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets"); | |
129 | ||
130 | #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT) | |
131 | ||
132 | /*-------------------------------------------------------------------------*/ | |
133 | ||
134 | #include "ehci.h" | |
135 | #include "ehci-dbg.c" | |
136 | ||
137 | /*-------------------------------------------------------------------------*/ | |
138 | ||
139 | /* | |
140 | * handshake - spin reading hc until handshake completes or fails | |
141 | * @ptr: address of hc register to be read | |
142 | * @mask: bits to look at in result of read | |
143 | * @done: value of those bits when handshake succeeds | |
144 | * @usec: timeout in microseconds | |
145 | * | |
146 | * Returns negative errno, or zero on success | |
147 | * | |
148 | * Success happens when the "mask" bits have the specified value (hardware | |
149 | * handshake done). There are two failure modes: "usec" have passed (major | |
150 | * hardware flakeout), or the register reads as all-ones (hardware removed). | |
151 | * | |
152 | * That last failure should_only happen in cases like physical cardbus eject | |
153 | * before driver shutdown. But it also seems to be caused by bugs in cardbus | |
154 | * bridge shutdown: shutting down the bridge before the devices using it. | |
155 | */ | |
156 | static int handshake (void __iomem *ptr, u32 mask, u32 done, int usec) | |
157 | { | |
158 | u32 result; | |
159 | ||
160 | do { | |
161 | result = readl (ptr); | |
162 | if (result == ~(u32)0) /* card removed */ | |
163 | return -ENODEV; | |
164 | result &= mask; | |
165 | if (result == done) | |
166 | return 0; | |
167 | udelay (1); | |
168 | usec--; | |
169 | } while (usec > 0); | |
170 | return -ETIMEDOUT; | |
171 | } | |
172 | ||
173 | /* force HC to halt state from unknown (EHCI spec section 2.3) */ | |
174 | static int ehci_halt (struct ehci_hcd *ehci) | |
175 | { | |
176 | u32 temp = readl (&ehci->regs->status); | |
177 | ||
72f30b6f DB |
178 | /* disable any irqs left enabled by previous code */ |
179 | writel (0, &ehci->regs->intr_enable); | |
180 | ||
1da177e4 LT |
181 | if ((temp & STS_HALT) != 0) |
182 | return 0; | |
183 | ||
184 | temp = readl (&ehci->regs->command); | |
185 | temp &= ~CMD_RUN; | |
186 | writel (temp, &ehci->regs->command); | |
187 | return handshake (&ehci->regs->status, STS_HALT, STS_HALT, 16 * 125); | |
188 | } | |
189 | ||
190 | /* put TDI/ARC silicon into EHCI mode */ | |
191 | static void tdi_reset (struct ehci_hcd *ehci) | |
192 | { | |
193 | u32 __iomem *reg_ptr; | |
194 | u32 tmp; | |
195 | ||
196 | reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + 0x68); | |
197 | tmp = readl (reg_ptr); | |
198 | tmp |= 0x3; | |
199 | writel (tmp, reg_ptr); | |
200 | } | |
201 | ||
202 | /* reset a non-running (STS_HALT == 1) controller */ | |
203 | static int ehci_reset (struct ehci_hcd *ehci) | |
204 | { | |
205 | int retval; | |
206 | u32 command = readl (&ehci->regs->command); | |
207 | ||
208 | command |= CMD_RESET; | |
209 | dbg_cmd (ehci, "reset", command); | |
210 | writel (command, &ehci->regs->command); | |
211 | ehci_to_hcd(ehci)->state = HC_STATE_HALT; | |
212 | ehci->next_statechange = jiffies; | |
213 | retval = handshake (&ehci->regs->command, CMD_RESET, 0, 250 * 1000); | |
214 | ||
215 | if (retval) | |
216 | return retval; | |
217 | ||
218 | if (ehci_is_TDI(ehci)) | |
219 | tdi_reset (ehci); | |
220 | ||
221 | return retval; | |
222 | } | |
223 | ||
224 | /* idle the controller (from running) */ | |
225 | static void ehci_quiesce (struct ehci_hcd *ehci) | |
226 | { | |
227 | u32 temp; | |
228 | ||
229 | #ifdef DEBUG | |
230 | if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state)) | |
231 | BUG (); | |
232 | #endif | |
233 | ||
234 | /* wait for any schedule enables/disables to take effect */ | |
235 | temp = readl (&ehci->regs->command) << 10; | |
236 | temp &= STS_ASS | STS_PSS; | |
237 | if (handshake (&ehci->regs->status, STS_ASS | STS_PSS, | |
238 | temp, 16 * 125) != 0) { | |
239 | ehci_to_hcd(ehci)->state = HC_STATE_HALT; | |
240 | return; | |
241 | } | |
242 | ||
243 | /* then disable anything that's still active */ | |
244 | temp = readl (&ehci->regs->command); | |
245 | temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE); | |
246 | writel (temp, &ehci->regs->command); | |
247 | ||
248 | /* hardware can take 16 microframes to turn off ... */ | |
249 | if (handshake (&ehci->regs->status, STS_ASS | STS_PSS, | |
250 | 0, 16 * 125) != 0) { | |
251 | ehci_to_hcd(ehci)->state = HC_STATE_HALT; | |
252 | return; | |
253 | } | |
254 | } | |
255 | ||
256 | /*-------------------------------------------------------------------------*/ | |
257 | ||
258 | static void ehci_work(struct ehci_hcd *ehci, struct pt_regs *regs); | |
259 | ||
260 | #include "ehci-hub.c" | |
261 | #include "ehci-mem.c" | |
262 | #include "ehci-q.c" | |
263 | #include "ehci-sched.c" | |
264 | ||
265 | /*-------------------------------------------------------------------------*/ | |
266 | ||
267 | static void ehci_watchdog (unsigned long param) | |
268 | { | |
269 | struct ehci_hcd *ehci = (struct ehci_hcd *) param; | |
270 | unsigned long flags; | |
271 | ||
272 | spin_lock_irqsave (&ehci->lock, flags); | |
273 | ||
274 | /* lost IAA irqs wedge things badly; seen with a vt8235 */ | |
275 | if (ehci->reclaim) { | |
276 | u32 status = readl (&ehci->regs->status); | |
277 | ||
278 | if (status & STS_IAA) { | |
279 | ehci_vdbg (ehci, "lost IAA\n"); | |
280 | COUNT (ehci->stats.lost_iaa); | |
281 | writel (STS_IAA, &ehci->regs->status); | |
282 | ehci->reclaim_ready = 1; | |
283 | } | |
284 | } | |
285 | ||
286 | /* stop async processing after it's idled a bit */ | |
287 | if (test_bit (TIMER_ASYNC_OFF, &ehci->actions)) | |
288 | start_unlink_async (ehci, ehci->async); | |
289 | ||
290 | /* ehci could run by timer, without IRQs ... */ | |
291 | ehci_work (ehci, NULL); | |
292 | ||
293 | spin_unlock_irqrestore (&ehci->lock, flags); | |
294 | } | |
295 | ||
72f30b6f DB |
296 | /* Reboot notifiers kick in for silicon on any bus (not just pci, etc). |
297 | * This forcibly disables dma and IRQs, helping kexec and other cases | |
298 | * where the next system software may expect clean state. | |
299 | */ | |
1da177e4 LT |
300 | static int |
301 | ehci_reboot (struct notifier_block *self, unsigned long code, void *null) | |
302 | { | |
303 | struct ehci_hcd *ehci; | |
304 | ||
305 | ehci = container_of (self, struct ehci_hcd, reboot_notifier); | |
72f30b6f | 306 | (void) ehci_halt (ehci); |
1da177e4 LT |
307 | |
308 | /* make BIOS/etc use companion controller during reboot */ | |
309 | writel (0, &ehci->regs->configured_flag); | |
310 | return 0; | |
311 | } | |
312 | ||
56c1e26d DB |
313 | static void ehci_port_power (struct ehci_hcd *ehci, int is_on) |
314 | { | |
315 | unsigned port; | |
316 | ||
317 | if (!HCS_PPC (ehci->hcs_params)) | |
318 | return; | |
319 | ||
320 | ehci_dbg (ehci, "...power%s ports...\n", is_on ? "up" : "down"); | |
321 | for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; ) | |
322 | (void) ehci_hub_control(ehci_to_hcd(ehci), | |
323 | is_on ? SetPortFeature : ClearPortFeature, | |
324 | USB_PORT_FEAT_POWER, | |
325 | port--, NULL, 0); | |
326 | msleep(20); | |
327 | } | |
328 | ||
7ff71d6a | 329 | /*-------------------------------------------------------------------------*/ |
1da177e4 | 330 | |
7ff71d6a MP |
331 | /* |
332 | * ehci_work is called from some interrupts, timers, and so on. | |
333 | * it calls driver completion functions, after dropping ehci->lock. | |
334 | */ | |
335 | static void ehci_work (struct ehci_hcd *ehci, struct pt_regs *regs) | |
336 | { | |
337 | timer_action_done (ehci, TIMER_IO_WATCHDOG); | |
338 | if (ehci->reclaim_ready) | |
339 | end_unlink_async (ehci, regs); | |
340 | ||
341 | /* another CPU may drop ehci->lock during a schedule scan while | |
342 | * it reports urb completions. this flag guards against bogus | |
343 | * attempts at re-entrant schedule scanning. | |
344 | */ | |
345 | if (ehci->scanning) | |
346 | return; | |
347 | ehci->scanning = 1; | |
348 | scan_async (ehci, regs); | |
349 | if (ehci->next_uframe != -1) | |
350 | scan_periodic (ehci, regs); | |
351 | ehci->scanning = 0; | |
352 | ||
353 | /* the IO watchdog guards against hardware or driver bugs that | |
354 | * misplace IRQs, and should let us run completely without IRQs. | |
355 | * such lossage has been observed on both VT6202 and VT8235. | |
356 | */ | |
357 | if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) && | |
358 | (ehci->async->qh_next.ptr != NULL || | |
359 | ehci->periodic_sched != 0)) | |
360 | timer_action (ehci, TIMER_IO_WATCHDOG); | |
361 | } | |
1da177e4 | 362 | |
7ff71d6a | 363 | static void ehci_stop (struct usb_hcd *hcd) |
1da177e4 LT |
364 | { |
365 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
1da177e4 | 366 | |
7ff71d6a | 367 | ehci_dbg (ehci, "stop\n"); |
1da177e4 | 368 | |
7ff71d6a MP |
369 | /* Turn off port power on all root hub ports. */ |
370 | ehci_port_power (ehci, 0); | |
1da177e4 | 371 | |
7ff71d6a MP |
372 | /* no more interrupts ... */ |
373 | del_timer_sync (&ehci->watchdog); | |
56c1e26d | 374 | |
7ff71d6a MP |
375 | spin_lock_irq(&ehci->lock); |
376 | if (HC_IS_RUNNING (hcd->state)) | |
377 | ehci_quiesce (ehci); | |
1da177e4 | 378 | |
7ff71d6a MP |
379 | ehci_reset (ehci); |
380 | writel (0, &ehci->regs->intr_enable); | |
381 | spin_unlock_irq(&ehci->lock); | |
1da177e4 | 382 | |
7ff71d6a MP |
383 | /* let companion controllers work when we aren't */ |
384 | writel (0, &ehci->regs->configured_flag); | |
385 | unregister_reboot_notifier (&ehci->reboot_notifier); | |
56c1e26d | 386 | |
7ff71d6a | 387 | remove_debug_files (ehci); |
1da177e4 | 388 | |
7ff71d6a MP |
389 | /* root hub is shut down separately (first, when possible) */ |
390 | spin_lock_irq (&ehci->lock); | |
391 | if (ehci->async) | |
392 | ehci_work (ehci, NULL); | |
393 | spin_unlock_irq (&ehci->lock); | |
394 | ehci_mem_cleanup (ehci); | |
1da177e4 | 395 | |
7ff71d6a MP |
396 | #ifdef EHCI_STATS |
397 | ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n", | |
398 | ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim, | |
399 | ehci->stats.lost_iaa); | |
400 | ehci_dbg (ehci, "complete %ld unlink %ld\n", | |
401 | ehci->stats.complete, ehci->stats.unlink); | |
1da177e4 | 402 | #endif |
1da177e4 | 403 | |
7ff71d6a | 404 | dbg_status (ehci, "ehci_stop completed", readl (&ehci->regs->status)); |
1da177e4 LT |
405 | } |
406 | ||
18807521 DB |
407 | /* one-time init, only for memory state */ |
408 | static int ehci_init(struct usb_hcd *hcd) | |
1da177e4 | 409 | { |
18807521 | 410 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); |
1da177e4 | 411 | u32 temp; |
1da177e4 LT |
412 | int retval; |
413 | u32 hcc_params; | |
18807521 DB |
414 | |
415 | spin_lock_init(&ehci->lock); | |
416 | ||
417 | init_timer(&ehci->watchdog); | |
418 | ehci->watchdog.function = ehci_watchdog; | |
419 | ehci->watchdog.data = (unsigned long) ehci; | |
1da177e4 LT |
420 | |
421 | /* | |
422 | * hw default: 1K periodic list heads, one per frame. | |
423 | * periodic_size can shrink by USBCMD update if hcc_params allows. | |
424 | */ | |
425 | ehci->periodic_size = DEFAULT_I_TDPS; | |
18807521 | 426 | if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0) |
1da177e4 LT |
427 | return retval; |
428 | ||
429 | /* controllers may cache some of the periodic schedule ... */ | |
18807521 DB |
430 | hcc_params = readl(&ehci->caps->hcc_params); |
431 | if (HCC_ISOC_CACHE(hcc_params)) // full frame cache | |
1da177e4 LT |
432 | ehci->i_thresh = 8; |
433 | else // N microframes cached | |
18807521 | 434 | ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params); |
1da177e4 LT |
435 | |
436 | ehci->reclaim = NULL; | |
437 | ehci->reclaim_ready = 0; | |
438 | ehci->next_uframe = -1; | |
439 | ||
1da177e4 LT |
440 | /* |
441 | * dedicate a qh for the async ring head, since we couldn't unlink | |
442 | * a 'real' qh without stopping the async schedule [4.8]. use it | |
443 | * as the 'reclamation list head' too. | |
444 | * its dummy is used in hw_alt_next of many tds, to prevent the qh | |
445 | * from automatically advancing to the next td after short reads. | |
446 | */ | |
18807521 DB |
447 | ehci->async->qh_next.qh = NULL; |
448 | ehci->async->hw_next = QH_NEXT(ehci->async->qh_dma); | |
449 | ehci->async->hw_info1 = cpu_to_le32(QH_HEAD); | |
450 | ehci->async->hw_token = cpu_to_le32(QTD_STS_HALT); | |
451 | ehci->async->hw_qtd_next = EHCI_LIST_END; | |
452 | ehci->async->qh_state = QH_STATE_LINKED; | |
453 | ehci->async->hw_alt_next = QTD_NEXT(ehci->async->dummy->qtd_dma); | |
1da177e4 LT |
454 | |
455 | /* clear interrupt enables, set irq latency */ | |
456 | if (log2_irq_thresh < 0 || log2_irq_thresh > 6) | |
457 | log2_irq_thresh = 0; | |
458 | temp = 1 << (16 + log2_irq_thresh); | |
459 | if (HCC_CANPARK(hcc_params)) { | |
460 | /* HW default park == 3, on hardware that supports it (like | |
461 | * NVidia and ALI silicon), maximizes throughput on the async | |
462 | * schedule by avoiding QH fetches between transfers. | |
463 | * | |
464 | * With fast usb storage devices and NForce2, "park" seems to | |
465 | * make problems: throughput reduction (!), data errors... | |
466 | */ | |
467 | if (park) { | |
18807521 | 468 | park = min(park, (unsigned) 3); |
1da177e4 LT |
469 | temp |= CMD_PARK; |
470 | temp |= park << 8; | |
471 | } | |
18807521 | 472 | ehci_dbg(ehci, "park %d\n", park); |
1da177e4 | 473 | } |
18807521 | 474 | if (HCC_PGM_FRAMELISTLEN(hcc_params)) { |
1da177e4 LT |
475 | /* periodic schedule size can be smaller than default */ |
476 | temp &= ~(3 << 2); | |
477 | temp |= (EHCI_TUNE_FLS << 2); | |
478 | switch (EHCI_TUNE_FLS) { | |
479 | case 0: ehci->periodic_size = 1024; break; | |
480 | case 1: ehci->periodic_size = 512; break; | |
481 | case 2: ehci->periodic_size = 256; break; | |
18807521 | 482 | default: BUG(); |
1da177e4 LT |
483 | } |
484 | } | |
18807521 DB |
485 | ehci->command = temp; |
486 | ||
487 | ehci->reboot_notifier.notifier_call = ehci_reboot; | |
488 | register_reboot_notifier(&ehci->reboot_notifier); | |
489 | ||
490 | return 0; | |
491 | } | |
492 | ||
493 | /* start HC running; it's halted, ehci_init() has been run (once) */ | |
494 | static int ehci_run (struct usb_hcd *hcd) | |
495 | { | |
496 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
497 | int retval; | |
498 | u32 temp; | |
499 | u32 hcc_params; | |
500 | ||
501 | /* EHCI spec section 4.1 */ | |
502 | if ((retval = ehci_reset(ehci)) != 0) { | |
503 | unregister_reboot_notifier(&ehci->reboot_notifier); | |
504 | ehci_mem_cleanup(ehci); | |
505 | return retval; | |
506 | } | |
507 | writel(ehci->periodic_dma, &ehci->regs->frame_list); | |
508 | writel((u32)ehci->async->qh_dma, &ehci->regs->async_next); | |
509 | ||
510 | /* | |
511 | * hcc_params controls whether ehci->regs->segment must (!!!) | |
512 | * be used; it constrains QH/ITD/SITD and QTD locations. | |
513 | * pci_pool consistent memory always uses segment zero. | |
514 | * streaming mappings for I/O buffers, like pci_map_single(), | |
515 | * can return segments above 4GB, if the device allows. | |
516 | * | |
517 | * NOTE: the dma mask is visible through dma_supported(), so | |
518 | * drivers can pass this info along ... like NETIF_F_HIGHDMA, | |
519 | * Scsi_Host.highmem_io, and so forth. It's readonly to all | |
520 | * host side drivers though. | |
521 | */ | |
522 | hcc_params = readl(&ehci->caps->hcc_params); | |
523 | if (HCC_64BIT_ADDR(hcc_params)) { | |
524 | writel(0, &ehci->regs->segment); | |
525 | #if 0 | |
526 | // this is deeply broken on almost all architectures | |
527 | if (!dma_set_mask(hcd->self.controller, DMA_64BIT_MASK)) | |
528 | ehci_info(ehci, "enabled 64bit DMA\n"); | |
529 | #endif | |
530 | } | |
531 | ||
532 | ||
1da177e4 LT |
533 | // Philips, Intel, and maybe others need CMD_RUN before the |
534 | // root hub will detect new devices (why?); NEC doesn't | |
18807521 DB |
535 | ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET); |
536 | ehci->command |= CMD_RUN; | |
537 | writel (ehci->command, &ehci->regs->command); | |
538 | dbg_cmd (ehci, "init", ehci->command); | |
1da177e4 | 539 | |
1da177e4 LT |
540 | /* |
541 | * Start, enabling full USB 2.0 functionality ... usb 1.1 devices | |
542 | * are explicitly handed to companion controller(s), so no TT is | |
543 | * involved with the root hub. (Except where one is integrated, | |
544 | * and there's no companion controller unless maybe for USB OTG.) | |
545 | */ | |
1da177e4 LT |
546 | hcd->state = HC_STATE_RUNNING; |
547 | writel (FLAG_CF, &ehci->regs->configured_flag); | |
18807521 | 548 | readl (&ehci->regs->command); /* unblock posted writes */ |
1da177e4 LT |
549 | |
550 | temp = HC_VERSION(readl (&ehci->caps->hc_capbase)); | |
551 | ehci_info (ehci, | |
18807521 | 552 | "USB %x.%x started, EHCI %x.%02x, driver %s\n", |
7ff71d6a | 553 | ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f), |
1da177e4 LT |
554 | temp >> 8, temp & 0xff, DRIVER_VERSION); |
555 | ||
1da177e4 LT |
556 | writel (INTR_MASK, &ehci->regs->intr_enable); /* Turn On Interrupts */ |
557 | ||
18807521 DB |
558 | /* GRR this is run-once init(), being done every time the HC starts. |
559 | * So long as they're part of class devices, we can't do it init() | |
560 | * since the class device isn't created that early. | |
561 | */ | |
562 | create_debug_files(ehci); | |
1da177e4 LT |
563 | |
564 | return 0; | |
565 | } | |
566 | ||
1da177e4 LT |
567 | /*-------------------------------------------------------------------------*/ |
568 | ||
569 | static irqreturn_t ehci_irq (struct usb_hcd *hcd, struct pt_regs *regs) | |
570 | { | |
571 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
572 | u32 status; | |
573 | int bh; | |
574 | ||
575 | spin_lock (&ehci->lock); | |
576 | ||
577 | status = readl (&ehci->regs->status); | |
578 | ||
579 | /* e.g. cardbus physical eject */ | |
580 | if (status == ~(u32) 0) { | |
581 | ehci_dbg (ehci, "device removed\n"); | |
582 | goto dead; | |
583 | } | |
584 | ||
585 | status &= INTR_MASK; | |
586 | if (!status) { /* irq sharing? */ | |
587 | spin_unlock(&ehci->lock); | |
588 | return IRQ_NONE; | |
589 | } | |
590 | ||
591 | /* clear (just) interrupts */ | |
592 | writel (status, &ehci->regs->status); | |
593 | readl (&ehci->regs->command); /* unblock posted write */ | |
594 | bh = 0; | |
595 | ||
596 | #ifdef EHCI_VERBOSE_DEBUG | |
597 | /* unrequested/ignored: Frame List Rollover */ | |
598 | dbg_status (ehci, "irq", status); | |
599 | #endif | |
600 | ||
601 | /* INT, ERR, and IAA interrupt rates can be throttled */ | |
602 | ||
603 | /* normal [4.15.1.2] or error [4.15.1.1] completion */ | |
604 | if (likely ((status & (STS_INT|STS_ERR)) != 0)) { | |
605 | if (likely ((status & STS_ERR) == 0)) | |
606 | COUNT (ehci->stats.normal); | |
607 | else | |
608 | COUNT (ehci->stats.error); | |
609 | bh = 1; | |
610 | } | |
611 | ||
612 | /* complete the unlinking of some qh [4.15.2.3] */ | |
613 | if (status & STS_IAA) { | |
614 | COUNT (ehci->stats.reclaim); | |
615 | ehci->reclaim_ready = 1; | |
616 | bh = 1; | |
617 | } | |
618 | ||
619 | /* remote wakeup [4.3.1] */ | |
d97cc2f2 | 620 | if (status & STS_PCD) { |
1da177e4 LT |
621 | unsigned i = HCS_N_PORTS (ehci->hcs_params); |
622 | ||
623 | /* resume root hub? */ | |
624 | status = readl (&ehci->regs->command); | |
625 | if (!(status & CMD_RUN)) | |
626 | writel (status | CMD_RUN, &ehci->regs->command); | |
627 | ||
628 | while (i--) { | |
629 | status = readl (&ehci->regs->port_status [i]); | |
630 | if (status & PORT_OWNER) | |
631 | continue; | |
632 | if (!(status & PORT_RESUME) | |
633 | || ehci->reset_done [i] != 0) | |
634 | continue; | |
635 | ||
636 | /* start 20 msec resume signaling from this port, | |
637 | * and make khubd collect PORT_STAT_C_SUSPEND to | |
638 | * stop that signaling. | |
639 | */ | |
640 | ehci->reset_done [i] = jiffies + msecs_to_jiffies (20); | |
1da177e4 | 641 | ehci_dbg (ehci, "port %d remote wakeup\n", i + 1); |
f03c17fc | 642 | usb_hcd_resume_root_hub(hcd); |
1da177e4 LT |
643 | } |
644 | } | |
645 | ||
646 | /* PCI errors [4.15.2.4] */ | |
647 | if (unlikely ((status & STS_FATAL) != 0)) { | |
648 | /* bogus "fatal" IRQs appear on some chips... why? */ | |
649 | status = readl (&ehci->regs->status); | |
650 | dbg_cmd (ehci, "fatal", readl (&ehci->regs->command)); | |
651 | dbg_status (ehci, "fatal", status); | |
652 | if (status & STS_HALT) { | |
653 | ehci_err (ehci, "fatal error\n"); | |
654 | dead: | |
655 | ehci_reset (ehci); | |
656 | writel (0, &ehci->regs->configured_flag); | |
657 | /* generic layer kills/unlinks all urbs, then | |
658 | * uses ehci_stop to clean up the rest | |
659 | */ | |
660 | bh = 1; | |
661 | } | |
662 | } | |
663 | ||
664 | if (bh) | |
665 | ehci_work (ehci, regs); | |
666 | spin_unlock (&ehci->lock); | |
667 | return IRQ_HANDLED; | |
668 | } | |
669 | ||
670 | /*-------------------------------------------------------------------------*/ | |
671 | ||
672 | /* | |
673 | * non-error returns are a promise to giveback() the urb later | |
674 | * we drop ownership so next owner (or urb unlink) can get it | |
675 | * | |
676 | * urb + dev is in hcd.self.controller.urb_list | |
677 | * we're queueing TDs onto software and hardware lists | |
678 | * | |
679 | * hcd-specific init for hcpriv hasn't been done yet | |
680 | * | |
681 | * NOTE: control, bulk, and interrupt share the same code to append TDs | |
682 | * to a (possibly active) QH, and the same QH scanning code. | |
683 | */ | |
684 | static int ehci_urb_enqueue ( | |
685 | struct usb_hcd *hcd, | |
686 | struct usb_host_endpoint *ep, | |
687 | struct urb *urb, | |
55016f10 | 688 | gfp_t mem_flags |
1da177e4 LT |
689 | ) { |
690 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
691 | struct list_head qtd_list; | |
692 | ||
693 | INIT_LIST_HEAD (&qtd_list); | |
694 | ||
695 | switch (usb_pipetype (urb->pipe)) { | |
696 | // case PIPE_CONTROL: | |
697 | // case PIPE_BULK: | |
698 | default: | |
699 | if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags)) | |
700 | return -ENOMEM; | |
701 | return submit_async (ehci, ep, urb, &qtd_list, mem_flags); | |
702 | ||
703 | case PIPE_INTERRUPT: | |
704 | if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags)) | |
705 | return -ENOMEM; | |
706 | return intr_submit (ehci, ep, urb, &qtd_list, mem_flags); | |
707 | ||
708 | case PIPE_ISOCHRONOUS: | |
709 | if (urb->dev->speed == USB_SPEED_HIGH) | |
710 | return itd_submit (ehci, urb, mem_flags); | |
711 | else | |
712 | return sitd_submit (ehci, urb, mem_flags); | |
713 | } | |
714 | } | |
715 | ||
716 | static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh) | |
717 | { | |
718 | /* if we need to use IAA and it's busy, defer */ | |
719 | if (qh->qh_state == QH_STATE_LINKED | |
720 | && ehci->reclaim | |
721 | && HC_IS_RUNNING (ehci_to_hcd(ehci)->state)) { | |
722 | struct ehci_qh *last; | |
723 | ||
724 | for (last = ehci->reclaim; | |
725 | last->reclaim; | |
726 | last = last->reclaim) | |
727 | continue; | |
728 | qh->qh_state = QH_STATE_UNLINK_WAIT; | |
729 | last->reclaim = qh; | |
730 | ||
731 | /* bypass IAA if the hc can't care */ | |
732 | } else if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state) && ehci->reclaim) | |
733 | end_unlink_async (ehci, NULL); | |
734 | ||
735 | /* something else might have unlinked the qh by now */ | |
736 | if (qh->qh_state == QH_STATE_LINKED) | |
737 | start_unlink_async (ehci, qh); | |
738 | } | |
739 | ||
740 | /* remove from hardware lists | |
741 | * completions normally happen asynchronously | |
742 | */ | |
743 | ||
744 | static int ehci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb) | |
745 | { | |
746 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
747 | struct ehci_qh *qh; | |
748 | unsigned long flags; | |
749 | ||
750 | spin_lock_irqsave (&ehci->lock, flags); | |
751 | switch (usb_pipetype (urb->pipe)) { | |
752 | // case PIPE_CONTROL: | |
753 | // case PIPE_BULK: | |
754 | default: | |
755 | qh = (struct ehci_qh *) urb->hcpriv; | |
756 | if (!qh) | |
757 | break; | |
758 | unlink_async (ehci, qh); | |
759 | break; | |
760 | ||
761 | case PIPE_INTERRUPT: | |
762 | qh = (struct ehci_qh *) urb->hcpriv; | |
763 | if (!qh) | |
764 | break; | |
765 | switch (qh->qh_state) { | |
766 | case QH_STATE_LINKED: | |
767 | intr_deschedule (ehci, qh); | |
768 | /* FALL THROUGH */ | |
769 | case QH_STATE_IDLE: | |
770 | qh_completions (ehci, qh, NULL); | |
771 | break; | |
772 | default: | |
773 | ehci_dbg (ehci, "bogus qh %p state %d\n", | |
774 | qh, qh->qh_state); | |
775 | goto done; | |
776 | } | |
777 | ||
778 | /* reschedule QH iff another request is queued */ | |
779 | if (!list_empty (&qh->qtd_list) | |
780 | && HC_IS_RUNNING (hcd->state)) { | |
781 | int status; | |
782 | ||
783 | status = qh_schedule (ehci, qh); | |
784 | spin_unlock_irqrestore (&ehci->lock, flags); | |
785 | ||
786 | if (status != 0) { | |
787 | // shouldn't happen often, but ... | |
788 | // FIXME kill those tds' urbs | |
789 | err ("can't reschedule qh %p, err %d", | |
790 | qh, status); | |
791 | } | |
792 | return status; | |
793 | } | |
794 | break; | |
795 | ||
796 | case PIPE_ISOCHRONOUS: | |
797 | // itd or sitd ... | |
798 | ||
799 | // wait till next completion, do it then. | |
800 | // completion irqs can wait up to 1024 msec, | |
801 | break; | |
802 | } | |
803 | done: | |
804 | spin_unlock_irqrestore (&ehci->lock, flags); | |
805 | return 0; | |
806 | } | |
807 | ||
808 | /*-------------------------------------------------------------------------*/ | |
809 | ||
810 | // bulk qh holds the data toggle | |
811 | ||
812 | static void | |
813 | ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep) | |
814 | { | |
815 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
816 | unsigned long flags; | |
817 | struct ehci_qh *qh, *tmp; | |
818 | ||
819 | /* ASSERT: any requests/urbs are being unlinked */ | |
820 | /* ASSERT: nobody can be submitting urbs for this any more */ | |
821 | ||
822 | rescan: | |
823 | spin_lock_irqsave (&ehci->lock, flags); | |
824 | qh = ep->hcpriv; | |
825 | if (!qh) | |
826 | goto done; | |
827 | ||
828 | /* endpoints can be iso streams. for now, we don't | |
829 | * accelerate iso completions ... so spin a while. | |
830 | */ | |
831 | if (qh->hw_info1 == 0) { | |
832 | ehci_vdbg (ehci, "iso delay\n"); | |
833 | goto idle_timeout; | |
834 | } | |
835 | ||
836 | if (!HC_IS_RUNNING (hcd->state)) | |
837 | qh->qh_state = QH_STATE_IDLE; | |
838 | switch (qh->qh_state) { | |
839 | case QH_STATE_LINKED: | |
840 | for (tmp = ehci->async->qh_next.qh; | |
841 | tmp && tmp != qh; | |
842 | tmp = tmp->qh_next.qh) | |
843 | continue; | |
844 | /* periodic qh self-unlinks on empty */ | |
845 | if (!tmp) | |
846 | goto nogood; | |
847 | unlink_async (ehci, qh); | |
848 | /* FALL THROUGH */ | |
849 | case QH_STATE_UNLINK: /* wait for hw to finish? */ | |
850 | idle_timeout: | |
851 | spin_unlock_irqrestore (&ehci->lock, flags); | |
22c43863 | 852 | schedule_timeout_uninterruptible(1); |
1da177e4 LT |
853 | goto rescan; |
854 | case QH_STATE_IDLE: /* fully unlinked */ | |
855 | if (list_empty (&qh->qtd_list)) { | |
856 | qh_put (qh); | |
857 | break; | |
858 | } | |
859 | /* else FALL THROUGH */ | |
860 | default: | |
861 | nogood: | |
862 | /* caller was supposed to have unlinked any requests; | |
863 | * that's not our job. just leak this memory. | |
864 | */ | |
865 | ehci_err (ehci, "qh %p (#%02x) state %d%s\n", | |
866 | qh, ep->desc.bEndpointAddress, qh->qh_state, | |
867 | list_empty (&qh->qtd_list) ? "" : "(has tds)"); | |
868 | break; | |
869 | } | |
870 | ep->hcpriv = NULL; | |
871 | done: | |
872 | spin_unlock_irqrestore (&ehci->lock, flags); | |
873 | return; | |
874 | } | |
875 | ||
7ff71d6a MP |
876 | static int ehci_get_frame (struct usb_hcd *hcd) |
877 | { | |
878 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | |
879 | return (readl (&ehci->regs->frame_index) >> 3) % ehci->periodic_size; | |
880 | } | |
1da177e4 LT |
881 | |
882 | /*-------------------------------------------------------------------------*/ | |
883 | ||
1da177e4 LT |
884 | #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC |
885 | ||
886 | MODULE_DESCRIPTION (DRIVER_INFO); | |
887 | MODULE_AUTHOR (DRIVER_AUTHOR); | |
888 | MODULE_LICENSE ("GPL"); | |
889 | ||
7ff71d6a MP |
890 | #ifdef CONFIG_PCI |
891 | #include "ehci-pci.c" | |
76fa9a24 | 892 | #define EHCI_BUS_GLUED |
7ff71d6a | 893 | #endif |
1da177e4 | 894 | |
80cb9aee RV |
895 | #ifdef CONFIG_PPC_83xx |
896 | #include "ehci-fsl.c" | |
76fa9a24 | 897 | #define EHCI_BUS_GLUED |
80cb9aee RV |
898 | #endif |
899 | ||
76fa9a24 JC |
900 | #ifdef CONFIG_SOC_AU1X00 |
901 | #include "ehci-au1xxx.c" | |
902 | #define EHCI_BUS_GLUED | |
903 | #endif | |
904 | ||
905 | #ifndef EHCI_BUS_GLUED | |
7ff71d6a MP |
906 | #error "missing bus glue for ehci-hcd" |
907 | #endif |