Commit | Line | Data |
---|---|---|
5fd54ace | 1 | // SPDX-License-Identifier: GPL-2.0+ |
1da177e4 LT |
2 | /* |
3 | * Driver for the PLX NET2280 USB device controller. | |
4 | * Specs and errata are available from <http://www.plxtech.com>. | |
5 | * | |
901b3d75 | 6 | * PLX Technology Inc. (formerly NetChip Technology) supported the |
1da177e4 LT |
7 | * development of this driver. |
8 | * | |
9 | * | |
10 | * CODE STATUS HIGHLIGHTS | |
11 | * | |
12 | * This driver should work well with most "gadget" drivers, including | |
fa06920a | 13 | * the Mass Storage, Serial, and Ethernet/RNDIS gadget drivers |
1da177e4 LT |
14 | * as well as Gadget Zero and Gadgetfs. |
15 | * | |
90664198 | 16 | * DMA is enabled by default. |
1da177e4 | 17 | * |
adc82f77 RRD |
18 | * MSI is enabled by default. The legacy IRQ is used if MSI couldn't |
19 | * be enabled. | |
20 | * | |
1da177e4 LT |
21 | * Note that almost all the errata workarounds here are only needed for |
22 | * rev1 chips. Rev1a silicon (0110) fixes almost all of them. | |
23 | */ | |
24 | ||
25 | /* | |
26 | * Copyright (C) 2003 David Brownell | |
27 | * Copyright (C) 2003-2005 PLX Technology, Inc. | |
adc82f77 | 28 | * Copyright (C) 2014 Ricardo Ribalda - Qtechnology/AS |
1da177e4 | 29 | * |
901b3d75 DB |
30 | * Modified Seth Levy 2005 PLX Technology, Inc. to provide compatibility |
31 | * with 2282 chip | |
950ee4c8 | 32 | * |
adc82f77 RRD |
33 | * Modified Ricardo Ribalda Qtechnology AS to provide compatibility |
34 | * with usb 338x chip. Based on PLX driver | |
1da177e4 LT |
35 | */ |
36 | ||
1da177e4 LT |
37 | #include <linux/module.h> |
38 | #include <linux/pci.h> | |
682d4c80 | 39 | #include <linux/dma-mapping.h> |
1da177e4 LT |
40 | #include <linux/kernel.h> |
41 | #include <linux/delay.h> | |
42 | #include <linux/ioport.h> | |
1da177e4 | 43 | #include <linux/slab.h> |
1da177e4 LT |
44 | #include <linux/errno.h> |
45 | #include <linux/init.h> | |
46 | #include <linux/timer.h> | |
47 | #include <linux/list.h> | |
48 | #include <linux/interrupt.h> | |
49 | #include <linux/moduleparam.h> | |
50 | #include <linux/device.h> | |
5f848137 | 51 | #include <linux/usb/ch9.h> |
9454a57a | 52 | #include <linux/usb/gadget.h> |
b38b03b3 | 53 | #include <linux/prefetch.h> |
fae3c158 | 54 | #include <linux/io.h> |
805ca9c2 | 55 | #include <linux/iopoll.h> |
1da177e4 LT |
56 | |
57 | #include <asm/byteorder.h> | |
1da177e4 | 58 | #include <asm/irq.h> |
1da177e4 LT |
59 | #include <asm/unaligned.h> |
60 | ||
adc82f77 RRD |
61 | #define DRIVER_DESC "PLX NET228x/USB338x USB Peripheral Controller" |
62 | #define DRIVER_VERSION "2005 Sept 27/v3.0" | |
1da177e4 | 63 | |
1da177e4 LT |
64 | #define EP_DONTUSE 13 /* nonzero */ |
65 | ||
66 | #define USE_RDK_LEDS /* GPIO pins control three LEDs */ | |
67 | ||
68 | ||
fae3c158 RRD |
69 | static const char driver_name[] = "net2280"; |
70 | static const char driver_desc[] = DRIVER_DESC; | |
1da177e4 | 71 | |
adc82f77 | 72 | static const u32 ep_bit[9] = { 0, 17, 2, 19, 4, 1, 18, 3, 20 }; |
fae3c158 | 73 | static const char ep0name[] = "ep0"; |
1da177e4 | 74 | |
c23c3c3c RB |
75 | #define EP_INFO(_name, _caps) \ |
76 | { \ | |
77 | .name = _name, \ | |
78 | .caps = _caps, \ | |
79 | } | |
80 | ||
81 | static const struct { | |
82 | const char *name; | |
83 | const struct usb_ep_caps caps; | |
84 | } ep_info_dft[] = { /* Default endpoint configuration */ | |
85 | EP_INFO(ep0name, | |
86 | USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)), | |
87 | EP_INFO("ep-a", | |
88 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)), | |
89 | EP_INFO("ep-b", | |
90 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)), | |
91 | EP_INFO("ep-c", | |
92 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)), | |
93 | EP_INFO("ep-d", | |
94 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)), | |
95 | EP_INFO("ep-e", | |
96 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)), | |
97 | EP_INFO("ep-f", | |
98 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)), | |
99 | EP_INFO("ep-g", | |
100 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)), | |
101 | EP_INFO("ep-h", | |
102 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)), | |
103 | }, ep_info_adv[] = { /* Endpoints for usb3380 advance mode */ | |
104 | EP_INFO(ep0name, | |
105 | USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)), | |
106 | EP_INFO("ep1in", | |
107 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)), | |
108 | EP_INFO("ep2out", | |
109 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)), | |
110 | EP_INFO("ep3in", | |
111 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)), | |
112 | EP_INFO("ep4out", | |
113 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)), | |
114 | EP_INFO("ep1out", | |
115 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)), | |
116 | EP_INFO("ep2in", | |
117 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)), | |
118 | EP_INFO("ep3out", | |
119 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)), | |
120 | EP_INFO("ep4in", | |
121 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)), | |
a285f40d MYK |
122 | }; |
123 | ||
c23c3c3c RB |
124 | #undef EP_INFO |
125 | ||
1da177e4 LT |
126 | /* mode 0 == ep-{a,b,c,d} 1K fifo each |
127 | * mode 1 == ep-{a,b} 2K fifo each, ep-{c,d} unavailable | |
128 | * mode 2 == ep-a 2K fifo, ep-{b,c} 1K each, ep-d unavailable | |
129 | */ | |
fae3c158 | 130 | static ushort fifo_mode; |
1da177e4 LT |
131 | |
132 | /* "modprobe net2280 fifo_mode=1" etc */ | |
ae8e530a | 133 | module_param(fifo_mode, ushort, 0644); |
1da177e4 LT |
134 | |
135 | /* enable_suspend -- When enabled, the driver will respond to | |
136 | * USB suspend requests by powering down the NET2280. Otherwise, | |
25985edc | 137 | * USB suspend requests will be ignored. This is acceptable for |
950ee4c8 | 138 | * self-powered devices |
1da177e4 | 139 | */ |
00d4db0e | 140 | static bool enable_suspend; |
1da177e4 LT |
141 | |
142 | /* "modprobe net2280 enable_suspend=1" etc */ | |
ae8e530a | 143 | module_param(enable_suspend, bool, 0444); |
1da177e4 | 144 | |
1da177e4 LT |
145 | #define DIR_STRING(bAddress) (((bAddress) & USB_DIR_IN) ? "in" : "out") |
146 | ||
fae3c158 | 147 | static char *type_string(u8 bmAttributes) |
1da177e4 LT |
148 | { |
149 | switch ((bmAttributes) & USB_ENDPOINT_XFERTYPE_MASK) { | |
150 | case USB_ENDPOINT_XFER_BULK: return "bulk"; | |
151 | case USB_ENDPOINT_XFER_ISOC: return "iso"; | |
152 | case USB_ENDPOINT_XFER_INT: return "intr"; | |
2b84f92b | 153 | } |
1da177e4 LT |
154 | return "control"; |
155 | } | |
1da177e4 LT |
156 | |
157 | #include "net2280.h" | |
158 | ||
3e76fdcb RRD |
159 | #define valid_bit cpu_to_le32(BIT(VALID_BIT)) |
160 | #define dma_done_ie cpu_to_le32(BIT(DMA_DONE_INTERRUPT_ENABLE)) | |
1da177e4 | 161 | |
e6ac4bb0 | 162 | static void ep_clear_seqnum(struct net2280_ep *ep); |
11bece5e MYK |
163 | static void stop_activity(struct net2280 *dev, |
164 | struct usb_gadget_driver *driver); | |
165 | static void ep0_start(struct net2280 *dev); | |
e6ac4bb0 | 166 | |
1da177e4 | 167 | /*-------------------------------------------------------------------------*/ |
adc82f77 RRD |
168 | static inline void enable_pciirqenb(struct net2280_ep *ep) |
169 | { | |
170 | u32 tmp = readl(&ep->dev->regs->pciirqenb0); | |
171 | ||
2eeb0016 | 172 | if (ep->dev->quirks & PLX_LEGACY) |
3e76fdcb | 173 | tmp |= BIT(ep->num); |
adc82f77 | 174 | else |
3e76fdcb | 175 | tmp |= BIT(ep_bit[ep->num]); |
adc82f77 RRD |
176 | writel(tmp, &ep->dev->regs->pciirqenb0); |
177 | ||
178 | return; | |
179 | } | |
1da177e4 LT |
180 | |
181 | static int | |
fae3c158 | 182 | net2280_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc) |
1da177e4 LT |
183 | { |
184 | struct net2280 *dev; | |
185 | struct net2280_ep *ep; | |
c65c4f05 MYK |
186 | u32 max; |
187 | u32 tmp = 0; | |
188 | u32 type; | |
1da177e4 | 189 | unsigned long flags; |
adc82f77 | 190 | static const u32 ep_key[9] = { 1, 0, 1, 0, 1, 1, 0, 1, 0 }; |
9ceafcc2 | 191 | int ret = 0; |
1da177e4 | 192 | |
fae3c158 | 193 | ep = container_of(_ep, struct net2280_ep, ep); |
ae8e530a | 194 | if (!_ep || !desc || ep->desc || _ep->name == ep0name || |
9ceafcc2 MYK |
195 | desc->bDescriptorType != USB_DT_ENDPOINT) { |
196 | pr_err("%s: failed at line=%d\n", __func__, __LINE__); | |
1da177e4 | 197 | return -EINVAL; |
9ceafcc2 | 198 | } |
1da177e4 | 199 | dev = ep->dev; |
9ceafcc2 MYK |
200 | if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) { |
201 | ret = -ESHUTDOWN; | |
202 | goto print_err; | |
203 | } | |
1da177e4 LT |
204 | |
205 | /* erratum 0119 workaround ties up an endpoint number */ | |
9ceafcc2 MYK |
206 | if ((desc->bEndpointAddress & 0x0f) == EP_DONTUSE) { |
207 | ret = -EDOM; | |
208 | goto print_err; | |
209 | } | |
1da177e4 | 210 | |
5185c913 | 211 | if (dev->quirks & PLX_PCIE) { |
9ceafcc2 MYK |
212 | if ((desc->bEndpointAddress & 0x0f) >= 0x0c) { |
213 | ret = -EDOM; | |
214 | goto print_err; | |
215 | } | |
adc82f77 | 216 | ep->is_in = !!usb_endpoint_dir_in(desc); |
9ceafcc2 MYK |
217 | if (dev->enhanced_mode && ep->is_in && ep_key[ep->num]) { |
218 | ret = -EINVAL; | |
219 | goto print_err; | |
220 | } | |
adc82f77 RRD |
221 | } |
222 | ||
1da177e4 | 223 | /* sanity check ep-e/ep-f since their fifos are small */ |
090bdb5c | 224 | max = usb_endpoint_maxp(desc); |
9ceafcc2 MYK |
225 | if (ep->num > 4 && max > 64 && (dev->quirks & PLX_LEGACY)) { |
226 | ret = -ERANGE; | |
227 | goto print_err; | |
228 | } | |
1da177e4 | 229 | |
fae3c158 | 230 | spin_lock_irqsave(&dev->lock, flags); |
090bdb5c | 231 | _ep->maxpacket = max; |
1da177e4 LT |
232 | ep->desc = desc; |
233 | ||
234 | /* ep_reset() has already been called */ | |
235 | ep->stopped = 0; | |
8066134f | 236 | ep->wedged = 0; |
1da177e4 LT |
237 | ep->out_overflow = 0; |
238 | ||
239 | /* set speed-dependent max packet; may kick in high bandwidth */ | |
adc82f77 | 240 | set_max_speed(ep, max); |
1da177e4 | 241 | |
1da177e4 | 242 | /* set type, direction, address; reset fifo counters */ |
3e76fdcb | 243 | writel(BIT(FIFO_FLUSH), &ep->regs->ep_stat); |
c65c4f05 | 244 | |
5185c913 | 245 | if ((dev->quirks & PLX_PCIE) && dev->enhanced_mode) { |
c65c4f05 MYK |
246 | tmp = readl(&ep->cfg->ep_cfg); |
247 | /* If USB ep number doesn't match hardware ep number */ | |
248 | if ((tmp & 0xf) != usb_endpoint_num(desc)) { | |
249 | ret = -EINVAL; | |
250 | spin_unlock_irqrestore(&dev->lock, flags); | |
251 | goto print_err; | |
252 | } | |
253 | if (ep->is_in) | |
254 | tmp &= ~USB3380_EP_CFG_MASK_IN; | |
255 | else | |
256 | tmp &= ~USB3380_EP_CFG_MASK_OUT; | |
257 | } | |
258 | type = (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK); | |
259 | if (type == USB_ENDPOINT_XFER_INT) { | |
1da177e4 | 260 | /* erratum 0105 workaround prevents hs NYET */ |
ae8e530a RRD |
261 | if (dev->chiprev == 0100 && |
262 | dev->gadget.speed == USB_SPEED_HIGH && | |
263 | !(desc->bEndpointAddress & USB_DIR_IN)) | |
3e76fdcb | 264 | writel(BIT(CLEAR_NAK_OUT_PACKETS_MODE), |
1da177e4 | 265 | &ep->regs->ep_rsp); |
c65c4f05 | 266 | } else if (type == USB_ENDPOINT_XFER_BULK) { |
1da177e4 | 267 | /* catch some particularly blatant driver bugs */ |
adc82f77 RRD |
268 | if ((dev->gadget.speed == USB_SPEED_SUPER && max != 1024) || |
269 | (dev->gadget.speed == USB_SPEED_HIGH && max != 512) || | |
270 | (dev->gadget.speed == USB_SPEED_FULL && max > 64)) { | |
271 | spin_unlock_irqrestore(&dev->lock, flags); | |
9ceafcc2 MYK |
272 | ret = -ERANGE; |
273 | goto print_err; | |
1da177e4 LT |
274 | } |
275 | } | |
c65c4f05 | 276 | ep->is_iso = (type == USB_ENDPOINT_XFER_ISOC); |
adc82f77 | 277 | /* Enable this endpoint */ |
2eeb0016 | 278 | if (dev->quirks & PLX_LEGACY) { |
c65c4f05 | 279 | tmp |= type << ENDPOINT_TYPE; |
adc82f77 RRD |
280 | tmp |= desc->bEndpointAddress; |
281 | /* default full fifo lines */ | |
282 | tmp |= (4 << ENDPOINT_BYTE_COUNT); | |
3e76fdcb | 283 | tmp |= BIT(ENDPOINT_ENABLE); |
adc82f77 RRD |
284 | ep->is_in = (tmp & USB_DIR_IN) != 0; |
285 | } else { | |
286 | /* In Legacy mode, only OUT endpoints are used */ | |
287 | if (dev->enhanced_mode && ep->is_in) { | |
c65c4f05 | 288 | tmp |= type << IN_ENDPOINT_TYPE; |
3e76fdcb | 289 | tmp |= BIT(IN_ENDPOINT_ENABLE); |
adc82f77 | 290 | } else { |
c65c4f05 | 291 | tmp |= type << OUT_ENDPOINT_TYPE; |
3e76fdcb | 292 | tmp |= BIT(OUT_ENDPOINT_ENABLE); |
adc82f77 RRD |
293 | tmp |= (ep->is_in << ENDPOINT_DIRECTION); |
294 | } | |
295 | ||
463e104f | 296 | tmp |= (4 << ENDPOINT_BYTE_COUNT); |
c65c4f05 MYK |
297 | if (!dev->enhanced_mode) |
298 | tmp |= usb_endpoint_num(desc); | |
adc82f77 RRD |
299 | tmp |= (ep->ep.maxburst << MAX_BURST_SIZE); |
300 | } | |
301 | ||
302 | /* Make sure all the registers are written before ep_rsp*/ | |
303 | wmb(); | |
1da177e4 LT |
304 | |
305 | /* for OUT transfers, block the rx fifo until a read is posted */ | |
1da177e4 | 306 | if (!ep->is_in) |
3e76fdcb | 307 | writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp); |
2eeb0016 | 308 | else if (!(dev->quirks & PLX_2280)) { |
901b3d75 DB |
309 | /* Added for 2282, Don't use nak packets on an in endpoint, |
310 | * this was ignored on 2280 | |
311 | */ | |
3e76fdcb RRD |
312 | writel(BIT(CLEAR_NAK_OUT_PACKETS) | |
313 | BIT(CLEAR_NAK_OUT_PACKETS_MODE), &ep->regs->ep_rsp); | |
950ee4c8 | 314 | } |
1da177e4 | 315 | |
5185c913 | 316 | if (dev->quirks & PLX_PCIE) |
e6ac4bb0 | 317 | ep_clear_seqnum(ep); |
adc82f77 | 318 | writel(tmp, &ep->cfg->ep_cfg); |
1da177e4 LT |
319 | |
320 | /* enable irqs */ | |
321 | if (!ep->dma) { /* pio, per-packet */ | |
adc82f77 | 322 | enable_pciirqenb(ep); |
1da177e4 | 323 | |
3e76fdcb RRD |
324 | tmp = BIT(DATA_PACKET_RECEIVED_INTERRUPT_ENABLE) | |
325 | BIT(DATA_PACKET_TRANSMITTED_INTERRUPT_ENABLE); | |
2eeb0016 | 326 | if (dev->quirks & PLX_2280) |
fae3c158 RRD |
327 | tmp |= readl(&ep->regs->ep_irqenb); |
328 | writel(tmp, &ep->regs->ep_irqenb); | |
1da177e4 | 329 | } else { /* dma, per-request */ |
3e76fdcb | 330 | tmp = BIT((8 + ep->num)); /* completion */ |
fae3c158 RRD |
331 | tmp |= readl(&dev->regs->pciirqenb1); |
332 | writel(tmp, &dev->regs->pciirqenb1); | |
1da177e4 LT |
333 | |
334 | /* for short OUT transfers, dma completions can't | |
335 | * advance the queue; do it pio-style, by hand. | |
336 | * NOTE erratum 0112 workaround #2 | |
337 | */ | |
338 | if ((desc->bEndpointAddress & USB_DIR_IN) == 0) { | |
3e76fdcb | 339 | tmp = BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT_ENABLE); |
fae3c158 | 340 | writel(tmp, &ep->regs->ep_irqenb); |
1da177e4 | 341 | |
adc82f77 | 342 | enable_pciirqenb(ep); |
1da177e4 LT |
343 | } |
344 | } | |
345 | ||
346 | tmp = desc->bEndpointAddress; | |
e56e69cc | 347 | ep_dbg(dev, "enabled %s (ep%d%s-%s) %s max %04x\n", |
fae3c158 RRD |
348 | _ep->name, tmp & 0x0f, DIR_STRING(tmp), |
349 | type_string(desc->bmAttributes), | |
1da177e4 LT |
350 | ep->dma ? "dma" : "pio", max); |
351 | ||
352 | /* pci writes may still be posted */ | |
fae3c158 | 353 | spin_unlock_irqrestore(&dev->lock, flags); |
9ceafcc2 MYK |
354 | return ret; |
355 | ||
356 | print_err: | |
357 | dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, ret); | |
358 | return ret; | |
1da177e4 LT |
359 | } |
360 | ||
fae3c158 | 361 | static int handshake(u32 __iomem *ptr, u32 mask, u32 done, int usec) |
1da177e4 LT |
362 | { |
363 | u32 result; | |
805ca9c2 | 364 | int ret; |
1da177e4 | 365 | |
805ca9c2 CY |
366 | ret = readl_poll_timeout_atomic(ptr, result, |
367 | ((result & mask) == done || | |
368 | result == U32_MAX), | |
369 | 1, usec); | |
370 | if (result == U32_MAX) /* device unplugged */ | |
371 | return -ENODEV; | |
372 | ||
373 | return ret; | |
1da177e4 LT |
374 | } |
375 | ||
901b3d75 | 376 | static const struct usb_ep_ops net2280_ep_ops; |
1da177e4 | 377 | |
adc82f77 RRD |
378 | static void ep_reset_228x(struct net2280_regs __iomem *regs, |
379 | struct net2280_ep *ep) | |
1da177e4 LT |
380 | { |
381 | u32 tmp; | |
382 | ||
383 | ep->desc = NULL; | |
fae3c158 | 384 | INIT_LIST_HEAD(&ep->queue); |
1da177e4 | 385 | |
e117e742 | 386 | usb_ep_set_maxpacket_limit(&ep->ep, ~0); |
1da177e4 LT |
387 | ep->ep.ops = &net2280_ep_ops; |
388 | ||
389 | /* disable the dma, irqs, endpoint... */ | |
390 | if (ep->dma) { | |
fae3c158 | 391 | writel(0, &ep->dma->dmactl); |
3e76fdcb RRD |
392 | writel(BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) | |
393 | BIT(DMA_TRANSACTION_DONE_INTERRUPT) | | |
394 | BIT(DMA_ABORT), | |
395 | &ep->dma->dmastat); | |
1da177e4 | 396 | |
fae3c158 | 397 | tmp = readl(®s->pciirqenb0); |
3e76fdcb | 398 | tmp &= ~BIT(ep->num); |
fae3c158 | 399 | writel(tmp, ®s->pciirqenb0); |
1da177e4 | 400 | } else { |
fae3c158 | 401 | tmp = readl(®s->pciirqenb1); |
3e76fdcb | 402 | tmp &= ~BIT((8 + ep->num)); /* completion */ |
fae3c158 | 403 | writel(tmp, ®s->pciirqenb1); |
1da177e4 | 404 | } |
fae3c158 | 405 | writel(0, &ep->regs->ep_irqenb); |
1da177e4 LT |
406 | |
407 | /* init to our chosen defaults, notably so that we NAK OUT | |
408 | * packets until the driver queues a read (+note erratum 0112) | |
409 | */ | |
2eeb0016 | 410 | if (!ep->is_in || (ep->dev->quirks & PLX_2280)) { |
3e76fdcb RRD |
411 | tmp = BIT(SET_NAK_OUT_PACKETS_MODE) | |
412 | BIT(SET_NAK_OUT_PACKETS) | | |
413 | BIT(CLEAR_EP_HIDE_STATUS_PHASE) | | |
414 | BIT(CLEAR_INTERRUPT_MODE); | |
950ee4c8 GL |
415 | } else { |
416 | /* added for 2282 */ | |
3e76fdcb RRD |
417 | tmp = BIT(CLEAR_NAK_OUT_PACKETS_MODE) | |
418 | BIT(CLEAR_NAK_OUT_PACKETS) | | |
419 | BIT(CLEAR_EP_HIDE_STATUS_PHASE) | | |
420 | BIT(CLEAR_INTERRUPT_MODE); | |
950ee4c8 | 421 | } |
1da177e4 LT |
422 | |
423 | if (ep->num != 0) { | |
3e76fdcb RRD |
424 | tmp |= BIT(CLEAR_ENDPOINT_TOGGLE) | |
425 | BIT(CLEAR_ENDPOINT_HALT); | |
1da177e4 | 426 | } |
fae3c158 | 427 | writel(tmp, &ep->regs->ep_rsp); |
1da177e4 LT |
428 | |
429 | /* scrub most status bits, and flush any fifo state */ | |
2eeb0016 | 430 | if (ep->dev->quirks & PLX_2280) |
3e76fdcb RRD |
431 | tmp = BIT(FIFO_OVERFLOW) | |
432 | BIT(FIFO_UNDERFLOW); | |
950ee4c8 GL |
433 | else |
434 | tmp = 0; | |
435 | ||
3e76fdcb RRD |
436 | writel(tmp | BIT(TIMEOUT) | |
437 | BIT(USB_STALL_SENT) | | |
438 | BIT(USB_IN_NAK_SENT) | | |
439 | BIT(USB_IN_ACK_RCVD) | | |
440 | BIT(USB_OUT_PING_NAK_SENT) | | |
441 | BIT(USB_OUT_ACK_SENT) | | |
442 | BIT(FIFO_FLUSH) | | |
443 | BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) | | |
444 | BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) | | |
445 | BIT(DATA_PACKET_RECEIVED_INTERRUPT) | | |
446 | BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) | | |
447 | BIT(DATA_OUT_PING_TOKEN_INTERRUPT) | | |
ae8e530a RRD |
448 | BIT(DATA_IN_TOKEN_INTERRUPT), |
449 | &ep->regs->ep_stat); | |
1da177e4 LT |
450 | |
451 | /* fifo size is handled separately */ | |
452 | } | |
453 | ||
adc82f77 RRD |
454 | static void ep_reset_338x(struct net2280_regs __iomem *regs, |
455 | struct net2280_ep *ep) | |
456 | { | |
457 | u32 tmp, dmastat; | |
458 | ||
459 | ep->desc = NULL; | |
460 | INIT_LIST_HEAD(&ep->queue); | |
461 | ||
462 | usb_ep_set_maxpacket_limit(&ep->ep, ~0); | |
463 | ep->ep.ops = &net2280_ep_ops; | |
464 | ||
465 | /* disable the dma, irqs, endpoint... */ | |
466 | if (ep->dma) { | |
467 | writel(0, &ep->dma->dmactl); | |
3e76fdcb RRD |
468 | writel(BIT(DMA_ABORT_DONE_INTERRUPT) | |
469 | BIT(DMA_PAUSE_DONE_INTERRUPT) | | |
470 | BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) | | |
ae8e530a RRD |
471 | BIT(DMA_TRANSACTION_DONE_INTERRUPT), |
472 | /* | BIT(DMA_ABORT), */ | |
473 | &ep->dma->dmastat); | |
adc82f77 RRD |
474 | |
475 | dmastat = readl(&ep->dma->dmastat); | |
476 | if (dmastat == 0x5002) { | |
e56e69cc | 477 | ep_warn(ep->dev, "The dmastat return = %x!!\n", |
adc82f77 RRD |
478 | dmastat); |
479 | writel(0x5a, &ep->dma->dmastat); | |
480 | } | |
481 | ||
482 | tmp = readl(®s->pciirqenb0); | |
3e76fdcb | 483 | tmp &= ~BIT(ep_bit[ep->num]); |
adc82f77 RRD |
484 | writel(tmp, ®s->pciirqenb0); |
485 | } else { | |
486 | if (ep->num < 5) { | |
487 | tmp = readl(®s->pciirqenb1); | |
3e76fdcb | 488 | tmp &= ~BIT((8 + ep->num)); /* completion */ |
adc82f77 RRD |
489 | writel(tmp, ®s->pciirqenb1); |
490 | } | |
491 | } | |
492 | writel(0, &ep->regs->ep_irqenb); | |
493 | ||
3e76fdcb RRD |
494 | writel(BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) | |
495 | BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) | | |
496 | BIT(FIFO_OVERFLOW) | | |
497 | BIT(DATA_PACKET_RECEIVED_INTERRUPT) | | |
498 | BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) | | |
499 | BIT(DATA_OUT_PING_TOKEN_INTERRUPT) | | |
500 | BIT(DATA_IN_TOKEN_INTERRUPT), &ep->regs->ep_stat); | |
971fe656 MYK |
501 | |
502 | tmp = readl(&ep->cfg->ep_cfg); | |
503 | if (ep->is_in) | |
504 | tmp &= ~USB3380_EP_CFG_MASK_IN; | |
505 | else | |
506 | tmp &= ~USB3380_EP_CFG_MASK_OUT; | |
507 | writel(tmp, &ep->cfg->ep_cfg); | |
adc82f77 RRD |
508 | } |
509 | ||
fae3c158 | 510 | static void nuke(struct net2280_ep *); |
1da177e4 | 511 | |
fae3c158 | 512 | static int net2280_disable(struct usb_ep *_ep) |
1da177e4 LT |
513 | { |
514 | struct net2280_ep *ep; | |
515 | unsigned long flags; | |
516 | ||
fae3c158 | 517 | ep = container_of(_ep, struct net2280_ep, ep); |
836bcab5 GK |
518 | if (!_ep || _ep->name == ep0name) { |
519 | pr_err("%s: Invalid ep=%p\n", __func__, _ep); | |
1da177e4 | 520 | return -EINVAL; |
9ceafcc2 | 521 | } |
fae3c158 RRD |
522 | spin_lock_irqsave(&ep->dev->lock, flags); |
523 | nuke(ep); | |
adc82f77 | 524 | |
5185c913 | 525 | if (ep->dev->quirks & PLX_PCIE) |
adc82f77 RRD |
526 | ep_reset_338x(ep->dev->regs, ep); |
527 | else | |
528 | ep_reset_228x(ep->dev->regs, ep); | |
1da177e4 | 529 | |
e56e69cc | 530 | ep_vdbg(ep->dev, "disabled %s %s\n", |
1da177e4 LT |
531 | ep->dma ? "dma" : "pio", _ep->name); |
532 | ||
533 | /* synch memory views with the device */ | |
adc82f77 | 534 | (void)readl(&ep->cfg->ep_cfg); |
1da177e4 | 535 | |
d588ff58 | 536 | if (!ep->dma && ep->num >= 1 && ep->num <= 4) |
fae3c158 | 537 | ep->dma = &ep->dev->dma[ep->num - 1]; |
1da177e4 | 538 | |
fae3c158 | 539 | spin_unlock_irqrestore(&ep->dev->lock, flags); |
1da177e4 LT |
540 | return 0; |
541 | } | |
542 | ||
543 | /*-------------------------------------------------------------------------*/ | |
544 | ||
fae3c158 RRD |
545 | static struct usb_request |
546 | *net2280_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) | |
1da177e4 LT |
547 | { |
548 | struct net2280_ep *ep; | |
549 | struct net2280_request *req; | |
550 | ||
9ceafcc2 MYK |
551 | if (!_ep) { |
552 | pr_err("%s: Invalid ep\n", __func__); | |
1da177e4 | 553 | return NULL; |
9ceafcc2 | 554 | } |
fae3c158 | 555 | ep = container_of(_ep, struct net2280_ep, ep); |
1da177e4 | 556 | |
7039f422 | 557 | req = kzalloc(sizeof(*req), gfp_flags); |
1da177e4 LT |
558 | if (!req) |
559 | return NULL; | |
560 | ||
fae3c158 | 561 | INIT_LIST_HEAD(&req->queue); |
1da177e4 LT |
562 | |
563 | /* this dma descriptor may be swapped with the previous dummy */ | |
564 | if (ep->dma) { | |
565 | struct net2280_dma *td; | |
566 | ||
fa9ed6f6 | 567 | td = dma_pool_alloc(ep->dev->requests, gfp_flags, |
1da177e4 LT |
568 | &req->td_dma); |
569 | if (!td) { | |
fae3c158 | 570 | kfree(req); |
1da177e4 LT |
571 | return NULL; |
572 | } | |
573 | td->dmacount = 0; /* not VALID */ | |
1da177e4 LT |
574 | td->dmadesc = td->dmaaddr; |
575 | req->td = td; | |
576 | } | |
577 | return &req->req; | |
578 | } | |
579 | ||
fae3c158 | 580 | static void net2280_free_request(struct usb_ep *_ep, struct usb_request *_req) |
1da177e4 LT |
581 | { |
582 | struct net2280_ep *ep; | |
583 | struct net2280_request *req; | |
584 | ||
fae3c158 | 585 | ep = container_of(_ep, struct net2280_ep, ep); |
9ceafcc2 | 586 | if (!_ep || !_req) { |
a00c9791 | 587 | dev_err(&ep->dev->pdev->dev, "%s: Invalid ep=%p or req=%p\n", |
9ceafcc2 | 588 | __func__, _ep, _req); |
1da177e4 | 589 | return; |
9ceafcc2 | 590 | } |
1da177e4 | 591 | |
fae3c158 RRD |
592 | req = container_of(_req, struct net2280_request, req); |
593 | WARN_ON(!list_empty(&req->queue)); | |
1da177e4 | 594 | if (req->td) |
fa9ed6f6 | 595 | dma_pool_free(ep->dev->requests, req->td, req->td_dma); |
fae3c158 | 596 | kfree(req); |
1da177e4 LT |
597 | } |
598 | ||
599 | /*-------------------------------------------------------------------------*/ | |
600 | ||
1da177e4 LT |
601 | /* load a packet into the fifo we use for usb IN transfers. |
602 | * works for all endpoints. | |
603 | * | |
604 | * NOTE: pio with ep-a..ep-d could stuff multiple packets into the fifo | |
605 | * at a time, but this code is simpler because it knows it only writes | |
606 | * one packet. ep-a..ep-d should use dma instead. | |
607 | */ | |
fae3c158 | 608 | static void write_fifo(struct net2280_ep *ep, struct usb_request *req) |
1da177e4 LT |
609 | { |
610 | struct net2280_ep_regs __iomem *regs = ep->regs; | |
611 | u8 *buf; | |
612 | u32 tmp; | |
613 | unsigned count, total; | |
614 | ||
615 | /* INVARIANT: fifo is currently empty. (testable) */ | |
616 | ||
617 | if (req) { | |
618 | buf = req->buf + req->actual; | |
fae3c158 | 619 | prefetch(buf); |
1da177e4 LT |
620 | total = req->length - req->actual; |
621 | } else { | |
622 | total = 0; | |
623 | buf = NULL; | |
624 | } | |
625 | ||
626 | /* write just one packet at a time */ | |
627 | count = ep->ep.maxpacket; | |
628 | if (count > total) /* min() cannot be used on a bitfield */ | |
629 | count = total; | |
630 | ||
e56e69cc | 631 | ep_vdbg(ep->dev, "write %s fifo (IN) %d bytes%s req %p\n", |
1da177e4 LT |
632 | ep->ep.name, count, |
633 | (count != ep->ep.maxpacket) ? " (short)" : "", | |
634 | req); | |
635 | while (count >= 4) { | |
636 | /* NOTE be careful if you try to align these. fifo lines | |
637 | * should normally be full (4 bytes) and successive partial | |
638 | * lines are ok only in certain cases. | |
639 | */ | |
fae3c158 RRD |
640 | tmp = get_unaligned((u32 *)buf); |
641 | cpu_to_le32s(&tmp); | |
642 | writel(tmp, ®s->ep_data); | |
1da177e4 LT |
643 | buf += 4; |
644 | count -= 4; | |
645 | } | |
646 | ||
647 | /* last fifo entry is "short" unless we wrote a full packet. | |
648 | * also explicitly validate last word in (periodic) transfers | |
649 | * when maxpacket is not a multiple of 4 bytes. | |
650 | */ | |
651 | if (count || total < ep->ep.maxpacket) { | |
fae3c158 RRD |
652 | tmp = count ? get_unaligned((u32 *)buf) : count; |
653 | cpu_to_le32s(&tmp); | |
654 | set_fifo_bytecount(ep, count & 0x03); | |
655 | writel(tmp, ®s->ep_data); | |
1da177e4 LT |
656 | } |
657 | ||
658 | /* pci writes may still be posted */ | |
659 | } | |
660 | ||
661 | /* work around erratum 0106: PCI and USB race over the OUT fifo. | |
662 | * caller guarantees chiprev 0100, out endpoint is NAKing, and | |
663 | * there's no real data in the fifo. | |
664 | * | |
665 | * NOTE: also used in cases where that erratum doesn't apply: | |
666 | * where the host wrote "too much" data to us. | |
667 | */ | |
fae3c158 | 668 | static void out_flush(struct net2280_ep *ep) |
1da177e4 LT |
669 | { |
670 | u32 __iomem *statp; | |
671 | u32 tmp; | |
672 | ||
1da177e4 | 673 | statp = &ep->regs->ep_stat; |
d82f3db2 RRD |
674 | |
675 | tmp = readl(statp); | |
676 | if (tmp & BIT(NAK_OUT_PACKETS)) { | |
677 | ep_dbg(ep->dev, "%s %s %08x !NAK\n", | |
678 | ep->ep.name, __func__, tmp); | |
679 | writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp); | |
680 | } | |
681 | ||
3e76fdcb | 682 | writel(BIT(DATA_OUT_PING_TOKEN_INTERRUPT) | |
ae8e530a RRD |
683 | BIT(DATA_PACKET_RECEIVED_INTERRUPT), |
684 | statp); | |
3e76fdcb | 685 | writel(BIT(FIFO_FLUSH), statp); |
fae3c158 RRD |
686 | /* Make sure that stap is written */ |
687 | mb(); | |
688 | tmp = readl(statp); | |
ae8e530a | 689 | if (tmp & BIT(DATA_OUT_PING_TOKEN_INTERRUPT) && |
1da177e4 | 690 | /* high speed did bulk NYET; fifo isn't filling */ |
ae8e530a | 691 | ep->dev->gadget.speed == USB_SPEED_FULL) { |
1da177e4 LT |
692 | unsigned usec; |
693 | ||
694 | usec = 50; /* 64 byte bulk/interrupt */ | |
3e76fdcb RRD |
695 | handshake(statp, BIT(USB_OUT_PING_NAK_SENT), |
696 | BIT(USB_OUT_PING_NAK_SENT), usec); | |
1da177e4 LT |
697 | /* NAK done; now CLEAR_NAK_OUT_PACKETS is safe */ |
698 | } | |
699 | } | |
700 | ||
701 | /* unload packet(s) from the fifo we use for usb OUT transfers. | |
702 | * returns true iff the request completed, because of short packet | |
703 | * or the request buffer having filled with full packets. | |
704 | * | |
705 | * for ep-a..ep-d this will read multiple packets out when they | |
706 | * have been accepted. | |
707 | */ | |
fae3c158 | 708 | static int read_fifo(struct net2280_ep *ep, struct net2280_request *req) |
1da177e4 LT |
709 | { |
710 | struct net2280_ep_regs __iomem *regs = ep->regs; | |
711 | u8 *buf = req->req.buf + req->req.actual; | |
712 | unsigned count, tmp, is_short; | |
713 | unsigned cleanup = 0, prevent = 0; | |
714 | ||
715 | /* erratum 0106 ... packets coming in during fifo reads might | |
716 | * be incompletely rejected. not all cases have workarounds. | |
717 | */ | |
ae8e530a RRD |
718 | if (ep->dev->chiprev == 0x0100 && |
719 | ep->dev->gadget.speed == USB_SPEED_FULL) { | |
fae3c158 RRD |
720 | udelay(1); |
721 | tmp = readl(&ep->regs->ep_stat); | |
3e76fdcb | 722 | if ((tmp & BIT(NAK_OUT_PACKETS))) |
1da177e4 | 723 | cleanup = 1; |
3e76fdcb | 724 | else if ((tmp & BIT(FIFO_FULL))) { |
fae3c158 | 725 | start_out_naking(ep); |
1da177e4 LT |
726 | prevent = 1; |
727 | } | |
728 | /* else: hope we don't see the problem */ | |
729 | } | |
730 | ||
731 | /* never overflow the rx buffer. the fifo reads packets until | |
732 | * it sees a short one; we might not be ready for them all. | |
733 | */ | |
fae3c158 RRD |
734 | prefetchw(buf); |
735 | count = readl(®s->ep_avail); | |
736 | if (unlikely(count == 0)) { | |
737 | udelay(1); | |
738 | tmp = readl(&ep->regs->ep_stat); | |
739 | count = readl(®s->ep_avail); | |
1da177e4 | 740 | /* handled that data already? */ |
3e76fdcb | 741 | if (count == 0 && (tmp & BIT(NAK_OUT_PACKETS)) == 0) |
1da177e4 LT |
742 | return 0; |
743 | } | |
744 | ||
745 | tmp = req->req.length - req->req.actual; | |
746 | if (count > tmp) { | |
747 | /* as with DMA, data overflow gets flushed */ | |
748 | if ((tmp % ep->ep.maxpacket) != 0) { | |
e56e69cc | 749 | ep_err(ep->dev, |
1da177e4 LT |
750 | "%s out fifo %d bytes, expected %d\n", |
751 | ep->ep.name, count, tmp); | |
752 | req->req.status = -EOVERFLOW; | |
753 | cleanup = 1; | |
754 | /* NAK_OUT_PACKETS will be set, so flushing is safe; | |
755 | * the next read will start with the next packet | |
756 | */ | |
757 | } /* else it's a ZLP, no worries */ | |
758 | count = tmp; | |
759 | } | |
760 | req->req.actual += count; | |
761 | ||
762 | is_short = (count == 0) || ((count % ep->ep.maxpacket) != 0); | |
763 | ||
e56e69cc | 764 | ep_vdbg(ep->dev, "read %s fifo (OUT) %d bytes%s%s%s req %p %d/%d\n", |
1da177e4 LT |
765 | ep->ep.name, count, is_short ? " (short)" : "", |
766 | cleanup ? " flush" : "", prevent ? " nak" : "", | |
767 | req, req->req.actual, req->req.length); | |
768 | ||
769 | while (count >= 4) { | |
fae3c158 RRD |
770 | tmp = readl(®s->ep_data); |
771 | cpu_to_le32s(&tmp); | |
772 | put_unaligned(tmp, (u32 *)buf); | |
1da177e4 LT |
773 | buf += 4; |
774 | count -= 4; | |
775 | } | |
776 | if (count) { | |
fae3c158 | 777 | tmp = readl(®s->ep_data); |
1da177e4 LT |
778 | /* LE conversion is implicit here: */ |
779 | do { | |
780 | *buf++ = (u8) tmp; | |
781 | tmp >>= 8; | |
782 | } while (--count); | |
783 | } | |
784 | if (cleanup) | |
fae3c158 | 785 | out_flush(ep); |
1da177e4 | 786 | if (prevent) { |
3e76fdcb | 787 | writel(BIT(CLEAR_NAK_OUT_PACKETS), &ep->regs->ep_rsp); |
fae3c158 | 788 | (void) readl(&ep->regs->ep_rsp); |
1da177e4 LT |
789 | } |
790 | ||
de497f63 | 791 | return is_short || req->req.actual == req->req.length; |
1da177e4 LT |
792 | } |
793 | ||
794 | /* fill out dma descriptor to match a given request */ | |
fae3c158 RRD |
795 | static void fill_dma_desc(struct net2280_ep *ep, |
796 | struct net2280_request *req, int valid) | |
1da177e4 LT |
797 | { |
798 | struct net2280_dma *td = req->td; | |
799 | u32 dmacount = req->req.length; | |
800 | ||
801 | /* don't let DMA continue after a short OUT packet, | |
802 | * so overruns can't affect the next transfer. | |
803 | * in case of overruns on max-size packets, we can't | |
804 | * stop the fifo from filling but we can flush it. | |
805 | */ | |
806 | if (ep->is_in) | |
3e76fdcb | 807 | dmacount |= BIT(DMA_DIRECTION); |
ae8e530a | 808 | if ((!ep->is_in && (dmacount % ep->ep.maxpacket) != 0) || |
2eeb0016 | 809 | !(ep->dev->quirks & PLX_2280)) |
3e76fdcb | 810 | dmacount |= BIT(END_OF_CHAIN); |
1da177e4 LT |
811 | |
812 | req->valid = valid; | |
813 | if (valid) | |
3e76fdcb | 814 | dmacount |= BIT(VALID_BIT); |
90664198 | 815 | dmacount |= BIT(DMA_DONE_INTERRUPT_ENABLE); |
1da177e4 LT |
816 | |
817 | /* td->dmadesc = previously set by caller */ | |
818 | td->dmaaddr = cpu_to_le32 (req->req.dma); | |
819 | ||
820 | /* 2280 may be polling VALID_BIT through ep->dma->dmadesc */ | |
fae3c158 | 821 | wmb(); |
da2bbdcc | 822 | td->dmacount = cpu_to_le32(dmacount); |
1da177e4 LT |
823 | } |
824 | ||
825 | static const u32 dmactl_default = | |
3e76fdcb RRD |
826 | BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) | |
827 | BIT(DMA_CLEAR_COUNT_ENABLE) | | |
1da177e4 | 828 | /* erratum 0116 workaround part 1 (use POLLING) */ |
3e76fdcb RRD |
829 | (POLL_100_USEC << DESCRIPTOR_POLLING_RATE) | |
830 | BIT(DMA_VALID_BIT_POLLING_ENABLE) | | |
831 | BIT(DMA_VALID_BIT_ENABLE) | | |
832 | BIT(DMA_SCATTER_GATHER_ENABLE) | | |
1da177e4 | 833 | /* erratum 0116 workaround part 2 (no AUTOSTART) */ |
3e76fdcb | 834 | BIT(DMA_ENABLE); |
1da177e4 | 835 | |
fae3c158 | 836 | static inline void spin_stop_dma(struct net2280_dma_regs __iomem *dma) |
1da177e4 | 837 | { |
3e76fdcb | 838 | handshake(&dma->dmactl, BIT(DMA_ENABLE), 0, 50); |
1da177e4 LT |
839 | } |
840 | ||
fae3c158 | 841 | static inline void stop_dma(struct net2280_dma_regs __iomem *dma) |
1da177e4 | 842 | { |
3e76fdcb | 843 | writel(readl(&dma->dmactl) & ~BIT(DMA_ENABLE), &dma->dmactl); |
fae3c158 | 844 | spin_stop_dma(dma); |
1da177e4 LT |
845 | } |
846 | ||
fae3c158 | 847 | static void start_queue(struct net2280_ep *ep, u32 dmactl, u32 td_dma) |
1da177e4 LT |
848 | { |
849 | struct net2280_dma_regs __iomem *dma = ep->dma; | |
3e76fdcb | 850 | unsigned int tmp = BIT(VALID_BIT) | (ep->is_in << DMA_DIRECTION); |
1da177e4 | 851 | |
2eeb0016 | 852 | if (!(ep->dev->quirks & PLX_2280)) |
3e76fdcb | 853 | tmp |= BIT(END_OF_CHAIN); |
950ee4c8 | 854 | |
fae3c158 RRD |
855 | writel(tmp, &dma->dmacount); |
856 | writel(readl(&dma->dmastat), &dma->dmastat); | |
1da177e4 | 857 | |
fae3c158 | 858 | writel(td_dma, &dma->dmadesc); |
5185c913 | 859 | if (ep->dev->quirks & PLX_PCIE) |
3e76fdcb | 860 | dmactl |= BIT(DMA_REQUEST_OUTSTANDING); |
fae3c158 | 861 | writel(dmactl, &dma->dmactl); |
1da177e4 LT |
862 | |
863 | /* erratum 0116 workaround part 3: pci arbiter away from net2280 */ | |
fae3c158 | 864 | (void) readl(&ep->dev->pci->pcimstctl); |
1da177e4 | 865 | |
3e76fdcb | 866 | writel(BIT(DMA_START), &dma->dmastat); |
1da177e4 LT |
867 | } |
868 | ||
fae3c158 | 869 | static void start_dma(struct net2280_ep *ep, struct net2280_request *req) |
1da177e4 LT |
870 | { |
871 | u32 tmp; | |
872 | struct net2280_dma_regs __iomem *dma = ep->dma; | |
873 | ||
874 | /* FIXME can't use DMA for ZLPs */ | |
875 | ||
876 | /* on this path we "know" there's no dma active (yet) */ | |
3e76fdcb | 877 | WARN_ON(readl(&dma->dmactl) & BIT(DMA_ENABLE)); |
fae3c158 | 878 | writel(0, &ep->dma->dmactl); |
1da177e4 LT |
879 | |
880 | /* previous OUT packet might have been short */ | |
fae3c158 RRD |
881 | if (!ep->is_in && (readl(&ep->regs->ep_stat) & |
882 | BIT(NAK_OUT_PACKETS))) { | |
3e76fdcb | 883 | writel(BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT), |
1da177e4 LT |
884 | &ep->regs->ep_stat); |
885 | ||
fae3c158 | 886 | tmp = readl(&ep->regs->ep_avail); |
1da177e4 | 887 | if (tmp) { |
fae3c158 | 888 | writel(readl(&dma->dmastat), &dma->dmastat); |
1da177e4 LT |
889 | |
890 | /* transfer all/some fifo data */ | |
fae3c158 RRD |
891 | writel(req->req.dma, &dma->dmaaddr); |
892 | tmp = min(tmp, req->req.length); | |
1da177e4 LT |
893 | |
894 | /* dma irq, faking scatterlist status */ | |
fae3c158 | 895 | req->td->dmacount = cpu_to_le32(req->req.length - tmp); |
ae8e530a RRD |
896 | writel(BIT(DMA_DONE_INTERRUPT_ENABLE) | tmp, |
897 | &dma->dmacount); | |
1da177e4 LT |
898 | req->td->dmadesc = 0; |
899 | req->valid = 1; | |
900 | ||
3e76fdcb RRD |
901 | writel(BIT(DMA_ENABLE), &dma->dmactl); |
902 | writel(BIT(DMA_START), &dma->dmastat); | |
1da177e4 LT |
903 | return; |
904 | } | |
9d6a54c1 | 905 | stop_out_naking(ep); |
1da177e4 LT |
906 | } |
907 | ||
908 | tmp = dmactl_default; | |
909 | ||
910 | /* force packet boundaries between dma requests, but prevent the | |
911 | * controller from automagically writing a last "short" packet | |
912 | * (zero length) unless the driver explicitly said to do that. | |
913 | */ | |
914 | if (ep->is_in) { | |
fae3c158 RRD |
915 | if (likely((req->req.length % ep->ep.maxpacket) || |
916 | req->req.zero)){ | |
3e76fdcb | 917 | tmp |= BIT(DMA_FIFO_VALIDATE); |
1da177e4 LT |
918 | ep->in_fifo_validate = 1; |
919 | } else | |
920 | ep->in_fifo_validate = 0; | |
921 | } | |
922 | ||
923 | /* init req->td, pointing to the current dummy */ | |
924 | req->td->dmadesc = cpu_to_le32 (ep->td_dma); | |
fae3c158 | 925 | fill_dma_desc(ep, req, 1); |
1da177e4 | 926 | |
90664198 | 927 | req->td->dmacount |= cpu_to_le32(BIT(END_OF_CHAIN)); |
1da177e4 | 928 | |
fae3c158 | 929 | start_queue(ep, tmp, req->td_dma); |
1da177e4 LT |
930 | } |
931 | ||
932 | static inline void | |
fae3c158 | 933 | queue_dma(struct net2280_ep *ep, struct net2280_request *req, int valid) |
1da177e4 | 934 | { |
1da177e4 | 935 | /* swap new dummy for old, link; fill and maybe activate */ |
67ec2c75 GZ |
936 | swap(ep->dummy, req->td); |
937 | swap(ep->td_dma, req->td_dma); | |
1da177e4 | 938 | |
67ec2c75 | 939 | req->td->dmadesc = cpu_to_le32 (ep->td_dma); |
1da177e4 | 940 | |
fae3c158 | 941 | fill_dma_desc(ep, req, valid); |
1da177e4 LT |
942 | } |
943 | ||
944 | static void | |
fae3c158 | 945 | done(struct net2280_ep *ep, struct net2280_request *req, int status) |
1da177e4 LT |
946 | { |
947 | struct net2280 *dev; | |
948 | unsigned stopped = ep->stopped; | |
949 | ||
fae3c158 | 950 | list_del_init(&req->queue); |
1da177e4 LT |
951 | |
952 | if (req->req.status == -EINPROGRESS) | |
953 | req->req.status = status; | |
954 | else | |
955 | status = req->req.status; | |
956 | ||
957 | dev = ep->dev; | |
ae4d7933 FB |
958 | if (ep->dma) |
959 | usb_gadget_unmap_request(&dev->gadget, &req->req, ep->is_in); | |
1da177e4 LT |
960 | |
961 | if (status && status != -ESHUTDOWN) | |
e56e69cc | 962 | ep_vdbg(dev, "complete %s req %p stat %d len %u/%u\n", |
1da177e4 LT |
963 | ep->ep.name, &req->req, status, |
964 | req->req.actual, req->req.length); | |
965 | ||
966 | /* don't modify queue heads during completion callback */ | |
967 | ep->stopped = 1; | |
fae3c158 | 968 | spin_unlock(&dev->lock); |
304f7e5e | 969 | usb_gadget_giveback_request(&ep->ep, &req->req); |
fae3c158 | 970 | spin_lock(&dev->lock); |
1da177e4 LT |
971 | ep->stopped = stopped; |
972 | } | |
973 | ||
974 | /*-------------------------------------------------------------------------*/ | |
975 | ||
976 | static int | |
fae3c158 | 977 | net2280_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) |
1da177e4 LT |
978 | { |
979 | struct net2280_request *req; | |
980 | struct net2280_ep *ep; | |
981 | struct net2280 *dev; | |
982 | unsigned long flags; | |
9ceafcc2 | 983 | int ret = 0; |
1da177e4 LT |
984 | |
985 | /* we always require a cpu-view buffer, so that we can | |
986 | * always use pio (as fallback or whatever). | |
987 | */ | |
fae3c158 | 988 | ep = container_of(_ep, struct net2280_ep, ep); |
9ceafcc2 MYK |
989 | if (!_ep || (!ep->desc && ep->num != 0)) { |
990 | pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep); | |
1da177e4 | 991 | return -EINVAL; |
9ceafcc2 MYK |
992 | } |
993 | req = container_of(_req, struct net2280_request, req); | |
994 | if (!_req || !_req->complete || !_req->buf || | |
995 | !list_empty(&req->queue)) { | |
996 | ret = -EINVAL; | |
997 | goto print_err; | |
998 | } | |
999 | if (_req->length > (~0 & DMA_BYTE_COUNT_MASK)) { | |
1000 | ret = -EDOM; | |
1001 | goto print_err; | |
1002 | } | |
1da177e4 | 1003 | dev = ep->dev; |
9ceafcc2 MYK |
1004 | if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) { |
1005 | ret = -ESHUTDOWN; | |
1006 | goto print_err; | |
1007 | } | |
1da177e4 LT |
1008 | |
1009 | /* FIXME implement PIO fallback for ZLPs with DMA */ | |
9ceafcc2 MYK |
1010 | if (ep->dma && _req->length == 0) { |
1011 | ret = -EOPNOTSUPP; | |
1012 | goto print_err; | |
1013 | } | |
1da177e4 LT |
1014 | |
1015 | /* set up dma mapping in case the caller didn't */ | |
ae4d7933 | 1016 | if (ep->dma) { |
ae4d7933 FB |
1017 | ret = usb_gadget_map_request(&dev->gadget, _req, |
1018 | ep->is_in); | |
1019 | if (ret) | |
9ceafcc2 | 1020 | goto print_err; |
1da177e4 LT |
1021 | } |
1022 | ||
e56e69cc | 1023 | ep_vdbg(dev, "%s queue req %p, len %d buf %p\n", |
1da177e4 | 1024 | _ep->name, _req, _req->length, _req->buf); |
1da177e4 | 1025 | |
fae3c158 | 1026 | spin_lock_irqsave(&dev->lock, flags); |
1da177e4 LT |
1027 | |
1028 | _req->status = -EINPROGRESS; | |
1029 | _req->actual = 0; | |
1030 | ||
1031 | /* kickstart this i/o queue? */ | |
485f44d0 | 1032 | if (list_empty(&ep->queue) && !ep->stopped && |
5185c913 | 1033 | !((dev->quirks & PLX_PCIE) && ep->dma && |
485f44d0 RRD |
1034 | (readl(&ep->regs->ep_rsp) & BIT(CLEAR_ENDPOINT_HALT)))) { |
1035 | ||
1da177e4 | 1036 | /* use DMA if the endpoint supports it, else pio */ |
485f44d0 | 1037 | if (ep->dma) |
fae3c158 | 1038 | start_dma(ep, req); |
1da177e4 LT |
1039 | else { |
1040 | /* maybe there's no control data, just status ack */ | |
1041 | if (ep->num == 0 && _req->length == 0) { | |
fae3c158 RRD |
1042 | allow_status(ep); |
1043 | done(ep, req, 0); | |
e56e69cc | 1044 | ep_vdbg(dev, "%s status ack\n", ep->ep.name); |
1da177e4 LT |
1045 | goto done; |
1046 | } | |
1047 | ||
1048 | /* PIO ... stuff the fifo, or unblock it. */ | |
1049 | if (ep->is_in) | |
fae3c158 | 1050 | write_fifo(ep, _req); |
6574abe6 | 1051 | else { |
1da177e4 LT |
1052 | u32 s; |
1053 | ||
1054 | /* OUT FIFO might have packet(s) buffered */ | |
fae3c158 | 1055 | s = readl(&ep->regs->ep_stat); |
3e76fdcb | 1056 | if ((s & BIT(FIFO_EMPTY)) == 0) { |
1da177e4 LT |
1057 | /* note: _req->short_not_ok is |
1058 | * ignored here since PIO _always_ | |
1059 | * stops queue advance here, and | |
1060 | * _req->status doesn't change for | |
1061 | * short reads (only _req->actual) | |
1062 | */ | |
fae3c158 RRD |
1063 | if (read_fifo(ep, req) && |
1064 | ep->num == 0) { | |
1065 | done(ep, req, 0); | |
1066 | allow_status(ep); | |
1da177e4 LT |
1067 | /* don't queue it */ |
1068 | req = NULL; | |
fae3c158 RRD |
1069 | } else if (read_fifo(ep, req) && |
1070 | ep->num != 0) { | |
1071 | done(ep, req, 0); | |
1072 | req = NULL; | |
1da177e4 | 1073 | } else |
fae3c158 | 1074 | s = readl(&ep->regs->ep_stat); |
1da177e4 LT |
1075 | } |
1076 | ||
1077 | /* don't NAK, let the fifo fill */ | |
3e76fdcb RRD |
1078 | if (req && (s & BIT(NAK_OUT_PACKETS))) |
1079 | writel(BIT(CLEAR_NAK_OUT_PACKETS), | |
1da177e4 LT |
1080 | &ep->regs->ep_rsp); |
1081 | } | |
1082 | } | |
1083 | ||
1084 | } else if (ep->dma) { | |
1085 | int valid = 1; | |
1086 | ||
1087 | if (ep->is_in) { | |
1088 | int expect; | |
1089 | ||
1090 | /* preventing magic zlps is per-engine state, not | |
1091 | * per-transfer; irq logic must recover hiccups. | |
1092 | */ | |
fae3c158 RRD |
1093 | expect = likely(req->req.zero || |
1094 | (req->req.length % ep->ep.maxpacket)); | |
1da177e4 LT |
1095 | if (expect != ep->in_fifo_validate) |
1096 | valid = 0; | |
1097 | } | |
fae3c158 | 1098 | queue_dma(ep, req, valid); |
1da177e4 LT |
1099 | |
1100 | } /* else the irq handler advances the queue. */ | |
1101 | ||
1f26e28d | 1102 | ep->responded = 1; |
1da177e4 | 1103 | if (req) |
fae3c158 | 1104 | list_add_tail(&req->queue, &ep->queue); |
1da177e4 | 1105 | done: |
fae3c158 | 1106 | spin_unlock_irqrestore(&dev->lock, flags); |
1da177e4 LT |
1107 | |
1108 | /* pci writes may still be posted */ | |
9ceafcc2 MYK |
1109 | return ret; |
1110 | ||
1111 | print_err: | |
1112 | dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, ret); | |
1113 | return ret; | |
1da177e4 LT |
1114 | } |
1115 | ||
1116 | static inline void | |
fae3c158 RRD |
1117 | dma_done(struct net2280_ep *ep, struct net2280_request *req, u32 dmacount, |
1118 | int status) | |
1da177e4 LT |
1119 | { |
1120 | req->req.actual = req->req.length - (DMA_BYTE_COUNT_MASK & dmacount); | |
fae3c158 | 1121 | done(ep, req, status); |
1da177e4 LT |
1122 | } |
1123 | ||
1de2ebfb | 1124 | static int scan_dma_completions(struct net2280_ep *ep) |
1da177e4 | 1125 | { |
1de2ebfb JK |
1126 | int num_completed = 0; |
1127 | ||
1da177e4 LT |
1128 | /* only look at descriptors that were "naturally" retired, |
1129 | * so fifo and list head state won't matter | |
1130 | */ | |
fae3c158 | 1131 | while (!list_empty(&ep->queue)) { |
1da177e4 | 1132 | struct net2280_request *req; |
ef5e2fa9 | 1133 | u32 req_dma_count; |
1da177e4 | 1134 | |
fae3c158 | 1135 | req = list_entry(ep->queue.next, |
1da177e4 LT |
1136 | struct net2280_request, queue); |
1137 | if (!req->valid) | |
1138 | break; | |
fae3c158 | 1139 | rmb(); |
ef5e2fa9 RM |
1140 | req_dma_count = le32_to_cpup(&req->td->dmacount); |
1141 | if ((req_dma_count & BIT(VALID_BIT)) != 0) | |
1da177e4 LT |
1142 | break; |
1143 | ||
1144 | /* SHORT_PACKET_TRANSFERRED_INTERRUPT handles "usb-short" | |
1145 | * cases where DMA must be aborted; this code handles | |
1146 | * all non-abort DMA completions. | |
1147 | */ | |
fae3c158 | 1148 | if (unlikely(req->td->dmadesc == 0)) { |
1da177e4 | 1149 | /* paranoia */ |
ef5e2fa9 RM |
1150 | u32 const ep_dmacount = readl(&ep->dma->dmacount); |
1151 | ||
1152 | if (ep_dmacount & DMA_BYTE_COUNT_MASK) | |
1da177e4 LT |
1153 | break; |
1154 | /* single transfer mode */ | |
ef5e2fa9 | 1155 | dma_done(ep, req, req_dma_count, 0); |
1de2ebfb | 1156 | num_completed++; |
1da177e4 | 1157 | break; |
ae8e530a | 1158 | } else if (!ep->is_in && |
43780aaa | 1159 | (req->req.length % ep->ep.maxpacket) && |
5185c913 | 1160 | !(ep->dev->quirks & PLX_PCIE)) { |
1da177e4 | 1161 | |
ef5e2fa9 | 1162 | u32 const ep_stat = readl(&ep->regs->ep_stat); |
1da177e4 LT |
1163 | /* AVOID TROUBLE HERE by not issuing short reads from |
1164 | * your gadget driver. That helps avoids errata 0121, | |
1165 | * 0122, and 0124; not all cases trigger the warning. | |
1166 | */ | |
ef5e2fa9 | 1167 | if ((ep_stat & BIT(NAK_OUT_PACKETS)) == 0) { |
e56e69cc | 1168 | ep_warn(ep->dev, "%s lost packet sync!\n", |
1da177e4 LT |
1169 | ep->ep.name); |
1170 | req->req.status = -EOVERFLOW; | |
fae3c158 | 1171 | } else { |
ef5e2fa9 RM |
1172 | u32 const ep_avail = readl(&ep->regs->ep_avail); |
1173 | if (ep_avail) { | |
fae3c158 RRD |
1174 | /* fifo gets flushed later */ |
1175 | ep->out_overflow = 1; | |
e56e69cc | 1176 | ep_dbg(ep->dev, |
fae3c158 | 1177 | "%s dma, discard %d len %d\n", |
ef5e2fa9 | 1178 | ep->ep.name, ep_avail, |
1da177e4 | 1179 | req->req.length); |
fae3c158 RRD |
1180 | req->req.status = -EOVERFLOW; |
1181 | } | |
1da177e4 LT |
1182 | } |
1183 | } | |
ef5e2fa9 | 1184 | dma_done(ep, req, req_dma_count, 0); |
1de2ebfb | 1185 | num_completed++; |
1da177e4 | 1186 | } |
1de2ebfb JK |
1187 | |
1188 | return num_completed; | |
1da177e4 LT |
1189 | } |
1190 | ||
fae3c158 | 1191 | static void restart_dma(struct net2280_ep *ep) |
1da177e4 LT |
1192 | { |
1193 | struct net2280_request *req; | |
1da177e4 LT |
1194 | |
1195 | if (ep->stopped) | |
1196 | return; | |
fae3c158 | 1197 | req = list_entry(ep->queue.next, struct net2280_request, queue); |
1da177e4 | 1198 | |
90664198 | 1199 | start_dma(ep, req); |
1da177e4 LT |
1200 | } |
1201 | ||
e721c457 | 1202 | static void abort_dma(struct net2280_ep *ep) |
1da177e4 LT |
1203 | { |
1204 | /* abort the current transfer */ | |
fae3c158 | 1205 | if (likely(!list_empty(&ep->queue))) { |
1da177e4 | 1206 | /* FIXME work around errata 0121, 0122, 0124 */ |
3e76fdcb | 1207 | writel(BIT(DMA_ABORT), &ep->dma->dmastat); |
fae3c158 | 1208 | spin_stop_dma(ep->dma); |
1da177e4 | 1209 | } else |
fae3c158 RRD |
1210 | stop_dma(ep->dma); |
1211 | scan_dma_completions(ep); | |
1da177e4 LT |
1212 | } |
1213 | ||
1214 | /* dequeue ALL requests */ | |
fae3c158 | 1215 | static void nuke(struct net2280_ep *ep) |
1da177e4 LT |
1216 | { |
1217 | struct net2280_request *req; | |
1218 | ||
1219 | /* called with spinlock held */ | |
1220 | ep->stopped = 1; | |
1221 | if (ep->dma) | |
fae3c158 RRD |
1222 | abort_dma(ep); |
1223 | while (!list_empty(&ep->queue)) { | |
1224 | req = list_entry(ep->queue.next, | |
1da177e4 LT |
1225 | struct net2280_request, |
1226 | queue); | |
fae3c158 | 1227 | done(ep, req, -ESHUTDOWN); |
1da177e4 LT |
1228 | } |
1229 | } | |
1230 | ||
1231 | /* dequeue JUST ONE request */ | |
fae3c158 | 1232 | static int net2280_dequeue(struct usb_ep *_ep, struct usb_request *_req) |
1da177e4 LT |
1233 | { |
1234 | struct net2280_ep *ep; | |
b6f8cc55 JK |
1235 | struct net2280_request *req = NULL; |
1236 | struct net2280_request *iter; | |
1da177e4 LT |
1237 | unsigned long flags; |
1238 | u32 dmactl; | |
1239 | int stopped; | |
1240 | ||
fae3c158 | 1241 | ep = container_of(_ep, struct net2280_ep, ep); |
9ceafcc2 MYK |
1242 | if (!_ep || (!ep->desc && ep->num != 0) || !_req) { |
1243 | pr_err("%s: Invalid ep=%p or ep->desc or req=%p\n", | |
1244 | __func__, _ep, _req); | |
1da177e4 | 1245 | return -EINVAL; |
9ceafcc2 | 1246 | } |
1da177e4 | 1247 | |
fae3c158 | 1248 | spin_lock_irqsave(&ep->dev->lock, flags); |
1da177e4 LT |
1249 | stopped = ep->stopped; |
1250 | ||
1251 | /* quiesce dma while we patch the queue */ | |
1252 | dmactl = 0; | |
1253 | ep->stopped = 1; | |
1254 | if (ep->dma) { | |
fae3c158 | 1255 | dmactl = readl(&ep->dma->dmactl); |
1da177e4 | 1256 | /* WARNING erratum 0127 may kick in ... */ |
fae3c158 RRD |
1257 | stop_dma(ep->dma); |
1258 | scan_dma_completions(ep); | |
1da177e4 LT |
1259 | } |
1260 | ||
1261 | /* make sure it's still queued on this endpoint */ | |
b6f8cc55 JK |
1262 | list_for_each_entry(iter, &ep->queue, queue) { |
1263 | if (&iter->req != _req) | |
1264 | continue; | |
1265 | req = iter; | |
1266 | break; | |
1da177e4 | 1267 | } |
b6f8cc55 | 1268 | if (!req) { |
f1d3fba1 | 1269 | ep->stopped = stopped; |
fae3c158 | 1270 | spin_unlock_irqrestore(&ep->dev->lock, flags); |
f1d3fba1 | 1271 | ep_dbg(ep->dev, "%s: Request mismatch\n", __func__); |
1da177e4 LT |
1272 | return -EINVAL; |
1273 | } | |
1274 | ||
1275 | /* queue head may be partially complete. */ | |
1276 | if (ep->queue.next == &req->queue) { | |
1277 | if (ep->dma) { | |
e56e69cc | 1278 | ep_dbg(ep->dev, "unlink (%s) dma\n", _ep->name); |
1da177e4 | 1279 | _req->status = -ECONNRESET; |
fae3c158 RRD |
1280 | abort_dma(ep); |
1281 | if (likely(ep->queue.next == &req->queue)) { | |
1282 | /* NOTE: misreports single-transfer mode*/ | |
1da177e4 | 1283 | req->td->dmacount = 0; /* invalidate */ |
fae3c158 RRD |
1284 | dma_done(ep, req, |
1285 | readl(&ep->dma->dmacount), | |
1da177e4 LT |
1286 | -ECONNRESET); |
1287 | } | |
1288 | } else { | |
e56e69cc | 1289 | ep_dbg(ep->dev, "unlink (%s) pio\n", _ep->name); |
fae3c158 | 1290 | done(ep, req, -ECONNRESET); |
1da177e4 LT |
1291 | } |
1292 | req = NULL; | |
1da177e4 LT |
1293 | } |
1294 | ||
1295 | if (req) | |
fae3c158 | 1296 | done(ep, req, -ECONNRESET); |
1da177e4 LT |
1297 | ep->stopped = stopped; |
1298 | ||
1299 | if (ep->dma) { | |
1300 | /* turn off dma on inactive queues */ | |
fae3c158 RRD |
1301 | if (list_empty(&ep->queue)) |
1302 | stop_dma(ep->dma); | |
1da177e4 LT |
1303 | else if (!ep->stopped) { |
1304 | /* resume current request, or start new one */ | |
1305 | if (req) | |
fae3c158 | 1306 | writel(dmactl, &ep->dma->dmactl); |
1da177e4 | 1307 | else |
fae3c158 | 1308 | start_dma(ep, list_entry(ep->queue.next, |
1da177e4 LT |
1309 | struct net2280_request, queue)); |
1310 | } | |
1311 | } | |
1312 | ||
fae3c158 | 1313 | spin_unlock_irqrestore(&ep->dev->lock, flags); |
1da177e4 LT |
1314 | return 0; |
1315 | } | |
1316 | ||
1317 | /*-------------------------------------------------------------------------*/ | |
1318 | ||
fae3c158 | 1319 | static int net2280_fifo_status(struct usb_ep *_ep); |
1da177e4 LT |
1320 | |
1321 | static int | |
8066134f | 1322 | net2280_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedged) |
1da177e4 LT |
1323 | { |
1324 | struct net2280_ep *ep; | |
1325 | unsigned long flags; | |
1326 | int retval = 0; | |
1327 | ||
fae3c158 | 1328 | ep = container_of(_ep, struct net2280_ep, ep); |
9ceafcc2 MYK |
1329 | if (!_ep || (!ep->desc && ep->num != 0)) { |
1330 | pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep); | |
1da177e4 | 1331 | return -EINVAL; |
9ceafcc2 MYK |
1332 | } |
1333 | if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) { | |
1334 | retval = -ESHUTDOWN; | |
1335 | goto print_err; | |
1336 | } | |
1da177e4 | 1337 | if (ep->desc /* not ep0 */ && (ep->desc->bmAttributes & 0x03) |
9ceafcc2 MYK |
1338 | == USB_ENDPOINT_XFER_ISOC) { |
1339 | retval = -EINVAL; | |
1340 | goto print_err; | |
1341 | } | |
1da177e4 | 1342 | |
fae3c158 | 1343 | spin_lock_irqsave(&ep->dev->lock, flags); |
9ceafcc2 | 1344 | if (!list_empty(&ep->queue)) { |
1da177e4 | 1345 | retval = -EAGAIN; |
9ceafcc2 MYK |
1346 | goto print_unlock; |
1347 | } else if (ep->is_in && value && net2280_fifo_status(_ep) != 0) { | |
1da177e4 | 1348 | retval = -EAGAIN; |
9ceafcc2 MYK |
1349 | goto print_unlock; |
1350 | } else { | |
e56e69cc | 1351 | ep_vdbg(ep->dev, "%s %s %s\n", _ep->name, |
8066134f AS |
1352 | value ? "set" : "clear", |
1353 | wedged ? "wedge" : "halt"); | |
1da177e4 LT |
1354 | /* set/clear, then synch memory views with the device */ |
1355 | if (value) { | |
1356 | if (ep->num == 0) | |
1357 | ep->dev->protocol_stall = 1; | |
1358 | else | |
fae3c158 | 1359 | set_halt(ep); |
8066134f AS |
1360 | if (wedged) |
1361 | ep->wedged = 1; | |
1362 | } else { | |
fae3c158 | 1363 | clear_halt(ep); |
5185c913 | 1364 | if (ep->dev->quirks & PLX_PCIE && |
adc82f77 RRD |
1365 | !list_empty(&ep->queue) && ep->td_dma) |
1366 | restart_dma(ep); | |
8066134f AS |
1367 | ep->wedged = 0; |
1368 | } | |
fae3c158 | 1369 | (void) readl(&ep->regs->ep_rsp); |
1da177e4 | 1370 | } |
fae3c158 | 1371 | spin_unlock_irqrestore(&ep->dev->lock, flags); |
1da177e4 LT |
1372 | |
1373 | return retval; | |
9ceafcc2 MYK |
1374 | |
1375 | print_unlock: | |
1376 | spin_unlock_irqrestore(&ep->dev->lock, flags); | |
1377 | print_err: | |
1378 | dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, retval); | |
1379 | return retval; | |
1da177e4 LT |
1380 | } |
1381 | ||
fae3c158 | 1382 | static int net2280_set_halt(struct usb_ep *_ep, int value) |
8066134f AS |
1383 | { |
1384 | return net2280_set_halt_and_wedge(_ep, value, 0); | |
1385 | } | |
1386 | ||
fae3c158 | 1387 | static int net2280_set_wedge(struct usb_ep *_ep) |
8066134f | 1388 | { |
9ceafcc2 MYK |
1389 | if (!_ep || _ep->name == ep0name) { |
1390 | pr_err("%s: Invalid ep=%p or ep0\n", __func__, _ep); | |
8066134f | 1391 | return -EINVAL; |
9ceafcc2 | 1392 | } |
8066134f AS |
1393 | return net2280_set_halt_and_wedge(_ep, 1, 1); |
1394 | } | |
1395 | ||
fae3c158 | 1396 | static int net2280_fifo_status(struct usb_ep *_ep) |
1da177e4 LT |
1397 | { |
1398 | struct net2280_ep *ep; | |
1399 | u32 avail; | |
1400 | ||
fae3c158 | 1401 | ep = container_of(_ep, struct net2280_ep, ep); |
9ceafcc2 MYK |
1402 | if (!_ep || (!ep->desc && ep->num != 0)) { |
1403 | pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep); | |
1da177e4 | 1404 | return -ENODEV; |
9ceafcc2 MYK |
1405 | } |
1406 | if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) { | |
1407 | dev_err(&ep->dev->pdev->dev, | |
1408 | "%s: Invalid driver=%p or speed=%d\n", | |
1409 | __func__, ep->dev->driver, ep->dev->gadget.speed); | |
1da177e4 | 1410 | return -ESHUTDOWN; |
9ceafcc2 | 1411 | } |
1da177e4 | 1412 | |
3e76fdcb | 1413 | avail = readl(&ep->regs->ep_avail) & (BIT(12) - 1); |
9ceafcc2 MYK |
1414 | if (avail > ep->fifo_size) { |
1415 | dev_err(&ep->dev->pdev->dev, "%s: Fifo overflow\n", __func__); | |
1da177e4 | 1416 | return -EOVERFLOW; |
9ceafcc2 | 1417 | } |
1da177e4 LT |
1418 | if (ep->is_in) |
1419 | avail = ep->fifo_size - avail; | |
1420 | return avail; | |
1421 | } | |
1422 | ||
fae3c158 | 1423 | static void net2280_fifo_flush(struct usb_ep *_ep) |
1da177e4 LT |
1424 | { |
1425 | struct net2280_ep *ep; | |
1426 | ||
fae3c158 | 1427 | ep = container_of(_ep, struct net2280_ep, ep); |
9ceafcc2 MYK |
1428 | if (!_ep || (!ep->desc && ep->num != 0)) { |
1429 | pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep); | |
1da177e4 | 1430 | return; |
9ceafcc2 MYK |
1431 | } |
1432 | if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) { | |
1433 | dev_err(&ep->dev->pdev->dev, | |
1434 | "%s: Invalid driver=%p or speed=%d\n", | |
1435 | __func__, ep->dev->driver, ep->dev->gadget.speed); | |
1da177e4 | 1436 | return; |
9ceafcc2 | 1437 | } |
1da177e4 | 1438 | |
3e76fdcb | 1439 | writel(BIT(FIFO_FLUSH), &ep->regs->ep_stat); |
fae3c158 | 1440 | (void) readl(&ep->regs->ep_rsp); |
1da177e4 LT |
1441 | } |
1442 | ||
901b3d75 | 1443 | static const struct usb_ep_ops net2280_ep_ops = { |
1da177e4 LT |
1444 | .enable = net2280_enable, |
1445 | .disable = net2280_disable, | |
1446 | ||
1447 | .alloc_request = net2280_alloc_request, | |
1448 | .free_request = net2280_free_request, | |
1449 | ||
1da177e4 LT |
1450 | .queue = net2280_queue, |
1451 | .dequeue = net2280_dequeue, | |
1452 | ||
1453 | .set_halt = net2280_set_halt, | |
8066134f | 1454 | .set_wedge = net2280_set_wedge, |
1da177e4 LT |
1455 | .fifo_status = net2280_fifo_status, |
1456 | .fifo_flush = net2280_fifo_flush, | |
1457 | }; | |
1458 | ||
1459 | /*-------------------------------------------------------------------------*/ | |
1460 | ||
fae3c158 | 1461 | static int net2280_get_frame(struct usb_gadget *_gadget) |
1da177e4 LT |
1462 | { |
1463 | struct net2280 *dev; | |
1464 | unsigned long flags; | |
1465 | u16 retval; | |
1466 | ||
1467 | if (!_gadget) | |
1468 | return -ENODEV; | |
fae3c158 RRD |
1469 | dev = container_of(_gadget, struct net2280, gadget); |
1470 | spin_lock_irqsave(&dev->lock, flags); | |
1471 | retval = get_idx_reg(dev->regs, REG_FRAME) & 0x03ff; | |
1472 | spin_unlock_irqrestore(&dev->lock, flags); | |
1da177e4 LT |
1473 | return retval; |
1474 | } | |
1475 | ||
fae3c158 | 1476 | static int net2280_wakeup(struct usb_gadget *_gadget) |
1da177e4 LT |
1477 | { |
1478 | struct net2280 *dev; | |
1479 | u32 tmp; | |
1480 | unsigned long flags; | |
1481 | ||
1482 | if (!_gadget) | |
1483 | return 0; | |
fae3c158 | 1484 | dev = container_of(_gadget, struct net2280, gadget); |
1da177e4 | 1485 | |
fae3c158 RRD |
1486 | spin_lock_irqsave(&dev->lock, flags); |
1487 | tmp = readl(&dev->usb->usbctl); | |
3e76fdcb RRD |
1488 | if (tmp & BIT(DEVICE_REMOTE_WAKEUP_ENABLE)) |
1489 | writel(BIT(GENERATE_RESUME), &dev->usb->usbstat); | |
fae3c158 | 1490 | spin_unlock_irqrestore(&dev->lock, flags); |
1da177e4 LT |
1491 | |
1492 | /* pci writes may still be posted */ | |
1493 | return 0; | |
1494 | } | |
1495 | ||
fae3c158 | 1496 | static int net2280_set_selfpowered(struct usb_gadget *_gadget, int value) |
1da177e4 LT |
1497 | { |
1498 | struct net2280 *dev; | |
1499 | u32 tmp; | |
1500 | unsigned long flags; | |
1501 | ||
1502 | if (!_gadget) | |
1503 | return 0; | |
fae3c158 | 1504 | dev = container_of(_gadget, struct net2280, gadget); |
1da177e4 | 1505 | |
fae3c158 RRD |
1506 | spin_lock_irqsave(&dev->lock, flags); |
1507 | tmp = readl(&dev->usb->usbctl); | |
adc82f77 | 1508 | if (value) { |
3e76fdcb | 1509 | tmp |= BIT(SELF_POWERED_STATUS); |
c8678d9f | 1510 | _gadget->is_selfpowered = 1; |
adc82f77 | 1511 | } else { |
3e76fdcb | 1512 | tmp &= ~BIT(SELF_POWERED_STATUS); |
c8678d9f | 1513 | _gadget->is_selfpowered = 0; |
adc82f77 | 1514 | } |
fae3c158 RRD |
1515 | writel(tmp, &dev->usb->usbctl); |
1516 | spin_unlock_irqrestore(&dev->lock, flags); | |
1da177e4 LT |
1517 | |
1518 | return 0; | |
1519 | } | |
1520 | ||
1521 | static int net2280_pullup(struct usb_gadget *_gadget, int is_on) | |
1522 | { | |
1523 | struct net2280 *dev; | |
1524 | u32 tmp; | |
1525 | unsigned long flags; | |
1526 | ||
1527 | if (!_gadget) | |
1528 | return -ENODEV; | |
fae3c158 | 1529 | dev = container_of(_gadget, struct net2280, gadget); |
1da177e4 | 1530 | |
fae3c158 RRD |
1531 | spin_lock_irqsave(&dev->lock, flags); |
1532 | tmp = readl(&dev->usb->usbctl); | |
1da177e4 | 1533 | dev->softconnect = (is_on != 0); |
11bece5e MYK |
1534 | if (is_on) { |
1535 | ep0_start(dev); | |
1536 | writel(tmp | BIT(USB_DETECT_ENABLE), &dev->usb->usbctl); | |
1537 | } else { | |
1538 | writel(tmp & ~BIT(USB_DETECT_ENABLE), &dev->usb->usbctl); | |
dec3c23c | 1539 | stop_activity(dev, NULL); |
11bece5e MYK |
1540 | } |
1541 | ||
fae3c158 | 1542 | spin_unlock_irqrestore(&dev->lock, flags); |
1da177e4 LT |
1543 | |
1544 | return 0; | |
1545 | } | |
1546 | ||
3e8b2318 RB |
1547 | static struct usb_ep *net2280_match_ep(struct usb_gadget *_gadget, |
1548 | struct usb_endpoint_descriptor *desc, | |
1549 | struct usb_ss_ep_comp_descriptor *ep_comp) | |
1550 | { | |
1551 | char name[8]; | |
1552 | struct usb_ep *ep; | |
1553 | ||
1554 | if (usb_endpoint_type(desc) == USB_ENDPOINT_XFER_INT) { | |
1555 | /* ep-e, ep-f are PIO with only 64 byte fifos */ | |
1556 | ep = gadget_find_ep_by_name(_gadget, "ep-e"); | |
1557 | if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp)) | |
1558 | return ep; | |
1559 | ep = gadget_find_ep_by_name(_gadget, "ep-f"); | |
1560 | if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp)) | |
1561 | return ep; | |
1562 | } | |
1563 | ||
17f6ed62 JK |
1564 | /* USB3380: Only first four endpoints have DMA channels. Allocate |
1565 | * slower interrupt endpoints from PIO hw endpoints, to allow bulk/isoc | |
1566 | * endpoints use DMA hw endpoints. | |
1567 | */ | |
1568 | if (usb_endpoint_type(desc) == USB_ENDPOINT_XFER_INT && | |
1569 | usb_endpoint_dir_in(desc)) { | |
1570 | ep = gadget_find_ep_by_name(_gadget, "ep2in"); | |
1571 | if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp)) | |
1572 | return ep; | |
1573 | ep = gadget_find_ep_by_name(_gadget, "ep4in"); | |
1574 | if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp)) | |
1575 | return ep; | |
1576 | } else if (usb_endpoint_type(desc) == USB_ENDPOINT_XFER_INT && | |
1577 | !usb_endpoint_dir_in(desc)) { | |
1578 | ep = gadget_find_ep_by_name(_gadget, "ep1out"); | |
1579 | if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp)) | |
1580 | return ep; | |
1581 | ep = gadget_find_ep_by_name(_gadget, "ep3out"); | |
1582 | if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp)) | |
1583 | return ep; | |
1584 | } else if (usb_endpoint_type(desc) != USB_ENDPOINT_XFER_BULK && | |
1585 | usb_endpoint_dir_in(desc)) { | |
1586 | ep = gadget_find_ep_by_name(_gadget, "ep1in"); | |
1587 | if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp)) | |
1588 | return ep; | |
1589 | ep = gadget_find_ep_by_name(_gadget, "ep3in"); | |
1590 | if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp)) | |
1591 | return ep; | |
1592 | } else if (usb_endpoint_type(desc) != USB_ENDPOINT_XFER_BULK && | |
1593 | !usb_endpoint_dir_in(desc)) { | |
1594 | ep = gadget_find_ep_by_name(_gadget, "ep2out"); | |
1595 | if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp)) | |
1596 | return ep; | |
1597 | ep = gadget_find_ep_by_name(_gadget, "ep4out"); | |
1598 | if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp)) | |
1599 | return ep; | |
1600 | } | |
1601 | ||
3e8b2318 RB |
1602 | /* USB3380: use same address for usb and hardware endpoints */ |
1603 | snprintf(name, sizeof(name), "ep%d%s", usb_endpoint_num(desc), | |
1604 | usb_endpoint_dir_in(desc) ? "in" : "out"); | |
1605 | ep = gadget_find_ep_by_name(_gadget, name); | |
1606 | if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp)) | |
1607 | return ep; | |
1608 | ||
1609 | return NULL; | |
1610 | } | |
1611 | ||
4cf5e00b FB |
1612 | static int net2280_start(struct usb_gadget *_gadget, |
1613 | struct usb_gadget_driver *driver); | |
22835b80 | 1614 | static int net2280_stop(struct usb_gadget *_gadget); |
b42e8090 | 1615 | static void net2280_async_callbacks(struct usb_gadget *_gadget, bool enable); |
0f91349b | 1616 | |
1da177e4 LT |
1617 | static const struct usb_gadget_ops net2280_ops = { |
1618 | .get_frame = net2280_get_frame, | |
1619 | .wakeup = net2280_wakeup, | |
1620 | .set_selfpowered = net2280_set_selfpowered, | |
1621 | .pullup = net2280_pullup, | |
4cf5e00b FB |
1622 | .udc_start = net2280_start, |
1623 | .udc_stop = net2280_stop, | |
b42e8090 | 1624 | .udc_async_callbacks = net2280_async_callbacks, |
3e8b2318 | 1625 | .match_ep = net2280_match_ep, |
1da177e4 LT |
1626 | }; |
1627 | ||
1628 | /*-------------------------------------------------------------------------*/ | |
1629 | ||
b99b406c | 1630 | #ifdef CONFIG_USB_GADGET_DEBUG_FILES |
1da177e4 LT |
1631 | |
1632 | /* FIXME move these into procfs, and use seq_file. | |
1633 | * Sysfs _still_ doesn't behave for arbitrarily sized files, | |
1634 | * and also doesn't help products using this with 2.4 kernels. | |
1635 | */ | |
1636 | ||
1637 | /* "function" sysfs attribute */ | |
ce26bd23 GKH |
1638 | static ssize_t function_show(struct device *_dev, struct device_attribute *attr, |
1639 | char *buf) | |
1da177e4 | 1640 | { |
fae3c158 | 1641 | struct net2280 *dev = dev_get_drvdata(_dev); |
1da177e4 | 1642 | |
fae3c158 RRD |
1643 | if (!dev->driver || !dev->driver->function || |
1644 | strlen(dev->driver->function) > PAGE_SIZE) | |
1da177e4 | 1645 | return 0; |
fae3c158 | 1646 | return scnprintf(buf, PAGE_SIZE, "%s\n", dev->driver->function); |
1da177e4 | 1647 | } |
ce26bd23 | 1648 | static DEVICE_ATTR_RO(function); |
1da177e4 | 1649 | |
ce26bd23 GKH |
1650 | static ssize_t registers_show(struct device *_dev, |
1651 | struct device_attribute *attr, char *buf) | |
1da177e4 LT |
1652 | { |
1653 | struct net2280 *dev; | |
1654 | char *next; | |
1655 | unsigned size, t; | |
1656 | unsigned long flags; | |
1657 | int i; | |
1658 | u32 t1, t2; | |
30e69598 | 1659 | const char *s; |
1da177e4 | 1660 | |
fae3c158 | 1661 | dev = dev_get_drvdata(_dev); |
1da177e4 LT |
1662 | next = buf; |
1663 | size = PAGE_SIZE; | |
fae3c158 | 1664 | spin_lock_irqsave(&dev->lock, flags); |
1da177e4 LT |
1665 | |
1666 | if (dev->driver) | |
1667 | s = dev->driver->driver.name; | |
1668 | else | |
1669 | s = "(none)"; | |
1670 | ||
1671 | /* Main Control Registers */ | |
fae3c158 | 1672 | t = scnprintf(next, size, "%s version " DRIVER_VERSION |
d588ff58 | 1673 | ", chiprev %04x\n\n" |
1da177e4 LT |
1674 | "devinit %03x fifoctl %08x gadget '%s'\n" |
1675 | "pci irqenb0 %02x irqenb1 %08x " | |
1676 | "irqstat0 %04x irqstat1 %08x\n", | |
1677 | driver_name, dev->chiprev, | |
fae3c158 RRD |
1678 | readl(&dev->regs->devinit), |
1679 | readl(&dev->regs->fifoctl), | |
1da177e4 | 1680 | s, |
fae3c158 RRD |
1681 | readl(&dev->regs->pciirqenb0), |
1682 | readl(&dev->regs->pciirqenb1), | |
1683 | readl(&dev->regs->irqstat0), | |
1684 | readl(&dev->regs->irqstat1)); | |
1da177e4 LT |
1685 | size -= t; |
1686 | next += t; | |
1687 | ||
1688 | /* USB Control Registers */ | |
fae3c158 RRD |
1689 | t1 = readl(&dev->usb->usbctl); |
1690 | t2 = readl(&dev->usb->usbstat); | |
3e76fdcb RRD |
1691 | if (t1 & BIT(VBUS_PIN)) { |
1692 | if (t2 & BIT(HIGH_SPEED)) | |
1da177e4 LT |
1693 | s = "high speed"; |
1694 | else if (dev->gadget.speed == USB_SPEED_UNKNOWN) | |
1695 | s = "powered"; | |
1696 | else | |
1697 | s = "full speed"; | |
1698 | /* full speed bit (6) not working?? */ | |
1699 | } else | |
1700 | s = "not attached"; | |
fae3c158 | 1701 | t = scnprintf(next, size, |
1da177e4 LT |
1702 | "stdrsp %08x usbctl %08x usbstat %08x " |
1703 | "addr 0x%02x (%s)\n", | |
fae3c158 RRD |
1704 | readl(&dev->usb->stdrsp), t1, t2, |
1705 | readl(&dev->usb->ouraddr), s); | |
1da177e4 LT |
1706 | size -= t; |
1707 | next += t; | |
1708 | ||
1709 | /* PCI Master Control Registers */ | |
1710 | ||
1711 | /* DMA Control Registers */ | |
1712 | ||
1713 | /* Configurable EP Control Registers */ | |
adc82f77 | 1714 | for (i = 0; i < dev->n_ep; i++) { |
1da177e4 LT |
1715 | struct net2280_ep *ep; |
1716 | ||
fae3c158 | 1717 | ep = &dev->ep[i]; |
1da177e4 LT |
1718 | if (i && !ep->desc) |
1719 | continue; | |
1720 | ||
adc82f77 | 1721 | t1 = readl(&ep->cfg->ep_cfg); |
fae3c158 RRD |
1722 | t2 = readl(&ep->regs->ep_rsp) & 0xff; |
1723 | t = scnprintf(next, size, | |
1da177e4 LT |
1724 | "\n%s\tcfg %05x rsp (%02x) %s%s%s%s%s%s%s%s" |
1725 | "irqenb %02x\n", | |
1726 | ep->ep.name, t1, t2, | |
3e76fdcb | 1727 | (t2 & BIT(CLEAR_NAK_OUT_PACKETS)) |
1da177e4 | 1728 | ? "NAK " : "", |
3e76fdcb | 1729 | (t2 & BIT(CLEAR_EP_HIDE_STATUS_PHASE)) |
1da177e4 | 1730 | ? "hide " : "", |
3e76fdcb | 1731 | (t2 & BIT(CLEAR_EP_FORCE_CRC_ERROR)) |
1da177e4 | 1732 | ? "CRC " : "", |
3e76fdcb | 1733 | (t2 & BIT(CLEAR_INTERRUPT_MODE)) |
1da177e4 | 1734 | ? "interrupt " : "", |
3e76fdcb | 1735 | (t2 & BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE)) |
1da177e4 | 1736 | ? "status " : "", |
3e76fdcb | 1737 | (t2 & BIT(CLEAR_NAK_OUT_PACKETS_MODE)) |
1da177e4 | 1738 | ? "NAKmode " : "", |
3e76fdcb | 1739 | (t2 & BIT(CLEAR_ENDPOINT_TOGGLE)) |
1da177e4 | 1740 | ? "DATA1 " : "DATA0 ", |
3e76fdcb | 1741 | (t2 & BIT(CLEAR_ENDPOINT_HALT)) |
1da177e4 | 1742 | ? "HALT " : "", |
fae3c158 | 1743 | readl(&ep->regs->ep_irqenb)); |
1da177e4 LT |
1744 | size -= t; |
1745 | next += t; | |
1746 | ||
fae3c158 | 1747 | t = scnprintf(next, size, |
1da177e4 LT |
1748 | "\tstat %08x avail %04x " |
1749 | "(ep%d%s-%s)%s\n", | |
fae3c158 RRD |
1750 | readl(&ep->regs->ep_stat), |
1751 | readl(&ep->regs->ep_avail), | |
1752 | t1 & 0x0f, DIR_STRING(t1), | |
1753 | type_string(t1 >> 8), | |
1da177e4 LT |
1754 | ep->stopped ? "*" : ""); |
1755 | size -= t; | |
1756 | next += t; | |
1757 | ||
1758 | if (!ep->dma) | |
1759 | continue; | |
1760 | ||
fae3c158 | 1761 | t = scnprintf(next, size, |
1da177e4 LT |
1762 | " dma\tctl %08x stat %08x count %08x\n" |
1763 | "\taddr %08x desc %08x\n", | |
fae3c158 RRD |
1764 | readl(&ep->dma->dmactl), |
1765 | readl(&ep->dma->dmastat), | |
1766 | readl(&ep->dma->dmacount), | |
1767 | readl(&ep->dma->dmaaddr), | |
1768 | readl(&ep->dma->dmadesc)); | |
1da177e4 LT |
1769 | size -= t; |
1770 | next += t; | |
1771 | ||
1772 | } | |
1773 | ||
fae3c158 | 1774 | /* Indexed Registers (none yet) */ |
1da177e4 LT |
1775 | |
1776 | /* Statistics */ | |
fae3c158 | 1777 | t = scnprintf(next, size, "\nirqs: "); |
1da177e4 LT |
1778 | size -= t; |
1779 | next += t; | |
adc82f77 | 1780 | for (i = 0; i < dev->n_ep; i++) { |
1da177e4 LT |
1781 | struct net2280_ep *ep; |
1782 | ||
fae3c158 | 1783 | ep = &dev->ep[i]; |
1da177e4 LT |
1784 | if (i && !ep->irqs) |
1785 | continue; | |
fae3c158 | 1786 | t = scnprintf(next, size, " %s/%lu", ep->ep.name, ep->irqs); |
1da177e4 LT |
1787 | size -= t; |
1788 | next += t; | |
1789 | ||
1790 | } | |
fae3c158 | 1791 | t = scnprintf(next, size, "\n"); |
1da177e4 LT |
1792 | size -= t; |
1793 | next += t; | |
1794 | ||
fae3c158 | 1795 | spin_unlock_irqrestore(&dev->lock, flags); |
1da177e4 LT |
1796 | |
1797 | return PAGE_SIZE - size; | |
1798 | } | |
ce26bd23 | 1799 | static DEVICE_ATTR_RO(registers); |
1da177e4 | 1800 | |
ce26bd23 GKH |
1801 | static ssize_t queues_show(struct device *_dev, struct device_attribute *attr, |
1802 | char *buf) | |
1da177e4 LT |
1803 | { |
1804 | struct net2280 *dev; | |
1805 | char *next; | |
1806 | unsigned size; | |
1807 | unsigned long flags; | |
1808 | int i; | |
1809 | ||
fae3c158 | 1810 | dev = dev_get_drvdata(_dev); |
1da177e4 LT |
1811 | next = buf; |
1812 | size = PAGE_SIZE; | |
fae3c158 | 1813 | spin_lock_irqsave(&dev->lock, flags); |
1da177e4 | 1814 | |
adc82f77 | 1815 | for (i = 0; i < dev->n_ep; i++) { |
fae3c158 | 1816 | struct net2280_ep *ep = &dev->ep[i]; |
1da177e4 LT |
1817 | struct net2280_request *req; |
1818 | int t; | |
1819 | ||
1820 | if (i != 0) { | |
1821 | const struct usb_endpoint_descriptor *d; | |
1822 | ||
1823 | d = ep->desc; | |
1824 | if (!d) | |
1825 | continue; | |
1826 | t = d->bEndpointAddress; | |
fae3c158 | 1827 | t = scnprintf(next, size, |
1da177e4 LT |
1828 | "\n%s (ep%d%s-%s) max %04x %s fifo %d\n", |
1829 | ep->ep.name, t & USB_ENDPOINT_NUMBER_MASK, | |
1830 | (t & USB_DIR_IN) ? "in" : "out", | |
a27f37a1 | 1831 | type_string(d->bmAttributes), |
090bdb5c | 1832 | usb_endpoint_maxp(d), |
1da177e4 LT |
1833 | ep->dma ? "dma" : "pio", ep->fifo_size |
1834 | ); | |
1835 | } else /* ep0 should only have one transfer queued */ | |
fae3c158 | 1836 | t = scnprintf(next, size, "ep0 max 64 pio %s\n", |
1da177e4 LT |
1837 | ep->is_in ? "in" : "out"); |
1838 | if (t <= 0 || t > size) | |
1839 | goto done; | |
1840 | size -= t; | |
1841 | next += t; | |
1842 | ||
fae3c158 RRD |
1843 | if (list_empty(&ep->queue)) { |
1844 | t = scnprintf(next, size, "\t(nothing queued)\n"); | |
1da177e4 LT |
1845 | if (t <= 0 || t > size) |
1846 | goto done; | |
1847 | size -= t; | |
1848 | next += t; | |
1849 | continue; | |
1850 | } | |
fae3c158 RRD |
1851 | list_for_each_entry(req, &ep->queue, queue) { |
1852 | if (ep->dma && req->td_dma == readl(&ep->dma->dmadesc)) | |
1853 | t = scnprintf(next, size, | |
1da177e4 LT |
1854 | "\treq %p len %d/%d " |
1855 | "buf %p (dmacount %08x)\n", | |
1856 | &req->req, req->req.actual, | |
1857 | req->req.length, req->req.buf, | |
fae3c158 | 1858 | readl(&ep->dma->dmacount)); |
1da177e4 | 1859 | else |
fae3c158 | 1860 | t = scnprintf(next, size, |
1da177e4 LT |
1861 | "\treq %p len %d/%d buf %p\n", |
1862 | &req->req, req->req.actual, | |
1863 | req->req.length, req->req.buf); | |
1864 | if (t <= 0 || t > size) | |
1865 | goto done; | |
1866 | size -= t; | |
1867 | next += t; | |
1868 | ||
1869 | if (ep->dma) { | |
1870 | struct net2280_dma *td; | |
1871 | ||
1872 | td = req->td; | |
fae3c158 | 1873 | t = scnprintf(next, size, "\t td %08x " |
1da177e4 LT |
1874 | " count %08x buf %08x desc %08x\n", |
1875 | (u32) req->td_dma, | |
fae3c158 RRD |
1876 | le32_to_cpu(td->dmacount), |
1877 | le32_to_cpu(td->dmaaddr), | |
1878 | le32_to_cpu(td->dmadesc)); | |
1da177e4 LT |
1879 | if (t <= 0 || t > size) |
1880 | goto done; | |
1881 | size -= t; | |
1882 | next += t; | |
1883 | } | |
1884 | } | |
1885 | } | |
1886 | ||
1887 | done: | |
fae3c158 | 1888 | spin_unlock_irqrestore(&dev->lock, flags); |
1da177e4 LT |
1889 | return PAGE_SIZE - size; |
1890 | } | |
ce26bd23 | 1891 | static DEVICE_ATTR_RO(queues); |
1da177e4 LT |
1892 | |
1893 | ||
1894 | #else | |
1895 | ||
fae3c158 RRD |
1896 | #define device_create_file(a, b) (0) |
1897 | #define device_remove_file(a, b) do { } while (0) | |
1da177e4 LT |
1898 | |
1899 | #endif | |
1900 | ||
1901 | /*-------------------------------------------------------------------------*/ | |
1902 | ||
1903 | /* another driver-specific mode might be a request type doing dma | |
1904 | * to/from another device fifo instead of to/from memory. | |
1905 | */ | |
1906 | ||
fae3c158 | 1907 | static void set_fifo_mode(struct net2280 *dev, int mode) |
1da177e4 LT |
1908 | { |
1909 | /* keeping high bits preserves BAR2 */ | |
fae3c158 | 1910 | writel((0xffff << PCI_BASE2_RANGE) | mode, &dev->regs->fifoctl); |
1da177e4 LT |
1911 | |
1912 | /* always ep-{a,b,e,f} ... maybe not ep-c or ep-d */ | |
fae3c158 RRD |
1913 | INIT_LIST_HEAD(&dev->gadget.ep_list); |
1914 | list_add_tail(&dev->ep[1].ep.ep_list, &dev->gadget.ep_list); | |
1915 | list_add_tail(&dev->ep[2].ep.ep_list, &dev->gadget.ep_list); | |
1da177e4 LT |
1916 | switch (mode) { |
1917 | case 0: | |
fae3c158 RRD |
1918 | list_add_tail(&dev->ep[3].ep.ep_list, &dev->gadget.ep_list); |
1919 | list_add_tail(&dev->ep[4].ep.ep_list, &dev->gadget.ep_list); | |
1920 | dev->ep[1].fifo_size = dev->ep[2].fifo_size = 1024; | |
1da177e4 LT |
1921 | break; |
1922 | case 1: | |
fae3c158 | 1923 | dev->ep[1].fifo_size = dev->ep[2].fifo_size = 2048; |
1da177e4 LT |
1924 | break; |
1925 | case 2: | |
fae3c158 RRD |
1926 | list_add_tail(&dev->ep[3].ep.ep_list, &dev->gadget.ep_list); |
1927 | dev->ep[1].fifo_size = 2048; | |
1928 | dev->ep[2].fifo_size = 1024; | |
1da177e4 LT |
1929 | break; |
1930 | } | |
1931 | /* fifo sizes for ep0, ep-c, ep-d, ep-e, and ep-f never change */ | |
fae3c158 RRD |
1932 | list_add_tail(&dev->ep[5].ep.ep_list, &dev->gadget.ep_list); |
1933 | list_add_tail(&dev->ep[6].ep.ep_list, &dev->gadget.ep_list); | |
1da177e4 LT |
1934 | } |
1935 | ||
adc82f77 RRD |
1936 | static void defect7374_disable_data_eps(struct net2280 *dev) |
1937 | { | |
1938 | /* | |
1939 | * For Defect 7374, disable data EPs (and more): | |
1940 | * - This phase undoes the earlier phase of the Defect 7374 workaround, | |
1941 | * returing ep regs back to normal. | |
1942 | */ | |
1943 | struct net2280_ep *ep; | |
1944 | int i; | |
1945 | unsigned char ep_sel; | |
1946 | u32 tmp_reg; | |
1947 | ||
1948 | for (i = 1; i < 5; i++) { | |
1949 | ep = &dev->ep[i]; | |
81e9d14a | 1950 | writel(i, &ep->cfg->ep_cfg); |
adc82f77 RRD |
1951 | } |
1952 | ||
1953 | /* CSROUT, CSRIN, PCIOUT, PCIIN, STATIN, RCIN */ | |
1954 | for (i = 0; i < 6; i++) | |
1955 | writel(0, &dev->dep[i].dep_cfg); | |
1956 | ||
1957 | for (ep_sel = 0; ep_sel <= 21; ep_sel++) { | |
1958 | /* Select an endpoint for subsequent operations: */ | |
1959 | tmp_reg = readl(&dev->plregs->pl_ep_ctrl); | |
1960 | writel(((tmp_reg & ~0x1f) | ep_sel), &dev->plregs->pl_ep_ctrl); | |
1961 | ||
1962 | if (ep_sel < 2 || (ep_sel > 9 && ep_sel < 14) || | |
1963 | ep_sel == 18 || ep_sel == 20) | |
1964 | continue; | |
1965 | ||
1966 | /* Change settings on some selected endpoints */ | |
1967 | tmp_reg = readl(&dev->plregs->pl_ep_cfg_4); | |
3e76fdcb | 1968 | tmp_reg &= ~BIT(NON_CTRL_IN_TOLERATE_BAD_DIR); |
adc82f77 RRD |
1969 | writel(tmp_reg, &dev->plregs->pl_ep_cfg_4); |
1970 | tmp_reg = readl(&dev->plregs->pl_ep_ctrl); | |
3e76fdcb | 1971 | tmp_reg |= BIT(EP_INITIALIZED); |
adc82f77 RRD |
1972 | writel(tmp_reg, &dev->plregs->pl_ep_ctrl); |
1973 | } | |
1974 | } | |
1975 | ||
1976 | static void defect7374_enable_data_eps_zero(struct net2280 *dev) | |
1977 | { | |
1978 | u32 tmp = 0, tmp_reg; | |
5517525e | 1979 | u32 scratch; |
adc82f77 RRD |
1980 | int i; |
1981 | unsigned char ep_sel; | |
1982 | ||
1983 | scratch = get_idx_reg(dev->regs, SCRATCH); | |
5517525e RRD |
1984 | |
1985 | WARN_ON((scratch & (0xf << DEFECT7374_FSM_FIELD)) | |
1986 | == DEFECT7374_FSM_SS_CONTROL_READ); | |
1987 | ||
adc82f77 RRD |
1988 | scratch &= ~(0xf << DEFECT7374_FSM_FIELD); |
1989 | ||
5517525e RRD |
1990 | ep_warn(dev, "Operate Defect 7374 workaround soft this time"); |
1991 | ep_warn(dev, "It will operate on cold-reboot and SS connect"); | |
adc82f77 | 1992 | |
5517525e RRD |
1993 | /*GPEPs:*/ |
1994 | tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_DIRECTION) | | |
1995 | (2 << OUT_ENDPOINT_TYPE) | (2 << IN_ENDPOINT_TYPE) | | |
1996 | ((dev->enhanced_mode) ? | |
25d40ee8 MYK |
1997 | BIT(OUT_ENDPOINT_ENABLE) | BIT(IN_ENDPOINT_ENABLE) : |
1998 | BIT(ENDPOINT_ENABLE))); | |
adc82f77 | 1999 | |
5517525e RRD |
2000 | for (i = 1; i < 5; i++) |
2001 | writel(tmp, &dev->ep[i].cfg->ep_cfg); | |
adc82f77 | 2002 | |
5517525e RRD |
2003 | /* CSRIN, PCIIN, STATIN, RCIN*/ |
2004 | tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_ENABLE)); | |
2005 | writel(tmp, &dev->dep[1].dep_cfg); | |
2006 | writel(tmp, &dev->dep[3].dep_cfg); | |
2007 | writel(tmp, &dev->dep[4].dep_cfg); | |
2008 | writel(tmp, &dev->dep[5].dep_cfg); | |
adc82f77 | 2009 | |
5517525e RRD |
2010 | /*Implemented for development and debug. |
2011 | * Can be refined/tuned later.*/ | |
2012 | for (ep_sel = 0; ep_sel <= 21; ep_sel++) { | |
2013 | /* Select an endpoint for subsequent operations: */ | |
2014 | tmp_reg = readl(&dev->plregs->pl_ep_ctrl); | |
2015 | writel(((tmp_reg & ~0x1f) | ep_sel), | |
2016 | &dev->plregs->pl_ep_ctrl); | |
2017 | ||
2018 | if (ep_sel == 1) { | |
2019 | tmp = | |
2020 | (readl(&dev->plregs->pl_ep_ctrl) | | |
2021 | BIT(CLEAR_ACK_ERROR_CODE) | 0); | |
2022 | writel(tmp, &dev->plregs->pl_ep_ctrl); | |
2023 | continue; | |
adc82f77 RRD |
2024 | } |
2025 | ||
5517525e RRD |
2026 | if (ep_sel == 0 || (ep_sel > 9 && ep_sel < 14) || |
2027 | ep_sel == 18 || ep_sel == 20) | |
2028 | continue; | |
2029 | ||
2030 | tmp = (readl(&dev->plregs->pl_ep_cfg_4) | | |
2031 | BIT(NON_CTRL_IN_TOLERATE_BAD_DIR) | 0); | |
2032 | writel(tmp, &dev->plregs->pl_ep_cfg_4); | |
2033 | ||
2034 | tmp = readl(&dev->plregs->pl_ep_ctrl) & | |
2035 | ~BIT(EP_INITIALIZED); | |
2036 | writel(tmp, &dev->plregs->pl_ep_ctrl); | |
adc82f77 | 2037 | |
adc82f77 | 2038 | } |
5517525e RRD |
2039 | |
2040 | /* Set FSM to focus on the first Control Read: | |
2041 | * - Tip: Connection speed is known upon the first | |
2042 | * setup request.*/ | |
2043 | scratch |= DEFECT7374_FSM_WAITING_FOR_CONTROL_READ; | |
2044 | set_idx_reg(dev->regs, SCRATCH, scratch); | |
2045 | ||
adc82f77 RRD |
2046 | } |
2047 | ||
1da177e4 LT |
2048 | /* keeping it simple: |
2049 | * - one bus driver, initted first; | |
2050 | * - one function driver, initted second | |
2051 | * | |
2052 | * most of the work to support multiple net2280 controllers would | |
2053 | * be to associate this gadget driver (yes?) with all of them, or | |
2054 | * perhaps to bind specific drivers to specific devices. | |
2055 | */ | |
2056 | ||
adc82f77 | 2057 | static void usb_reset_228x(struct net2280 *dev) |
1da177e4 LT |
2058 | { |
2059 | u32 tmp; | |
2060 | ||
2061 | dev->gadget.speed = USB_SPEED_UNKNOWN; | |
fae3c158 | 2062 | (void) readl(&dev->usb->usbctl); |
1da177e4 | 2063 | |
fae3c158 | 2064 | net2280_led_init(dev); |
1da177e4 LT |
2065 | |
2066 | /* disable automatic responses, and irqs */ | |
fae3c158 RRD |
2067 | writel(0, &dev->usb->stdrsp); |
2068 | writel(0, &dev->regs->pciirqenb0); | |
2069 | writel(0, &dev->regs->pciirqenb1); | |
1da177e4 LT |
2070 | |
2071 | /* clear old dma and irq state */ | |
2072 | for (tmp = 0; tmp < 4; tmp++) { | |
adc82f77 | 2073 | struct net2280_ep *ep = &dev->ep[tmp + 1]; |
1da177e4 | 2074 | if (ep->dma) |
adc82f77 | 2075 | abort_dma(ep); |
1da177e4 | 2076 | } |
adc82f77 | 2077 | |
fae3c158 | 2078 | writel(~0, &dev->regs->irqstat0), |
3e76fdcb | 2079 | writel(~(u32)BIT(SUSPEND_REQUEST_INTERRUPT), &dev->regs->irqstat1), |
1da177e4 LT |
2080 | |
2081 | /* reset, and enable pci */ | |
3e76fdcb RRD |
2082 | tmp = readl(&dev->regs->devinit) | |
2083 | BIT(PCI_ENABLE) | | |
2084 | BIT(FIFO_SOFT_RESET) | | |
2085 | BIT(USB_SOFT_RESET) | | |
2086 | BIT(M8051_RESET); | |
fae3c158 | 2087 | writel(tmp, &dev->regs->devinit); |
1da177e4 LT |
2088 | |
2089 | /* standard fifo and endpoint allocations */ | |
fae3c158 | 2090 | set_fifo_mode(dev, (fifo_mode <= 2) ? fifo_mode : 0); |
1da177e4 LT |
2091 | } |
2092 | ||
adc82f77 RRD |
2093 | static void usb_reset_338x(struct net2280 *dev) |
2094 | { | |
2095 | u32 tmp; | |
adc82f77 RRD |
2096 | |
2097 | dev->gadget.speed = USB_SPEED_UNKNOWN; | |
2098 | (void)readl(&dev->usb->usbctl); | |
2099 | ||
2100 | net2280_led_init(dev); | |
2101 | ||
5517525e | 2102 | if (dev->bug7734_patched) { |
adc82f77 RRD |
2103 | /* disable automatic responses, and irqs */ |
2104 | writel(0, &dev->usb->stdrsp); | |
2105 | writel(0, &dev->regs->pciirqenb0); | |
2106 | writel(0, &dev->regs->pciirqenb1); | |
2107 | } | |
2108 | ||
2109 | /* clear old dma and irq state */ | |
2110 | for (tmp = 0; tmp < 4; tmp++) { | |
2111 | struct net2280_ep *ep = &dev->ep[tmp + 1]; | |
3fc0a7c3 | 2112 | struct net2280_dma_regs __iomem *dma; |
adc82f77 | 2113 | |
3fc0a7c3 | 2114 | if (ep->dma) { |
adc82f77 | 2115 | abort_dma(ep); |
3fc0a7c3 MYK |
2116 | } else { |
2117 | dma = &dev->dma[tmp]; | |
2118 | writel(BIT(DMA_ABORT), &dma->dmastat); | |
2119 | writel(0, &dma->dmactl); | |
2120 | } | |
adc82f77 RRD |
2121 | } |
2122 | ||
2123 | writel(~0, &dev->regs->irqstat0), writel(~0, &dev->regs->irqstat1); | |
2124 | ||
5517525e | 2125 | if (dev->bug7734_patched) { |
adc82f77 RRD |
2126 | /* reset, and enable pci */ |
2127 | tmp = readl(&dev->regs->devinit) | | |
3e76fdcb RRD |
2128 | BIT(PCI_ENABLE) | |
2129 | BIT(FIFO_SOFT_RESET) | | |
2130 | BIT(USB_SOFT_RESET) | | |
2131 | BIT(M8051_RESET); | |
adc82f77 RRD |
2132 | |
2133 | writel(tmp, &dev->regs->devinit); | |
2134 | } | |
2135 | ||
2136 | /* always ep-{1,2,3,4} ... maybe not ep-3 or ep-4 */ | |
2137 | INIT_LIST_HEAD(&dev->gadget.ep_list); | |
2138 | ||
2139 | for (tmp = 1; tmp < dev->n_ep; tmp++) | |
2140 | list_add_tail(&dev->ep[tmp].ep.ep_list, &dev->gadget.ep_list); | |
2141 | ||
2142 | } | |
2143 | ||
2144 | static void usb_reset(struct net2280 *dev) | |
2145 | { | |
2eeb0016 | 2146 | if (dev->quirks & PLX_LEGACY) |
adc82f77 RRD |
2147 | return usb_reset_228x(dev); |
2148 | return usb_reset_338x(dev); | |
2149 | } | |
2150 | ||
2151 | static void usb_reinit_228x(struct net2280 *dev) | |
1da177e4 LT |
2152 | { |
2153 | u32 tmp; | |
1da177e4 LT |
2154 | |
2155 | /* basic endpoint init */ | |
2156 | for (tmp = 0; tmp < 7; tmp++) { | |
fae3c158 | 2157 | struct net2280_ep *ep = &dev->ep[tmp]; |
1da177e4 | 2158 | |
c23c3c3c RB |
2159 | ep->ep.name = ep_info_dft[tmp].name; |
2160 | ep->ep.caps = ep_info_dft[tmp].caps; | |
1da177e4 LT |
2161 | ep->dev = dev; |
2162 | ep->num = tmp; | |
2163 | ||
2164 | if (tmp > 0 && tmp <= 4) { | |
2165 | ep->fifo_size = 1024; | |
d588ff58 | 2166 | ep->dma = &dev->dma[tmp - 1]; |
1da177e4 LT |
2167 | } else |
2168 | ep->fifo_size = 64; | |
fae3c158 | 2169 | ep->regs = &dev->epregs[tmp]; |
adc82f77 RRD |
2170 | ep->cfg = &dev->epregs[tmp]; |
2171 | ep_reset_228x(dev->regs, ep); | |
1da177e4 | 2172 | } |
fae3c158 RRD |
2173 | usb_ep_set_maxpacket_limit(&dev->ep[0].ep, 64); |
2174 | usb_ep_set_maxpacket_limit(&dev->ep[5].ep, 64); | |
2175 | usb_ep_set_maxpacket_limit(&dev->ep[6].ep, 64); | |
1da177e4 | 2176 | |
fae3c158 RRD |
2177 | dev->gadget.ep0 = &dev->ep[0].ep; |
2178 | dev->ep[0].stopped = 0; | |
2179 | INIT_LIST_HEAD(&dev->gadget.ep0->ep_list); | |
1da177e4 LT |
2180 | |
2181 | /* we want to prevent lowlevel/insecure access from the USB host, | |
2182 | * but erratum 0119 means this enable bit is ignored | |
2183 | */ | |
2184 | for (tmp = 0; tmp < 5; tmp++) | |
fae3c158 | 2185 | writel(EP_DONTUSE, &dev->dep[tmp].dep_cfg); |
1da177e4 LT |
2186 | } |
2187 | ||
adc82f77 RRD |
2188 | static void usb_reinit_338x(struct net2280 *dev) |
2189 | { | |
adc82f77 RRD |
2190 | int i; |
2191 | u32 tmp, val; | |
adc82f77 RRD |
2192 | static const u32 ne[9] = { 0, 1, 2, 3, 4, 1, 2, 3, 4 }; |
2193 | static const u32 ep_reg_addr[9] = { 0x00, 0xC0, 0x00, 0xC0, 0x00, | |
2194 | 0x00, 0xC0, 0x00, 0xC0 }; | |
2195 | ||
adc82f77 RRD |
2196 | /* basic endpoint init */ |
2197 | for (i = 0; i < dev->n_ep; i++) { | |
2198 | struct net2280_ep *ep = &dev->ep[i]; | |
2199 | ||
c23c3c3c RB |
2200 | ep->ep.name = dev->enhanced_mode ? ep_info_adv[i].name : |
2201 | ep_info_dft[i].name; | |
2202 | ep->ep.caps = dev->enhanced_mode ? ep_info_adv[i].caps : | |
2203 | ep_info_dft[i].caps; | |
adc82f77 RRD |
2204 | ep->dev = dev; |
2205 | ep->num = i; | |
2206 | ||
d588ff58 | 2207 | if (i > 0 && i <= 4) |
adc82f77 RRD |
2208 | ep->dma = &dev->dma[i - 1]; |
2209 | ||
2210 | if (dev->enhanced_mode) { | |
2211 | ep->cfg = &dev->epregs[ne[i]]; | |
c65c4f05 MYK |
2212 | /* |
2213 | * Set USB endpoint number, hardware allows same number | |
2214 | * in both directions. | |
2215 | */ | |
2216 | if (i > 0 && i < 5) | |
2217 | writel(ne[i], &ep->cfg->ep_cfg); | |
adc82f77 | 2218 | ep->regs = (struct net2280_ep_regs __iomem *) |
c43e97b2 | 2219 | (((void __iomem *)&dev->epregs[ne[i]]) + |
adc82f77 | 2220 | ep_reg_addr[i]); |
adc82f77 RRD |
2221 | } else { |
2222 | ep->cfg = &dev->epregs[i]; | |
2223 | ep->regs = &dev->epregs[i]; | |
adc82f77 RRD |
2224 | } |
2225 | ||
2226 | ep->fifo_size = (i != 0) ? 2048 : 512; | |
2227 | ||
2228 | ep_reset_338x(dev->regs, ep); | |
2229 | } | |
2230 | usb_ep_set_maxpacket_limit(&dev->ep[0].ep, 512); | |
2231 | ||
2232 | dev->gadget.ep0 = &dev->ep[0].ep; | |
2233 | dev->ep[0].stopped = 0; | |
2234 | ||
2235 | /* Link layer set up */ | |
5517525e | 2236 | if (dev->bug7734_patched) { |
adc82f77 | 2237 | tmp = readl(&dev->usb_ext->usbctl2) & |
3e76fdcb | 2238 | ~(BIT(U1_ENABLE) | BIT(U2_ENABLE) | BIT(LTM_ENABLE)); |
adc82f77 RRD |
2239 | writel(tmp, &dev->usb_ext->usbctl2); |
2240 | } | |
2241 | ||
2242 | /* Hardware Defect and Workaround */ | |
ec8ca8a3 | 2243 | val = readl(&dev->llregs->ll_lfps_5); |
adc82f77 RRD |
2244 | val &= ~(0xf << TIMER_LFPS_6US); |
2245 | val |= 0x5 << TIMER_LFPS_6US; | |
ec8ca8a3 | 2246 | writel(val, &dev->llregs->ll_lfps_5); |
adc82f77 | 2247 | |
ec8ca8a3 | 2248 | val = readl(&dev->llregs->ll_lfps_6); |
adc82f77 RRD |
2249 | val &= ~(0xffff << TIMER_LFPS_80US); |
2250 | val |= 0x0100 << TIMER_LFPS_80US; | |
ec8ca8a3 | 2251 | writel(val, &dev->llregs->ll_lfps_6); |
adc82f77 RRD |
2252 | |
2253 | /* | |
2254 | * AA_AB Errata. Issue 4. Workaround for SuperSpeed USB | |
2255 | * Hot Reset Exit Handshake may Fail in Specific Case using | |
2256 | * Default Register Settings. Workaround for Enumeration test. | |
2257 | */ | |
ec8ca8a3 | 2258 | val = readl(&dev->llregs->ll_tsn_counters_2); |
adc82f77 RRD |
2259 | val &= ~(0x1f << HOT_TX_NORESET_TS2); |
2260 | val |= 0x10 << HOT_TX_NORESET_TS2; | |
ec8ca8a3 | 2261 | writel(val, &dev->llregs->ll_tsn_counters_2); |
adc82f77 | 2262 | |
ec8ca8a3 | 2263 | val = readl(&dev->llregs->ll_tsn_counters_3); |
adc82f77 RRD |
2264 | val &= ~(0x1f << HOT_RX_RESET_TS2); |
2265 | val |= 0x3 << HOT_RX_RESET_TS2; | |
ec8ca8a3 | 2266 | writel(val, &dev->llregs->ll_tsn_counters_3); |
adc82f77 | 2267 | |
18a93cd3 BH |
2268 | /* |
2269 | * AB errata. Errata 11. Workaround for Default Duration of LFPS | |
2270 | * Handshake Signaling for Device-Initiated U1 Exit is too short. | |
2271 | * Without this, various enumeration failures observed with | |
2272 | * modern superspeed hosts. | |
2273 | */ | |
2274 | val = readl(&dev->llregs->ll_lfps_timers_2); | |
2275 | writel((val & 0xffff0000) | LFPS_TIMERS_2_WORKAROUND_VALUE, | |
2276 | &dev->llregs->ll_lfps_timers_2); | |
2277 | ||
adc82f77 RRD |
2278 | /* |
2279 | * Set Recovery Idle to Recover bit: | |
2280 | * - On SS connections, setting Recovery Idle to Recover Fmw improves | |
2281 | * link robustness with various hosts and hubs. | |
2282 | * - It is safe to set for all connection speeds; all chip revisions. | |
2283 | * - R-M-W to leave other bits undisturbed. | |
2284 | * - Reference PLX TT-7372 | |
ec8ca8a3 BH |
2285 | */ |
2286 | val = readl(&dev->llregs->ll_tsn_chicken_bit); | |
3e76fdcb | 2287 | val |= BIT(RECOVERY_IDLE_TO_RECOVER_FMW); |
ec8ca8a3 | 2288 | writel(val, &dev->llregs->ll_tsn_chicken_bit); |
adc82f77 RRD |
2289 | |
2290 | INIT_LIST_HEAD(&dev->gadget.ep0->ep_list); | |
2291 | ||
2292 | /* disable dedicated endpoints */ | |
2293 | writel(0x0D, &dev->dep[0].dep_cfg); | |
2294 | writel(0x0D, &dev->dep[1].dep_cfg); | |
2295 | writel(0x0E, &dev->dep[2].dep_cfg); | |
2296 | writel(0x0E, &dev->dep[3].dep_cfg); | |
2297 | writel(0x0F, &dev->dep[4].dep_cfg); | |
2298 | writel(0x0C, &dev->dep[5].dep_cfg); | |
2299 | } | |
2300 | ||
2301 | static void usb_reinit(struct net2280 *dev) | |
2302 | { | |
2eeb0016 | 2303 | if (dev->quirks & PLX_LEGACY) |
adc82f77 RRD |
2304 | return usb_reinit_228x(dev); |
2305 | return usb_reinit_338x(dev); | |
2306 | } | |
2307 | ||
2308 | static void ep0_start_228x(struct net2280 *dev) | |
1da177e4 | 2309 | { |
3e76fdcb RRD |
2310 | writel(BIT(CLEAR_EP_HIDE_STATUS_PHASE) | |
2311 | BIT(CLEAR_NAK_OUT_PACKETS) | | |
ae8e530a RRD |
2312 | BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE), |
2313 | &dev->epregs[0].ep_rsp); | |
1da177e4 LT |
2314 | |
2315 | /* | |
2316 | * hardware optionally handles a bunch of standard requests | |
2317 | * that the API hides from drivers anyway. have it do so. | |
2318 | * endpoint status/features are handled in software, to | |
2319 | * help pass tests for some dubious behavior. | |
2320 | */ | |
3e76fdcb RRD |
2321 | writel(BIT(SET_TEST_MODE) | |
2322 | BIT(SET_ADDRESS) | | |
2323 | BIT(DEVICE_SET_CLEAR_DEVICE_REMOTE_WAKEUP) | | |
2324 | BIT(GET_DEVICE_STATUS) | | |
ae8e530a RRD |
2325 | BIT(GET_INTERFACE_STATUS), |
2326 | &dev->usb->stdrsp); | |
3e76fdcb RRD |
2327 | writel(BIT(USB_ROOT_PORT_WAKEUP_ENABLE) | |
2328 | BIT(SELF_POWERED_USB_DEVICE) | | |
2329 | BIT(REMOTE_WAKEUP_SUPPORT) | | |
2330 | (dev->softconnect << USB_DETECT_ENABLE) | | |
2331 | BIT(SELF_POWERED_STATUS), | |
2332 | &dev->usb->usbctl); | |
1da177e4 LT |
2333 | |
2334 | /* enable irqs so we can see ep0 and general operation */ | |
3e76fdcb RRD |
2335 | writel(BIT(SETUP_PACKET_INTERRUPT_ENABLE) | |
2336 | BIT(ENDPOINT_0_INTERRUPT_ENABLE), | |
2337 | &dev->regs->pciirqenb0); | |
2338 | writel(BIT(PCI_INTERRUPT_ENABLE) | | |
2339 | BIT(PCI_MASTER_ABORT_RECEIVED_INTERRUPT_ENABLE) | | |
2340 | BIT(PCI_TARGET_ABORT_RECEIVED_INTERRUPT_ENABLE) | | |
2341 | BIT(PCI_RETRY_ABORT_INTERRUPT_ENABLE) | | |
2342 | BIT(VBUS_INTERRUPT_ENABLE) | | |
2343 | BIT(ROOT_PORT_RESET_INTERRUPT_ENABLE) | | |
2344 | BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE), | |
2345 | &dev->regs->pciirqenb1); | |
1da177e4 LT |
2346 | |
2347 | /* don't leave any writes posted */ | |
fae3c158 | 2348 | (void) readl(&dev->usb->usbctl); |
1da177e4 LT |
2349 | } |
2350 | ||
adc82f77 RRD |
2351 | static void ep0_start_338x(struct net2280 *dev) |
2352 | { | |
adc82f77 | 2353 | |
5517525e | 2354 | if (dev->bug7734_patched) |
3e76fdcb RRD |
2355 | writel(BIT(CLEAR_NAK_OUT_PACKETS_MODE) | |
2356 | BIT(SET_EP_HIDE_STATUS_PHASE), | |
adc82f77 RRD |
2357 | &dev->epregs[0].ep_rsp); |
2358 | ||
2359 | /* | |
2360 | * hardware optionally handles a bunch of standard requests | |
2361 | * that the API hides from drivers anyway. have it do so. | |
2362 | * endpoint status/features are handled in software, to | |
2363 | * help pass tests for some dubious behavior. | |
2364 | */ | |
3e76fdcb RRD |
2365 | writel(BIT(SET_ISOCHRONOUS_DELAY) | |
2366 | BIT(SET_SEL) | | |
2367 | BIT(SET_TEST_MODE) | | |
2368 | BIT(SET_ADDRESS) | | |
2369 | BIT(GET_INTERFACE_STATUS) | | |
2370 | BIT(GET_DEVICE_STATUS), | |
adc82f77 RRD |
2371 | &dev->usb->stdrsp); |
2372 | dev->wakeup_enable = 1; | |
3e76fdcb | 2373 | writel(BIT(USB_ROOT_PORT_WAKEUP_ENABLE) | |
adc82f77 | 2374 | (dev->softconnect << USB_DETECT_ENABLE) | |
3e76fdcb | 2375 | BIT(DEVICE_REMOTE_WAKEUP_ENABLE), |
adc82f77 RRD |
2376 | &dev->usb->usbctl); |
2377 | ||
2378 | /* enable irqs so we can see ep0 and general operation */ | |
3e76fdcb | 2379 | writel(BIT(SETUP_PACKET_INTERRUPT_ENABLE) | |
ae8e530a RRD |
2380 | BIT(ENDPOINT_0_INTERRUPT_ENABLE), |
2381 | &dev->regs->pciirqenb0); | |
3e76fdcb RRD |
2382 | writel(BIT(PCI_INTERRUPT_ENABLE) | |
2383 | BIT(ROOT_PORT_RESET_INTERRUPT_ENABLE) | | |
2384 | BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE) | | |
2385 | BIT(VBUS_INTERRUPT_ENABLE), | |
adc82f77 RRD |
2386 | &dev->regs->pciirqenb1); |
2387 | ||
2388 | /* don't leave any writes posted */ | |
2389 | (void)readl(&dev->usb->usbctl); | |
2390 | } | |
2391 | ||
2392 | static void ep0_start(struct net2280 *dev) | |
2393 | { | |
2eeb0016 | 2394 | if (dev->quirks & PLX_LEGACY) |
adc82f77 RRD |
2395 | return ep0_start_228x(dev); |
2396 | return ep0_start_338x(dev); | |
2397 | } | |
2398 | ||
1da177e4 LT |
2399 | /* when a driver is successfully registered, it will receive |
2400 | * control requests including set_configuration(), which enables | |
2401 | * non-control requests. then usb traffic follows until a | |
2402 | * disconnect is reported. then a host may connect again, or | |
2403 | * the driver might get unbound. | |
2404 | */ | |
4cf5e00b FB |
2405 | static int net2280_start(struct usb_gadget *_gadget, |
2406 | struct usb_gadget_driver *driver) | |
1da177e4 | 2407 | { |
4cf5e00b | 2408 | struct net2280 *dev; |
1da177e4 LT |
2409 | int retval; |
2410 | unsigned i; | |
2411 | ||
2412 | /* insist on high speed support from the driver, since | |
2413 | * (dev->usb->xcvrdiag & FORCE_FULL_SPEED_MODE) | |
2414 | * "must not be used in normal operation" | |
2415 | */ | |
ae8e530a RRD |
2416 | if (!driver || driver->max_speed < USB_SPEED_HIGH || |
2417 | !driver->setup) | |
1da177e4 | 2418 | return -EINVAL; |
4cf5e00b | 2419 | |
fae3c158 | 2420 | dev = container_of(_gadget, struct net2280, gadget); |
1da177e4 | 2421 | |
adc82f77 | 2422 | for (i = 0; i < dev->n_ep; i++) |
fae3c158 | 2423 | dev->ep[i].irqs = 0; |
1da177e4 LT |
2424 | |
2425 | /* hook up the driver ... */ | |
1da177e4 | 2426 | dev->driver = driver; |
1da177e4 | 2427 | |
fae3c158 RRD |
2428 | retval = device_create_file(&dev->pdev->dev, &dev_attr_function); |
2429 | if (retval) | |
2430 | goto err_unbind; | |
2431 | retval = device_create_file(&dev->pdev->dev, &dev_attr_queues); | |
2432 | if (retval) | |
2433 | goto err_func; | |
1da177e4 | 2434 | |
7a74c481 | 2435 | /* enable host detection and ep0; and we're ready |
1da177e4 LT |
2436 | * for set_configuration as well as eventual disconnect. |
2437 | */ | |
fae3c158 | 2438 | net2280_led_active(dev, 1); |
adc82f77 | 2439 | |
5185c913 | 2440 | if ((dev->quirks & PLX_PCIE) && !dev->bug7734_patched) |
adc82f77 RRD |
2441 | defect7374_enable_data_eps_zero(dev); |
2442 | ||
fae3c158 | 2443 | ep0_start(dev); |
1da177e4 | 2444 | |
1da177e4 LT |
2445 | /* pci writes may still be posted */ |
2446 | return 0; | |
b3899dac JG |
2447 | |
2448 | err_func: | |
fae3c158 | 2449 | device_remove_file(&dev->pdev->dev, &dev_attr_function); |
b3899dac | 2450 | err_unbind: |
b3899dac JG |
2451 | dev->driver = NULL; |
2452 | return retval; | |
1da177e4 | 2453 | } |
1da177e4 | 2454 | |
fae3c158 | 2455 | static void stop_activity(struct net2280 *dev, struct usb_gadget_driver *driver) |
1da177e4 LT |
2456 | { |
2457 | int i; | |
2458 | ||
2459 | /* don't disconnect if it's not connected */ | |
2460 | if (dev->gadget.speed == USB_SPEED_UNKNOWN) | |
2461 | driver = NULL; | |
2462 | ||
2463 | /* stop hardware; prevent new request submissions; | |
2464 | * and kill any outstanding requests. | |
2465 | */ | |
fae3c158 | 2466 | usb_reset(dev); |
adc82f77 | 2467 | for (i = 0; i < dev->n_ep; i++) |
fae3c158 | 2468 | nuke(&dev->ep[i]); |
1da177e4 | 2469 | |
699412d9 | 2470 | /* report disconnect; the driver is already quiesced */ |
b42e8090 | 2471 | if (dev->async_callbacks && driver) { |
dec3c23c | 2472 | spin_unlock(&dev->lock); |
699412d9 | 2473 | driver->disconnect(&dev->gadget); |
dec3c23c AS |
2474 | spin_lock(&dev->lock); |
2475 | } | |
699412d9 | 2476 | |
fae3c158 | 2477 | usb_reinit(dev); |
1da177e4 LT |
2478 | } |
2479 | ||
22835b80 | 2480 | static int net2280_stop(struct usb_gadget *_gadget) |
1da177e4 | 2481 | { |
4cf5e00b | 2482 | struct net2280 *dev; |
1da177e4 LT |
2483 | unsigned long flags; |
2484 | ||
fae3c158 | 2485 | dev = container_of(_gadget, struct net2280, gadget); |
1da177e4 | 2486 | |
fae3c158 | 2487 | spin_lock_irqsave(&dev->lock, flags); |
bfd0ed57 | 2488 | stop_activity(dev, NULL); |
fae3c158 | 2489 | spin_unlock_irqrestore(&dev->lock, flags); |
1da177e4 | 2490 | |
fae3c158 | 2491 | net2280_led_active(dev, 0); |
2f076077 | 2492 | |
fae3c158 RRD |
2493 | device_remove_file(&dev->pdev->dev, &dev_attr_function); |
2494 | device_remove_file(&dev->pdev->dev, &dev_attr_queues); | |
1da177e4 | 2495 | |
bfd0ed57 | 2496 | dev->driver = NULL; |
84237bfb | 2497 | |
1da177e4 LT |
2498 | return 0; |
2499 | } | |
1da177e4 | 2500 | |
b42e8090 AS |
2501 | static void net2280_async_callbacks(struct usb_gadget *_gadget, bool enable) |
2502 | { | |
2503 | struct net2280 *dev = container_of(_gadget, struct net2280, gadget); | |
2504 | ||
2505 | spin_lock_irq(&dev->lock); | |
2506 | dev->async_callbacks = enable; | |
2507 | spin_unlock_irq(&dev->lock); | |
2508 | } | |
2509 | ||
1da177e4 LT |
2510 | /*-------------------------------------------------------------------------*/ |
2511 | ||
2512 | /* handle ep0, ep-e, ep-f with 64 byte packets: packet per irq. | |
2513 | * also works for dma-capable endpoints, in pio mode or just | |
2514 | * to manually advance the queue after short OUT transfers. | |
2515 | */ | |
fae3c158 | 2516 | static void handle_ep_small(struct net2280_ep *ep) |
1da177e4 LT |
2517 | { |
2518 | struct net2280_request *req; | |
2519 | u32 t; | |
2520 | /* 0 error, 1 mid-data, 2 done */ | |
2521 | int mode = 1; | |
2522 | ||
fae3c158 RRD |
2523 | if (!list_empty(&ep->queue)) |
2524 | req = list_entry(ep->queue.next, | |
1da177e4 LT |
2525 | struct net2280_request, queue); |
2526 | else | |
2527 | req = NULL; | |
2528 | ||
2529 | /* ack all, and handle what we care about */ | |
fae3c158 | 2530 | t = readl(&ep->regs->ep_stat); |
1da177e4 | 2531 | ep->irqs++; |
cb442ee1 | 2532 | |
e56e69cc | 2533 | ep_vdbg(ep->dev, "%s ack ep_stat %08x, req %p\n", |
fc12c68b | 2534 | ep->ep.name, t, req ? &req->req : NULL); |
cb442ee1 | 2535 | |
2eeb0016 | 2536 | if (!ep->is_in || (ep->dev->quirks & PLX_2280)) |
3e76fdcb | 2537 | writel(t & ~BIT(NAK_OUT_PACKETS), &ep->regs->ep_stat); |
950ee4c8 GL |
2538 | else |
2539 | /* Added for 2282 */ | |
fae3c158 | 2540 | writel(t, &ep->regs->ep_stat); |
1da177e4 LT |
2541 | |
2542 | /* for ep0, monitor token irqs to catch data stage length errors | |
2543 | * and to synchronize on status. | |
2544 | * | |
2545 | * also, to defer reporting of protocol stalls ... here's where | |
2546 | * data or status first appears, handling stalls here should never | |
2547 | * cause trouble on the host side.. | |
2548 | * | |
2549 | * control requests could be slightly faster without token synch for | |
2550 | * status, but status can jam up that way. | |
2551 | */ | |
fae3c158 | 2552 | if (unlikely(ep->num == 0)) { |
1da177e4 LT |
2553 | if (ep->is_in) { |
2554 | /* status; stop NAKing */ | |
3e76fdcb | 2555 | if (t & BIT(DATA_OUT_PING_TOKEN_INTERRUPT)) { |
1da177e4 LT |
2556 | if (ep->dev->protocol_stall) { |
2557 | ep->stopped = 1; | |
fae3c158 | 2558 | set_halt(ep); |
1da177e4 LT |
2559 | } |
2560 | if (!req) | |
fae3c158 | 2561 | allow_status(ep); |
1da177e4 LT |
2562 | mode = 2; |
2563 | /* reply to extra IN data tokens with a zlp */ | |
3e76fdcb | 2564 | } else if (t & BIT(DATA_IN_TOKEN_INTERRUPT)) { |
1da177e4 LT |
2565 | if (ep->dev->protocol_stall) { |
2566 | ep->stopped = 1; | |
fae3c158 | 2567 | set_halt(ep); |
1da177e4 | 2568 | mode = 2; |
1f26e28d AS |
2569 | } else if (ep->responded && |
2570 | !req && !ep->stopped) | |
fae3c158 | 2571 | write_fifo(ep, NULL); |
1da177e4 LT |
2572 | } |
2573 | } else { | |
2574 | /* status; stop NAKing */ | |
3e76fdcb | 2575 | if (t & BIT(DATA_IN_TOKEN_INTERRUPT)) { |
1da177e4 LT |
2576 | if (ep->dev->protocol_stall) { |
2577 | ep->stopped = 1; | |
fae3c158 | 2578 | set_halt(ep); |
1da177e4 LT |
2579 | } |
2580 | mode = 2; | |
2581 | /* an extra OUT token is an error */ | |
ae8e530a RRD |
2582 | } else if (((t & BIT(DATA_OUT_PING_TOKEN_INTERRUPT)) && |
2583 | req && | |
2584 | req->req.actual == req->req.length) || | |
2585 | (ep->responded && !req)) { | |
1da177e4 | 2586 | ep->dev->protocol_stall = 1; |
fae3c158 | 2587 | set_halt(ep); |
1da177e4 LT |
2588 | ep->stopped = 1; |
2589 | if (req) | |
fae3c158 | 2590 | done(ep, req, -EOVERFLOW); |
1da177e4 LT |
2591 | req = NULL; |
2592 | } | |
2593 | } | |
2594 | } | |
2595 | ||
fae3c158 | 2596 | if (unlikely(!req)) |
1da177e4 LT |
2597 | return; |
2598 | ||
2599 | /* manual DMA queue advance after short OUT */ | |
fae3c158 | 2600 | if (likely(ep->dma)) { |
3e76fdcb | 2601 | if (t & BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT)) { |
1de2ebfb | 2602 | struct net2280_request *stuck_req = NULL; |
1da177e4 | 2603 | int stopped = ep->stopped; |
1de2ebfb JK |
2604 | int num_completed; |
2605 | int stuck = 0; | |
2606 | u32 count; | |
1da177e4 LT |
2607 | |
2608 | /* TRANSFERRED works around OUT_DONE erratum 0112. | |
2609 | * we expect (N <= maxpacket) bytes; host wrote M. | |
2610 | * iff (M < N) we won't ever see a DMA interrupt. | |
2611 | */ | |
2612 | ep->stopped = 1; | |
fae3c158 | 2613 | for (count = 0; ; t = readl(&ep->regs->ep_stat)) { |
1da177e4 LT |
2614 | |
2615 | /* any preceding dma transfers must finish. | |
2616 | * dma handles (M >= N), may empty the queue | |
2617 | */ | |
1de2ebfb | 2618 | num_completed = scan_dma_completions(ep); |
ae8e530a RRD |
2619 | if (unlikely(list_empty(&ep->queue) || |
2620 | ep->out_overflow)) { | |
1da177e4 LT |
2621 | req = NULL; |
2622 | break; | |
2623 | } | |
fae3c158 | 2624 | req = list_entry(ep->queue.next, |
1da177e4 LT |
2625 | struct net2280_request, queue); |
2626 | ||
2627 | /* here either (M < N), a "real" short rx; | |
2628 | * or (M == N) and the queue didn't empty | |
2629 | */ | |
3e76fdcb | 2630 | if (likely(t & BIT(FIFO_EMPTY))) { |
fae3c158 | 2631 | count = readl(&ep->dma->dmacount); |
1da177e4 | 2632 | count &= DMA_BYTE_COUNT_MASK; |
fae3c158 | 2633 | if (readl(&ep->dma->dmadesc) |
1da177e4 LT |
2634 | != req->td_dma) |
2635 | req = NULL; | |
2636 | break; | |
2637 | } | |
1de2ebfb JK |
2638 | |
2639 | /* Escape loop if no dma transfers completed | |
2640 | * after few retries. | |
2641 | */ | |
2642 | if (num_completed == 0) { | |
2643 | if (stuck_req == req && | |
2644 | readl(&ep->dma->dmadesc) != | |
2645 | req->td_dma && stuck++ > 5) { | |
2646 | count = readl( | |
2647 | &ep->dma->dmacount); | |
2648 | count &= DMA_BYTE_COUNT_MASK; | |
2649 | req = NULL; | |
2650 | ep_dbg(ep->dev, "%s escape stuck %d, count %u\n", | |
2651 | ep->ep.name, stuck, | |
2652 | count); | |
2653 | break; | |
2654 | } else if (stuck_req != req) { | |
2655 | stuck_req = req; | |
2656 | stuck = 0; | |
2657 | } | |
2658 | } else { | |
2659 | stuck_req = NULL; | |
2660 | stuck = 0; | |
2661 | } | |
2662 | ||
1da177e4 LT |
2663 | udelay(1); |
2664 | } | |
2665 | ||
2666 | /* stop DMA, leave ep NAKing */ | |
3e76fdcb | 2667 | writel(BIT(DMA_ABORT), &ep->dma->dmastat); |
fae3c158 | 2668 | spin_stop_dma(ep->dma); |
1da177e4 | 2669 | |
fae3c158 | 2670 | if (likely(req)) { |
1da177e4 | 2671 | req->td->dmacount = 0; |
fae3c158 RRD |
2672 | t = readl(&ep->regs->ep_avail); |
2673 | dma_done(ep, req, count, | |
901b3d75 DB |
2674 | (ep->out_overflow || t) |
2675 | ? -EOVERFLOW : 0); | |
1da177e4 LT |
2676 | } |
2677 | ||
2678 | /* also flush to prevent erratum 0106 trouble */ | |
ae8e530a RRD |
2679 | if (unlikely(ep->out_overflow || |
2680 | (ep->dev->chiprev == 0x0100 && | |
2681 | ep->dev->gadget.speed | |
2682 | == USB_SPEED_FULL))) { | |
fae3c158 | 2683 | out_flush(ep); |
1da177e4 LT |
2684 | ep->out_overflow = 0; |
2685 | } | |
2686 | ||
2687 | /* (re)start dma if needed, stop NAKing */ | |
2688 | ep->stopped = stopped; | |
fae3c158 RRD |
2689 | if (!list_empty(&ep->queue)) |
2690 | restart_dma(ep); | |
1da177e4 | 2691 | } else |
e56e69cc | 2692 | ep_dbg(ep->dev, "%s dma ep_stat %08x ??\n", |
1da177e4 LT |
2693 | ep->ep.name, t); |
2694 | return; | |
2695 | ||
2696 | /* data packet(s) received (in the fifo, OUT) */ | |
3e76fdcb | 2697 | } else if (t & BIT(DATA_PACKET_RECEIVED_INTERRUPT)) { |
fae3c158 | 2698 | if (read_fifo(ep, req) && ep->num != 0) |
1da177e4 LT |
2699 | mode = 2; |
2700 | ||
2701 | /* data packet(s) transmitted (IN) */ | |
3e76fdcb | 2702 | } else if (t & BIT(DATA_PACKET_TRANSMITTED_INTERRUPT)) { |
1da177e4 LT |
2703 | unsigned len; |
2704 | ||
2705 | len = req->req.length - req->req.actual; | |
2706 | if (len > ep->ep.maxpacket) | |
2707 | len = ep->ep.maxpacket; | |
2708 | req->req.actual += len; | |
2709 | ||
2710 | /* if we wrote it all, we're usually done */ | |
fae3c158 RRD |
2711 | /* send zlps until the status stage */ |
2712 | if ((req->req.actual == req->req.length) && | |
2713 | (!req->req.zero || len != ep->ep.maxpacket) && ep->num) | |
1da177e4 | 2714 | mode = 2; |
1da177e4 LT |
2715 | |
2716 | /* there was nothing to do ... */ | |
2717 | } else if (mode == 1) | |
2718 | return; | |
2719 | ||
2720 | /* done */ | |
2721 | if (mode == 2) { | |
2722 | /* stream endpoints often resubmit/unlink in completion */ | |
fae3c158 | 2723 | done(ep, req, 0); |
1da177e4 LT |
2724 | |
2725 | /* maybe advance queue to next request */ | |
2726 | if (ep->num == 0) { | |
2727 | /* NOTE: net2280 could let gadget driver start the | |
2728 | * status stage later. since not all controllers let | |
2729 | * them control that, the api doesn't (yet) allow it. | |
2730 | */ | |
2731 | if (!ep->stopped) | |
fae3c158 | 2732 | allow_status(ep); |
1da177e4 LT |
2733 | req = NULL; |
2734 | } else { | |
fae3c158 RRD |
2735 | if (!list_empty(&ep->queue) && !ep->stopped) |
2736 | req = list_entry(ep->queue.next, | |
1da177e4 LT |
2737 | struct net2280_request, queue); |
2738 | else | |
2739 | req = NULL; | |
2740 | if (req && !ep->is_in) | |
fae3c158 | 2741 | stop_out_naking(ep); |
1da177e4 LT |
2742 | } |
2743 | } | |
2744 | ||
2745 | /* is there a buffer for the next packet? | |
2746 | * for best streaming performance, make sure there is one. | |
2747 | */ | |
2748 | if (req && !ep->stopped) { | |
2749 | ||
2750 | /* load IN fifo with next packet (may be zlp) */ | |
3e76fdcb | 2751 | if (t & BIT(DATA_PACKET_TRANSMITTED_INTERRUPT)) |
fae3c158 | 2752 | write_fifo(ep, &req->req); |
1da177e4 LT |
2753 | } |
2754 | } | |
2755 | ||
fae3c158 | 2756 | static struct net2280_ep *get_ep_by_addr(struct net2280 *dev, u16 wIndex) |
1da177e4 LT |
2757 | { |
2758 | struct net2280_ep *ep; | |
2759 | ||
2760 | if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0) | |
fae3c158 RRD |
2761 | return &dev->ep[0]; |
2762 | list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) { | |
1da177e4 LT |
2763 | u8 bEndpointAddress; |
2764 | ||
2765 | if (!ep->desc) | |
2766 | continue; | |
2767 | bEndpointAddress = ep->desc->bEndpointAddress; | |
2768 | if ((wIndex ^ bEndpointAddress) & USB_DIR_IN) | |
2769 | continue; | |
2770 | if ((wIndex & 0x0f) == (bEndpointAddress & 0x0f)) | |
2771 | return ep; | |
2772 | } | |
2773 | return NULL; | |
2774 | } | |
2775 | ||
adc82f77 RRD |
2776 | static void defect7374_workaround(struct net2280 *dev, struct usb_ctrlrequest r) |
2777 | { | |
2778 | u32 scratch, fsmvalue; | |
2779 | u32 ack_wait_timeout, state; | |
2780 | ||
2781 | /* Workaround for Defect 7374 (U1/U2 erroneously rejected): */ | |
2782 | scratch = get_idx_reg(dev->regs, SCRATCH); | |
2783 | fsmvalue = scratch & (0xf << DEFECT7374_FSM_FIELD); | |
2784 | scratch &= ~(0xf << DEFECT7374_FSM_FIELD); | |
2785 | ||
2786 | if (!((fsmvalue == DEFECT7374_FSM_WAITING_FOR_CONTROL_READ) && | |
2787 | (r.bRequestType & USB_DIR_IN))) | |
2788 | return; | |
2789 | ||
2790 | /* This is the first Control Read for this connection: */ | |
3e76fdcb | 2791 | if (!(readl(&dev->usb->usbstat) & BIT(SUPER_SPEED_MODE))) { |
adc82f77 RRD |
2792 | /* |
2793 | * Connection is NOT SS: | |
2794 | * - Connection must be FS or HS. | |
2795 | * - This FSM state should allow workaround software to | |
2796 | * run after the next USB connection. | |
2797 | */ | |
2798 | scratch |= DEFECT7374_FSM_NON_SS_CONTROL_READ; | |
5517525e | 2799 | dev->bug7734_patched = 1; |
adc82f77 RRD |
2800 | goto restore_data_eps; |
2801 | } | |
2802 | ||
2803 | /* Connection is SS: */ | |
2804 | for (ack_wait_timeout = 0; | |
2805 | ack_wait_timeout < DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS; | |
2806 | ack_wait_timeout++) { | |
2807 | ||
2808 | state = readl(&dev->plregs->pl_ep_status_1) | |
2809 | & (0xff << STATE); | |
2810 | if ((state >= (ACK_GOOD_NORMAL << STATE)) && | |
2811 | (state <= (ACK_GOOD_MORE_ACKS_TO_COME << STATE))) { | |
2812 | scratch |= DEFECT7374_FSM_SS_CONTROL_READ; | |
5517525e | 2813 | dev->bug7734_patched = 1; |
adc82f77 RRD |
2814 | break; |
2815 | } | |
2816 | ||
2817 | /* | |
2818 | * We have not yet received host's Data Phase ACK | |
2819 | * - Wait and try again. | |
2820 | */ | |
2821 | udelay(DEFECT_7374_PROCESSOR_WAIT_TIME); | |
adc82f77 RRD |
2822 | } |
2823 | ||
2824 | ||
2825 | if (ack_wait_timeout >= DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS) { | |
e56e69cc | 2826 | ep_err(dev, "FAIL: Defect 7374 workaround waited but failed " |
adc82f77 | 2827 | "to detect SS host's data phase ACK."); |
e56e69cc | 2828 | ep_err(dev, "PL_EP_STATUS_1(23:16):.Expected from 0x11 to 0x16" |
adc82f77 RRD |
2829 | "got 0x%2.2x.\n", state >> STATE); |
2830 | } else { | |
e56e69cc | 2831 | ep_warn(dev, "INFO: Defect 7374 workaround waited about\n" |
adc82f77 RRD |
2832 | "%duSec for Control Read Data Phase ACK\n", |
2833 | DEFECT_7374_PROCESSOR_WAIT_TIME * ack_wait_timeout); | |
2834 | } | |
2835 | ||
2836 | restore_data_eps: | |
2837 | /* | |
2838 | * Restore data EPs to their pre-workaround settings (disabled, | |
2839 | * initialized, and other details). | |
2840 | */ | |
2841 | defect7374_disable_data_eps(dev); | |
2842 | ||
2843 | set_idx_reg(dev->regs, SCRATCH, scratch); | |
2844 | ||
2845 | return; | |
2846 | } | |
2847 | ||
e0cbb046 | 2848 | static void ep_clear_seqnum(struct net2280_ep *ep) |
adc82f77 RRD |
2849 | { |
2850 | struct net2280 *dev = ep->dev; | |
2851 | u32 val; | |
2852 | static const u32 ep_pl[9] = { 0, 3, 4, 7, 8, 2, 5, 6, 9 }; | |
2853 | ||
e0cbb046 RRD |
2854 | val = readl(&dev->plregs->pl_ep_ctrl) & ~0x1f; |
2855 | val |= ep_pl[ep->num]; | |
2856 | writel(val, &dev->plregs->pl_ep_ctrl); | |
2857 | val |= BIT(SEQUENCE_NUMBER_RESET); | |
2858 | writel(val, &dev->plregs->pl_ep_ctrl); | |
adc82f77 | 2859 | |
e0cbb046 | 2860 | return; |
adc82f77 RRD |
2861 | } |
2862 | ||
adc82f77 RRD |
2863 | static void handle_stat0_irqs_superspeed(struct net2280 *dev, |
2864 | struct net2280_ep *ep, struct usb_ctrlrequest r) | |
2865 | { | |
c06a1c37 KC |
2866 | struct net2280_ep *e; |
2867 | u16 status; | |
adc82f77 RRD |
2868 | int tmp = 0; |
2869 | ||
2870 | #define w_value le16_to_cpu(r.wValue) | |
2871 | #define w_index le16_to_cpu(r.wIndex) | |
2872 | #define w_length le16_to_cpu(r.wLength) | |
2873 | ||
2874 | switch (r.bRequest) { | |
adc82f77 RRD |
2875 | case USB_REQ_SET_CONFIGURATION: |
2876 | dev->addressed_state = !w_value; | |
2877 | goto usb3_delegate; | |
2878 | ||
2879 | case USB_REQ_GET_STATUS: | |
2880 | switch (r.bRequestType) { | |
2881 | case (USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE): | |
2882 | status = dev->wakeup_enable ? 0x02 : 0x00; | |
c8678d9f | 2883 | if (dev->gadget.is_selfpowered) |
3e76fdcb | 2884 | status |= BIT(0); |
adc82f77 RRD |
2885 | status |= (dev->u1_enable << 2 | dev->u2_enable << 3 | |
2886 | dev->ltm_enable << 4); | |
2887 | writel(0, &dev->epregs[0].ep_irqenb); | |
2888 | set_fifo_bytecount(ep, sizeof(status)); | |
2889 | writel((__force u32) status, &dev->epregs[0].ep_data); | |
2890 | allow_status_338x(ep); | |
2891 | break; | |
2892 | ||
2893 | case (USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT): | |
2894 | e = get_ep_by_addr(dev, w_index); | |
2895 | if (!e) | |
2896 | goto do_stall3; | |
2897 | status = readl(&e->regs->ep_rsp) & | |
3e76fdcb | 2898 | BIT(CLEAR_ENDPOINT_HALT); |
adc82f77 RRD |
2899 | writel(0, &dev->epregs[0].ep_irqenb); |
2900 | set_fifo_bytecount(ep, sizeof(status)); | |
2901 | writel((__force u32) status, &dev->epregs[0].ep_data); | |
2902 | allow_status_338x(ep); | |
2903 | break; | |
2904 | ||
2905 | default: | |
2906 | goto usb3_delegate; | |
2907 | } | |
2908 | break; | |
2909 | ||
2910 | case USB_REQ_CLEAR_FEATURE: | |
2911 | switch (r.bRequestType) { | |
2912 | case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE): | |
2913 | if (!dev->addressed_state) { | |
2914 | switch (w_value) { | |
2915 | case USB_DEVICE_U1_ENABLE: | |
2916 | dev->u1_enable = 0; | |
2917 | writel(readl(&dev->usb_ext->usbctl2) & | |
3e76fdcb | 2918 | ~BIT(U1_ENABLE), |
adc82f77 RRD |
2919 | &dev->usb_ext->usbctl2); |
2920 | allow_status_338x(ep); | |
2921 | goto next_endpoints3; | |
2922 | ||
2923 | case USB_DEVICE_U2_ENABLE: | |
2924 | dev->u2_enable = 0; | |
2925 | writel(readl(&dev->usb_ext->usbctl2) & | |
3e76fdcb | 2926 | ~BIT(U2_ENABLE), |
adc82f77 RRD |
2927 | &dev->usb_ext->usbctl2); |
2928 | allow_status_338x(ep); | |
2929 | goto next_endpoints3; | |
2930 | ||
2931 | case USB_DEVICE_LTM_ENABLE: | |
2932 | dev->ltm_enable = 0; | |
2933 | writel(readl(&dev->usb_ext->usbctl2) & | |
3e76fdcb | 2934 | ~BIT(LTM_ENABLE), |
adc82f77 RRD |
2935 | &dev->usb_ext->usbctl2); |
2936 | allow_status_338x(ep); | |
2937 | goto next_endpoints3; | |
2938 | ||
2939 | default: | |
2940 | break; | |
2941 | } | |
2942 | } | |
2943 | if (w_value == USB_DEVICE_REMOTE_WAKEUP) { | |
2944 | dev->wakeup_enable = 0; | |
2945 | writel(readl(&dev->usb->usbctl) & | |
3e76fdcb | 2946 | ~BIT(DEVICE_REMOTE_WAKEUP_ENABLE), |
adc82f77 RRD |
2947 | &dev->usb->usbctl); |
2948 | allow_status_338x(ep); | |
2949 | break; | |
2950 | } | |
2951 | goto usb3_delegate; | |
2952 | ||
2953 | case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT): | |
2954 | e = get_ep_by_addr(dev, w_index); | |
2955 | if (!e) | |
2956 | goto do_stall3; | |
2957 | if (w_value != USB_ENDPOINT_HALT) | |
2958 | goto do_stall3; | |
e56e69cc | 2959 | ep_vdbg(dev, "%s clear halt\n", e->ep.name); |
e0cbb046 RRD |
2960 | /* |
2961 | * Workaround for SS SeqNum not cleared via | |
2962 | * Endpoint Halt (Clear) bit. select endpoint | |
2963 | */ | |
2964 | ep_clear_seqnum(e); | |
2965 | clear_halt(e); | |
adc82f77 RRD |
2966 | if (!list_empty(&e->queue) && e->td_dma) |
2967 | restart_dma(e); | |
2968 | allow_status(ep); | |
2969 | ep->stopped = 1; | |
2970 | break; | |
2971 | ||
2972 | default: | |
2973 | goto usb3_delegate; | |
2974 | } | |
2975 | break; | |
2976 | case USB_REQ_SET_FEATURE: | |
2977 | switch (r.bRequestType) { | |
2978 | case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE): | |
2979 | if (!dev->addressed_state) { | |
2980 | switch (w_value) { | |
2981 | case USB_DEVICE_U1_ENABLE: | |
2982 | dev->u1_enable = 1; | |
2983 | writel(readl(&dev->usb_ext->usbctl2) | | |
3e76fdcb | 2984 | BIT(U1_ENABLE), |
adc82f77 RRD |
2985 | &dev->usb_ext->usbctl2); |
2986 | allow_status_338x(ep); | |
2987 | goto next_endpoints3; | |
2988 | ||
2989 | case USB_DEVICE_U2_ENABLE: | |
2990 | dev->u2_enable = 1; | |
2991 | writel(readl(&dev->usb_ext->usbctl2) | | |
3e76fdcb | 2992 | BIT(U2_ENABLE), |
adc82f77 RRD |
2993 | &dev->usb_ext->usbctl2); |
2994 | allow_status_338x(ep); | |
2995 | goto next_endpoints3; | |
2996 | ||
2997 | case USB_DEVICE_LTM_ENABLE: | |
2998 | dev->ltm_enable = 1; | |
2999 | writel(readl(&dev->usb_ext->usbctl2) | | |
3e76fdcb | 3000 | BIT(LTM_ENABLE), |
adc82f77 RRD |
3001 | &dev->usb_ext->usbctl2); |
3002 | allow_status_338x(ep); | |
3003 | goto next_endpoints3; | |
3004 | default: | |
3005 | break; | |
3006 | } | |
3007 | } | |
3008 | ||
3009 | if (w_value == USB_DEVICE_REMOTE_WAKEUP) { | |
3010 | dev->wakeup_enable = 1; | |
3011 | writel(readl(&dev->usb->usbctl) | | |
3e76fdcb | 3012 | BIT(DEVICE_REMOTE_WAKEUP_ENABLE), |
adc82f77 RRD |
3013 | &dev->usb->usbctl); |
3014 | allow_status_338x(ep); | |
3015 | break; | |
3016 | } | |
3017 | goto usb3_delegate; | |
3018 | ||
3019 | case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT): | |
3020 | e = get_ep_by_addr(dev, w_index); | |
3021 | if (!e || (w_value != USB_ENDPOINT_HALT)) | |
3022 | goto do_stall3; | |
cf8b1cde RRD |
3023 | ep->stopped = 1; |
3024 | if (ep->num == 0) | |
3025 | ep->dev->protocol_stall = 1; | |
3026 | else { | |
3027 | if (ep->dma) | |
e721c457 | 3028 | abort_dma(ep); |
e0cbb046 | 3029 | set_halt(ep); |
cf8b1cde | 3030 | } |
adc82f77 RRD |
3031 | allow_status_338x(ep); |
3032 | break; | |
3033 | ||
3034 | default: | |
3035 | goto usb3_delegate; | |
3036 | } | |
3037 | ||
3038 | break; | |
3039 | default: | |
3040 | ||
3041 | usb3_delegate: | |
e56e69cc | 3042 | ep_vdbg(dev, "setup %02x.%02x v%04x i%04x l%04x ep_cfg %08x\n", |
adc82f77 RRD |
3043 | r.bRequestType, r.bRequest, |
3044 | w_value, w_index, w_length, | |
3045 | readl(&ep->cfg->ep_cfg)); | |
3046 | ||
3047 | ep->responded = 0; | |
b42e8090 AS |
3048 | if (dev->async_callbacks) { |
3049 | spin_unlock(&dev->lock); | |
3050 | tmp = dev->driver->setup(&dev->gadget, &r); | |
3051 | spin_lock(&dev->lock); | |
3052 | } | |
adc82f77 RRD |
3053 | } |
3054 | do_stall3: | |
3055 | if (tmp < 0) { | |
e56e69cc | 3056 | ep_vdbg(dev, "req %02x.%02x protocol STALL; stat %d\n", |
adc82f77 RRD |
3057 | r.bRequestType, r.bRequest, tmp); |
3058 | dev->protocol_stall = 1; | |
3059 | /* TD 9.9 Halt Endpoint test. TD 9.22 Set feature test */ | |
e0cbb046 | 3060 | set_halt(ep); |
adc82f77 RRD |
3061 | } |
3062 | ||
3063 | next_endpoints3: | |
3064 | ||
3065 | #undef w_value | |
3066 | #undef w_index | |
3067 | #undef w_length | |
3068 | ||
3069 | return; | |
3070 | } | |
3071 | ||
a09e23f5 MYK |
3072 | static void usb338x_handle_ep_intr(struct net2280 *dev, u32 stat0) |
3073 | { | |
3074 | u32 index; | |
3075 | u32 bit; | |
3076 | ||
3077 | for (index = 0; index < ARRAY_SIZE(ep_bit); index++) { | |
3078 | bit = BIT(ep_bit[index]); | |
3079 | ||
3080 | if (!stat0) | |
3081 | break; | |
3082 | ||
3083 | if (!(stat0 & bit)) | |
3084 | continue; | |
3085 | ||
3086 | stat0 &= ~bit; | |
3087 | ||
3088 | handle_ep_small(&dev->ep[index]); | |
3089 | } | |
3090 | } | |
3091 | ||
fae3c158 | 3092 | static void handle_stat0_irqs(struct net2280 *dev, u32 stat) |
1da177e4 LT |
3093 | { |
3094 | struct net2280_ep *ep; | |
3095 | u32 num, scratch; | |
3096 | ||
3097 | /* most of these don't need individual acks */ | |
3e76fdcb | 3098 | stat &= ~BIT(INTA_ASSERTED); |
1da177e4 LT |
3099 | if (!stat) |
3100 | return; | |
e56e69cc | 3101 | /* ep_dbg(dev, "irqstat0 %04x\n", stat); */ |
1da177e4 LT |
3102 | |
3103 | /* starting a control request? */ | |
3e76fdcb | 3104 | if (unlikely(stat & BIT(SETUP_PACKET_INTERRUPT))) { |
1da177e4 | 3105 | union { |
fae3c158 | 3106 | u32 raw[2]; |
1da177e4 LT |
3107 | struct usb_ctrlrequest r; |
3108 | } u; | |
950ee4c8 | 3109 | int tmp; |
1da177e4 LT |
3110 | struct net2280_request *req; |
3111 | ||
3112 | if (dev->gadget.speed == USB_SPEED_UNKNOWN) { | |
adc82f77 | 3113 | u32 val = readl(&dev->usb->usbstat); |
3e76fdcb | 3114 | if (val & BIT(SUPER_SPEED)) { |
adc82f77 RRD |
3115 | dev->gadget.speed = USB_SPEED_SUPER; |
3116 | usb_ep_set_maxpacket_limit(&dev->ep[0].ep, | |
3117 | EP0_SS_MAX_PACKET_SIZE); | |
3e76fdcb | 3118 | } else if (val & BIT(HIGH_SPEED)) { |
1da177e4 | 3119 | dev->gadget.speed = USB_SPEED_HIGH; |
adc82f77 RRD |
3120 | usb_ep_set_maxpacket_limit(&dev->ep[0].ep, |
3121 | EP0_HS_MAX_PACKET_SIZE); | |
3122 | } else { | |
1da177e4 | 3123 | dev->gadget.speed = USB_SPEED_FULL; |
adc82f77 RRD |
3124 | usb_ep_set_maxpacket_limit(&dev->ep[0].ep, |
3125 | EP0_HS_MAX_PACKET_SIZE); | |
3126 | } | |
fae3c158 | 3127 | net2280_led_speed(dev, dev->gadget.speed); |
e56e69cc | 3128 | ep_dbg(dev, "%s\n", |
fae3c158 | 3129 | usb_speed_string(dev->gadget.speed)); |
1da177e4 LT |
3130 | } |
3131 | ||
fae3c158 | 3132 | ep = &dev->ep[0]; |
1da177e4 LT |
3133 | ep->irqs++; |
3134 | ||
3135 | /* make sure any leftover request state is cleared */ | |
3e76fdcb | 3136 | stat &= ~BIT(ENDPOINT_0_INTERRUPT); |
fae3c158 RRD |
3137 | while (!list_empty(&ep->queue)) { |
3138 | req = list_entry(ep->queue.next, | |
1da177e4 | 3139 | struct net2280_request, queue); |
fae3c158 | 3140 | done(ep, req, (req->req.actual == req->req.length) |
1da177e4 LT |
3141 | ? 0 : -EPROTO); |
3142 | } | |
3143 | ep->stopped = 0; | |
3144 | dev->protocol_stall = 0; | |
5185c913 | 3145 | if (!(dev->quirks & PLX_PCIE)) { |
2eeb0016 | 3146 | if (ep->dev->quirks & PLX_2280) |
3e76fdcb RRD |
3147 | tmp = BIT(FIFO_OVERFLOW) | |
3148 | BIT(FIFO_UNDERFLOW); | |
adc82f77 RRD |
3149 | else |
3150 | tmp = 0; | |
3151 | ||
3e76fdcb RRD |
3152 | writel(tmp | BIT(TIMEOUT) | |
3153 | BIT(USB_STALL_SENT) | | |
3154 | BIT(USB_IN_NAK_SENT) | | |
3155 | BIT(USB_IN_ACK_RCVD) | | |
3156 | BIT(USB_OUT_PING_NAK_SENT) | | |
3157 | BIT(USB_OUT_ACK_SENT) | | |
3158 | BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) | | |
3159 | BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) | | |
3160 | BIT(DATA_PACKET_RECEIVED_INTERRUPT) | | |
3161 | BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) | | |
3162 | BIT(DATA_OUT_PING_TOKEN_INTERRUPT) | | |
ae8e530a RRD |
3163 | BIT(DATA_IN_TOKEN_INTERRUPT), |
3164 | &ep->regs->ep_stat); | |
adc82f77 RRD |
3165 | } |
3166 | u.raw[0] = readl(&dev->usb->setup0123); | |
3167 | u.raw[1] = readl(&dev->usb->setup4567); | |
901b3d75 | 3168 | |
fae3c158 RRD |
3169 | cpu_to_le32s(&u.raw[0]); |
3170 | cpu_to_le32s(&u.raw[1]); | |
1da177e4 | 3171 | |
5185c913 | 3172 | if ((dev->quirks & PLX_PCIE) && !dev->bug7734_patched) |
adc82f77 RRD |
3173 | defect7374_workaround(dev, u.r); |
3174 | ||
950ee4c8 GL |
3175 | tmp = 0; |
3176 | ||
01ee7d70 DB |
3177 | #define w_value le16_to_cpu(u.r.wValue) |
3178 | #define w_index le16_to_cpu(u.r.wIndex) | |
3179 | #define w_length le16_to_cpu(u.r.wLength) | |
1da177e4 LT |
3180 | |
3181 | /* ack the irq */ | |
3e76fdcb RRD |
3182 | writel(BIT(SETUP_PACKET_INTERRUPT), &dev->regs->irqstat0); |
3183 | stat ^= BIT(SETUP_PACKET_INTERRUPT); | |
1da177e4 LT |
3184 | |
3185 | /* watch control traffic at the token level, and force | |
3186 | * synchronization before letting the status stage happen. | |
3187 | * FIXME ignore tokens we'll NAK, until driver responds. | |
3188 | * that'll mean a lot less irqs for some drivers. | |
3189 | */ | |
3190 | ep->is_in = (u.r.bRequestType & USB_DIR_IN) != 0; | |
3191 | if (ep->is_in) { | |
3e76fdcb RRD |
3192 | scratch = BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) | |
3193 | BIT(DATA_OUT_PING_TOKEN_INTERRUPT) | | |
3194 | BIT(DATA_IN_TOKEN_INTERRUPT); | |
fae3c158 | 3195 | stop_out_naking(ep); |
1da177e4 | 3196 | } else |
3e76fdcb RRD |
3197 | scratch = BIT(DATA_PACKET_RECEIVED_INTERRUPT) | |
3198 | BIT(DATA_OUT_PING_TOKEN_INTERRUPT) | | |
3199 | BIT(DATA_IN_TOKEN_INTERRUPT); | |
fae3c158 | 3200 | writel(scratch, &dev->epregs[0].ep_irqenb); |
1da177e4 LT |
3201 | |
3202 | /* we made the hardware handle most lowlevel requests; | |
3203 | * everything else goes uplevel to the gadget code. | |
3204 | */ | |
1f26e28d | 3205 | ep->responded = 1; |
adc82f77 RRD |
3206 | |
3207 | if (dev->gadget.speed == USB_SPEED_SUPER) { | |
3208 | handle_stat0_irqs_superspeed(dev, ep, u.r); | |
3209 | goto next_endpoints; | |
3210 | } | |
3211 | ||
1da177e4 LT |
3212 | switch (u.r.bRequest) { |
3213 | case USB_REQ_GET_STATUS: { | |
3214 | struct net2280_ep *e; | |
320f3459 | 3215 | __le32 status; |
1da177e4 LT |
3216 | |
3217 | /* hw handles device and interface status */ | |
3218 | if (u.r.bRequestType != (USB_DIR_IN|USB_RECIP_ENDPOINT)) | |
3219 | goto delegate; | |
fae3c158 RRD |
3220 | e = get_ep_by_addr(dev, w_index); |
3221 | if (!e || w_length > 2) | |
1da177e4 LT |
3222 | goto do_stall; |
3223 | ||
3e76fdcb | 3224 | if (readl(&e->regs->ep_rsp) & BIT(SET_ENDPOINT_HALT)) |
fae3c158 | 3225 | status = cpu_to_le32(1); |
1da177e4 | 3226 | else |
fae3c158 | 3227 | status = cpu_to_le32(0); |
1da177e4 LT |
3228 | |
3229 | /* don't bother with a request object! */ | |
fae3c158 RRD |
3230 | writel(0, &dev->epregs[0].ep_irqenb); |
3231 | set_fifo_bytecount(ep, w_length); | |
3232 | writel((__force u32)status, &dev->epregs[0].ep_data); | |
3233 | allow_status(ep); | |
e56e69cc | 3234 | ep_vdbg(dev, "%s stat %02x\n", ep->ep.name, status); |
1da177e4 LT |
3235 | goto next_endpoints; |
3236 | } | |
3237 | break; | |
3238 | case USB_REQ_CLEAR_FEATURE: { | |
3239 | struct net2280_ep *e; | |
3240 | ||
3241 | /* hw handles device features */ | |
3242 | if (u.r.bRequestType != USB_RECIP_ENDPOINT) | |
3243 | goto delegate; | |
ae8e530a | 3244 | if (w_value != USB_ENDPOINT_HALT || w_length != 0) |
1da177e4 | 3245 | goto do_stall; |
fae3c158 RRD |
3246 | e = get_ep_by_addr(dev, w_index); |
3247 | if (!e) | |
1da177e4 | 3248 | goto do_stall; |
8066134f | 3249 | if (e->wedged) { |
e56e69cc | 3250 | ep_vdbg(dev, "%s wedged, halt not cleared\n", |
8066134f AS |
3251 | ep->ep.name); |
3252 | } else { | |
e56e69cc | 3253 | ep_vdbg(dev, "%s clear halt\n", e->ep.name); |
8066134f | 3254 | clear_halt(e); |
5185c913 | 3255 | if ((ep->dev->quirks & PLX_PCIE) && |
adc82f77 RRD |
3256 | !list_empty(&e->queue) && e->td_dma) |
3257 | restart_dma(e); | |
8066134f | 3258 | } |
fae3c158 | 3259 | allow_status(ep); |
1da177e4 LT |
3260 | goto next_endpoints; |
3261 | } | |
3262 | break; | |
3263 | case USB_REQ_SET_FEATURE: { | |
3264 | struct net2280_ep *e; | |
3265 | ||
3266 | /* hw handles device features */ | |
3267 | if (u.r.bRequestType != USB_RECIP_ENDPOINT) | |
3268 | goto delegate; | |
ae8e530a | 3269 | if (w_value != USB_ENDPOINT_HALT || w_length != 0) |
1da177e4 | 3270 | goto do_stall; |
fae3c158 RRD |
3271 | e = get_ep_by_addr(dev, w_index); |
3272 | if (!e) | |
1da177e4 | 3273 | goto do_stall; |
8066134f AS |
3274 | if (e->ep.name == ep0name) |
3275 | goto do_stall; | |
fae3c158 | 3276 | set_halt(e); |
5185c913 | 3277 | if ((dev->quirks & PLX_PCIE) && e->dma) |
adc82f77 | 3278 | abort_dma(e); |
fae3c158 | 3279 | allow_status(ep); |
e56e69cc | 3280 | ep_vdbg(dev, "%s set halt\n", ep->ep.name); |
1da177e4 LT |
3281 | goto next_endpoints; |
3282 | } | |
3283 | break; | |
3284 | default: | |
3285 | delegate: | |
e56e69cc | 3286 | ep_vdbg(dev, "setup %02x.%02x v%04x i%04x l%04x " |
1da177e4 LT |
3287 | "ep_cfg %08x\n", |
3288 | u.r.bRequestType, u.r.bRequest, | |
320f3459 | 3289 | w_value, w_index, w_length, |
adc82f77 | 3290 | readl(&ep->cfg->ep_cfg)); |
1f26e28d | 3291 | ep->responded = 0; |
b42e8090 AS |
3292 | if (dev->async_callbacks) { |
3293 | spin_unlock(&dev->lock); | |
3294 | tmp = dev->driver->setup(&dev->gadget, &u.r); | |
3295 | spin_lock(&dev->lock); | |
3296 | } | |
1da177e4 LT |
3297 | } |
3298 | ||
3299 | /* stall ep0 on error */ | |
3300 | if (tmp < 0) { | |
3301 | do_stall: | |
e56e69cc | 3302 | ep_vdbg(dev, "req %02x.%02x protocol STALL; stat %d\n", |
1da177e4 LT |
3303 | u.r.bRequestType, u.r.bRequest, tmp); |
3304 | dev->protocol_stall = 1; | |
3305 | } | |
3306 | ||
3307 | /* some in/out token irq should follow; maybe stall then. | |
3308 | * driver must queue a request (even zlp) or halt ep0 | |
3309 | * before the host times out. | |
3310 | */ | |
3311 | } | |
3312 | ||
320f3459 DB |
3313 | #undef w_value |
3314 | #undef w_index | |
3315 | #undef w_length | |
3316 | ||
1da177e4 | 3317 | next_endpoints: |
5185c913 | 3318 | if ((dev->quirks & PLX_PCIE) && dev->enhanced_mode) { |
a09e23f5 MYK |
3319 | u32 mask = (BIT(ENDPOINT_0_INTERRUPT) | |
3320 | USB3380_IRQSTAT0_EP_INTR_MASK_IN | | |
3321 | USB3380_IRQSTAT0_EP_INTR_MASK_OUT); | |
3322 | ||
3323 | if (stat & mask) { | |
3324 | usb338x_handle_ep_intr(dev, stat & mask); | |
3325 | stat &= ~mask; | |
3326 | } | |
3327 | } else { | |
3328 | /* endpoint data irq ? */ | |
3329 | scratch = stat & 0x7f; | |
3330 | stat &= ~0x7f; | |
3331 | for (num = 0; scratch; num++) { | |
3332 | u32 t; | |
3333 | ||
3334 | /* do this endpoint's FIFO and queue need tending? */ | |
3335 | t = BIT(num); | |
3336 | if ((scratch & t) == 0) | |
3337 | continue; | |
3338 | scratch ^= t; | |
1da177e4 | 3339 | |
a09e23f5 MYK |
3340 | ep = &dev->ep[num]; |
3341 | handle_ep_small(ep); | |
3342 | } | |
1da177e4 LT |
3343 | } |
3344 | ||
3345 | if (stat) | |
e56e69cc | 3346 | ep_dbg(dev, "unhandled irqstat0 %08x\n", stat); |
1da177e4 LT |
3347 | } |
3348 | ||
3e76fdcb RRD |
3349 | #define DMA_INTERRUPTS (BIT(DMA_D_INTERRUPT) | \ |
3350 | BIT(DMA_C_INTERRUPT) | \ | |
3351 | BIT(DMA_B_INTERRUPT) | \ | |
3352 | BIT(DMA_A_INTERRUPT)) | |
1da177e4 | 3353 | #define PCI_ERROR_INTERRUPTS ( \ |
3e76fdcb RRD |
3354 | BIT(PCI_MASTER_ABORT_RECEIVED_INTERRUPT) | \ |
3355 | BIT(PCI_TARGET_ABORT_RECEIVED_INTERRUPT) | \ | |
3356 | BIT(PCI_RETRY_ABORT_INTERRUPT)) | |
1da177e4 | 3357 | |
fae3c158 | 3358 | static void handle_stat1_irqs(struct net2280 *dev, u32 stat) |
dec3c23c AS |
3359 | __releases(dev->lock) |
3360 | __acquires(dev->lock) | |
1da177e4 LT |
3361 | { |
3362 | struct net2280_ep *ep; | |
3363 | u32 tmp, num, mask, scratch; | |
3364 | ||
3365 | /* after disconnect there's nothing else to do! */ | |
3e76fdcb RRD |
3366 | tmp = BIT(VBUS_INTERRUPT) | BIT(ROOT_PORT_RESET_INTERRUPT); |
3367 | mask = BIT(SUPER_SPEED) | BIT(HIGH_SPEED) | BIT(FULL_SPEED); | |
1da177e4 LT |
3368 | |
3369 | /* VBUS disconnect is indicated by VBUS_PIN and VBUS_INTERRUPT set. | |
fb914ebf | 3370 | * Root Port Reset is indicated by ROOT_PORT_RESET_INTERRUPT set and |
901b3d75 | 3371 | * both HIGH_SPEED and FULL_SPEED clear (as ROOT_PORT_RESET_INTERRUPT |
1da177e4 LT |
3372 | * only indicates a change in the reset state). |
3373 | */ | |
3374 | if (stat & tmp) { | |
b611e424 AS |
3375 | bool reset = false; |
3376 | bool disconnect = false; | |
3377 | ||
3378 | /* | |
3379 | * Ignore disconnects and resets if the speed hasn't been set. | |
3380 | * VBUS can bounce and there's always an initial reset. | |
3381 | */ | |
fae3c158 | 3382 | writel(tmp, &dev->regs->irqstat1); |
b611e424 AS |
3383 | if (dev->gadget.speed != USB_SPEED_UNKNOWN) { |
3384 | if ((stat & BIT(VBUS_INTERRUPT)) && | |
3385 | (readl(&dev->usb->usbctl) & | |
3386 | BIT(VBUS_PIN)) == 0) { | |
3387 | disconnect = true; | |
3388 | ep_dbg(dev, "disconnect %s\n", | |
3389 | dev->driver->driver.name); | |
3390 | } else if ((stat & BIT(ROOT_PORT_RESET_INTERRUPT)) && | |
3391 | (readl(&dev->usb->usbstat) & mask) | |
3392 | == 0) { | |
3393 | reset = true; | |
3394 | ep_dbg(dev, "reset %s\n", | |
3395 | dev->driver->driver.name); | |
3396 | } | |
3397 | ||
3398 | if (disconnect || reset) { | |
3399 | stop_activity(dev, dev->driver); | |
3400 | ep0_start(dev); | |
b42e8090 AS |
3401 | if (dev->async_callbacks) { |
3402 | spin_unlock(&dev->lock); | |
3403 | if (reset) | |
3404 | usb_gadget_udc_reset(&dev->gadget, dev->driver); | |
3405 | else | |
3406 | (dev->driver->disconnect)(&dev->gadget); | |
3407 | spin_lock(&dev->lock); | |
3408 | } | |
b611e424 AS |
3409 | return; |
3410 | } | |
1da177e4 LT |
3411 | } |
3412 | stat &= ~tmp; | |
3413 | ||
3414 | /* vBUS can bounce ... one of many reasons to ignore the | |
3415 | * notion of hotplug events on bus connect/disconnect! | |
3416 | */ | |
3417 | if (!stat) | |
3418 | return; | |
3419 | } | |
3420 | ||
3421 | /* NOTE: chip stays in PCI D0 state for now, but it could | |
3422 | * enter D1 to save more power | |
3423 | */ | |
3e76fdcb | 3424 | tmp = BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT); |
1da177e4 | 3425 | if (stat & tmp) { |
fae3c158 | 3426 | writel(tmp, &dev->regs->irqstat1); |
dec3c23c | 3427 | spin_unlock(&dev->lock); |
3e76fdcb | 3428 | if (stat & BIT(SUSPEND_REQUEST_INTERRUPT)) { |
b42e8090 | 3429 | if (dev->async_callbacks && dev->driver->suspend) |
fae3c158 | 3430 | dev->driver->suspend(&dev->gadget); |
1da177e4 | 3431 | if (!enable_suspend) |
3e76fdcb | 3432 | stat &= ~BIT(SUSPEND_REQUEST_INTERRUPT); |
1da177e4 | 3433 | } else { |
b42e8090 | 3434 | if (dev->async_callbacks && dev->driver->resume) |
fae3c158 | 3435 | dev->driver->resume(&dev->gadget); |
1da177e4 LT |
3436 | /* at high speed, note erratum 0133 */ |
3437 | } | |
dec3c23c | 3438 | spin_lock(&dev->lock); |
1da177e4 LT |
3439 | stat &= ~tmp; |
3440 | } | |
3441 | ||
3442 | /* clear any other status/irqs */ | |
3443 | if (stat) | |
fae3c158 | 3444 | writel(stat, &dev->regs->irqstat1); |
1da177e4 LT |
3445 | |
3446 | /* some status we can just ignore */ | |
2eeb0016 | 3447 | if (dev->quirks & PLX_2280) |
3e76fdcb RRD |
3448 | stat &= ~(BIT(CONTROL_STATUS_INTERRUPT) | |
3449 | BIT(SUSPEND_REQUEST_INTERRUPT) | | |
3450 | BIT(RESUME_INTERRUPT) | | |
3451 | BIT(SOF_INTERRUPT)); | |
950ee4c8 | 3452 | else |
3e76fdcb RRD |
3453 | stat &= ~(BIT(CONTROL_STATUS_INTERRUPT) | |
3454 | BIT(RESUME_INTERRUPT) | | |
3455 | BIT(SOF_DOWN_INTERRUPT) | | |
3456 | BIT(SOF_INTERRUPT)); | |
950ee4c8 | 3457 | |
1da177e4 LT |
3458 | if (!stat) |
3459 | return; | |
e56e69cc | 3460 | /* ep_dbg(dev, "irqstat1 %08x\n", stat);*/ |
1da177e4 LT |
3461 | |
3462 | /* DMA status, for ep-{a,b,c,d} */ | |
3463 | scratch = stat & DMA_INTERRUPTS; | |
3464 | stat &= ~DMA_INTERRUPTS; | |
3465 | scratch >>= 9; | |
3466 | for (num = 0; scratch; num++) { | |
3467 | struct net2280_dma_regs __iomem *dma; | |
3468 | ||
3e76fdcb | 3469 | tmp = BIT(num); |
1da177e4 LT |
3470 | if ((tmp & scratch) == 0) |
3471 | continue; | |
3472 | scratch ^= tmp; | |
3473 | ||
fae3c158 | 3474 | ep = &dev->ep[num + 1]; |
1da177e4 LT |
3475 | dma = ep->dma; |
3476 | ||
3477 | if (!dma) | |
3478 | continue; | |
3479 | ||
3480 | /* clear ep's dma status */ | |
fae3c158 RRD |
3481 | tmp = readl(&dma->dmastat); |
3482 | writel(tmp, &dma->dmastat); | |
1da177e4 | 3483 | |
adc82f77 | 3484 | /* dma sync*/ |
5185c913 | 3485 | if (dev->quirks & PLX_PCIE) { |
adc82f77 RRD |
3486 | u32 r_dmacount = readl(&dma->dmacount); |
3487 | if (!ep->is_in && (r_dmacount & 0x00FFFFFF) && | |
3e76fdcb | 3488 | (tmp & BIT(DMA_TRANSACTION_DONE_INTERRUPT))) |
adc82f77 RRD |
3489 | continue; |
3490 | } | |
3491 | ||
90664198 RRD |
3492 | if (!(tmp & BIT(DMA_TRANSACTION_DONE_INTERRUPT))) { |
3493 | ep_dbg(ep->dev, "%s no xact done? %08x\n", | |
3494 | ep->ep.name, tmp); | |
3495 | continue; | |
1da177e4 | 3496 | } |
90664198 | 3497 | stop_dma(ep->dma); |
1da177e4 LT |
3498 | |
3499 | /* OUT transfers terminate when the data from the | |
3500 | * host is in our memory. Process whatever's done. | |
3501 | * On this path, we know transfer's last packet wasn't | |
3502 | * less than req->length. NAK_OUT_PACKETS may be set, | |
3503 | * or the FIFO may already be holding new packets. | |
3504 | * | |
3505 | * IN transfers can linger in the FIFO for a very | |
3506 | * long time ... we ignore that for now, accounting | |
3507 | * precisely (like PIO does) needs per-packet irqs | |
3508 | */ | |
fae3c158 | 3509 | scan_dma_completions(ep); |
1da177e4 LT |
3510 | |
3511 | /* disable dma on inactive queues; else maybe restart */ | |
90664198 | 3512 | if (!list_empty(&ep->queue)) { |
fae3c158 | 3513 | tmp = readl(&dma->dmactl); |
90664198 | 3514 | restart_dma(ep); |
1da177e4 LT |
3515 | } |
3516 | ep->irqs++; | |
3517 | } | |
3518 | ||
3519 | /* NOTE: there are other PCI errors we might usefully notice. | |
3520 | * if they appear very often, here's where to try recovering. | |
3521 | */ | |
3522 | if (stat & PCI_ERROR_INTERRUPTS) { | |
e56e69cc | 3523 | ep_err(dev, "pci dma error; stat %08x\n", stat); |
1da177e4 LT |
3524 | stat &= ~PCI_ERROR_INTERRUPTS; |
3525 | /* these are fatal errors, but "maybe" they won't | |
3526 | * happen again ... | |
3527 | */ | |
fae3c158 RRD |
3528 | stop_activity(dev, dev->driver); |
3529 | ep0_start(dev); | |
1da177e4 LT |
3530 | stat = 0; |
3531 | } | |
3532 | ||
3533 | if (stat) | |
e56e69cc | 3534 | ep_dbg(dev, "unhandled irqstat1 %08x\n", stat); |
1da177e4 LT |
3535 | } |
3536 | ||
fae3c158 | 3537 | static irqreturn_t net2280_irq(int irq, void *_dev) |
1da177e4 LT |
3538 | { |
3539 | struct net2280 *dev = _dev; | |
3540 | ||
658ad5e0 | 3541 | /* shared interrupt, not ours */ |
2eeb0016 | 3542 | if ((dev->quirks & PLX_LEGACY) && |
3e76fdcb | 3543 | (!(readl(&dev->regs->irqstat0) & BIT(INTA_ASSERTED)))) |
658ad5e0 AS |
3544 | return IRQ_NONE; |
3545 | ||
fae3c158 | 3546 | spin_lock(&dev->lock); |
1da177e4 LT |
3547 | |
3548 | /* handle disconnect, dma, and more */ | |
fae3c158 | 3549 | handle_stat1_irqs(dev, readl(&dev->regs->irqstat1)); |
1da177e4 LT |
3550 | |
3551 | /* control requests and PIO */ | |
fae3c158 | 3552 | handle_stat0_irqs(dev, readl(&dev->regs->irqstat0)); |
1da177e4 | 3553 | |
5185c913 | 3554 | if (dev->quirks & PLX_PCIE) { |
adc82f77 RRD |
3555 | /* re-enable interrupt to trigger any possible new interrupt */ |
3556 | u32 pciirqenb1 = readl(&dev->regs->pciirqenb1); | |
3557 | writel(pciirqenb1 & 0x7FFFFFFF, &dev->regs->pciirqenb1); | |
3558 | writel(pciirqenb1, &dev->regs->pciirqenb1); | |
3559 | } | |
3560 | ||
fae3c158 | 3561 | spin_unlock(&dev->lock); |
1da177e4 LT |
3562 | |
3563 | return IRQ_HANDLED; | |
3564 | } | |
3565 | ||
3566 | /*-------------------------------------------------------------------------*/ | |
3567 | ||
fae3c158 | 3568 | static void gadget_release(struct device *_dev) |
1da177e4 | 3569 | { |
f770fbec | 3570 | struct net2280 *dev = container_of(_dev, struct net2280, gadget.dev); |
1da177e4 | 3571 | |
fae3c158 | 3572 | kfree(dev); |
1da177e4 LT |
3573 | } |
3574 | ||
3575 | /* tear down the binding between this driver and the pci device */ | |
3576 | ||
fae3c158 | 3577 | static void net2280_remove(struct pci_dev *pdev) |
1da177e4 | 3578 | { |
fae3c158 | 3579 | struct net2280 *dev = pci_get_drvdata(pdev); |
1da177e4 | 3580 | |
f770fbec AS |
3581 | if (dev->added) |
3582 | usb_del_gadget(&dev->gadget); | |
0f91349b | 3583 | |
6bea476c | 3584 | BUG_ON(dev->driver); |
1da177e4 LT |
3585 | |
3586 | /* then clean up the resources we allocated during probe() */ | |
1da177e4 LT |
3587 | if (dev->requests) { |
3588 | int i; | |
3589 | for (i = 1; i < 5; i++) { | |
fae3c158 | 3590 | if (!dev->ep[i].dummy) |
1da177e4 | 3591 | continue; |
fa9ed6f6 | 3592 | dma_pool_free(dev->requests, dev->ep[i].dummy, |
fae3c158 | 3593 | dev->ep[i].td_dma); |
1da177e4 | 3594 | } |
fa9ed6f6 | 3595 | dma_pool_destroy(dev->requests); |
1da177e4 LT |
3596 | } |
3597 | if (dev->got_irq) | |
fae3c158 | 3598 | free_irq(pdev->irq, dev); |
5185c913 | 3599 | if (dev->quirks & PLX_PCIE) |
adc82f77 | 3600 | pci_disable_msi(pdev); |
53e720f3 GS |
3601 | if (dev->regs) { |
3602 | net2280_led_shutdown(dev); | |
fae3c158 | 3603 | iounmap(dev->regs); |
53e720f3 | 3604 | } |
1da177e4 | 3605 | if (dev->region) |
fae3c158 RRD |
3606 | release_mem_region(pci_resource_start(pdev, 0), |
3607 | pci_resource_len(pdev, 0)); | |
1da177e4 | 3608 | if (dev->enabled) |
fae3c158 RRD |
3609 | pci_disable_device(pdev); |
3610 | device_remove_file(&pdev->dev, &dev_attr_registers); | |
1da177e4 | 3611 | |
e56e69cc | 3612 | ep_info(dev, "unbind\n"); |
f770fbec | 3613 | usb_put_gadget(&dev->gadget); |
1da177e4 LT |
3614 | } |
3615 | ||
3616 | /* wrap this driver around the specified device, but | |
3617 | * don't respond over USB until a gadget driver binds to us. | |
3618 | */ | |
3619 | ||
fae3c158 | 3620 | static int net2280_probe(struct pci_dev *pdev, const struct pci_device_id *id) |
1da177e4 LT |
3621 | { |
3622 | struct net2280 *dev; | |
3623 | unsigned long resource, len; | |
3624 | void __iomem *base = NULL; | |
3625 | int retval, i; | |
1da177e4 | 3626 | |
1da177e4 | 3627 | /* alloc, and start init */ |
fae3c158 RRD |
3628 | dev = kzalloc(sizeof(*dev), GFP_KERNEL); |
3629 | if (dev == NULL) { | |
1da177e4 LT |
3630 | retval = -ENOMEM; |
3631 | goto done; | |
3632 | } | |
3633 | ||
fae3c158 | 3634 | pci_set_drvdata(pdev, dev); |
f770fbec | 3635 | usb_initialize_gadget(&pdev->dev, &dev->gadget, gadget_release); |
fae3c158 | 3636 | spin_lock_init(&dev->lock); |
2eeb0016 | 3637 | dev->quirks = id->driver_data; |
1da177e4 LT |
3638 | dev->pdev = pdev; |
3639 | dev->gadget.ops = &net2280_ops; | |
2eeb0016 | 3640 | dev->gadget.max_speed = (dev->quirks & PLX_SUPERSPEED) ? |
adc82f77 | 3641 | USB_SPEED_SUPER : USB_SPEED_HIGH; |
1da177e4 LT |
3642 | |
3643 | /* the "gadget" abstracts/virtualizes the controller */ | |
1da177e4 LT |
3644 | dev->gadget.name = driver_name; |
3645 | ||
3646 | /* now all the pci goodies ... */ | |
fae3c158 RRD |
3647 | if (pci_enable_device(pdev) < 0) { |
3648 | retval = -ENODEV; | |
1da177e4 LT |
3649 | goto done; |
3650 | } | |
3651 | dev->enabled = 1; | |
3652 | ||
3653 | /* BAR 0 holds all the registers | |
3654 | * BAR 1 is 8051 memory; unused here (note erratum 0103) | |
3655 | * BAR 2 is fifo memory; unused here | |
3656 | */ | |
fae3c158 RRD |
3657 | resource = pci_resource_start(pdev, 0); |
3658 | len = pci_resource_len(pdev, 0); | |
3659 | if (!request_mem_region(resource, len, driver_name)) { | |
e56e69cc | 3660 | ep_dbg(dev, "controller already in use\n"); |
1da177e4 LT |
3661 | retval = -EBUSY; |
3662 | goto done; | |
3663 | } | |
3664 | dev->region = 1; | |
3665 | ||
901b3d75 DB |
3666 | /* FIXME provide firmware download interface to put |
3667 | * 8051 code into the chip, e.g. to turn on PCI PM. | |
3668 | */ | |
3669 | ||
4bdc0d67 | 3670 | base = ioremap(resource, len); |
1da177e4 | 3671 | if (base == NULL) { |
e56e69cc | 3672 | ep_dbg(dev, "can't map memory\n"); |
1da177e4 LT |
3673 | retval = -EFAULT; |
3674 | goto done; | |
3675 | } | |
3676 | dev->regs = (struct net2280_regs __iomem *) base; | |
3677 | dev->usb = (struct net2280_usb_regs __iomem *) (base + 0x0080); | |
3678 | dev->pci = (struct net2280_pci_regs __iomem *) (base + 0x0100); | |
3679 | dev->dma = (struct net2280_dma_regs __iomem *) (base + 0x0180); | |
3680 | dev->dep = (struct net2280_dep_regs __iomem *) (base + 0x0200); | |
3681 | dev->epregs = (struct net2280_ep_regs __iomem *) (base + 0x0300); | |
3682 | ||
5185c913 | 3683 | if (dev->quirks & PLX_PCIE) { |
adc82f77 RRD |
3684 | u32 fsmvalue; |
3685 | u32 usbstat; | |
3686 | dev->usb_ext = (struct usb338x_usb_ext_regs __iomem *) | |
3687 | (base + 0x00b4); | |
adc82f77 RRD |
3688 | dev->llregs = (struct usb338x_ll_regs __iomem *) |
3689 | (base + 0x0700); | |
adc82f77 RRD |
3690 | dev->plregs = (struct usb338x_pl_regs __iomem *) |
3691 | (base + 0x0800); | |
3692 | usbstat = readl(&dev->usb->usbstat); | |
fae3c158 | 3693 | dev->enhanced_mode = !!(usbstat & BIT(11)); |
adc82f77 RRD |
3694 | dev->n_ep = (dev->enhanced_mode) ? 9 : 5; |
3695 | /* put into initial config, link up all endpoints */ | |
3696 | fsmvalue = get_idx_reg(dev->regs, SCRATCH) & | |
3697 | (0xf << DEFECT7374_FSM_FIELD); | |
3698 | /* See if firmware needs to set up for workaround: */ | |
5517525e RRD |
3699 | if (fsmvalue == DEFECT7374_FSM_SS_CONTROL_READ) { |
3700 | dev->bug7734_patched = 1; | |
adc82f77 | 3701 | writel(0, &dev->usb->usbctl); |
5517525e RRD |
3702 | } else |
3703 | dev->bug7734_patched = 0; | |
3704 | } else { | |
adc82f77 RRD |
3705 | dev->enhanced_mode = 0; |
3706 | dev->n_ep = 7; | |
3707 | /* put into initial config, link up all endpoints */ | |
3708 | writel(0, &dev->usb->usbctl); | |
3709 | } | |
3710 | ||
fae3c158 RRD |
3711 | usb_reset(dev); |
3712 | usb_reinit(dev); | |
1da177e4 LT |
3713 | |
3714 | /* irq setup after old hardware is cleaned up */ | |
3715 | if (!pdev->irq) { | |
e56e69cc | 3716 | ep_err(dev, "No IRQ. Check PCI setup!\n"); |
1da177e4 LT |
3717 | retval = -ENODEV; |
3718 | goto done; | |
3719 | } | |
c6387a48 | 3720 | |
5185c913 | 3721 | if (dev->quirks & PLX_PCIE) |
adc82f77 | 3722 | if (pci_enable_msi(pdev)) |
e56e69cc | 3723 | ep_err(dev, "Failed to enable MSI mode\n"); |
adc82f77 | 3724 | |
fae3c158 RRD |
3725 | if (request_irq(pdev->irq, net2280_irq, IRQF_SHARED, |
3726 | driver_name, dev)) { | |
e56e69cc | 3727 | ep_err(dev, "request interrupt %d failed\n", pdev->irq); |
1da177e4 LT |
3728 | retval = -EBUSY; |
3729 | goto done; | |
3730 | } | |
3731 | dev->got_irq = 1; | |
3732 | ||
3733 | /* DMA setup */ | |
3734 | /* NOTE: we know only the 32 LSBs of dma addresses may be nonzero */ | |
fa9ed6f6 | 3735 | dev->requests = dma_pool_create("requests", &pdev->dev, |
fae3c158 | 3736 | sizeof(struct net2280_dma), |
1da177e4 LT |
3737 | 0 /* no alignment requirements */, |
3738 | 0 /* or page-crossing issues */); | |
3739 | if (!dev->requests) { | |
e56e69cc | 3740 | ep_dbg(dev, "can't get request pool\n"); |
1da177e4 LT |
3741 | retval = -ENOMEM; |
3742 | goto done; | |
3743 | } | |
3744 | for (i = 1; i < 5; i++) { | |
3745 | struct net2280_dma *td; | |
3746 | ||
fa9ed6f6 | 3747 | td = dma_pool_alloc(dev->requests, GFP_KERNEL, |
fae3c158 | 3748 | &dev->ep[i].td_dma); |
1da177e4 | 3749 | if (!td) { |
e56e69cc | 3750 | ep_dbg(dev, "can't get dummy %d\n", i); |
1da177e4 LT |
3751 | retval = -ENOMEM; |
3752 | goto done; | |
3753 | } | |
3754 | td->dmacount = 0; /* not VALID */ | |
1da177e4 | 3755 | td->dmadesc = td->dmaaddr; |
fae3c158 | 3756 | dev->ep[i].dummy = td; |
1da177e4 LT |
3757 | } |
3758 | ||
3759 | /* enable lower-overhead pci memory bursts during DMA */ | |
2eeb0016 | 3760 | if (dev->quirks & PLX_LEGACY) |
3e76fdcb RRD |
3761 | writel(BIT(DMA_MEMORY_WRITE_AND_INVALIDATE_ENABLE) | |
3762 | /* | |
3763 | * 256 write retries may not be enough... | |
3764 | BIT(PCI_RETRY_ABORT_ENABLE) | | |
3765 | */ | |
3766 | BIT(DMA_READ_MULTIPLE_ENABLE) | | |
3767 | BIT(DMA_READ_LINE_ENABLE), | |
3768 | &dev->pci->pcimstctl); | |
1da177e4 | 3769 | /* erratum 0115 shouldn't appear: Linux inits PCI_LATENCY_TIMER */ |
fae3c158 RRD |
3770 | pci_set_master(pdev); |
3771 | pci_try_set_mwi(pdev); | |
1da177e4 LT |
3772 | |
3773 | /* ... also flushes any posted pci writes */ | |
fae3c158 | 3774 | dev->chiprev = get_idx_reg(dev->regs, REG_CHIPREV) & 0xffff; |
1da177e4 LT |
3775 | |
3776 | /* done */ | |
e56e69cc RRD |
3777 | ep_info(dev, "%s\n", driver_desc); |
3778 | ep_info(dev, "irq %d, pci mem %p, chip rev %04x\n", | |
c6387a48 | 3779 | pdev->irq, base, dev->chiprev); |
d588ff58 | 3780 | ep_info(dev, "version: " DRIVER_VERSION "; %s\n", |
adc82f77 | 3781 | dev->enhanced_mode ? "enhanced mode" : "legacy mode"); |
fae3c158 RRD |
3782 | retval = device_create_file(&pdev->dev, &dev_attr_registers); |
3783 | if (retval) | |
3784 | goto done; | |
1da177e4 | 3785 | |
f770fbec | 3786 | retval = usb_add_gadget(&dev->gadget); |
0f91349b SAS |
3787 | if (retval) |
3788 | goto done; | |
f770fbec | 3789 | dev->added = 1; |
1da177e4 LT |
3790 | return 0; |
3791 | ||
3792 | done: | |
2468c877 | 3793 | if (dev) { |
fae3c158 | 3794 | net2280_remove(pdev); |
2468c877 EN |
3795 | kfree(dev); |
3796 | } | |
1da177e4 LT |
3797 | return retval; |
3798 | } | |
3799 | ||
2d61bde7 AS |
3800 | /* make sure the board is quiescent; otherwise it will continue |
3801 | * generating IRQs across the upcoming reboot. | |
3802 | */ | |
3803 | ||
fae3c158 | 3804 | static void net2280_shutdown(struct pci_dev *pdev) |
2d61bde7 | 3805 | { |
fae3c158 | 3806 | struct net2280 *dev = pci_get_drvdata(pdev); |
2d61bde7 AS |
3807 | |
3808 | /* disable IRQs */ | |
fae3c158 RRD |
3809 | writel(0, &dev->regs->pciirqenb0); |
3810 | writel(0, &dev->regs->pciirqenb1); | |
2d61bde7 AS |
3811 | |
3812 | /* disable the pullup so the host will think we're gone */ | |
fae3c158 | 3813 | writel(0, &dev->usb->usbctl); |
2f076077 | 3814 | |
2d61bde7 AS |
3815 | } |
3816 | ||
1da177e4 LT |
3817 | |
3818 | /*-------------------------------------------------------------------------*/ | |
3819 | ||
fae3c158 | 3820 | static const struct pci_device_id pci_ids[] = { { |
7b78f48a | 3821 | .class = PCI_CLASS_SERIAL_USB_DEVICE, |
901b3d75 | 3822 | .class_mask = ~0, |
c2db8a8a | 3823 | .vendor = PCI_VENDOR_ID_PLX_LEGACY, |
1da177e4 LT |
3824 | .device = 0x2280, |
3825 | .subvendor = PCI_ANY_ID, | |
3826 | .subdevice = PCI_ANY_ID, | |
2eeb0016 | 3827 | .driver_data = PLX_LEGACY | PLX_2280, |
ae8e530a | 3828 | }, { |
7b78f48a | 3829 | .class = PCI_CLASS_SERIAL_USB_DEVICE, |
901b3d75 | 3830 | .class_mask = ~0, |
c2db8a8a | 3831 | .vendor = PCI_VENDOR_ID_PLX_LEGACY, |
950ee4c8 GL |
3832 | .device = 0x2282, |
3833 | .subvendor = PCI_ANY_ID, | |
3834 | .subdevice = PCI_ANY_ID, | |
2eeb0016 | 3835 | .driver_data = PLX_LEGACY, |
ae8e530a | 3836 | }, |
adc82f77 | 3837 | { |
7b78f48a | 3838 | .class = PCI_CLASS_SERIAL_USB_DEVICE, |
ae8e530a RRD |
3839 | .class_mask = ~0, |
3840 | .vendor = PCI_VENDOR_ID_PLX, | |
5185c913 TH |
3841 | .device = 0x2380, |
3842 | .subvendor = PCI_ANY_ID, | |
3843 | .subdevice = PCI_ANY_ID, | |
3844 | .driver_data = PLX_PCIE, | |
3845 | }, | |
3846 | { | |
3847 | .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe), | |
3848 | .class_mask = ~0, | |
3849 | .vendor = PCI_VENDOR_ID_PLX, | |
ae8e530a RRD |
3850 | .device = 0x3380, |
3851 | .subvendor = PCI_ANY_ID, | |
3852 | .subdevice = PCI_ANY_ID, | |
5185c913 | 3853 | .driver_data = PLX_PCIE | PLX_SUPERSPEED, |
adc82f77 RRD |
3854 | }, |
3855 | { | |
7b78f48a | 3856 | .class = PCI_CLASS_SERIAL_USB_DEVICE, |
ae8e530a RRD |
3857 | .class_mask = ~0, |
3858 | .vendor = PCI_VENDOR_ID_PLX, | |
3859 | .device = 0x3382, | |
3860 | .subvendor = PCI_ANY_ID, | |
3861 | .subdevice = PCI_ANY_ID, | |
5185c913 | 3862 | .driver_data = PLX_PCIE | PLX_SUPERSPEED, |
adc82f77 RRD |
3863 | }, |
3864 | { /* end: all zeroes */ } | |
1da177e4 | 3865 | }; |
fae3c158 | 3866 | MODULE_DEVICE_TABLE(pci, pci_ids); |
1da177e4 LT |
3867 | |
3868 | /* pci driver glue; this is a "new style" PCI driver module */ | |
3869 | static struct pci_driver net2280_pci_driver = { | |
8d57a84a | 3870 | .name = driver_name, |
1da177e4 LT |
3871 | .id_table = pci_ids, |
3872 | ||
3873 | .probe = net2280_probe, | |
3874 | .remove = net2280_remove, | |
2d61bde7 | 3875 | .shutdown = net2280_shutdown, |
1da177e4 LT |
3876 | |
3877 | /* FIXME add power management support */ | |
3878 | }; | |
3879 | ||
9a028e46 RRD |
3880 | module_pci_driver(net2280_pci_driver); |
3881 | ||
fae3c158 RRD |
3882 | MODULE_DESCRIPTION(DRIVER_DESC); |
3883 | MODULE_AUTHOR("David Brownell"); | |
3884 | MODULE_LICENSE("GPL"); |