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5fd54ace | 1 | // SPDX-License-Identifier: GPL-2.0+ |
3948f0e0 LY |
2 | /* |
3 | * driver/usb/gadget/fsl_qe_udc.c | |
4 | * | |
5 | * Copyright (c) 2006-2008 Freescale Semiconductor, Inc. All rights reserved. | |
6 | * | |
7 | * Xie Xiaobo <X.Xie@freescale.com> | |
8 | * Li Yang <leoli@freescale.com> | |
9 | * Based on bareboard code from Shlomi Gridish. | |
10 | * | |
11 | * Description: | |
12 | * Freescle QE/CPM USB Pheripheral Controller Driver | |
13 | * The controller can be found on MPC8360, MPC8272, and etc. | |
14 | * MPC8360 Rev 1.1 may need QE mircocode update | |
3948f0e0 LY |
15 | */ |
16 | ||
17 | #undef USB_TRACE | |
18 | ||
19 | #include <linux/module.h> | |
20 | #include <linux/kernel.h> | |
3948f0e0 LY |
21 | #include <linux/ioport.h> |
22 | #include <linux/types.h> | |
23 | #include <linux/errno.h> | |
cd40c4c4 | 24 | #include <linux/err.h> |
3948f0e0 LY |
25 | #include <linux/slab.h> |
26 | #include <linux/list.h> | |
27 | #include <linux/interrupt.h> | |
28 | #include <linux/io.h> | |
29 | #include <linux/moduleparam.h> | |
22ae782f | 30 | #include <linux/of_address.h> |
5af50730 | 31 | #include <linux/of_irq.h> |
3948f0e0 LY |
32 | #include <linux/of_platform.h> |
33 | #include <linux/dma-mapping.h> | |
34 | #include <linux/usb/ch9.h> | |
35 | #include <linux/usb/gadget.h> | |
36 | #include <linux/usb/otg.h> | |
7aa1aa6e | 37 | #include <soc/fsl/qe/qe.h> |
3948f0e0 LY |
38 | #include <asm/cpm.h> |
39 | #include <asm/dma.h> | |
40 | #include <asm/reg.h> | |
41 | #include "fsl_qe_udc.h" | |
42 | ||
43 | #define DRIVER_DESC "Freescale QE/CPM USB Device Controller driver" | |
44 | #define DRIVER_AUTHOR "Xie XiaoBo" | |
45 | #define DRIVER_VERSION "1.0" | |
46 | ||
47 | #define DMA_ADDR_INVALID (~(dma_addr_t)0) | |
48 | ||
49 | static const char driver_name[] = "fsl_qe_udc"; | |
50 | static const char driver_desc[] = DRIVER_DESC; | |
51 | ||
52 | /*ep name is important in gadget, it should obey the convention of ep_match()*/ | |
53 | static const char *const ep_name[] = { | |
54 | "ep0-control", /* everyone has ep0 */ | |
55 | /* 3 configurable endpoints */ | |
56 | "ep1", | |
57 | "ep2", | |
58 | "ep3", | |
59 | }; | |
60 | ||
4b67a54a | 61 | static const struct usb_endpoint_descriptor qe_ep0_desc = { |
3948f0e0 LY |
62 | .bLength = USB_DT_ENDPOINT_SIZE, |
63 | .bDescriptorType = USB_DT_ENDPOINT, | |
64 | ||
65 | .bEndpointAddress = 0, | |
66 | .bmAttributes = USB_ENDPOINT_XFER_CONTROL, | |
67 | .wMaxPacketSize = USB_MAX_CTRL_PAYLOAD, | |
68 | }; | |
69 | ||
3948f0e0 LY |
70 | /******************************************************************** |
71 | * Internal Used Function Start | |
72 | ********************************************************************/ | |
73 | /*----------------------------------------------------------------- | |
74 | * done() - retire a request; caller blocked irqs | |
75 | *--------------------------------------------------------------*/ | |
76 | static void done(struct qe_ep *ep, struct qe_req *req, int status) | |
77 | { | |
78 | struct qe_udc *udc = ep->udc; | |
79 | unsigned char stopped = ep->stopped; | |
80 | ||
81 | /* the req->queue pointer is used by ep_queue() func, in which | |
82 | * the request will be added into a udc_ep->queue 'd tail | |
83 | * so here the req will be dropped from the ep->queue | |
84 | */ | |
85 | list_del_init(&req->queue); | |
86 | ||
87 | /* req.status should be set as -EINPROGRESS in ep_queue() */ | |
88 | if (req->req.status == -EINPROGRESS) | |
89 | req->req.status = status; | |
90 | else | |
91 | status = req->req.status; | |
92 | ||
93 | if (req->mapped) { | |
94 | dma_unmap_single(udc->gadget.dev.parent, | |
95 | req->req.dma, req->req.length, | |
96 | ep_is_in(ep) | |
97 | ? DMA_TO_DEVICE | |
98 | : DMA_FROM_DEVICE); | |
99 | req->req.dma = DMA_ADDR_INVALID; | |
100 | req->mapped = 0; | |
101 | } else | |
102 | dma_sync_single_for_cpu(udc->gadget.dev.parent, | |
103 | req->req.dma, req->req.length, | |
104 | ep_is_in(ep) | |
105 | ? DMA_TO_DEVICE | |
106 | : DMA_FROM_DEVICE); | |
107 | ||
108 | if (status && (status != -ESHUTDOWN)) | |
109 | dev_vdbg(udc->dev, "complete %s req %p stat %d len %u/%u\n", | |
110 | ep->ep.name, &req->req, status, | |
111 | req->req.actual, req->req.length); | |
112 | ||
113 | /* don't modify queue heads during completion callback */ | |
114 | ep->stopped = 1; | |
115 | spin_unlock(&udc->lock); | |
116 | ||
304f7e5e | 117 | usb_gadget_giveback_request(&ep->ep, &req->req); |
3948f0e0 LY |
118 | |
119 | spin_lock(&udc->lock); | |
120 | ||
121 | ep->stopped = stopped; | |
122 | } | |
123 | ||
124 | /*----------------------------------------------------------------- | |
125 | * nuke(): delete all requests related to this ep | |
126 | *--------------------------------------------------------------*/ | |
127 | static void nuke(struct qe_ep *ep, int status) | |
128 | { | |
129 | /* Whether this eq has request linked */ | |
130 | while (!list_empty(&ep->queue)) { | |
131 | struct qe_req *req = NULL; | |
132 | req = list_entry(ep->queue.next, struct qe_req, queue); | |
133 | ||
134 | done(ep, req, status); | |
135 | } | |
136 | } | |
137 | ||
138 | /*---------------------------------------------------------------------------* | |
139 | * USB and Endpoint manipulate process, include parameter and register * | |
140 | *---------------------------------------------------------------------------*/ | |
141 | /* @value: 1--set stall 0--clean stall */ | |
142 | static int qe_eprx_stall_change(struct qe_ep *ep, int value) | |
143 | { | |
144 | u16 tem_usep; | |
145 | u8 epnum = ep->epnum; | |
146 | struct qe_udc *udc = ep->udc; | |
147 | ||
148 | tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]); | |
149 | tem_usep = tem_usep & ~USB_RHS_MASK; | |
150 | if (value == 1) | |
151 | tem_usep |= USB_RHS_STALL; | |
152 | else if (ep->dir == USB_DIR_IN) | |
153 | tem_usep |= USB_RHS_IGNORE_OUT; | |
154 | ||
155 | out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep); | |
156 | return 0; | |
157 | } | |
158 | ||
159 | static int qe_eptx_stall_change(struct qe_ep *ep, int value) | |
160 | { | |
161 | u16 tem_usep; | |
162 | u8 epnum = ep->epnum; | |
163 | struct qe_udc *udc = ep->udc; | |
164 | ||
165 | tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]); | |
166 | tem_usep = tem_usep & ~USB_THS_MASK; | |
167 | if (value == 1) | |
168 | tem_usep |= USB_THS_STALL; | |
169 | else if (ep->dir == USB_DIR_OUT) | |
170 | tem_usep |= USB_THS_IGNORE_IN; | |
171 | ||
172 | out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep); | |
173 | ||
174 | return 0; | |
175 | } | |
176 | ||
177 | static int qe_ep0_stall(struct qe_udc *udc) | |
178 | { | |
179 | qe_eptx_stall_change(&udc->eps[0], 1); | |
180 | qe_eprx_stall_change(&udc->eps[0], 1); | |
d77c1198 SAS |
181 | udc->ep0_state = WAIT_FOR_SETUP; |
182 | udc->ep0_dir = 0; | |
3948f0e0 LY |
183 | return 0; |
184 | } | |
185 | ||
186 | static int qe_eprx_nack(struct qe_ep *ep) | |
187 | { | |
188 | u8 epnum = ep->epnum; | |
189 | struct qe_udc *udc = ep->udc; | |
190 | ||
191 | if (ep->state == EP_STATE_IDLE) { | |
192 | /* Set the ep's nack */ | |
193 | clrsetbits_be16(&udc->usb_regs->usb_usep[epnum], | |
194 | USB_RHS_MASK, USB_RHS_NACK); | |
195 | ||
196 | /* Mask Rx and Busy interrupts */ | |
197 | clrbits16(&udc->usb_regs->usb_usbmr, | |
198 | (USB_E_RXB_MASK | USB_E_BSY_MASK)); | |
199 | ||
200 | ep->state = EP_STATE_NACK; | |
201 | } | |
202 | return 0; | |
203 | } | |
204 | ||
205 | static int qe_eprx_normal(struct qe_ep *ep) | |
206 | { | |
207 | struct qe_udc *udc = ep->udc; | |
208 | ||
209 | if (ep->state == EP_STATE_NACK) { | |
210 | clrsetbits_be16(&udc->usb_regs->usb_usep[ep->epnum], | |
211 | USB_RTHS_MASK, USB_THS_IGNORE_IN); | |
212 | ||
213 | /* Unmask RX interrupts */ | |
214 | out_be16(&udc->usb_regs->usb_usber, | |
215 | USB_E_BSY_MASK | USB_E_RXB_MASK); | |
216 | setbits16(&udc->usb_regs->usb_usbmr, | |
217 | (USB_E_RXB_MASK | USB_E_BSY_MASK)); | |
218 | ||
219 | ep->state = EP_STATE_IDLE; | |
220 | ep->has_data = 0; | |
221 | } | |
222 | ||
223 | return 0; | |
224 | } | |
225 | ||
226 | static int qe_ep_cmd_stoptx(struct qe_ep *ep) | |
227 | { | |
228 | if (ep->udc->soc_type == PORT_CPM) | |
229 | cpm_command(CPM_USB_STOP_TX | (ep->epnum << CPM_USB_EP_SHIFT), | |
230 | CPM_USB_STOP_TX_OPCODE); | |
231 | else | |
232 | qe_issue_cmd(QE_USB_STOP_TX, QE_CR_SUBBLOCK_USB, | |
233 | ep->epnum, 0); | |
234 | ||
235 | return 0; | |
236 | } | |
237 | ||
238 | static int qe_ep_cmd_restarttx(struct qe_ep *ep) | |
239 | { | |
240 | if (ep->udc->soc_type == PORT_CPM) | |
241 | cpm_command(CPM_USB_RESTART_TX | (ep->epnum << | |
242 | CPM_USB_EP_SHIFT), CPM_USB_RESTART_TX_OPCODE); | |
243 | else | |
244 | qe_issue_cmd(QE_USB_RESTART_TX, QE_CR_SUBBLOCK_USB, | |
245 | ep->epnum, 0); | |
246 | ||
247 | return 0; | |
248 | } | |
249 | ||
250 | static int qe_ep_flushtxfifo(struct qe_ep *ep) | |
251 | { | |
252 | struct qe_udc *udc = ep->udc; | |
253 | int i; | |
254 | ||
255 | i = (int)ep->epnum; | |
256 | ||
257 | qe_ep_cmd_stoptx(ep); | |
258 | out_8(&udc->usb_regs->usb_uscom, | |
259 | USB_CMD_FLUSH_FIFO | (USB_CMD_EP_MASK & (ep->epnum))); | |
260 | out_be16(&udc->ep_param[i]->tbptr, in_be16(&udc->ep_param[i]->tbase)); | |
261 | out_be32(&udc->ep_param[i]->tstate, 0); | |
262 | out_be16(&udc->ep_param[i]->tbcnt, 0); | |
263 | ||
264 | ep->c_txbd = ep->txbase; | |
265 | ep->n_txbd = ep->txbase; | |
266 | qe_ep_cmd_restarttx(ep); | |
267 | return 0; | |
268 | } | |
269 | ||
270 | static int qe_ep_filltxfifo(struct qe_ep *ep) | |
271 | { | |
272 | struct qe_udc *udc = ep->udc; | |
273 | ||
274 | out_8(&udc->usb_regs->usb_uscom, | |
275 | USB_CMD_STR_FIFO | (USB_CMD_EP_MASK & (ep->epnum))); | |
276 | return 0; | |
277 | } | |
278 | ||
279 | static int qe_epbds_reset(struct qe_udc *udc, int pipe_num) | |
280 | { | |
281 | struct qe_ep *ep; | |
282 | u32 bdring_len; | |
283 | struct qe_bd __iomem *bd; | |
284 | int i; | |
285 | ||
286 | ep = &udc->eps[pipe_num]; | |
287 | ||
288 | if (ep->dir == USB_DIR_OUT) | |
289 | bdring_len = USB_BDRING_LEN_RX; | |
290 | else | |
291 | bdring_len = USB_BDRING_LEN; | |
292 | ||
293 | bd = ep->rxbase; | |
294 | for (i = 0; i < (bdring_len - 1); i++) { | |
295 | out_be32((u32 __iomem *)bd, R_E | R_I); | |
296 | bd++; | |
297 | } | |
298 | out_be32((u32 __iomem *)bd, R_E | R_I | R_W); | |
299 | ||
300 | bd = ep->txbase; | |
301 | for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) { | |
302 | out_be32(&bd->buf, 0); | |
303 | out_be32((u32 __iomem *)bd, 0); | |
304 | bd++; | |
305 | } | |
306 | out_be32((u32 __iomem *)bd, T_W); | |
307 | ||
308 | return 0; | |
309 | } | |
310 | ||
311 | static int qe_ep_reset(struct qe_udc *udc, int pipe_num) | |
312 | { | |
313 | struct qe_ep *ep; | |
314 | u16 tmpusep; | |
315 | ||
316 | ep = &udc->eps[pipe_num]; | |
317 | tmpusep = in_be16(&udc->usb_regs->usb_usep[pipe_num]); | |
318 | tmpusep &= ~USB_RTHS_MASK; | |
319 | ||
320 | switch (ep->dir) { | |
321 | case USB_DIR_BOTH: | |
322 | qe_ep_flushtxfifo(ep); | |
323 | break; | |
324 | case USB_DIR_OUT: | |
325 | tmpusep |= USB_THS_IGNORE_IN; | |
326 | break; | |
327 | case USB_DIR_IN: | |
328 | qe_ep_flushtxfifo(ep); | |
329 | tmpusep |= USB_RHS_IGNORE_OUT; | |
330 | break; | |
331 | default: | |
332 | break; | |
333 | } | |
334 | out_be16(&udc->usb_regs->usb_usep[pipe_num], tmpusep); | |
335 | ||
336 | qe_epbds_reset(udc, pipe_num); | |
337 | ||
338 | return 0; | |
339 | } | |
340 | ||
341 | static int qe_ep_toggledata01(struct qe_ep *ep) | |
342 | { | |
343 | ep->data01 ^= 0x1; | |
344 | return 0; | |
345 | } | |
346 | ||
347 | static int qe_ep_bd_init(struct qe_udc *udc, unsigned char pipe_num) | |
348 | { | |
349 | struct qe_ep *ep = &udc->eps[pipe_num]; | |
350 | unsigned long tmp_addr = 0; | |
351 | struct usb_ep_para __iomem *epparam; | |
352 | int i; | |
353 | struct qe_bd __iomem *bd; | |
354 | int bdring_len; | |
355 | ||
356 | if (ep->dir == USB_DIR_OUT) | |
357 | bdring_len = USB_BDRING_LEN_RX; | |
358 | else | |
359 | bdring_len = USB_BDRING_LEN; | |
360 | ||
361 | epparam = udc->ep_param[pipe_num]; | |
362 | /* alloc multi-ram for BD rings and set the ep parameters */ | |
363 | tmp_addr = cpm_muram_alloc(sizeof(struct qe_bd) * (bdring_len + | |
364 | USB_BDRING_LEN_TX), QE_ALIGNMENT_OF_BD); | |
cd40c4c4 AV |
365 | if (IS_ERR_VALUE(tmp_addr)) |
366 | return -ENOMEM; | |
367 | ||
3948f0e0 LY |
368 | out_be16(&epparam->rbase, (u16)tmp_addr); |
369 | out_be16(&epparam->tbase, (u16)(tmp_addr + | |
370 | (sizeof(struct qe_bd) * bdring_len))); | |
371 | ||
372 | out_be16(&epparam->rbptr, in_be16(&epparam->rbase)); | |
373 | out_be16(&epparam->tbptr, in_be16(&epparam->tbase)); | |
374 | ||
375 | ep->rxbase = cpm_muram_addr(tmp_addr); | |
376 | ep->txbase = cpm_muram_addr(tmp_addr + (sizeof(struct qe_bd) | |
377 | * bdring_len)); | |
378 | ep->n_rxbd = ep->rxbase; | |
379 | ep->e_rxbd = ep->rxbase; | |
380 | ep->n_txbd = ep->txbase; | |
381 | ep->c_txbd = ep->txbase; | |
382 | ep->data01 = 0; /* data0 */ | |
383 | ||
384 | /* Init TX and RX bds */ | |
385 | bd = ep->rxbase; | |
386 | for (i = 0; i < bdring_len - 1; i++) { | |
387 | out_be32(&bd->buf, 0); | |
388 | out_be32((u32 __iomem *)bd, 0); | |
389 | bd++; | |
390 | } | |
391 | out_be32(&bd->buf, 0); | |
392 | out_be32((u32 __iomem *)bd, R_W); | |
393 | ||
394 | bd = ep->txbase; | |
395 | for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) { | |
396 | out_be32(&bd->buf, 0); | |
397 | out_be32((u32 __iomem *)bd, 0); | |
398 | bd++; | |
399 | } | |
400 | out_be32(&bd->buf, 0); | |
401 | out_be32((u32 __iomem *)bd, T_W); | |
402 | ||
403 | return 0; | |
404 | } | |
405 | ||
406 | static int qe_ep_rxbd_update(struct qe_ep *ep) | |
407 | { | |
408 | unsigned int size; | |
409 | int i; | |
410 | unsigned int tmp; | |
411 | struct qe_bd __iomem *bd; | |
412 | unsigned int bdring_len; | |
413 | ||
414 | if (ep->rxbase == NULL) | |
415 | return -EINVAL; | |
416 | ||
417 | bd = ep->rxbase; | |
418 | ||
419 | ep->rxframe = kmalloc(sizeof(*ep->rxframe), GFP_ATOMIC); | |
d9116ca8 | 420 | if (!ep->rxframe) |
3948f0e0 | 421 | return -ENOMEM; |
3948f0e0 LY |
422 | |
423 | qe_frame_init(ep->rxframe); | |
424 | ||
425 | if (ep->dir == USB_DIR_OUT) | |
426 | bdring_len = USB_BDRING_LEN_RX; | |
427 | else | |
428 | bdring_len = USB_BDRING_LEN; | |
429 | ||
430 | size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (bdring_len + 1); | |
431 | ep->rxbuffer = kzalloc(size, GFP_ATOMIC); | |
d9116ca8 | 432 | if (!ep->rxbuffer) { |
3948f0e0 LY |
433 | kfree(ep->rxframe); |
434 | return -ENOMEM; | |
435 | } | |
436 | ||
437 | ep->rxbuf_d = virt_to_phys((void *)ep->rxbuffer); | |
438 | if (ep->rxbuf_d == DMA_ADDR_INVALID) { | |
d77c1198 | 439 | ep->rxbuf_d = dma_map_single(ep->udc->gadget.dev.parent, |
3948f0e0 LY |
440 | ep->rxbuffer, |
441 | size, | |
442 | DMA_FROM_DEVICE); | |
443 | ep->rxbufmap = 1; | |
444 | } else { | |
d77c1198 | 445 | dma_sync_single_for_device(ep->udc->gadget.dev.parent, |
3948f0e0 LY |
446 | ep->rxbuf_d, size, |
447 | DMA_FROM_DEVICE); | |
448 | ep->rxbufmap = 0; | |
449 | } | |
450 | ||
451 | size = ep->ep.maxpacket + USB_CRC_SIZE + 2; | |
452 | tmp = ep->rxbuf_d; | |
453 | tmp = (u32)(((tmp >> 2) << 2) + 4); | |
454 | ||
455 | for (i = 0; i < bdring_len - 1; i++) { | |
456 | out_be32(&bd->buf, tmp); | |
457 | out_be32((u32 __iomem *)bd, (R_E | R_I)); | |
458 | tmp = tmp + size; | |
459 | bd++; | |
460 | } | |
461 | out_be32(&bd->buf, tmp); | |
462 | out_be32((u32 __iomem *)bd, (R_E | R_I | R_W)); | |
463 | ||
464 | return 0; | |
465 | } | |
466 | ||
467 | static int qe_ep_register_init(struct qe_udc *udc, unsigned char pipe_num) | |
468 | { | |
469 | struct qe_ep *ep = &udc->eps[pipe_num]; | |
470 | struct usb_ep_para __iomem *epparam; | |
471 | u16 usep, logepnum; | |
472 | u16 tmp; | |
473 | u8 rtfcr = 0; | |
474 | ||
475 | epparam = udc->ep_param[pipe_num]; | |
476 | ||
477 | usep = 0; | |
ec39e2ae | 478 | logepnum = (ep->ep.desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK); |
3948f0e0 LY |
479 | usep |= (logepnum << USB_EPNUM_SHIFT); |
480 | ||
ec39e2ae | 481 | switch (ep->ep.desc->bmAttributes & 0x03) { |
3948f0e0 LY |
482 | case USB_ENDPOINT_XFER_BULK: |
483 | usep |= USB_TRANS_BULK; | |
484 | break; | |
485 | case USB_ENDPOINT_XFER_ISOC: | |
486 | usep |= USB_TRANS_ISO; | |
487 | break; | |
488 | case USB_ENDPOINT_XFER_INT: | |
489 | usep |= USB_TRANS_INT; | |
490 | break; | |
491 | default: | |
492 | usep |= USB_TRANS_CTR; | |
493 | break; | |
494 | } | |
495 | ||
496 | switch (ep->dir) { | |
497 | case USB_DIR_OUT: | |
498 | usep |= USB_THS_IGNORE_IN; | |
499 | break; | |
500 | case USB_DIR_IN: | |
501 | usep |= USB_RHS_IGNORE_OUT; | |
502 | break; | |
503 | default: | |
504 | break; | |
505 | } | |
506 | out_be16(&udc->usb_regs->usb_usep[pipe_num], usep); | |
507 | ||
508 | rtfcr = 0x30; | |
509 | out_8(&epparam->rbmr, rtfcr); | |
510 | out_8(&epparam->tbmr, rtfcr); | |
511 | ||
512 | tmp = (u16)(ep->ep.maxpacket + USB_CRC_SIZE); | |
513 | /* MRBLR must be divisble by 4 */ | |
514 | tmp = (u16)(((tmp >> 2) << 2) + 4); | |
515 | out_be16(&epparam->mrblr, tmp); | |
516 | ||
517 | return 0; | |
518 | } | |
519 | ||
520 | static int qe_ep_init(struct qe_udc *udc, | |
521 | unsigned char pipe_num, | |
522 | const struct usb_endpoint_descriptor *desc) | |
523 | { | |
524 | struct qe_ep *ep = &udc->eps[pipe_num]; | |
525 | unsigned long flags; | |
526 | int reval = 0; | |
527 | u16 max = 0; | |
528 | ||
29cc8897 | 529 | max = usb_endpoint_maxp(desc); |
3948f0e0 LY |
530 | |
531 | /* check the max package size validate for this endpoint */ | |
532 | /* Refer to USB2.0 spec table 9-13, | |
533 | */ | |
534 | if (pipe_num != 0) { | |
535 | switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { | |
536 | case USB_ENDPOINT_XFER_BULK: | |
537 | if (strstr(ep->ep.name, "-iso") | |
538 | || strstr(ep->ep.name, "-int")) | |
539 | goto en_done; | |
540 | switch (udc->gadget.speed) { | |
541 | case USB_SPEED_HIGH: | |
542 | if ((max == 128) || (max == 256) || (max == 512)) | |
543 | break; | |
f91e5d09 | 544 | fallthrough; |
3948f0e0 LY |
545 | default: |
546 | switch (max) { | |
547 | case 4: | |
548 | case 8: | |
549 | case 16: | |
550 | case 32: | |
551 | case 64: | |
552 | break; | |
553 | default: | |
554 | case USB_SPEED_LOW: | |
555 | goto en_done; | |
556 | } | |
557 | } | |
558 | break; | |
559 | case USB_ENDPOINT_XFER_INT: | |
560 | if (strstr(ep->ep.name, "-iso")) /* bulk is ok */ | |
561 | goto en_done; | |
562 | switch (udc->gadget.speed) { | |
563 | case USB_SPEED_HIGH: | |
564 | if (max <= 1024) | |
565 | break; | |
f91e5d09 | 566 | fallthrough; |
3948f0e0 LY |
567 | case USB_SPEED_FULL: |
568 | if (max <= 64) | |
569 | break; | |
f91e5d09 | 570 | fallthrough; |
3948f0e0 LY |
571 | default: |
572 | if (max <= 8) | |
573 | break; | |
574 | goto en_done; | |
575 | } | |
576 | break; | |
577 | case USB_ENDPOINT_XFER_ISOC: | |
578 | if (strstr(ep->ep.name, "-bulk") | |
579 | || strstr(ep->ep.name, "-int")) | |
580 | goto en_done; | |
581 | switch (udc->gadget.speed) { | |
582 | case USB_SPEED_HIGH: | |
583 | if (max <= 1024) | |
584 | break; | |
f91e5d09 | 585 | fallthrough; |
3948f0e0 LY |
586 | case USB_SPEED_FULL: |
587 | if (max <= 1023) | |
588 | break; | |
14158aa4 | 589 | fallthrough; |
3948f0e0 LY |
590 | default: |
591 | goto en_done; | |
592 | } | |
593 | break; | |
594 | case USB_ENDPOINT_XFER_CONTROL: | |
595 | if (strstr(ep->ep.name, "-iso") | |
596 | || strstr(ep->ep.name, "-int")) | |
597 | goto en_done; | |
598 | switch (udc->gadget.speed) { | |
599 | case USB_SPEED_HIGH: | |
600 | case USB_SPEED_FULL: | |
601 | switch (max) { | |
602 | case 1: | |
603 | case 2: | |
604 | case 4: | |
605 | case 8: | |
606 | case 16: | |
607 | case 32: | |
608 | case 64: | |
609 | break; | |
610 | default: | |
611 | goto en_done; | |
612 | } | |
f91e5d09 | 613 | fallthrough; |
3948f0e0 LY |
614 | case USB_SPEED_LOW: |
615 | switch (max) { | |
616 | case 1: | |
617 | case 2: | |
618 | case 4: | |
619 | case 8: | |
620 | break; | |
621 | default: | |
622 | goto en_done; | |
623 | } | |
624 | default: | |
625 | goto en_done; | |
626 | } | |
627 | break; | |
628 | ||
629 | default: | |
630 | goto en_done; | |
631 | } | |
632 | } /* if ep0*/ | |
633 | ||
634 | spin_lock_irqsave(&udc->lock, flags); | |
635 | ||
636 | /* initialize ep structure */ | |
637 | ep->ep.maxpacket = max; | |
638 | ep->tm = (u8)(desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK); | |
ec39e2ae | 639 | ep->ep.desc = desc; |
3948f0e0 LY |
640 | ep->stopped = 0; |
641 | ep->init = 1; | |
642 | ||
643 | if (pipe_num == 0) { | |
644 | ep->dir = USB_DIR_BOTH; | |
645 | udc->ep0_dir = USB_DIR_OUT; | |
646 | udc->ep0_state = WAIT_FOR_SETUP; | |
647 | } else { | |
648 | switch (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) { | |
649 | case USB_DIR_OUT: | |
650 | ep->dir = USB_DIR_OUT; | |
651 | break; | |
652 | case USB_DIR_IN: | |
653 | ep->dir = USB_DIR_IN; | |
654 | default: | |
655 | break; | |
656 | } | |
657 | } | |
658 | ||
659 | /* hardware special operation */ | |
660 | qe_ep_bd_init(udc, pipe_num); | |
661 | if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_OUT)) { | |
662 | reval = qe_ep_rxbd_update(ep); | |
663 | if (reval) | |
664 | goto en_done1; | |
665 | } | |
666 | ||
667 | if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_IN)) { | |
668 | ep->txframe = kmalloc(sizeof(*ep->txframe), GFP_ATOMIC); | |
d9116ca8 | 669 | if (!ep->txframe) |
3948f0e0 | 670 | goto en_done2; |
3948f0e0 LY |
671 | qe_frame_init(ep->txframe); |
672 | } | |
673 | ||
674 | qe_ep_register_init(udc, pipe_num); | |
675 | ||
676 | /* Now HW will be NAKing transfers to that EP, | |
677 | * until a buffer is queued to it. */ | |
678 | spin_unlock_irqrestore(&udc->lock, flags); | |
679 | ||
680 | return 0; | |
681 | en_done2: | |
682 | kfree(ep->rxbuffer); | |
683 | kfree(ep->rxframe); | |
684 | en_done1: | |
685 | spin_unlock_irqrestore(&udc->lock, flags); | |
686 | en_done: | |
cd40c4c4 | 687 | dev_err(udc->dev, "failed to initialize %s\n", ep->ep.name); |
3948f0e0 LY |
688 | return -ENODEV; |
689 | } | |
690 | ||
d77c1198 | 691 | static inline void qe_usb_enable(struct qe_udc *udc) |
3948f0e0 | 692 | { |
d77c1198 | 693 | setbits8(&udc->usb_regs->usb_usmod, USB_MODE_EN); |
3948f0e0 LY |
694 | } |
695 | ||
d77c1198 | 696 | static inline void qe_usb_disable(struct qe_udc *udc) |
3948f0e0 | 697 | { |
d77c1198 | 698 | clrbits8(&udc->usb_regs->usb_usmod, USB_MODE_EN); |
3948f0e0 LY |
699 | } |
700 | ||
701 | /*----------------------------------------------------------------------------* | |
702 | * USB and EP basic manipulate function end * | |
703 | *----------------------------------------------------------------------------*/ | |
704 | ||
705 | ||
706 | /****************************************************************************** | |
707 | UDC transmit and receive process | |
708 | ******************************************************************************/ | |
709 | static void recycle_one_rxbd(struct qe_ep *ep) | |
710 | { | |
711 | u32 bdstatus; | |
712 | ||
713 | bdstatus = in_be32((u32 __iomem *)ep->e_rxbd); | |
714 | bdstatus = R_I | R_E | (bdstatus & R_W); | |
715 | out_be32((u32 __iomem *)ep->e_rxbd, bdstatus); | |
716 | ||
717 | if (bdstatus & R_W) | |
718 | ep->e_rxbd = ep->rxbase; | |
719 | else | |
720 | ep->e_rxbd++; | |
721 | } | |
722 | ||
723 | static void recycle_rxbds(struct qe_ep *ep, unsigned char stopatnext) | |
724 | { | |
725 | u32 bdstatus; | |
726 | struct qe_bd __iomem *bd, *nextbd; | |
727 | unsigned char stop = 0; | |
728 | ||
729 | nextbd = ep->n_rxbd; | |
730 | bd = ep->e_rxbd; | |
731 | bdstatus = in_be32((u32 __iomem *)bd); | |
732 | ||
733 | while (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK) && !stop) { | |
734 | bdstatus = R_E | R_I | (bdstatus & R_W); | |
735 | out_be32((u32 __iomem *)bd, bdstatus); | |
736 | ||
737 | if (bdstatus & R_W) | |
738 | bd = ep->rxbase; | |
739 | else | |
740 | bd++; | |
741 | ||
742 | bdstatus = in_be32((u32 __iomem *)bd); | |
743 | if (stopatnext && (bd == nextbd)) | |
744 | stop = 1; | |
745 | } | |
746 | ||
747 | ep->e_rxbd = bd; | |
748 | } | |
749 | ||
750 | static void ep_recycle_rxbds(struct qe_ep *ep) | |
751 | { | |
752 | struct qe_bd __iomem *bd = ep->n_rxbd; | |
753 | u32 bdstatus; | |
754 | u8 epnum = ep->epnum; | |
755 | struct qe_udc *udc = ep->udc; | |
756 | ||
757 | bdstatus = in_be32((u32 __iomem *)bd); | |
758 | if (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK)) { | |
759 | bd = ep->rxbase + | |
760 | ((in_be16(&udc->ep_param[epnum]->rbptr) - | |
761 | in_be16(&udc->ep_param[epnum]->rbase)) | |
762 | >> 3); | |
763 | bdstatus = in_be32((u32 __iomem *)bd); | |
764 | ||
765 | if (bdstatus & R_W) | |
766 | bd = ep->rxbase; | |
767 | else | |
768 | bd++; | |
769 | ||
770 | ep->e_rxbd = bd; | |
771 | recycle_rxbds(ep, 0); | |
772 | ep->e_rxbd = ep->n_rxbd; | |
773 | } else | |
774 | recycle_rxbds(ep, 1); | |
775 | ||
776 | if (in_be16(&udc->usb_regs->usb_usber) & USB_E_BSY_MASK) | |
777 | out_be16(&udc->usb_regs->usb_usber, USB_E_BSY_MASK); | |
778 | ||
779 | if (ep->has_data <= 0 && (!list_empty(&ep->queue))) | |
780 | qe_eprx_normal(ep); | |
781 | ||
782 | ep->localnack = 0; | |
783 | } | |
784 | ||
785 | static void setup_received_handle(struct qe_udc *udc, | |
786 | struct usb_ctrlrequest *setup); | |
787 | static int qe_ep_rxframe_handle(struct qe_ep *ep); | |
788 | static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req); | |
789 | /* when BD PID is setup, handle the packet */ | |
790 | static int ep0_setup_handle(struct qe_udc *udc) | |
791 | { | |
792 | struct qe_ep *ep = &udc->eps[0]; | |
793 | struct qe_frame *pframe; | |
794 | unsigned int fsize; | |
795 | u8 *cp; | |
796 | ||
797 | pframe = ep->rxframe; | |
798 | if ((frame_get_info(pframe) & PID_SETUP) | |
799 | && (udc->ep0_state == WAIT_FOR_SETUP)) { | |
800 | fsize = frame_get_length(pframe); | |
801 | if (unlikely(fsize != 8)) | |
802 | return -EINVAL; | |
803 | cp = (u8 *)&udc->local_setup_buff; | |
804 | memcpy(cp, pframe->data, fsize); | |
805 | ep->data01 = 1; | |
806 | ||
807 | /* handle the usb command base on the usb_ctrlrequest */ | |
808 | setup_received_handle(udc, &udc->local_setup_buff); | |
809 | return 0; | |
810 | } | |
811 | return -EINVAL; | |
812 | } | |
813 | ||
814 | static int qe_ep0_rx(struct qe_udc *udc) | |
815 | { | |
816 | struct qe_ep *ep = &udc->eps[0]; | |
817 | struct qe_frame *pframe; | |
818 | struct qe_bd __iomem *bd; | |
819 | u32 bdstatus, length; | |
820 | u32 vaddr; | |
821 | ||
822 | pframe = ep->rxframe; | |
823 | ||
824 | if (ep->dir == USB_DIR_IN) { | |
825 | dev_err(udc->dev, "ep0 not a control endpoint\n"); | |
826 | return -EINVAL; | |
827 | } | |
828 | ||
829 | bd = ep->n_rxbd; | |
830 | bdstatus = in_be32((u32 __iomem *)bd); | |
831 | length = bdstatus & BD_LENGTH_MASK; | |
832 | ||
833 | while (!(bdstatus & R_E) && length) { | |
834 | if ((bdstatus & R_F) && (bdstatus & R_L) | |
835 | && !(bdstatus & R_ERROR)) { | |
836 | if (length == USB_CRC_SIZE) { | |
837 | udc->ep0_state = WAIT_FOR_SETUP; | |
838 | dev_vdbg(udc->dev, | |
839 | "receive a ZLP in status phase\n"); | |
840 | } else { | |
841 | qe_frame_clean(pframe); | |
842 | vaddr = (u32)phys_to_virt(in_be32(&bd->buf)); | |
843 | frame_set_data(pframe, (u8 *)vaddr); | |
844 | frame_set_length(pframe, | |
845 | (length - USB_CRC_SIZE)); | |
846 | frame_set_status(pframe, FRAME_OK); | |
847 | switch (bdstatus & R_PID) { | |
848 | case R_PID_SETUP: | |
849 | frame_set_info(pframe, PID_SETUP); | |
850 | break; | |
851 | case R_PID_DATA1: | |
852 | frame_set_info(pframe, PID_DATA1); | |
853 | break; | |
854 | default: | |
855 | frame_set_info(pframe, PID_DATA0); | |
856 | break; | |
857 | } | |
858 | ||
859 | if ((bdstatus & R_PID) == R_PID_SETUP) | |
860 | ep0_setup_handle(udc); | |
861 | else | |
862 | qe_ep_rxframe_handle(ep); | |
863 | } | |
864 | } else { | |
865 | dev_err(udc->dev, "The receive frame with error!\n"); | |
866 | } | |
867 | ||
868 | /* note: don't clear the rxbd's buffer address */ | |
869 | recycle_one_rxbd(ep); | |
870 | ||
871 | /* Get next BD */ | |
872 | if (bdstatus & R_W) | |
873 | bd = ep->rxbase; | |
874 | else | |
875 | bd++; | |
876 | ||
877 | bdstatus = in_be32((u32 __iomem *)bd); | |
878 | length = bdstatus & BD_LENGTH_MASK; | |
879 | ||
880 | } | |
881 | ||
882 | ep->n_rxbd = bd; | |
883 | ||
884 | return 0; | |
885 | } | |
886 | ||
887 | static int qe_ep_rxframe_handle(struct qe_ep *ep) | |
888 | { | |
889 | struct qe_frame *pframe; | |
890 | u8 framepid = 0; | |
891 | unsigned int fsize; | |
892 | u8 *cp; | |
893 | struct qe_req *req; | |
894 | ||
895 | pframe = ep->rxframe; | |
896 | ||
897 | if (frame_get_info(pframe) & PID_DATA1) | |
898 | framepid = 0x1; | |
899 | ||
900 | if (framepid != ep->data01) { | |
901 | dev_err(ep->udc->dev, "the data01 error!\n"); | |
902 | return -EIO; | |
903 | } | |
904 | ||
905 | fsize = frame_get_length(pframe); | |
906 | if (list_empty(&ep->queue)) { | |
907 | dev_err(ep->udc->dev, "the %s have no requeue!\n", ep->name); | |
908 | } else { | |
909 | req = list_entry(ep->queue.next, struct qe_req, queue); | |
910 | ||
911 | cp = (u8 *)(req->req.buf) + req->req.actual; | |
912 | if (cp) { | |
913 | memcpy(cp, pframe->data, fsize); | |
914 | req->req.actual += fsize; | |
915 | if ((fsize < ep->ep.maxpacket) || | |
916 | (req->req.actual >= req->req.length)) { | |
917 | if (ep->epnum == 0) | |
918 | ep0_req_complete(ep->udc, req); | |
919 | else | |
920 | done(ep, req, 0); | |
921 | if (list_empty(&ep->queue) && ep->epnum != 0) | |
922 | qe_eprx_nack(ep); | |
923 | } | |
924 | } | |
925 | } | |
926 | ||
927 | qe_ep_toggledata01(ep); | |
928 | ||
929 | return 0; | |
930 | } | |
931 | ||
f7aa9386 | 932 | static void ep_rx_tasklet(struct tasklet_struct *t) |
3948f0e0 | 933 | { |
f7aa9386 | 934 | struct qe_udc *udc = from_tasklet(udc, t, rx_tasklet); |
3948f0e0 LY |
935 | struct qe_ep *ep; |
936 | struct qe_frame *pframe; | |
937 | struct qe_bd __iomem *bd; | |
938 | unsigned long flags; | |
939 | u32 bdstatus, length; | |
940 | u32 vaddr, i; | |
941 | ||
942 | spin_lock_irqsave(&udc->lock, flags); | |
943 | ||
944 | for (i = 1; i < USB_MAX_ENDPOINTS; i++) { | |
945 | ep = &udc->eps[i]; | |
946 | ||
947 | if (ep->dir == USB_DIR_IN || ep->enable_tasklet == 0) { | |
948 | dev_dbg(udc->dev, | |
949 | "This is a transmit ep or disable tasklet!\n"); | |
950 | continue; | |
951 | } | |
952 | ||
953 | pframe = ep->rxframe; | |
954 | bd = ep->n_rxbd; | |
955 | bdstatus = in_be32((u32 __iomem *)bd); | |
956 | length = bdstatus & BD_LENGTH_MASK; | |
957 | ||
958 | while (!(bdstatus & R_E) && length) { | |
959 | if (list_empty(&ep->queue)) { | |
960 | qe_eprx_nack(ep); | |
961 | dev_dbg(udc->dev, | |
962 | "The rxep have noreq %d\n", | |
963 | ep->has_data); | |
964 | break; | |
965 | } | |
966 | ||
967 | if ((bdstatus & R_F) && (bdstatus & R_L) | |
968 | && !(bdstatus & R_ERROR)) { | |
969 | qe_frame_clean(pframe); | |
970 | vaddr = (u32)phys_to_virt(in_be32(&bd->buf)); | |
971 | frame_set_data(pframe, (u8 *)vaddr); | |
972 | frame_set_length(pframe, | |
973 | (length - USB_CRC_SIZE)); | |
974 | frame_set_status(pframe, FRAME_OK); | |
975 | switch (bdstatus & R_PID) { | |
976 | case R_PID_DATA1: | |
977 | frame_set_info(pframe, PID_DATA1); | |
978 | break; | |
979 | case R_PID_SETUP: | |
980 | frame_set_info(pframe, PID_SETUP); | |
981 | break; | |
982 | default: | |
983 | frame_set_info(pframe, PID_DATA0); | |
984 | break; | |
985 | } | |
986 | /* handle the rx frame */ | |
987 | qe_ep_rxframe_handle(ep); | |
988 | } else { | |
989 | dev_err(udc->dev, | |
990 | "error in received frame\n"); | |
991 | } | |
992 | /* note: don't clear the rxbd's buffer address */ | |
993 | /*clear the length */ | |
994 | out_be32((u32 __iomem *)bd, bdstatus & BD_STATUS_MASK); | |
995 | ep->has_data--; | |
996 | if (!(ep->localnack)) | |
997 | recycle_one_rxbd(ep); | |
998 | ||
999 | /* Get next BD */ | |
1000 | if (bdstatus & R_W) | |
1001 | bd = ep->rxbase; | |
1002 | else | |
1003 | bd++; | |
1004 | ||
1005 | bdstatus = in_be32((u32 __iomem *)bd); | |
1006 | length = bdstatus & BD_LENGTH_MASK; | |
1007 | } | |
1008 | ||
1009 | ep->n_rxbd = bd; | |
1010 | ||
1011 | if (ep->localnack) | |
1012 | ep_recycle_rxbds(ep); | |
1013 | ||
1014 | ep->enable_tasklet = 0; | |
1015 | } /* for i=1 */ | |
1016 | ||
1017 | spin_unlock_irqrestore(&udc->lock, flags); | |
1018 | } | |
1019 | ||
1020 | static int qe_ep_rx(struct qe_ep *ep) | |
1021 | { | |
1022 | struct qe_udc *udc; | |
1023 | struct qe_frame *pframe; | |
1024 | struct qe_bd __iomem *bd; | |
1025 | u16 swoffs, ucoffs, emptybds; | |
1026 | ||
1027 | udc = ep->udc; | |
1028 | pframe = ep->rxframe; | |
1029 | ||
1030 | if (ep->dir == USB_DIR_IN) { | |
1031 | dev_err(udc->dev, "transmit ep in rx function\n"); | |
1032 | return -EINVAL; | |
1033 | } | |
1034 | ||
1035 | bd = ep->n_rxbd; | |
1036 | ||
1037 | swoffs = (u16)(bd - ep->rxbase); | |
1038 | ucoffs = (u16)((in_be16(&udc->ep_param[ep->epnum]->rbptr) - | |
1039 | in_be16(&udc->ep_param[ep->epnum]->rbase)) >> 3); | |
1040 | if (swoffs < ucoffs) | |
1041 | emptybds = USB_BDRING_LEN_RX - ucoffs + swoffs; | |
1042 | else | |
1043 | emptybds = swoffs - ucoffs; | |
1044 | ||
1045 | if (emptybds < MIN_EMPTY_BDS) { | |
1046 | qe_eprx_nack(ep); | |
1047 | ep->localnack = 1; | |
1048 | dev_vdbg(udc->dev, "%d empty bds, send NACK\n", emptybds); | |
1049 | } | |
1050 | ep->has_data = USB_BDRING_LEN_RX - emptybds; | |
1051 | ||
1052 | if (list_empty(&ep->queue)) { | |
1053 | qe_eprx_nack(ep); | |
1054 | dev_vdbg(udc->dev, "The rxep have no req queued with %d BDs\n", | |
1055 | ep->has_data); | |
1056 | return 0; | |
1057 | } | |
1058 | ||
1059 | tasklet_schedule(&udc->rx_tasklet); | |
1060 | ep->enable_tasklet = 1; | |
1061 | ||
1062 | return 0; | |
1063 | } | |
1064 | ||
1065 | /* send data from a frame, no matter what tx_req */ | |
1066 | static int qe_ep_tx(struct qe_ep *ep, struct qe_frame *frame) | |
1067 | { | |
1068 | struct qe_udc *udc = ep->udc; | |
1069 | struct qe_bd __iomem *bd; | |
1070 | u16 saveusbmr; | |
1071 | u32 bdstatus, pidmask; | |
1072 | u32 paddr; | |
1073 | ||
1074 | if (ep->dir == USB_DIR_OUT) { | |
1075 | dev_err(udc->dev, "receive ep passed to tx function\n"); | |
1076 | return -EINVAL; | |
1077 | } | |
1078 | ||
1079 | /* Disable the Tx interrupt */ | |
1080 | saveusbmr = in_be16(&udc->usb_regs->usb_usbmr); | |
1081 | out_be16(&udc->usb_regs->usb_usbmr, | |
1082 | saveusbmr & ~(USB_E_TXB_MASK | USB_E_TXE_MASK)); | |
1083 | ||
1084 | bd = ep->n_txbd; | |
1085 | bdstatus = in_be32((u32 __iomem *)bd); | |
1086 | ||
1087 | if (!(bdstatus & (T_R | BD_LENGTH_MASK))) { | |
1088 | if (frame_get_length(frame) == 0) { | |
1089 | frame_set_data(frame, udc->nullbuf); | |
1090 | frame_set_length(frame, 2); | |
1091 | frame->info |= (ZLP | NO_CRC); | |
1092 | dev_vdbg(udc->dev, "the frame size = 0\n"); | |
1093 | } | |
1094 | paddr = virt_to_phys((void *)frame->data); | |
1095 | out_be32(&bd->buf, paddr); | |
1096 | bdstatus = (bdstatus&T_W); | |
1097 | if (!(frame_get_info(frame) & NO_CRC)) | |
1098 | bdstatus |= T_R | T_I | T_L | T_TC | |
1099 | | frame_get_length(frame); | |
1100 | else | |
1101 | bdstatus |= T_R | T_I | T_L | frame_get_length(frame); | |
1102 | ||
1103 | /* if the packet is a ZLP in status phase */ | |
1104 | if ((ep->epnum == 0) && (udc->ep0_state == DATA_STATE_NEED_ZLP)) | |
1105 | ep->data01 = 0x1; | |
1106 | ||
1107 | if (ep->data01) { | |
1108 | pidmask = T_PID_DATA1; | |
1109 | frame->info |= PID_DATA1; | |
1110 | } else { | |
1111 | pidmask = T_PID_DATA0; | |
1112 | frame->info |= PID_DATA0; | |
1113 | } | |
1114 | bdstatus |= T_CNF; | |
1115 | bdstatus |= pidmask; | |
1116 | out_be32((u32 __iomem *)bd, bdstatus); | |
1117 | qe_ep_filltxfifo(ep); | |
1118 | ||
1119 | /* enable the TX interrupt */ | |
1120 | out_be16(&udc->usb_regs->usb_usbmr, saveusbmr); | |
1121 | ||
1122 | qe_ep_toggledata01(ep); | |
1123 | if (bdstatus & T_W) | |
1124 | ep->n_txbd = ep->txbase; | |
1125 | else | |
1126 | ep->n_txbd++; | |
1127 | ||
1128 | return 0; | |
1129 | } else { | |
1130 | out_be16(&udc->usb_regs->usb_usbmr, saveusbmr); | |
1131 | dev_vdbg(udc->dev, "The tx bd is not ready!\n"); | |
1132 | return -EBUSY; | |
1133 | } | |
1134 | } | |
1135 | ||
928dfa6c | 1136 | /* when a bd was transmitted, the function can |
3948f0e0 LY |
1137 | * handle the tx_req, not include ep0 */ |
1138 | static int txcomplete(struct qe_ep *ep, unsigned char restart) | |
1139 | { | |
1140 | if (ep->tx_req != NULL) { | |
d834508e VL |
1141 | struct qe_req *req = ep->tx_req; |
1142 | unsigned zlp = 0, last_len = 0; | |
1143 | ||
1144 | last_len = min_t(unsigned, req->req.length - ep->sent, | |
1145 | ep->ep.maxpacket); | |
1146 | ||
3948f0e0 LY |
1147 | if (!restart) { |
1148 | int asent = ep->last; | |
1149 | ep->sent += asent; | |
1150 | ep->last -= asent; | |
1151 | } else { | |
1152 | ep->last = 0; | |
1153 | } | |
1154 | ||
d834508e VL |
1155 | /* zlp needed when req->re.zero is set */ |
1156 | if (req->req.zero) { | |
1157 | if (last_len == 0 || | |
1158 | (req->req.length % ep->ep.maxpacket) != 0) | |
1159 | zlp = 0; | |
1160 | else | |
1161 | zlp = 1; | |
1162 | } else | |
1163 | zlp = 0; | |
1164 | ||
3948f0e0 | 1165 | /* a request already were transmitted completely */ |
d834508e | 1166 | if (((ep->tx_req->req.length - ep->sent) <= 0) && !zlp) { |
3948f0e0 LY |
1167 | done(ep, ep->tx_req, 0); |
1168 | ep->tx_req = NULL; | |
1169 | ep->last = 0; | |
1170 | ep->sent = 0; | |
1171 | } | |
1172 | } | |
1173 | ||
1174 | /* we should gain a new tx_req fot this endpoint */ | |
1175 | if (ep->tx_req == NULL) { | |
1176 | if (!list_empty(&ep->queue)) { | |
1177 | ep->tx_req = list_entry(ep->queue.next, struct qe_req, | |
1178 | queue); | |
1179 | ep->last = 0; | |
1180 | ep->sent = 0; | |
1181 | } | |
1182 | } | |
1183 | ||
1184 | return 0; | |
1185 | } | |
1186 | ||
928dfa6c | 1187 | /* give a frame and a tx_req, send some data */ |
3948f0e0 LY |
1188 | static int qe_usb_senddata(struct qe_ep *ep, struct qe_frame *frame) |
1189 | { | |
1190 | unsigned int size; | |
1191 | u8 *buf; | |
1192 | ||
1193 | qe_frame_clean(frame); | |
1194 | size = min_t(u32, (ep->tx_req->req.length - ep->sent), | |
1195 | ep->ep.maxpacket); | |
1196 | buf = (u8 *)ep->tx_req->req.buf + ep->sent; | |
1197 | if (buf && size) { | |
1198 | ep->last = size; | |
d834508e | 1199 | ep->tx_req->req.actual += size; |
3948f0e0 LY |
1200 | frame_set_data(frame, buf); |
1201 | frame_set_length(frame, size); | |
1202 | frame_set_status(frame, FRAME_OK); | |
1203 | frame_set_info(frame, 0); | |
1204 | return qe_ep_tx(ep, frame); | |
1205 | } | |
1206 | return -EIO; | |
1207 | } | |
1208 | ||
1209 | /* give a frame struct,send a ZLP */ | |
1210 | static int sendnulldata(struct qe_ep *ep, struct qe_frame *frame, uint infor) | |
1211 | { | |
1212 | struct qe_udc *udc = ep->udc; | |
1213 | ||
1214 | if (frame == NULL) | |
1215 | return -ENODEV; | |
1216 | ||
1217 | qe_frame_clean(frame); | |
1218 | frame_set_data(frame, (u8 *)udc->nullbuf); | |
1219 | frame_set_length(frame, 2); | |
1220 | frame_set_status(frame, FRAME_OK); | |
1221 | frame_set_info(frame, (ZLP | NO_CRC | infor)); | |
1222 | ||
1223 | return qe_ep_tx(ep, frame); | |
1224 | } | |
1225 | ||
1226 | static int frame_create_tx(struct qe_ep *ep, struct qe_frame *frame) | |
1227 | { | |
1228 | struct qe_req *req = ep->tx_req; | |
1229 | int reval; | |
1230 | ||
1231 | if (req == NULL) | |
1232 | return -ENODEV; | |
1233 | ||
1234 | if ((req->req.length - ep->sent) > 0) | |
1235 | reval = qe_usb_senddata(ep, frame); | |
1236 | else | |
1237 | reval = sendnulldata(ep, frame, 0); | |
1238 | ||
1239 | return reval; | |
1240 | } | |
1241 | ||
1242 | /* if direction is DIR_IN, the status is Device->Host | |
1243 | * if direction is DIR_OUT, the status transaction is Device<-Host | |
1244 | * in status phase, udc create a request and gain status */ | |
1245 | static int ep0_prime_status(struct qe_udc *udc, int direction) | |
1246 | { | |
1247 | ||
1248 | struct qe_ep *ep = &udc->eps[0]; | |
1249 | ||
1250 | if (direction == USB_DIR_IN) { | |
1251 | udc->ep0_state = DATA_STATE_NEED_ZLP; | |
1252 | udc->ep0_dir = USB_DIR_IN; | |
1253 | sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ); | |
1254 | } else { | |
1255 | udc->ep0_dir = USB_DIR_OUT; | |
1256 | udc->ep0_state = WAIT_FOR_OUT_STATUS; | |
1257 | } | |
1258 | ||
1259 | return 0; | |
1260 | } | |
1261 | ||
1262 | /* a request complete in ep0, whether gadget request or udc request */ | |
1263 | static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req) | |
1264 | { | |
1265 | struct qe_ep *ep = &udc->eps[0]; | |
1266 | /* because usb and ep's status already been set in ch9setaddress() */ | |
1267 | ||
1268 | switch (udc->ep0_state) { | |
1269 | case DATA_STATE_XMIT: | |
1270 | done(ep, req, 0); | |
1271 | /* receive status phase */ | |
1272 | if (ep0_prime_status(udc, USB_DIR_OUT)) | |
1273 | qe_ep0_stall(udc); | |
1274 | break; | |
1275 | ||
1276 | case DATA_STATE_NEED_ZLP: | |
1277 | done(ep, req, 0); | |
1278 | udc->ep0_state = WAIT_FOR_SETUP; | |
1279 | break; | |
1280 | ||
1281 | case DATA_STATE_RECV: | |
1282 | done(ep, req, 0); | |
1283 | /* send status phase */ | |
1284 | if (ep0_prime_status(udc, USB_DIR_IN)) | |
1285 | qe_ep0_stall(udc); | |
1286 | break; | |
1287 | ||
1288 | case WAIT_FOR_OUT_STATUS: | |
1289 | done(ep, req, 0); | |
1290 | udc->ep0_state = WAIT_FOR_SETUP; | |
1291 | break; | |
1292 | ||
1293 | case WAIT_FOR_SETUP: | |
1294 | dev_vdbg(udc->dev, "Unexpected interrupt\n"); | |
1295 | break; | |
1296 | ||
1297 | default: | |
1298 | qe_ep0_stall(udc); | |
1299 | break; | |
1300 | } | |
1301 | } | |
1302 | ||
1303 | static int ep0_txcomplete(struct qe_ep *ep, unsigned char restart) | |
1304 | { | |
1305 | struct qe_req *tx_req = NULL; | |
1306 | struct qe_frame *frame = ep->txframe; | |
1307 | ||
1308 | if ((frame_get_info(frame) & (ZLP | NO_REQ)) == (ZLP | NO_REQ)) { | |
1309 | if (!restart) | |
1310 | ep->udc->ep0_state = WAIT_FOR_SETUP; | |
1311 | else | |
1312 | sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ); | |
1313 | return 0; | |
1314 | } | |
1315 | ||
1316 | tx_req = ep->tx_req; | |
1317 | if (tx_req != NULL) { | |
1318 | if (!restart) { | |
1319 | int asent = ep->last; | |
1320 | ep->sent += asent; | |
1321 | ep->last -= asent; | |
1322 | } else { | |
1323 | ep->last = 0; | |
1324 | } | |
1325 | ||
1326 | /* a request already were transmitted completely */ | |
1327 | if ((ep->tx_req->req.length - ep->sent) <= 0) { | |
1328 | ep->tx_req->req.actual = (unsigned int)ep->sent; | |
1329 | ep0_req_complete(ep->udc, ep->tx_req); | |
1330 | ep->tx_req = NULL; | |
1331 | ep->last = 0; | |
1332 | ep->sent = 0; | |
1333 | } | |
1334 | } else { | |
1335 | dev_vdbg(ep->udc->dev, "the ep0_controller have no req\n"); | |
1336 | } | |
1337 | ||
1338 | return 0; | |
1339 | } | |
1340 | ||
1341 | static int ep0_txframe_handle(struct qe_ep *ep) | |
1342 | { | |
1343 | /* if have error, transmit again */ | |
1344 | if (frame_get_status(ep->txframe) & FRAME_ERROR) { | |
1345 | qe_ep_flushtxfifo(ep); | |
1346 | dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n"); | |
1347 | if (frame_get_info(ep->txframe) & PID_DATA0) | |
1348 | ep->data01 = 0; | |
1349 | else | |
1350 | ep->data01 = 1; | |
1351 | ||
1352 | ep0_txcomplete(ep, 1); | |
1353 | } else | |
1354 | ep0_txcomplete(ep, 0); | |
1355 | ||
1356 | frame_create_tx(ep, ep->txframe); | |
1357 | return 0; | |
1358 | } | |
1359 | ||
1360 | static int qe_ep0_txconf(struct qe_ep *ep) | |
1361 | { | |
1362 | struct qe_bd __iomem *bd; | |
1363 | struct qe_frame *pframe; | |
1364 | u32 bdstatus; | |
1365 | ||
1366 | bd = ep->c_txbd; | |
1367 | bdstatus = in_be32((u32 __iomem *)bd); | |
1368 | while (!(bdstatus & T_R) && (bdstatus & ~T_W)) { | |
1369 | pframe = ep->txframe; | |
1370 | ||
1371 | /* clear and recycle the BD */ | |
1372 | out_be32((u32 __iomem *)bd, bdstatus & T_W); | |
1373 | out_be32(&bd->buf, 0); | |
1374 | if (bdstatus & T_W) | |
1375 | ep->c_txbd = ep->txbase; | |
1376 | else | |
1377 | ep->c_txbd++; | |
1378 | ||
1379 | if (ep->c_txbd == ep->n_txbd) { | |
1380 | if (bdstatus & DEVICE_T_ERROR) { | |
1381 | frame_set_status(pframe, FRAME_ERROR); | |
1382 | if (bdstatus & T_TO) | |
1383 | pframe->status |= TX_ER_TIMEOUT; | |
1384 | if (bdstatus & T_UN) | |
1385 | pframe->status |= TX_ER_UNDERUN; | |
1386 | } | |
1387 | ep0_txframe_handle(ep); | |
1388 | } | |
1389 | ||
1390 | bd = ep->c_txbd; | |
1391 | bdstatus = in_be32((u32 __iomem *)bd); | |
1392 | } | |
1393 | ||
1394 | return 0; | |
1395 | } | |
1396 | ||
1397 | static int ep_txframe_handle(struct qe_ep *ep) | |
1398 | { | |
1399 | if (frame_get_status(ep->txframe) & FRAME_ERROR) { | |
1400 | qe_ep_flushtxfifo(ep); | |
1401 | dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n"); | |
1402 | if (frame_get_info(ep->txframe) & PID_DATA0) | |
1403 | ep->data01 = 0; | |
1404 | else | |
1405 | ep->data01 = 1; | |
1406 | ||
1407 | txcomplete(ep, 1); | |
1408 | } else | |
1409 | txcomplete(ep, 0); | |
1410 | ||
1411 | frame_create_tx(ep, ep->txframe); /* send the data */ | |
1412 | return 0; | |
1413 | } | |
1414 | ||
1415 | /* confirm the already trainsmited bd */ | |
1416 | static int qe_ep_txconf(struct qe_ep *ep) | |
1417 | { | |
1418 | struct qe_bd __iomem *bd; | |
1419 | struct qe_frame *pframe = NULL; | |
1420 | u32 bdstatus; | |
1421 | unsigned char breakonrxinterrupt = 0; | |
1422 | ||
1423 | bd = ep->c_txbd; | |
1424 | bdstatus = in_be32((u32 __iomem *)bd); | |
1425 | while (!(bdstatus & T_R) && (bdstatus & ~T_W)) { | |
1426 | pframe = ep->txframe; | |
1427 | if (bdstatus & DEVICE_T_ERROR) { | |
1428 | frame_set_status(pframe, FRAME_ERROR); | |
1429 | if (bdstatus & T_TO) | |
1430 | pframe->status |= TX_ER_TIMEOUT; | |
1431 | if (bdstatus & T_UN) | |
1432 | pframe->status |= TX_ER_UNDERUN; | |
1433 | } | |
1434 | ||
1435 | /* clear and recycle the BD */ | |
1436 | out_be32((u32 __iomem *)bd, bdstatus & T_W); | |
1437 | out_be32(&bd->buf, 0); | |
1438 | if (bdstatus & T_W) | |
1439 | ep->c_txbd = ep->txbase; | |
1440 | else | |
1441 | ep->c_txbd++; | |
1442 | ||
1443 | /* handle the tx frame */ | |
1444 | ep_txframe_handle(ep); | |
1445 | bd = ep->c_txbd; | |
1446 | bdstatus = in_be32((u32 __iomem *)bd); | |
1447 | } | |
1448 | if (breakonrxinterrupt) | |
1449 | return -EIO; | |
1450 | else | |
1451 | return 0; | |
1452 | } | |
1453 | ||
1454 | /* Add a request in queue, and try to transmit a packet */ | |
1455 | static int ep_req_send(struct qe_ep *ep, struct qe_req *req) | |
1456 | { | |
1457 | int reval = 0; | |
1458 | ||
1459 | if (ep->tx_req == NULL) { | |
1460 | ep->sent = 0; | |
1461 | ep->last = 0; | |
1462 | txcomplete(ep, 0); /* can gain a new tx_req */ | |
1463 | reval = frame_create_tx(ep, ep->txframe); | |
1464 | } | |
1465 | return reval; | |
1466 | } | |
1467 | ||
1468 | /* Maybe this is a good ideal */ | |
1469 | static int ep_req_rx(struct qe_ep *ep, struct qe_req *req) | |
1470 | { | |
1471 | struct qe_udc *udc = ep->udc; | |
1472 | struct qe_frame *pframe = NULL; | |
1473 | struct qe_bd __iomem *bd; | |
1474 | u32 bdstatus, length; | |
1475 | u32 vaddr, fsize; | |
1476 | u8 *cp; | |
1477 | u8 finish_req = 0; | |
1478 | u8 framepid; | |
1479 | ||
1480 | if (list_empty(&ep->queue)) { | |
1481 | dev_vdbg(udc->dev, "the req already finish!\n"); | |
1482 | return 0; | |
1483 | } | |
1484 | pframe = ep->rxframe; | |
1485 | ||
1486 | bd = ep->n_rxbd; | |
1487 | bdstatus = in_be32((u32 __iomem *)bd); | |
1488 | length = bdstatus & BD_LENGTH_MASK; | |
1489 | ||
1490 | while (!(bdstatus & R_E) && length) { | |
1491 | if (finish_req) | |
1492 | break; | |
1493 | if ((bdstatus & R_F) && (bdstatus & R_L) | |
1494 | && !(bdstatus & R_ERROR)) { | |
1495 | qe_frame_clean(pframe); | |
1496 | vaddr = (u32)phys_to_virt(in_be32(&bd->buf)); | |
1497 | frame_set_data(pframe, (u8 *)vaddr); | |
1498 | frame_set_length(pframe, (length - USB_CRC_SIZE)); | |
1499 | frame_set_status(pframe, FRAME_OK); | |
1500 | switch (bdstatus & R_PID) { | |
1501 | case R_PID_DATA1: | |
1502 | frame_set_info(pframe, PID_DATA1); break; | |
1503 | default: | |
1504 | frame_set_info(pframe, PID_DATA0); break; | |
1505 | } | |
1506 | /* handle the rx frame */ | |
1507 | ||
1508 | if (frame_get_info(pframe) & PID_DATA1) | |
1509 | framepid = 0x1; | |
1510 | else | |
1511 | framepid = 0; | |
1512 | ||
1513 | if (framepid != ep->data01) { | |
1514 | dev_vdbg(udc->dev, "the data01 error!\n"); | |
1515 | } else { | |
1516 | fsize = frame_get_length(pframe); | |
1517 | ||
1518 | cp = (u8 *)(req->req.buf) + req->req.actual; | |
1519 | if (cp) { | |
1520 | memcpy(cp, pframe->data, fsize); | |
1521 | req->req.actual += fsize; | |
1522 | if ((fsize < ep->ep.maxpacket) | |
1523 | || (req->req.actual >= | |
1524 | req->req.length)) { | |
1525 | finish_req = 1; | |
1526 | done(ep, req, 0); | |
1527 | if (list_empty(&ep->queue)) | |
1528 | qe_eprx_nack(ep); | |
1529 | } | |
1530 | } | |
1531 | qe_ep_toggledata01(ep); | |
1532 | } | |
1533 | } else { | |
1534 | dev_err(udc->dev, "The receive frame with error!\n"); | |
1535 | } | |
1536 | ||
1537 | /* note: don't clear the rxbd's buffer address * | |
1538 | * only Clear the length */ | |
1539 | out_be32((u32 __iomem *)bd, (bdstatus & BD_STATUS_MASK)); | |
1540 | ep->has_data--; | |
1541 | ||
1542 | /* Get next BD */ | |
1543 | if (bdstatus & R_W) | |
1544 | bd = ep->rxbase; | |
1545 | else | |
1546 | bd++; | |
1547 | ||
1548 | bdstatus = in_be32((u32 __iomem *)bd); | |
1549 | length = bdstatus & BD_LENGTH_MASK; | |
1550 | } | |
1551 | ||
1552 | ep->n_rxbd = bd; | |
1553 | ep_recycle_rxbds(ep); | |
1554 | ||
1555 | return 0; | |
1556 | } | |
1557 | ||
1558 | /* only add the request in queue */ | |
1559 | static int ep_req_receive(struct qe_ep *ep, struct qe_req *req) | |
1560 | { | |
1561 | if (ep->state == EP_STATE_NACK) { | |
1562 | if (ep->has_data <= 0) { | |
1563 | /* Enable rx and unmask rx interrupt */ | |
1564 | qe_eprx_normal(ep); | |
1565 | } else { | |
1566 | /* Copy the exist BD data */ | |
1567 | ep_req_rx(ep, req); | |
1568 | } | |
1569 | } | |
1570 | ||
1571 | return 0; | |
1572 | } | |
1573 | ||
1574 | /******************************************************************** | |
1575 | Internal Used Function End | |
1576 | ********************************************************************/ | |
1577 | ||
1578 | /*----------------------------------------------------------------------- | |
1579 | Endpoint Management Functions For Gadget | |
1580 | -----------------------------------------------------------------------*/ | |
1581 | static int qe_ep_enable(struct usb_ep *_ep, | |
1582 | const struct usb_endpoint_descriptor *desc) | |
1583 | { | |
1584 | struct qe_udc *udc; | |
1585 | struct qe_ep *ep; | |
1586 | int retval = 0; | |
1587 | unsigned char epnum; | |
1588 | ||
1589 | ep = container_of(_ep, struct qe_ep, ep); | |
1590 | ||
1591 | /* catch various bogus parameters */ | |
fc065a09 | 1592 | if (!_ep || !desc || _ep->name == ep_name[0] || |
3948f0e0 LY |
1593 | (desc->bDescriptorType != USB_DT_ENDPOINT)) |
1594 | return -EINVAL; | |
1595 | ||
1596 | udc = ep->udc; | |
1597 | if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN)) | |
1598 | return -ESHUTDOWN; | |
1599 | ||
1600 | epnum = (u8)desc->bEndpointAddress & 0xF; | |
1601 | ||
1602 | retval = qe_ep_init(udc, epnum, desc); | |
1603 | if (retval != 0) { | |
1604 | cpm_muram_free(cpm_muram_offset(ep->rxbase)); | |
1605 | dev_dbg(udc->dev, "enable ep%d failed\n", ep->epnum); | |
1606 | return -EINVAL; | |
1607 | } | |
1608 | dev_dbg(udc->dev, "enable ep%d successful\n", ep->epnum); | |
1609 | return 0; | |
1610 | } | |
1611 | ||
1612 | static int qe_ep_disable(struct usb_ep *_ep) | |
1613 | { | |
1614 | struct qe_udc *udc; | |
1615 | struct qe_ep *ep; | |
1616 | unsigned long flags; | |
1617 | unsigned int size; | |
1618 | ||
1619 | ep = container_of(_ep, struct qe_ep, ep); | |
1620 | udc = ep->udc; | |
1621 | ||
ec39e2ae | 1622 | if (!_ep || !ep->ep.desc) { |
3948f0e0 LY |
1623 | dev_dbg(udc->dev, "%s not enabled\n", _ep ? ep->ep.name : NULL); |
1624 | return -EINVAL; | |
1625 | } | |
1626 | ||
1627 | spin_lock_irqsave(&udc->lock, flags); | |
1628 | /* Nuke all pending requests (does flush) */ | |
1629 | nuke(ep, -ESHUTDOWN); | |
f9c56cdd | 1630 | ep->ep.desc = NULL; |
3948f0e0 | 1631 | ep->stopped = 1; |
af3ddbd7 | 1632 | ep->tx_req = NULL; |
82341b36 | 1633 | qe_ep_reset(udc, ep->epnum); |
3948f0e0 LY |
1634 | spin_unlock_irqrestore(&udc->lock, flags); |
1635 | ||
1636 | cpm_muram_free(cpm_muram_offset(ep->rxbase)); | |
1637 | ||
1638 | if (ep->dir == USB_DIR_OUT) | |
1639 | size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * | |
1640 | (USB_BDRING_LEN_RX + 1); | |
1641 | else | |
1642 | size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * | |
1643 | (USB_BDRING_LEN + 1); | |
1644 | ||
1645 | if (ep->dir != USB_DIR_IN) { | |
1646 | kfree(ep->rxframe); | |
1647 | if (ep->rxbufmap) { | |
d77c1198 | 1648 | dma_unmap_single(udc->gadget.dev.parent, |
3948f0e0 LY |
1649 | ep->rxbuf_d, size, |
1650 | DMA_FROM_DEVICE); | |
1651 | ep->rxbuf_d = DMA_ADDR_INVALID; | |
1652 | } else { | |
1653 | dma_sync_single_for_cpu( | |
d77c1198 | 1654 | udc->gadget.dev.parent, |
3948f0e0 LY |
1655 | ep->rxbuf_d, size, |
1656 | DMA_FROM_DEVICE); | |
1657 | } | |
1658 | kfree(ep->rxbuffer); | |
1659 | } | |
1660 | ||
1661 | if (ep->dir != USB_DIR_OUT) | |
1662 | kfree(ep->txframe); | |
1663 | ||
1664 | dev_dbg(udc->dev, "disabled %s OK\n", _ep->name); | |
1665 | return 0; | |
1666 | } | |
1667 | ||
1668 | static struct usb_request *qe_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) | |
1669 | { | |
1670 | struct qe_req *req; | |
1671 | ||
1672 | req = kzalloc(sizeof(*req), gfp_flags); | |
1673 | if (!req) | |
1674 | return NULL; | |
1675 | ||
1676 | req->req.dma = DMA_ADDR_INVALID; | |
1677 | ||
1678 | INIT_LIST_HEAD(&req->queue); | |
1679 | ||
1680 | return &req->req; | |
1681 | } | |
1682 | ||
1683 | static void qe_free_request(struct usb_ep *_ep, struct usb_request *_req) | |
1684 | { | |
1685 | struct qe_req *req; | |
1686 | ||
1687 | req = container_of(_req, struct qe_req, req); | |
1688 | ||
1689 | if (_req) | |
1690 | kfree(req); | |
1691 | } | |
1692 | ||
a30551db | 1693 | static int __qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req) |
3948f0e0 LY |
1694 | { |
1695 | struct qe_ep *ep = container_of(_ep, struct qe_ep, ep); | |
1696 | struct qe_req *req = container_of(_req, struct qe_req, req); | |
1697 | struct qe_udc *udc; | |
3948f0e0 LY |
1698 | int reval; |
1699 | ||
1700 | udc = ep->udc; | |
1701 | /* catch various bogus parameters */ | |
1702 | if (!_req || !req->req.complete || !req->req.buf | |
1703 | || !list_empty(&req->queue)) { | |
1704 | dev_dbg(udc->dev, "bad params\n"); | |
1705 | return -EINVAL; | |
1706 | } | |
ec39e2ae | 1707 | if (!_ep || (!ep->ep.desc && ep_index(ep))) { |
3948f0e0 LY |
1708 | dev_dbg(udc->dev, "bad ep\n"); |
1709 | return -EINVAL; | |
1710 | } | |
1711 | ||
1712 | if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) | |
1713 | return -ESHUTDOWN; | |
1714 | ||
1715 | req->ep = ep; | |
1716 | ||
1717 | /* map virtual address to hardware */ | |
1718 | if (req->req.dma == DMA_ADDR_INVALID) { | |
1719 | req->req.dma = dma_map_single(ep->udc->gadget.dev.parent, | |
1720 | req->req.buf, | |
1721 | req->req.length, | |
1722 | ep_is_in(ep) | |
1723 | ? DMA_TO_DEVICE : | |
1724 | DMA_FROM_DEVICE); | |
1725 | req->mapped = 1; | |
1726 | } else { | |
1727 | dma_sync_single_for_device(ep->udc->gadget.dev.parent, | |
1728 | req->req.dma, req->req.length, | |
1729 | ep_is_in(ep) | |
1730 | ? DMA_TO_DEVICE : | |
1731 | DMA_FROM_DEVICE); | |
1732 | req->mapped = 0; | |
1733 | } | |
1734 | ||
1735 | req->req.status = -EINPROGRESS; | |
1736 | req->req.actual = 0; | |
1737 | ||
1738 | list_add_tail(&req->queue, &ep->queue); | |
1739 | dev_vdbg(udc->dev, "gadget have request in %s! %d\n", | |
1740 | ep->name, req->req.length); | |
a30551db | 1741 | |
3948f0e0 LY |
1742 | /* push the request to device */ |
1743 | if (ep_is_in(ep)) | |
1744 | reval = ep_req_send(ep, req); | |
1745 | ||
1746 | /* EP0 */ | |
1747 | if (ep_index(ep) == 0 && req->req.length > 0) { | |
1748 | if (ep_is_in(ep)) | |
1749 | udc->ep0_state = DATA_STATE_XMIT; | |
1750 | else | |
1751 | udc->ep0_state = DATA_STATE_RECV; | |
1752 | } | |
1753 | ||
1754 | if (ep->dir == USB_DIR_OUT) | |
1755 | reval = ep_req_receive(ep, req); | |
1756 | ||
3948f0e0 LY |
1757 | return 0; |
1758 | } | |
1759 | ||
a30551db AV |
1760 | /* queues (submits) an I/O request to an endpoint */ |
1761 | static int qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req, | |
1762 | gfp_t gfp_flags) | |
1763 | { | |
1764 | struct qe_ep *ep = container_of(_ep, struct qe_ep, ep); | |
1765 | struct qe_udc *udc = ep->udc; | |
1766 | unsigned long flags; | |
1767 | int ret; | |
1768 | ||
1769 | spin_lock_irqsave(&udc->lock, flags); | |
1770 | ret = __qe_ep_queue(_ep, _req); | |
1771 | spin_unlock_irqrestore(&udc->lock, flags); | |
1772 | return ret; | |
1773 | } | |
1774 | ||
3948f0e0 LY |
1775 | /* dequeues (cancels, unlinks) an I/O request from an endpoint */ |
1776 | static int qe_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) | |
1777 | { | |
1778 | struct qe_ep *ep = container_of(_ep, struct qe_ep, ep); | |
83888411 JK |
1779 | struct qe_req *req = NULL; |
1780 | struct qe_req *iter; | |
3948f0e0 LY |
1781 | unsigned long flags; |
1782 | ||
1783 | if (!_ep || !_req) | |
1784 | return -EINVAL; | |
1785 | ||
1786 | spin_lock_irqsave(&ep->udc->lock, flags); | |
1787 | ||
1788 | /* make sure it's actually queued on this endpoint */ | |
83888411 JK |
1789 | list_for_each_entry(iter, &ep->queue, queue) { |
1790 | if (&iter->req != _req) | |
46d2c20b | 1791 | continue; |
83888411 JK |
1792 | req = iter; |
1793 | break; | |
3948f0e0 LY |
1794 | } |
1795 | ||
83888411 | 1796 | if (!req) { |
3948f0e0 LY |
1797 | spin_unlock_irqrestore(&ep->udc->lock, flags); |
1798 | return -EINVAL; | |
1799 | } | |
1800 | ||
1801 | done(ep, req, -ECONNRESET); | |
1802 | ||
1803 | spin_unlock_irqrestore(&ep->udc->lock, flags); | |
1804 | return 0; | |
1805 | } | |
1806 | ||
1807 | /*----------------------------------------------------------------- | |
1808 | * modify the endpoint halt feature | |
1809 | * @ep: the non-isochronous endpoint being stalled | |
1810 | * @value: 1--set halt 0--clear halt | |
1811 | * Returns zero, or a negative error code. | |
1812 | *----------------------------------------------------------------*/ | |
1813 | static int qe_ep_set_halt(struct usb_ep *_ep, int value) | |
1814 | { | |
1815 | struct qe_ep *ep; | |
1816 | unsigned long flags; | |
1817 | int status = -EOPNOTSUPP; | |
1818 | struct qe_udc *udc; | |
1819 | ||
1820 | ep = container_of(_ep, struct qe_ep, ep); | |
ec39e2ae | 1821 | if (!_ep || !ep->ep.desc) { |
3948f0e0 LY |
1822 | status = -EINVAL; |
1823 | goto out; | |
1824 | } | |
1825 | ||
3948f0e0 LY |
1826 | udc = ep->udc; |
1827 | /* Attempt to halt IN ep will fail if any transfer requests | |
1828 | * are still queue */ | |
1829 | if (value && ep_is_in(ep) && !list_empty(&ep->queue)) { | |
1830 | status = -EAGAIN; | |
1831 | goto out; | |
1832 | } | |
1833 | ||
1834 | status = 0; | |
1835 | spin_lock_irqsave(&ep->udc->lock, flags); | |
1836 | qe_eptx_stall_change(ep, value); | |
1837 | qe_eprx_stall_change(ep, value); | |
1838 | spin_unlock_irqrestore(&ep->udc->lock, flags); | |
1839 | ||
1840 | if (ep->epnum == 0) { | |
1841 | udc->ep0_state = WAIT_FOR_SETUP; | |
1842 | udc->ep0_dir = 0; | |
1843 | } | |
15d5a9ac LY |
1844 | |
1845 | /* set data toggle to DATA0 on clear halt */ | |
1846 | if (value == 0) | |
1847 | ep->data01 = 0; | |
3948f0e0 | 1848 | out: |
928dfa6c | 1849 | dev_vdbg(udc->dev, "%s %s halt stat %d\n", ep->ep.name, |
3948f0e0 LY |
1850 | value ? "set" : "clear", status); |
1851 | ||
1852 | return status; | |
1853 | } | |
1854 | ||
977ac789 | 1855 | static const struct usb_ep_ops qe_ep_ops = { |
3948f0e0 LY |
1856 | .enable = qe_ep_enable, |
1857 | .disable = qe_ep_disable, | |
1858 | ||
1859 | .alloc_request = qe_alloc_request, | |
1860 | .free_request = qe_free_request, | |
1861 | ||
1862 | .queue = qe_ep_queue, | |
1863 | .dequeue = qe_ep_dequeue, | |
1864 | ||
1865 | .set_halt = qe_ep_set_halt, | |
1866 | }; | |
1867 | ||
1868 | /*------------------------------------------------------------------------ | |
1869 | Gadget Driver Layer Operations | |
1870 | ------------------------------------------------------------------------*/ | |
1871 | ||
1872 | /* Get the current frame number */ | |
1873 | static int qe_get_frame(struct usb_gadget *gadget) | |
1874 | { | |
d77c1198 | 1875 | struct qe_udc *udc = container_of(gadget, struct qe_udc, gadget); |
3948f0e0 LY |
1876 | u16 tmp; |
1877 | ||
d77c1198 | 1878 | tmp = in_be16(&udc->usb_param->frame_n); |
3948f0e0 | 1879 | if (tmp & 0x8000) |
f4693b08 DC |
1880 | return tmp & 0x07ff; |
1881 | return -EINVAL; | |
3948f0e0 LY |
1882 | } |
1883 | ||
d77c1198 SAS |
1884 | static int fsl_qe_start(struct usb_gadget *gadget, |
1885 | struct usb_gadget_driver *driver); | |
22835b80 | 1886 | static int fsl_qe_stop(struct usb_gadget *gadget); |
0f91349b | 1887 | |
3948f0e0 | 1888 | /* defined in usb_gadget.h */ |
eeef4587 | 1889 | static const struct usb_gadget_ops qe_gadget_ops = { |
3948f0e0 | 1890 | .get_frame = qe_get_frame, |
d77c1198 SAS |
1891 | .udc_start = fsl_qe_start, |
1892 | .udc_stop = fsl_qe_stop, | |
3948f0e0 LY |
1893 | }; |
1894 | ||
1895 | /*------------------------------------------------------------------------- | |
1896 | USB ep0 Setup process in BUS Enumeration | |
1897 | -------------------------------------------------------------------------*/ | |
1898 | static int udc_reset_ep_queue(struct qe_udc *udc, u8 pipe) | |
1899 | { | |
1900 | struct qe_ep *ep = &udc->eps[pipe]; | |
1901 | ||
1902 | nuke(ep, -ECONNRESET); | |
1903 | ep->tx_req = NULL; | |
1904 | return 0; | |
1905 | } | |
1906 | ||
1907 | static int reset_queues(struct qe_udc *udc) | |
1908 | { | |
1909 | u8 pipe; | |
1910 | ||
1911 | for (pipe = 0; pipe < USB_MAX_ENDPOINTS; pipe++) | |
1912 | udc_reset_ep_queue(udc, pipe); | |
1913 | ||
1914 | /* report disconnect; the driver is already quiesced */ | |
1915 | spin_unlock(&udc->lock); | |
fba45cea | 1916 | usb_gadget_udc_reset(&udc->gadget, udc->driver); |
3948f0e0 LY |
1917 | spin_lock(&udc->lock); |
1918 | ||
1919 | return 0; | |
1920 | } | |
1921 | ||
1922 | static void ch9setaddress(struct qe_udc *udc, u16 value, u16 index, | |
1923 | u16 length) | |
1924 | { | |
1925 | /* Save the new address to device struct */ | |
1926 | udc->device_address = (u8) value; | |
1927 | /* Update usb state */ | |
1928 | udc->usb_state = USB_STATE_ADDRESS; | |
1929 | ||
1930 | /* Status phase , send a ZLP */ | |
1931 | if (ep0_prime_status(udc, USB_DIR_IN)) | |
1932 | qe_ep0_stall(udc); | |
1933 | } | |
1934 | ||
1935 | static void ownercomplete(struct usb_ep *_ep, struct usb_request *_req) | |
1936 | { | |
1937 | struct qe_req *req = container_of(_req, struct qe_req, req); | |
1938 | ||
1939 | req->req.buf = NULL; | |
1940 | kfree(req); | |
1941 | } | |
1942 | ||
928dfa6c LY |
1943 | static void ch9getstatus(struct qe_udc *udc, u8 request_type, u16 value, |
1944 | u16 index, u16 length) | |
3948f0e0 | 1945 | { |
928dfa6c | 1946 | u16 usb_status = 0; |
3948f0e0 LY |
1947 | struct qe_req *req; |
1948 | struct qe_ep *ep; | |
1949 | int status = 0; | |
1950 | ||
1951 | ep = &udc->eps[0]; | |
928dfa6c LY |
1952 | if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) { |
1953 | /* Get device status */ | |
1954 | usb_status = 1 << USB_DEVICE_SELF_POWERED; | |
1955 | } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) { | |
1956 | /* Get interface status */ | |
1957 | /* We don't have interface information in udc driver */ | |
1958 | usb_status = 0; | |
1959 | } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) { | |
1960 | /* Get endpoint status */ | |
1961 | int pipe = index & USB_ENDPOINT_NUMBER_MASK; | |
1962 | struct qe_ep *target_ep = &udc->eps[pipe]; | |
1963 | u16 usep; | |
1964 | ||
1965 | /* stall if endpoint doesn't exist */ | |
ec39e2ae | 1966 | if (!target_ep->ep.desc) |
928dfa6c LY |
1967 | goto stall; |
1968 | ||
1969 | usep = in_be16(&udc->usb_regs->usb_usep[pipe]); | |
1970 | if (index & USB_DIR_IN) { | |
1971 | if (target_ep->dir != USB_DIR_IN) | |
1972 | goto stall; | |
1973 | if ((usep & USB_THS_MASK) == USB_THS_STALL) | |
1974 | usb_status = 1 << USB_ENDPOINT_HALT; | |
1975 | } else { | |
1976 | if (target_ep->dir != USB_DIR_OUT) | |
1977 | goto stall; | |
1978 | if ((usep & USB_RHS_MASK) == USB_RHS_STALL) | |
1979 | usb_status = 1 << USB_ENDPOINT_HALT; | |
1980 | } | |
1981 | } | |
3948f0e0 LY |
1982 | |
1983 | req = container_of(qe_alloc_request(&ep->ep, GFP_KERNEL), | |
1984 | struct qe_req, req); | |
1985 | req->req.length = 2; | |
928dfa6c LY |
1986 | req->req.buf = udc->statusbuf; |
1987 | *(u16 *)req->req.buf = cpu_to_le16(usb_status); | |
3948f0e0 LY |
1988 | req->req.status = -EINPROGRESS; |
1989 | req->req.actual = 0; | |
1990 | req->req.complete = ownercomplete; | |
1991 | ||
1992 | udc->ep0_dir = USB_DIR_IN; | |
1993 | ||
1994 | /* data phase */ | |
a30551db | 1995 | status = __qe_ep_queue(&ep->ep, &req->req); |
3948f0e0 | 1996 | |
928dfa6c LY |
1997 | if (status == 0) |
1998 | return; | |
1999 | stall: | |
2000 | dev_err(udc->dev, "Can't respond to getstatus request \n"); | |
2001 | qe_ep0_stall(udc); | |
3948f0e0 LY |
2002 | } |
2003 | ||
2004 | /* only handle the setup request, suppose the device in normal status */ | |
2005 | static void setup_received_handle(struct qe_udc *udc, | |
2006 | struct usb_ctrlrequest *setup) | |
2007 | { | |
2008 | /* Fix Endian (udc->local_setup_buff is cpu Endian now)*/ | |
2009 | u16 wValue = le16_to_cpu(setup->wValue); | |
2010 | u16 wIndex = le16_to_cpu(setup->wIndex); | |
2011 | u16 wLength = le16_to_cpu(setup->wLength); | |
2012 | ||
2013 | /* clear the previous request in the ep0 */ | |
2014 | udc_reset_ep_queue(udc, 0); | |
2015 | ||
2016 | if (setup->bRequestType & USB_DIR_IN) | |
2017 | udc->ep0_dir = USB_DIR_IN; | |
2018 | else | |
2019 | udc->ep0_dir = USB_DIR_OUT; | |
2020 | ||
2021 | switch (setup->bRequest) { | |
2022 | case USB_REQ_GET_STATUS: | |
2023 | /* Data+Status phase form udc */ | |
2024 | if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK)) | |
2025 | != (USB_DIR_IN | USB_TYPE_STANDARD)) | |
2026 | break; | |
928dfa6c LY |
2027 | ch9getstatus(udc, setup->bRequestType, wValue, wIndex, |
2028 | wLength); | |
3948f0e0 LY |
2029 | return; |
2030 | ||
2031 | case USB_REQ_SET_ADDRESS: | |
2032 | /* Status phase from udc */ | |
2033 | if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD | | |
2034 | USB_RECIP_DEVICE)) | |
2035 | break; | |
2036 | ch9setaddress(udc, wValue, wIndex, wLength); | |
2037 | return; | |
2038 | ||
2039 | case USB_REQ_CLEAR_FEATURE: | |
2040 | case USB_REQ_SET_FEATURE: | |
2041 | /* Requests with no data phase, status phase from udc */ | |
928dfa6c | 2042 | if ((setup->bRequestType & USB_TYPE_MASK) |
3948f0e0 LY |
2043 | != USB_TYPE_STANDARD) |
2044 | break; | |
2045 | ||
2046 | if ((setup->bRequestType & USB_RECIP_MASK) | |
2047 | == USB_RECIP_ENDPOINT) { | |
2048 | int pipe = wIndex & USB_ENDPOINT_NUMBER_MASK; | |
2049 | struct qe_ep *ep; | |
2050 | ||
2051 | if (wValue != 0 || wLength != 0 | |
7442e6db | 2052 | || pipe >= USB_MAX_ENDPOINTS) |
3948f0e0 LY |
2053 | break; |
2054 | ep = &udc->eps[pipe]; | |
2055 | ||
2056 | spin_unlock(&udc->lock); | |
2057 | qe_ep_set_halt(&ep->ep, | |
2058 | (setup->bRequest == USB_REQ_SET_FEATURE) | |
2059 | ? 1 : 0); | |
2060 | spin_lock(&udc->lock); | |
2061 | } | |
2062 | ||
2063 | ep0_prime_status(udc, USB_DIR_IN); | |
2064 | ||
2065 | return; | |
2066 | ||
2067 | default: | |
2068 | break; | |
2069 | } | |
2070 | ||
2071 | if (wLength) { | |
2072 | /* Data phase from gadget, status phase from udc */ | |
2073 | if (setup->bRequestType & USB_DIR_IN) { | |
2074 | udc->ep0_state = DATA_STATE_XMIT; | |
2075 | udc->ep0_dir = USB_DIR_IN; | |
928dfa6c | 2076 | } else { |
3948f0e0 LY |
2077 | udc->ep0_state = DATA_STATE_RECV; |
2078 | udc->ep0_dir = USB_DIR_OUT; | |
2079 | } | |
2080 | spin_unlock(&udc->lock); | |
2081 | if (udc->driver->setup(&udc->gadget, | |
2082 | &udc->local_setup_buff) < 0) | |
2083 | qe_ep0_stall(udc); | |
2084 | spin_lock(&udc->lock); | |
2085 | } else { | |
2086 | /* No data phase, IN status from gadget */ | |
2087 | udc->ep0_dir = USB_DIR_IN; | |
2088 | spin_unlock(&udc->lock); | |
2089 | if (udc->driver->setup(&udc->gadget, | |
2090 | &udc->local_setup_buff) < 0) | |
2091 | qe_ep0_stall(udc); | |
2092 | spin_lock(&udc->lock); | |
2093 | udc->ep0_state = DATA_STATE_NEED_ZLP; | |
2094 | } | |
2095 | } | |
2096 | ||
2097 | /*------------------------------------------------------------------------- | |
2098 | USB Interrupt handlers | |
2099 | -------------------------------------------------------------------------*/ | |
2100 | static void suspend_irq(struct qe_udc *udc) | |
2101 | { | |
2102 | udc->resume_state = udc->usb_state; | |
2103 | udc->usb_state = USB_STATE_SUSPENDED; | |
2104 | ||
2105 | /* report suspend to the driver ,serial.c not support this*/ | |
2106 | if (udc->driver->suspend) | |
2107 | udc->driver->suspend(&udc->gadget); | |
2108 | } | |
2109 | ||
2110 | static void resume_irq(struct qe_udc *udc) | |
2111 | { | |
2112 | udc->usb_state = udc->resume_state; | |
2113 | udc->resume_state = 0; | |
2114 | ||
2115 | /* report resume to the driver , serial.c not support this*/ | |
2116 | if (udc->driver->resume) | |
2117 | udc->driver->resume(&udc->gadget); | |
2118 | } | |
2119 | ||
2120 | static void idle_irq(struct qe_udc *udc) | |
2121 | { | |
2122 | u8 usbs; | |
2123 | ||
2124 | usbs = in_8(&udc->usb_regs->usb_usbs); | |
2125 | if (usbs & USB_IDLE_STATUS_MASK) { | |
2126 | if ((udc->usb_state) != USB_STATE_SUSPENDED) | |
2127 | suspend_irq(udc); | |
2128 | } else { | |
2129 | if (udc->usb_state == USB_STATE_SUSPENDED) | |
2130 | resume_irq(udc); | |
2131 | } | |
2132 | } | |
2133 | ||
2134 | static int reset_irq(struct qe_udc *udc) | |
2135 | { | |
2136 | unsigned char i; | |
2137 | ||
ef84e405 AV |
2138 | if (udc->usb_state == USB_STATE_DEFAULT) |
2139 | return 0; | |
2140 | ||
d77c1198 | 2141 | qe_usb_disable(udc); |
3948f0e0 LY |
2142 | out_8(&udc->usb_regs->usb_usadr, 0); |
2143 | ||
2144 | for (i = 0; i < USB_MAX_ENDPOINTS; i++) { | |
2145 | if (udc->eps[i].init) | |
2146 | qe_ep_reset(udc, i); | |
2147 | } | |
2148 | ||
2149 | reset_queues(udc); | |
2150 | udc->usb_state = USB_STATE_DEFAULT; | |
2151 | udc->ep0_state = WAIT_FOR_SETUP; | |
2152 | udc->ep0_dir = USB_DIR_OUT; | |
d77c1198 | 2153 | qe_usb_enable(udc); |
3948f0e0 LY |
2154 | return 0; |
2155 | } | |
2156 | ||
2157 | static int bsy_irq(struct qe_udc *udc) | |
2158 | { | |
2159 | return 0; | |
2160 | } | |
2161 | ||
2162 | static int txe_irq(struct qe_udc *udc) | |
2163 | { | |
2164 | return 0; | |
2165 | } | |
2166 | ||
2167 | /* ep0 tx interrupt also in here */ | |
2168 | static int tx_irq(struct qe_udc *udc) | |
2169 | { | |
2170 | struct qe_ep *ep; | |
2171 | struct qe_bd __iomem *bd; | |
2172 | int i, res = 0; | |
2173 | ||
2174 | if ((udc->usb_state == USB_STATE_ADDRESS) | |
2175 | && (in_8(&udc->usb_regs->usb_usadr) == 0)) | |
2176 | out_8(&udc->usb_regs->usb_usadr, udc->device_address); | |
2177 | ||
2178 | for (i = (USB_MAX_ENDPOINTS-1); ((i >= 0) && (res == 0)); i--) { | |
2179 | ep = &udc->eps[i]; | |
2180 | if (ep && ep->init && (ep->dir != USB_DIR_OUT)) { | |
2181 | bd = ep->c_txbd; | |
2182 | if (!(in_be32((u32 __iomem *)bd) & T_R) | |
2183 | && (in_be32(&bd->buf))) { | |
928dfa6c | 2184 | /* confirm the transmitted bd */ |
3948f0e0 LY |
2185 | if (ep->epnum == 0) |
2186 | res = qe_ep0_txconf(ep); | |
2187 | else | |
2188 | res = qe_ep_txconf(ep); | |
3948f0e0 LY |
2189 | } |
2190 | } | |
2191 | } | |
2192 | return res; | |
2193 | } | |
2194 | ||
2195 | ||
2196 | /* setup packect's rx is handle in the function too */ | |
2197 | static void rx_irq(struct qe_udc *udc) | |
2198 | { | |
2199 | struct qe_ep *ep; | |
2200 | struct qe_bd __iomem *bd; | |
2201 | int i; | |
2202 | ||
2203 | for (i = 0; i < USB_MAX_ENDPOINTS; i++) { | |
2204 | ep = &udc->eps[i]; | |
2205 | if (ep && ep->init && (ep->dir != USB_DIR_IN)) { | |
2206 | bd = ep->n_rxbd; | |
2207 | if (!(in_be32((u32 __iomem *)bd) & R_E) | |
2208 | && (in_be32(&bd->buf))) { | |
2209 | if (ep->epnum == 0) { | |
2210 | qe_ep0_rx(udc); | |
2211 | } else { | |
2212 | /*non-setup package receive*/ | |
2213 | qe_ep_rx(ep); | |
2214 | } | |
2215 | } | |
2216 | } | |
2217 | } | |
2218 | } | |
2219 | ||
2220 | static irqreturn_t qe_udc_irq(int irq, void *_udc) | |
2221 | { | |
2222 | struct qe_udc *udc = (struct qe_udc *)_udc; | |
2223 | u16 irq_src; | |
2224 | irqreturn_t status = IRQ_NONE; | |
2225 | unsigned long flags; | |
2226 | ||
3948f0e0 LY |
2227 | spin_lock_irqsave(&udc->lock, flags); |
2228 | ||
2229 | irq_src = in_be16(&udc->usb_regs->usb_usber) & | |
2230 | in_be16(&udc->usb_regs->usb_usbmr); | |
2231 | /* Clear notification bits */ | |
2232 | out_be16(&udc->usb_regs->usb_usber, irq_src); | |
2233 | /* USB Interrupt */ | |
2234 | if (irq_src & USB_E_IDLE_MASK) { | |
2235 | idle_irq(udc); | |
2236 | irq_src &= ~USB_E_IDLE_MASK; | |
2237 | status = IRQ_HANDLED; | |
2238 | } | |
2239 | ||
2240 | if (irq_src & USB_E_TXB_MASK) { | |
2241 | tx_irq(udc); | |
2242 | irq_src &= ~USB_E_TXB_MASK; | |
2243 | status = IRQ_HANDLED; | |
2244 | } | |
2245 | ||
2246 | if (irq_src & USB_E_RXB_MASK) { | |
2247 | rx_irq(udc); | |
2248 | irq_src &= ~USB_E_RXB_MASK; | |
2249 | status = IRQ_HANDLED; | |
2250 | } | |
2251 | ||
2252 | if (irq_src & USB_E_RESET_MASK) { | |
2253 | reset_irq(udc); | |
2254 | irq_src &= ~USB_E_RESET_MASK; | |
2255 | status = IRQ_HANDLED; | |
2256 | } | |
2257 | ||
2258 | if (irq_src & USB_E_BSY_MASK) { | |
2259 | bsy_irq(udc); | |
2260 | irq_src &= ~USB_E_BSY_MASK; | |
2261 | status = IRQ_HANDLED; | |
2262 | } | |
2263 | ||
2264 | if (irq_src & USB_E_TXE_MASK) { | |
2265 | txe_irq(udc); | |
2266 | irq_src &= ~USB_E_TXE_MASK; | |
2267 | status = IRQ_HANDLED; | |
2268 | } | |
2269 | ||
2270 | spin_unlock_irqrestore(&udc->lock, flags); | |
2271 | ||
2272 | return status; | |
2273 | } | |
2274 | ||
2275 | /*------------------------------------------------------------------------- | |
b0fca50f | 2276 | Gadget driver probe and unregister. |
3948f0e0 | 2277 | --------------------------------------------------------------------------*/ |
d77c1198 SAS |
2278 | static int fsl_qe_start(struct usb_gadget *gadget, |
2279 | struct usb_gadget_driver *driver) | |
3948f0e0 | 2280 | { |
d77c1198 SAS |
2281 | struct qe_udc *udc; |
2282 | unsigned long flags; | |
3948f0e0 | 2283 | |
d77c1198 | 2284 | udc = container_of(gadget, struct qe_udc, gadget); |
3948f0e0 | 2285 | /* lock is needed but whether should use this lock or another */ |
d77c1198 | 2286 | spin_lock_irqsave(&udc->lock, flags); |
3948f0e0 | 2287 | |
3948f0e0 | 2288 | /* hook up the driver */ |
d77c1198 | 2289 | udc->driver = driver; |
d77c1198 | 2290 | udc->gadget.speed = driver->max_speed; |
3948f0e0 LY |
2291 | |
2292 | /* Enable IRQ reg and Set usbcmd reg EN bit */ | |
d77c1198 SAS |
2293 | qe_usb_enable(udc); |
2294 | ||
2295 | out_be16(&udc->usb_regs->usb_usber, 0xffff); | |
2296 | out_be16(&udc->usb_regs->usb_usbmr, USB_E_DEFAULT_DEVICE); | |
2297 | udc->usb_state = USB_STATE_ATTACHED; | |
2298 | udc->ep0_state = WAIT_FOR_SETUP; | |
2299 | udc->ep0_dir = USB_DIR_OUT; | |
2300 | spin_unlock_irqrestore(&udc->lock, flags); | |
2301 | ||
3948f0e0 LY |
2302 | return 0; |
2303 | } | |
3948f0e0 | 2304 | |
22835b80 | 2305 | static int fsl_qe_stop(struct usb_gadget *gadget) |
3948f0e0 | 2306 | { |
d77c1198 | 2307 | struct qe_udc *udc; |
3948f0e0 LY |
2308 | struct qe_ep *loop_ep; |
2309 | unsigned long flags; | |
2310 | ||
d77c1198 | 2311 | udc = container_of(gadget, struct qe_udc, gadget); |
3948f0e0 | 2312 | /* stop usb controller, disable intr */ |
d77c1198 | 2313 | qe_usb_disable(udc); |
3948f0e0 LY |
2314 | |
2315 | /* in fact, no needed */ | |
d77c1198 SAS |
2316 | udc->usb_state = USB_STATE_ATTACHED; |
2317 | udc->ep0_state = WAIT_FOR_SETUP; | |
2318 | udc->ep0_dir = 0; | |
3948f0e0 LY |
2319 | |
2320 | /* stand operation */ | |
d77c1198 SAS |
2321 | spin_lock_irqsave(&udc->lock, flags); |
2322 | udc->gadget.speed = USB_SPEED_UNKNOWN; | |
2323 | nuke(&udc->eps[0], -ESHUTDOWN); | |
2324 | list_for_each_entry(loop_ep, &udc->gadget.ep_list, ep.ep_list) | |
3948f0e0 | 2325 | nuke(loop_ep, -ESHUTDOWN); |
d77c1198 | 2326 | spin_unlock_irqrestore(&udc->lock, flags); |
9ac36da3 | 2327 | |
d77c1198 | 2328 | udc->driver = NULL; |
3948f0e0 | 2329 | |
3948f0e0 LY |
2330 | return 0; |
2331 | } | |
3948f0e0 LY |
2332 | |
2333 | /* udc structure's alloc and setup, include ep-param alloc */ | |
41ac7b3a | 2334 | static struct qe_udc *qe_udc_config(struct platform_device *ofdev) |
3948f0e0 LY |
2335 | { |
2336 | struct qe_udc *udc; | |
3ed38802 | 2337 | struct device_node *np = ofdev->dev.of_node; |
96c7de4f | 2338 | unsigned long tmp_addr = 0; |
3948f0e0 LY |
2339 | struct usb_device_para __iomem *usbpram; |
2340 | unsigned int i; | |
2341 | u64 size; | |
2342 | u32 offset; | |
2343 | ||
2344 | udc = kzalloc(sizeof(*udc), GFP_KERNEL); | |
d9116ca8 | 2345 | if (!udc) |
3948f0e0 | 2346 | goto cleanup; |
3948f0e0 LY |
2347 | |
2348 | udc->dev = &ofdev->dev; | |
2349 | ||
2350 | /* get default address of usb parameter in MURAM from device tree */ | |
2351 | offset = *of_get_address(np, 1, &size, NULL); | |
2352 | udc->usb_param = cpm_muram_addr(offset); | |
2353 | memset_io(udc->usb_param, 0, size); | |
2354 | ||
2355 | usbpram = udc->usb_param; | |
2356 | out_be16(&usbpram->frame_n, 0); | |
2357 | out_be32(&usbpram->rstate, 0); | |
2358 | ||
2359 | tmp_addr = cpm_muram_alloc((USB_MAX_ENDPOINTS * | |
2360 | sizeof(struct usb_ep_para)), | |
2361 | USB_EP_PARA_ALIGNMENT); | |
cd40c4c4 AV |
2362 | if (IS_ERR_VALUE(tmp_addr)) |
2363 | goto cleanup; | |
3948f0e0 LY |
2364 | |
2365 | for (i = 0; i < USB_MAX_ENDPOINTS; i++) { | |
2366 | out_be16(&usbpram->epptr[i], (u16)tmp_addr); | |
2367 | udc->ep_param[i] = cpm_muram_addr(tmp_addr); | |
2368 | tmp_addr += 32; | |
2369 | } | |
2370 | ||
2371 | memset_io(udc->ep_param[0], 0, | |
2372 | USB_MAX_ENDPOINTS * sizeof(struct usb_ep_para)); | |
2373 | ||
2374 | udc->resume_state = USB_STATE_NOTATTACHED; | |
2375 | udc->usb_state = USB_STATE_POWERED; | |
2376 | udc->ep0_dir = 0; | |
2377 | ||
2378 | spin_lock_init(&udc->lock); | |
2379 | return udc; | |
2380 | ||
2381 | cleanup: | |
2382 | kfree(udc); | |
2383 | return NULL; | |
2384 | } | |
2385 | ||
2386 | /* USB Controller register init */ | |
41ac7b3a | 2387 | static int qe_udc_reg_init(struct qe_udc *udc) |
3948f0e0 LY |
2388 | { |
2389 | struct usb_ctlr __iomem *qe_usbregs; | |
2390 | qe_usbregs = udc->usb_regs; | |
2391 | ||
2247818a | 2392 | /* Spec says that we must enable the USB controller to change mode. */ |
3948f0e0 | 2393 | out_8(&qe_usbregs->usb_usmod, 0x01); |
2247818a AV |
2394 | /* Mode changed, now disable it, since muram isn't initialized yet. */ |
2395 | out_8(&qe_usbregs->usb_usmod, 0x00); | |
2396 | ||
2397 | /* Initialize the rest. */ | |
3948f0e0 LY |
2398 | out_be16(&qe_usbregs->usb_usbmr, 0); |
2399 | out_8(&qe_usbregs->usb_uscom, 0); | |
2400 | out_be16(&qe_usbregs->usb_usber, USBER_ALL_CLEAR); | |
2401 | ||
2402 | return 0; | |
2403 | } | |
2404 | ||
41ac7b3a | 2405 | static int qe_ep_config(struct qe_udc *udc, unsigned char pipe_num) |
3948f0e0 LY |
2406 | { |
2407 | struct qe_ep *ep = &udc->eps[pipe_num]; | |
2408 | ||
2409 | ep->udc = udc; | |
2410 | strcpy(ep->name, ep_name[pipe_num]); | |
2411 | ep->ep.name = ep_name[pipe_num]; | |
2412 | ||
e8fc42f6 RB |
2413 | if (pipe_num == 0) { |
2414 | ep->ep.caps.type_control = true; | |
2415 | } else { | |
2416 | ep->ep.caps.type_iso = true; | |
2417 | ep->ep.caps.type_bulk = true; | |
2418 | ep->ep.caps.type_int = true; | |
2419 | } | |
2420 | ||
2421 | ep->ep.caps.dir_in = true; | |
2422 | ep->ep.caps.dir_out = true; | |
2423 | ||
3948f0e0 LY |
2424 | ep->ep.ops = &qe_ep_ops; |
2425 | ep->stopped = 1; | |
e117e742 | 2426 | usb_ep_set_maxpacket_limit(&ep->ep, (unsigned short) ~0); |
ec39e2ae | 2427 | ep->ep.desc = NULL; |
3948f0e0 LY |
2428 | ep->dir = 0xff; |
2429 | ep->epnum = (u8)pipe_num; | |
2430 | ep->sent = 0; | |
2431 | ep->last = 0; | |
2432 | ep->init = 0; | |
2433 | ep->rxframe = NULL; | |
2434 | ep->txframe = NULL; | |
2435 | ep->tx_req = NULL; | |
2436 | ep->state = EP_STATE_IDLE; | |
2437 | ep->has_data = 0; | |
2438 | ||
2439 | /* the queue lists any req for this ep */ | |
2440 | INIT_LIST_HEAD(&ep->queue); | |
2441 | ||
2442 | /* gagdet.ep_list used for ep_autoconfig so no ep0*/ | |
2443 | if (pipe_num != 0) | |
2444 | list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); | |
2445 | ||
2446 | ep->gadget = &udc->gadget; | |
2447 | ||
2448 | return 0; | |
2449 | } | |
2450 | ||
2451 | /*----------------------------------------------------------------------- | |
2452 | * UDC device Driver operation functions * | |
2453 | *----------------------------------------------------------------------*/ | |
2454 | static void qe_udc_release(struct device *dev) | |
2455 | { | |
d77c1198 SAS |
2456 | struct qe_udc *udc = container_of(dev, struct qe_udc, gadget.dev); |
2457 | int i; | |
3948f0e0 | 2458 | |
d77c1198 SAS |
2459 | complete(udc->done); |
2460 | cpm_muram_free(cpm_muram_offset(udc->ep_param[0])); | |
3948f0e0 | 2461 | for (i = 0; i < USB_MAX_ENDPOINTS; i++) |
d77c1198 | 2462 | udc->ep_param[i] = NULL; |
3948f0e0 | 2463 | |
d77c1198 | 2464 | kfree(udc); |
3948f0e0 LY |
2465 | } |
2466 | ||
2467 | /* Driver probe functions */ | |
b1608d69 | 2468 | static const struct of_device_id qe_udc_match[]; |
41ac7b3a | 2469 | static int qe_udc_probe(struct platform_device *ofdev) |
3948f0e0 | 2470 | { |
d77c1198 | 2471 | struct qe_udc *udc; |
b1608d69 | 2472 | const struct of_device_id *match; |
3ed38802 | 2473 | struct device_node *np = ofdev->dev.of_node; |
3948f0e0 LY |
2474 | struct qe_ep *ep; |
2475 | unsigned int ret = 0; | |
2476 | unsigned int i; | |
2477 | const void *prop; | |
2478 | ||
b1608d69 GL |
2479 | match = of_match_device(qe_udc_match, &ofdev->dev); |
2480 | if (!match) | |
d35fb641 GL |
2481 | return -EINVAL; |
2482 | ||
3948f0e0 LY |
2483 | prop = of_get_property(np, "mode", NULL); |
2484 | if (!prop || strcmp(prop, "peripheral")) | |
2485 | return -ENODEV; | |
2486 | ||
2487 | /* Initialize the udc structure including QH member and other member */ | |
d77c1198 SAS |
2488 | udc = qe_udc_config(ofdev); |
2489 | if (!udc) { | |
cd40c4c4 | 2490 | dev_err(&ofdev->dev, "failed to initialize\n"); |
3948f0e0 LY |
2491 | return -ENOMEM; |
2492 | } | |
2493 | ||
d77c1198 SAS |
2494 | udc->soc_type = (unsigned long)match->data; |
2495 | udc->usb_regs = of_iomap(np, 0); | |
2496 | if (!udc->usb_regs) { | |
3948f0e0 LY |
2497 | ret = -ENOMEM; |
2498 | goto err1; | |
2499 | } | |
2500 | ||
2501 | /* initialize usb hw reg except for regs for EP, | |
2502 | * leave usbintr reg untouched*/ | |
d77c1198 | 2503 | qe_udc_reg_init(udc); |
3948f0e0 LY |
2504 | |
2505 | /* here comes the stand operations for probe | |
2506 | * set the qe_udc->gadget.xxx */ | |
d77c1198 | 2507 | udc->gadget.ops = &qe_gadget_ops; |
3948f0e0 LY |
2508 | |
2509 | /* gadget.ep0 is a pointer */ | |
d77c1198 | 2510 | udc->gadget.ep0 = &udc->eps[0].ep; |
3948f0e0 | 2511 | |
d77c1198 | 2512 | INIT_LIST_HEAD(&udc->gadget.ep_list); |
3948f0e0 LY |
2513 | |
2514 | /* modify in register gadget process */ | |
d77c1198 | 2515 | udc->gadget.speed = USB_SPEED_UNKNOWN; |
3948f0e0 LY |
2516 | |
2517 | /* name: Identifies the controller hardware type. */ | |
d77c1198 | 2518 | udc->gadget.name = driver_name; |
d77c1198 | 2519 | udc->gadget.dev.parent = &ofdev->dev; |
3948f0e0 | 2520 | |
928dfa6c | 2521 | /* initialize qe_ep struct */ |
3948f0e0 | 2522 | for (i = 0; i < USB_MAX_ENDPOINTS ; i++) { |
928dfa6c | 2523 | /* because the ep type isn't decide here so |
3948f0e0 LY |
2524 | * qe_ep_init() should be called in ep_enable() */ |
2525 | ||
2526 | /* setup the qe_ep struct and link ep.ep.list | |
2527 | * into gadget.ep_list */ | |
d77c1198 | 2528 | qe_ep_config(udc, (unsigned char)i); |
3948f0e0 LY |
2529 | } |
2530 | ||
2531 | /* ep0 initialization in here */ | |
d77c1198 | 2532 | ret = qe_ep_init(udc, 0, &qe_ep0_desc); |
3948f0e0 LY |
2533 | if (ret) |
2534 | goto err2; | |
2535 | ||
928dfa6c | 2536 | /* create a buf for ZLP send, need to remain zeroed */ |
7b0a12ab | 2537 | udc->nullbuf = devm_kzalloc(&ofdev->dev, 256, GFP_KERNEL); |
d77c1198 | 2538 | if (udc->nullbuf == NULL) { |
3948f0e0 LY |
2539 | ret = -ENOMEM; |
2540 | goto err3; | |
2541 | } | |
2542 | ||
928dfa6c | 2543 | /* buffer for data of get_status request */ |
7b0a12ab | 2544 | udc->statusbuf = devm_kzalloc(&ofdev->dev, 2, GFP_KERNEL); |
d77c1198 | 2545 | if (udc->statusbuf == NULL) { |
928dfa6c | 2546 | ret = -ENOMEM; |
7b0a12ab | 2547 | goto err3; |
928dfa6c LY |
2548 | } |
2549 | ||
d77c1198 SAS |
2550 | udc->nullp = virt_to_phys((void *)udc->nullbuf); |
2551 | if (udc->nullp == DMA_ADDR_INVALID) { | |
2552 | udc->nullp = dma_map_single( | |
2553 | udc->gadget.dev.parent, | |
2554 | udc->nullbuf, | |
3948f0e0 LY |
2555 | 256, |
2556 | DMA_TO_DEVICE); | |
d77c1198 | 2557 | udc->nullmap = 1; |
3948f0e0 | 2558 | } else { |
d77c1198 SAS |
2559 | dma_sync_single_for_device(udc->gadget.dev.parent, |
2560 | udc->nullp, 256, | |
3948f0e0 LY |
2561 | DMA_TO_DEVICE); |
2562 | } | |
2563 | ||
f7aa9386 | 2564 | tasklet_setup(&udc->rx_tasklet, ep_rx_tasklet); |
3948f0e0 | 2565 | /* request irq and disable DR */ |
d77c1198 SAS |
2566 | udc->usb_irq = irq_of_parse_and_map(np, 0); |
2567 | if (!udc->usb_irq) { | |
94f341db AV |
2568 | ret = -EINVAL; |
2569 | goto err_noirq; | |
2570 | } | |
3948f0e0 | 2571 | |
d77c1198 SAS |
2572 | ret = request_irq(udc->usb_irq, qe_udc_irq, 0, |
2573 | driver_name, udc); | |
3948f0e0 | 2574 | if (ret) { |
d77c1198 SAS |
2575 | dev_err(udc->dev, "cannot request irq %d err %d\n", |
2576 | udc->usb_irq, ret); | |
7b0a12ab | 2577 | goto err4; |
3948f0e0 LY |
2578 | } |
2579 | ||
29e7dbf3 FB |
2580 | ret = usb_add_gadget_udc_release(&ofdev->dev, &udc->gadget, |
2581 | qe_udc_release); | |
0f91349b | 2582 | if (ret) |
7b0a12ab | 2583 | goto err5; |
0f91349b | 2584 | |
dae8eadf | 2585 | platform_set_drvdata(ofdev, udc); |
d77c1198 | 2586 | dev_info(udc->dev, |
928dfa6c | 2587 | "%s USB controller initialized as device\n", |
d77c1198 | 2588 | (udc->soc_type == PORT_QE) ? "QE" : "CPM"); |
3948f0e0 LY |
2589 | return 0; |
2590 | ||
928dfa6c | 2591 | err5: |
7b0a12ab HS |
2592 | free_irq(udc->usb_irq, udc); |
2593 | err4: | |
d77c1198 | 2594 | irq_dispose_mapping(udc->usb_irq); |
94f341db | 2595 | err_noirq: |
d77c1198 SAS |
2596 | if (udc->nullmap) { |
2597 | dma_unmap_single(udc->gadget.dev.parent, | |
2598 | udc->nullp, 256, | |
3948f0e0 | 2599 | DMA_TO_DEVICE); |
d77c1198 | 2600 | udc->nullp = DMA_ADDR_INVALID; |
3948f0e0 | 2601 | } else { |
d77c1198 SAS |
2602 | dma_sync_single_for_cpu(udc->gadget.dev.parent, |
2603 | udc->nullp, 256, | |
3948f0e0 LY |
2604 | DMA_TO_DEVICE); |
2605 | } | |
3948f0e0 | 2606 | err3: |
d77c1198 | 2607 | ep = &udc->eps[0]; |
3948f0e0 LY |
2608 | cpm_muram_free(cpm_muram_offset(ep->rxbase)); |
2609 | kfree(ep->rxframe); | |
2610 | kfree(ep->rxbuffer); | |
2611 | kfree(ep->txframe); | |
2612 | err2: | |
d77c1198 | 2613 | iounmap(udc->usb_regs); |
3948f0e0 | 2614 | err1: |
d77c1198 | 2615 | kfree(udc); |
3948f0e0 LY |
2616 | return ret; |
2617 | } | |
2618 | ||
2619 | #ifdef CONFIG_PM | |
2dc11581 | 2620 | static int qe_udc_suspend(struct platform_device *dev, pm_message_t state) |
3948f0e0 LY |
2621 | { |
2622 | return -ENOTSUPP; | |
2623 | } | |
2624 | ||
2dc11581 | 2625 | static int qe_udc_resume(struct platform_device *dev) |
3948f0e0 LY |
2626 | { |
2627 | return -ENOTSUPP; | |
2628 | } | |
2629 | #endif | |
2630 | ||
fb4e98ab | 2631 | static int qe_udc_remove(struct platform_device *ofdev) |
3948f0e0 | 2632 | { |
dae8eadf | 2633 | struct qe_udc *udc = platform_get_drvdata(ofdev); |
3948f0e0 LY |
2634 | struct qe_ep *ep; |
2635 | unsigned int size; | |
9f56ce07 | 2636 | DECLARE_COMPLETION_ONSTACK(done); |
3948f0e0 | 2637 | |
d77c1198 | 2638 | usb_del_gadget_udc(&udc->gadget); |
0f91349b | 2639 | |
d77c1198 SAS |
2640 | udc->done = &done; |
2641 | tasklet_disable(&udc->rx_tasklet); | |
3948f0e0 | 2642 | |
d77c1198 SAS |
2643 | if (udc->nullmap) { |
2644 | dma_unmap_single(udc->gadget.dev.parent, | |
2645 | udc->nullp, 256, | |
3948f0e0 | 2646 | DMA_TO_DEVICE); |
d77c1198 | 2647 | udc->nullp = DMA_ADDR_INVALID; |
3948f0e0 | 2648 | } else { |
d77c1198 SAS |
2649 | dma_sync_single_for_cpu(udc->gadget.dev.parent, |
2650 | udc->nullp, 256, | |
3948f0e0 LY |
2651 | DMA_TO_DEVICE); |
2652 | } | |
3948f0e0 | 2653 | |
d77c1198 | 2654 | ep = &udc->eps[0]; |
3948f0e0 LY |
2655 | cpm_muram_free(cpm_muram_offset(ep->rxbase)); |
2656 | size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (USB_BDRING_LEN + 1); | |
2657 | ||
2658 | kfree(ep->rxframe); | |
2659 | if (ep->rxbufmap) { | |
d77c1198 | 2660 | dma_unmap_single(udc->gadget.dev.parent, |
3948f0e0 LY |
2661 | ep->rxbuf_d, size, |
2662 | DMA_FROM_DEVICE); | |
2663 | ep->rxbuf_d = DMA_ADDR_INVALID; | |
2664 | } else { | |
d77c1198 | 2665 | dma_sync_single_for_cpu(udc->gadget.dev.parent, |
3948f0e0 LY |
2666 | ep->rxbuf_d, size, |
2667 | DMA_FROM_DEVICE); | |
2668 | } | |
2669 | ||
2670 | kfree(ep->rxbuffer); | |
2671 | kfree(ep->txframe); | |
2672 | ||
d77c1198 SAS |
2673 | free_irq(udc->usb_irq, udc); |
2674 | irq_dispose_mapping(udc->usb_irq); | |
3948f0e0 | 2675 | |
d77c1198 | 2676 | tasklet_kill(&udc->rx_tasklet); |
3948f0e0 | 2677 | |
d77c1198 | 2678 | iounmap(udc->usb_regs); |
3948f0e0 | 2679 | |
3948f0e0 LY |
2680 | /* wait for release() of gadget.dev to free udc */ |
2681 | wait_for_completion(&done); | |
2682 | ||
2683 | return 0; | |
2684 | } | |
2685 | ||
2686 | /*-------------------------------------------------------------------------*/ | |
2f82686e | 2687 | static const struct of_device_id qe_udc_match[] = { |
04c4ab17 AV |
2688 | { |
2689 | .compatible = "fsl,mpc8323-qe-usb", | |
2690 | .data = (void *)PORT_QE, | |
2691 | }, | |
3948f0e0 LY |
2692 | { |
2693 | .compatible = "fsl,mpc8360-qe-usb", | |
2694 | .data = (void *)PORT_QE, | |
2695 | }, | |
2696 | { | |
2697 | .compatible = "fsl,mpc8272-cpm-usb", | |
2698 | .data = (void *)PORT_CPM, | |
2699 | }, | |
2700 | {}, | |
2701 | }; | |
2702 | ||
2703 | MODULE_DEVICE_TABLE(of, qe_udc_match); | |
2704 | ||
d35fb641 | 2705 | static struct platform_driver udc_driver = { |
4018294b | 2706 | .driver = { |
7de7174a | 2707 | .name = driver_name, |
4018294b GL |
2708 | .of_match_table = qe_udc_match, |
2709 | }, | |
3948f0e0 | 2710 | .probe = qe_udc_probe, |
7690417d | 2711 | .remove = qe_udc_remove, |
3948f0e0 LY |
2712 | #ifdef CONFIG_PM |
2713 | .suspend = qe_udc_suspend, | |
2714 | .resume = qe_udc_resume, | |
2715 | #endif | |
2716 | }; | |
2717 | ||
cc27c96c | 2718 | module_platform_driver(udc_driver); |
3948f0e0 LY |
2719 | |
2720 | MODULE_DESCRIPTION(DRIVER_DESC); | |
2721 | MODULE_AUTHOR(DRIVER_AUTHOR); | |
2722 | MODULE_LICENSE("GPL"); |