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5fd54ace | 1 | // SPDX-License-Identifier: GPL-2.0 |
b84a8dee YHC |
2 | /* |
3 | * FOTG210 UDC Driver supports Bulk transfer so far | |
4 | * | |
5 | * Copyright (C) 2013 Faraday Technology Corporation | |
6 | * | |
7 | * Author : Yuan-Hsin Chen <yhchen@faraday-tech.com> | |
b84a8dee YHC |
8 | */ |
9 | ||
10 | #include <linux/dma-mapping.h> | |
11 | #include <linux/err.h> | |
12 | #include <linux/interrupt.h> | |
13 | #include <linux/io.h> | |
14 | #include <linux/module.h> | |
15 | #include <linux/platform_device.h> | |
16 | #include <linux/usb/ch9.h> | |
17 | #include <linux/usb/gadget.h> | |
18 | ||
19 | #include "fotg210.h" | |
20 | ||
21 | #define DRIVER_DESC "FOTG210 USB Device Controller Driver" | |
22 | #define DRIVER_VERSION "30-April-2013" | |
23 | ||
24 | static const char udc_name[] = "fotg210_udc"; | |
25 | static const char * const fotg210_ep_name[] = { | |
26 | "ep0", "ep1", "ep2", "ep3", "ep4"}; | |
27 | ||
28 | static void fotg210_disable_fifo_int(struct fotg210_ep *ep) | |
29 | { | |
30 | u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR1); | |
31 | ||
32 | if (ep->dir_in) | |
33 | value |= DMISGR1_MF_IN_INT(ep->epnum - 1); | |
34 | else | |
35 | value |= DMISGR1_MF_OUTSPK_INT(ep->epnum - 1); | |
36 | iowrite32(value, ep->fotg210->reg + FOTG210_DMISGR1); | |
37 | } | |
38 | ||
39 | static void fotg210_enable_fifo_int(struct fotg210_ep *ep) | |
40 | { | |
41 | u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR1); | |
42 | ||
43 | if (ep->dir_in) | |
44 | value &= ~DMISGR1_MF_IN_INT(ep->epnum - 1); | |
45 | else | |
46 | value &= ~DMISGR1_MF_OUTSPK_INT(ep->epnum - 1); | |
47 | iowrite32(value, ep->fotg210->reg + FOTG210_DMISGR1); | |
48 | } | |
49 | ||
50 | static void fotg210_set_cxdone(struct fotg210_udc *fotg210) | |
51 | { | |
52 | u32 value = ioread32(fotg210->reg + FOTG210_DCFESR); | |
53 | ||
54 | value |= DCFESR_CX_DONE; | |
55 | iowrite32(value, fotg210->reg + FOTG210_DCFESR); | |
56 | } | |
57 | ||
58 | static void fotg210_done(struct fotg210_ep *ep, struct fotg210_request *req, | |
59 | int status) | |
60 | { | |
61 | list_del_init(&req->queue); | |
62 | ||
63 | /* don't modify queue heads during completion callback */ | |
64 | if (ep->fotg210->gadget.speed == USB_SPEED_UNKNOWN) | |
65 | req->req.status = -ESHUTDOWN; | |
66 | else | |
67 | req->req.status = status; | |
68 | ||
69 | spin_unlock(&ep->fotg210->lock); | |
304f7e5e | 70 | usb_gadget_giveback_request(&ep->ep, &req->req); |
b84a8dee YHC |
71 | spin_lock(&ep->fotg210->lock); |
72 | ||
73 | if (ep->epnum) { | |
74 | if (list_empty(&ep->queue)) | |
75 | fotg210_disable_fifo_int(ep); | |
76 | } else { | |
77 | fotg210_set_cxdone(ep->fotg210); | |
78 | } | |
79 | } | |
80 | ||
81 | static void fotg210_fifo_ep_mapping(struct fotg210_ep *ep, u32 epnum, | |
82 | u32 dir_in) | |
83 | { | |
84 | struct fotg210_udc *fotg210 = ep->fotg210; | |
85 | u32 val; | |
86 | ||
87 | /* Driver should map an ep to a fifo and then map the fifo | |
88 | * to the ep. What a brain-damaged design! | |
89 | */ | |
90 | ||
91 | /* map a fifo to an ep */ | |
92 | val = ioread32(fotg210->reg + FOTG210_EPMAP); | |
93 | val &= ~EPMAP_FIFONOMSK(epnum, dir_in); | |
94 | val |= EPMAP_FIFONO(epnum, dir_in); | |
95 | iowrite32(val, fotg210->reg + FOTG210_EPMAP); | |
96 | ||
97 | /* map the ep to the fifo */ | |
98 | val = ioread32(fotg210->reg + FOTG210_FIFOMAP); | |
99 | val &= ~FIFOMAP_EPNOMSK(epnum); | |
100 | val |= FIFOMAP_EPNO(epnum); | |
101 | iowrite32(val, fotg210->reg + FOTG210_FIFOMAP); | |
102 | ||
103 | /* enable fifo */ | |
104 | val = ioread32(fotg210->reg + FOTG210_FIFOCF); | |
105 | val |= FIFOCF_FIFO_EN(epnum - 1); | |
106 | iowrite32(val, fotg210->reg + FOTG210_FIFOCF); | |
107 | } | |
108 | ||
109 | static void fotg210_set_fifo_dir(struct fotg210_ep *ep, u32 epnum, u32 dir_in) | |
110 | { | |
111 | struct fotg210_udc *fotg210 = ep->fotg210; | |
112 | u32 val; | |
113 | ||
114 | val = ioread32(fotg210->reg + FOTG210_FIFOMAP); | |
115 | val |= (dir_in ? FIFOMAP_DIRIN(epnum - 1) : FIFOMAP_DIROUT(epnum - 1)); | |
116 | iowrite32(val, fotg210->reg + FOTG210_FIFOMAP); | |
117 | } | |
118 | ||
119 | static void fotg210_set_tfrtype(struct fotg210_ep *ep, u32 epnum, u32 type) | |
120 | { | |
121 | struct fotg210_udc *fotg210 = ep->fotg210; | |
122 | u32 val; | |
123 | ||
124 | val = ioread32(fotg210->reg + FOTG210_FIFOCF); | |
125 | val |= FIFOCF_TYPE(type, epnum - 1); | |
126 | iowrite32(val, fotg210->reg + FOTG210_FIFOCF); | |
127 | } | |
128 | ||
129 | static void fotg210_set_mps(struct fotg210_ep *ep, u32 epnum, u32 mps, | |
130 | u32 dir_in) | |
131 | { | |
132 | struct fotg210_udc *fotg210 = ep->fotg210; | |
133 | u32 val; | |
134 | u32 offset = dir_in ? FOTG210_INEPMPSR(epnum) : | |
135 | FOTG210_OUTEPMPSR(epnum); | |
136 | ||
137 | val = ioread32(fotg210->reg + offset); | |
138 | val |= INOUTEPMPSR_MPS(mps); | |
139 | iowrite32(val, fotg210->reg + offset); | |
140 | } | |
141 | ||
142 | static int fotg210_config_ep(struct fotg210_ep *ep, | |
143 | const struct usb_endpoint_descriptor *desc) | |
144 | { | |
145 | struct fotg210_udc *fotg210 = ep->fotg210; | |
146 | ||
147 | fotg210_set_fifo_dir(ep, ep->epnum, ep->dir_in); | |
148 | fotg210_set_tfrtype(ep, ep->epnum, ep->type); | |
149 | fotg210_set_mps(ep, ep->epnum, ep->ep.maxpacket, ep->dir_in); | |
150 | fotg210_fifo_ep_mapping(ep, ep->epnum, ep->dir_in); | |
151 | ||
152 | fotg210->ep[ep->epnum] = ep; | |
153 | ||
154 | return 0; | |
155 | } | |
156 | ||
157 | static int fotg210_ep_enable(struct usb_ep *_ep, | |
158 | const struct usb_endpoint_descriptor *desc) | |
159 | { | |
160 | struct fotg210_ep *ep; | |
161 | ||
162 | ep = container_of(_ep, struct fotg210_ep, ep); | |
163 | ||
164 | ep->desc = desc; | |
165 | ep->epnum = usb_endpoint_num(desc); | |
166 | ep->type = usb_endpoint_type(desc); | |
167 | ep->dir_in = usb_endpoint_dir_in(desc); | |
168 | ep->ep.maxpacket = usb_endpoint_maxp(desc); | |
169 | ||
170 | return fotg210_config_ep(ep, desc); | |
171 | } | |
172 | ||
173 | static void fotg210_reset_tseq(struct fotg210_udc *fotg210, u8 epnum) | |
174 | { | |
175 | struct fotg210_ep *ep = fotg210->ep[epnum]; | |
176 | u32 value; | |
177 | void __iomem *reg; | |
178 | ||
179 | reg = (ep->dir_in) ? | |
180 | fotg210->reg + FOTG210_INEPMPSR(epnum) : | |
181 | fotg210->reg + FOTG210_OUTEPMPSR(epnum); | |
182 | ||
183 | /* Note: Driver needs to set and clear INOUTEPMPSR_RESET_TSEQ | |
184 | * bit. Controller wouldn't clear this bit. WTF!!! | |
185 | */ | |
186 | ||
187 | value = ioread32(reg); | |
188 | value |= INOUTEPMPSR_RESET_TSEQ; | |
189 | iowrite32(value, reg); | |
190 | ||
191 | value = ioread32(reg); | |
192 | value &= ~INOUTEPMPSR_RESET_TSEQ; | |
193 | iowrite32(value, reg); | |
194 | } | |
195 | ||
196 | static int fotg210_ep_release(struct fotg210_ep *ep) | |
197 | { | |
198 | if (!ep->epnum) | |
199 | return 0; | |
200 | ep->epnum = 0; | |
201 | ep->stall = 0; | |
202 | ep->wedged = 0; | |
203 | ||
204 | fotg210_reset_tseq(ep->fotg210, ep->epnum); | |
205 | ||
206 | return 0; | |
207 | } | |
208 | ||
209 | static int fotg210_ep_disable(struct usb_ep *_ep) | |
210 | { | |
211 | struct fotg210_ep *ep; | |
212 | struct fotg210_request *req; | |
213 | unsigned long flags; | |
214 | ||
215 | BUG_ON(!_ep); | |
216 | ||
217 | ep = container_of(_ep, struct fotg210_ep, ep); | |
218 | ||
219 | while (!list_empty(&ep->queue)) { | |
220 | req = list_entry(ep->queue.next, | |
221 | struct fotg210_request, queue); | |
222 | spin_lock_irqsave(&ep->fotg210->lock, flags); | |
223 | fotg210_done(ep, req, -ECONNRESET); | |
224 | spin_unlock_irqrestore(&ep->fotg210->lock, flags); | |
225 | } | |
226 | ||
227 | return fotg210_ep_release(ep); | |
228 | } | |
229 | ||
230 | static struct usb_request *fotg210_ep_alloc_request(struct usb_ep *_ep, | |
231 | gfp_t gfp_flags) | |
232 | { | |
233 | struct fotg210_request *req; | |
234 | ||
235 | req = kzalloc(sizeof(struct fotg210_request), gfp_flags); | |
236 | if (!req) | |
237 | return NULL; | |
238 | ||
239 | INIT_LIST_HEAD(&req->queue); | |
240 | ||
241 | return &req->req; | |
242 | } | |
243 | ||
244 | static void fotg210_ep_free_request(struct usb_ep *_ep, | |
245 | struct usb_request *_req) | |
246 | { | |
247 | struct fotg210_request *req; | |
248 | ||
249 | req = container_of(_req, struct fotg210_request, req); | |
250 | kfree(req); | |
251 | } | |
252 | ||
253 | static void fotg210_enable_dma(struct fotg210_ep *ep, | |
254 | dma_addr_t d, u32 len) | |
255 | { | |
256 | u32 value; | |
257 | struct fotg210_udc *fotg210 = ep->fotg210; | |
258 | ||
259 | /* set transfer length and direction */ | |
260 | value = ioread32(fotg210->reg + FOTG210_DMACPSR1); | |
261 | value &= ~(DMACPSR1_DMA_LEN(0xFFFF) | DMACPSR1_DMA_TYPE(1)); | |
262 | value |= DMACPSR1_DMA_LEN(len) | DMACPSR1_DMA_TYPE(ep->dir_in); | |
263 | iowrite32(value, fotg210->reg + FOTG210_DMACPSR1); | |
264 | ||
265 | /* set device DMA target FIFO number */ | |
266 | value = ioread32(fotg210->reg + FOTG210_DMATFNR); | |
267 | if (ep->epnum) | |
268 | value |= DMATFNR_ACC_FN(ep->epnum - 1); | |
269 | else | |
270 | value |= DMATFNR_ACC_CXF; | |
271 | iowrite32(value, fotg210->reg + FOTG210_DMATFNR); | |
272 | ||
273 | /* set DMA memory address */ | |
274 | iowrite32(d, fotg210->reg + FOTG210_DMACPSR2); | |
275 | ||
276 | /* enable MDMA_EROR and MDMA_CMPLT interrupt */ | |
277 | value = ioread32(fotg210->reg + FOTG210_DMISGR2); | |
278 | value &= ~(DMISGR2_MDMA_CMPLT | DMISGR2_MDMA_ERROR); | |
279 | iowrite32(value, fotg210->reg + FOTG210_DMISGR2); | |
280 | ||
281 | /* start DMA */ | |
282 | value = ioread32(fotg210->reg + FOTG210_DMACPSR1); | |
283 | value |= DMACPSR1_DMA_START; | |
284 | iowrite32(value, fotg210->reg + FOTG210_DMACPSR1); | |
285 | } | |
286 | ||
287 | static void fotg210_disable_dma(struct fotg210_ep *ep) | |
288 | { | |
289 | iowrite32(DMATFNR_DISDMA, ep->fotg210->reg + FOTG210_DMATFNR); | |
290 | } | |
291 | ||
292 | static void fotg210_wait_dma_done(struct fotg210_ep *ep) | |
293 | { | |
294 | u32 value; | |
295 | ||
296 | do { | |
297 | value = ioread32(ep->fotg210->reg + FOTG210_DISGR2); | |
298 | if ((value & DISGR2_USBRST_INT) || | |
299 | (value & DISGR2_DMA_ERROR)) | |
300 | goto dma_reset; | |
301 | } while (!(value & DISGR2_DMA_CMPLT)); | |
302 | ||
303 | value &= ~DISGR2_DMA_CMPLT; | |
304 | iowrite32(value, ep->fotg210->reg + FOTG210_DISGR2); | |
305 | return; | |
306 | ||
307 | dma_reset: | |
308 | value = ioread32(ep->fotg210->reg + FOTG210_DMACPSR1); | |
309 | value |= DMACPSR1_DMA_ABORT; | |
310 | iowrite32(value, ep->fotg210->reg + FOTG210_DMACPSR1); | |
311 | ||
312 | /* reset fifo */ | |
313 | if (ep->epnum) { | |
314 | value = ioread32(ep->fotg210->reg + | |
315 | FOTG210_FIBCR(ep->epnum - 1)); | |
316 | value |= FIBCR_FFRST; | |
317 | iowrite32(value, ep->fotg210->reg + | |
318 | FOTG210_FIBCR(ep->epnum - 1)); | |
319 | } else { | |
320 | value = ioread32(ep->fotg210->reg + FOTG210_DCFESR); | |
321 | value |= DCFESR_CX_CLR; | |
322 | iowrite32(value, ep->fotg210->reg + FOTG210_DCFESR); | |
323 | } | |
324 | } | |
325 | ||
326 | static void fotg210_start_dma(struct fotg210_ep *ep, | |
327 | struct fotg210_request *req) | |
328 | { | |
e26bdb01 | 329 | struct device *dev = &ep->fotg210->gadget.dev; |
b84a8dee YHC |
330 | dma_addr_t d; |
331 | u8 *buffer; | |
332 | u32 length; | |
333 | ||
334 | if (ep->epnum) { | |
335 | if (ep->dir_in) { | |
336 | buffer = req->req.buf; | |
337 | length = req->req.length; | |
338 | } else { | |
339 | buffer = req->req.buf + req->req.actual; | |
340 | length = ioread32(ep->fotg210->reg + | |
341 | FOTG210_FIBCR(ep->epnum - 1)); | |
342 | length &= FIBCR_BCFX; | |
343 | } | |
344 | } else { | |
345 | buffer = req->req.buf + req->req.actual; | |
346 | if (req->req.length - req->req.actual > ep->ep.maxpacket) | |
347 | length = ep->ep.maxpacket; | |
348 | else | |
349 | length = req->req.length; | |
350 | } | |
351 | ||
e26bdb01 | 352 | d = dma_map_single(dev, buffer, length, |
b84a8dee YHC |
353 | ep->dir_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE); |
354 | ||
e26bdb01 | 355 | if (dma_mapping_error(dev, d)) { |
b84a8dee YHC |
356 | pr_err("dma_mapping_error\n"); |
357 | return; | |
358 | } | |
359 | ||
b84a8dee YHC |
360 | fotg210_enable_dma(ep, d, length); |
361 | ||
362 | /* check if dma is done */ | |
363 | fotg210_wait_dma_done(ep); | |
364 | ||
365 | fotg210_disable_dma(ep); | |
366 | ||
367 | /* update actual transfer length */ | |
368 | req->req.actual += length; | |
369 | ||
e26bdb01 | 370 | dma_unmap_single(dev, d, length, DMA_TO_DEVICE); |
b84a8dee YHC |
371 | } |
372 | ||
373 | static void fotg210_ep0_queue(struct fotg210_ep *ep, | |
374 | struct fotg210_request *req) | |
375 | { | |
376 | if (!req->req.length) { | |
377 | fotg210_done(ep, req, 0); | |
378 | return; | |
379 | } | |
380 | if (ep->dir_in) { /* if IN */ | |
1c99cabf | 381 | fotg210_start_dma(ep, req); |
b84a8dee YHC |
382 | if ((req->req.length == req->req.actual) || |
383 | (req->req.actual < ep->ep.maxpacket)) | |
384 | fotg210_done(ep, req, 0); | |
385 | } else { /* OUT */ | |
1c99cabf | 386 | u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR0); |
b84a8dee | 387 | |
1c99cabf DC |
388 | value &= ~DMISGR0_MCX_OUT_INT; |
389 | iowrite32(value, ep->fotg210->reg + FOTG210_DMISGR0); | |
b84a8dee YHC |
390 | } |
391 | } | |
392 | ||
393 | static int fotg210_ep_queue(struct usb_ep *_ep, struct usb_request *_req, | |
394 | gfp_t gfp_flags) | |
395 | { | |
396 | struct fotg210_ep *ep; | |
397 | struct fotg210_request *req; | |
398 | unsigned long flags; | |
399 | int request = 0; | |
400 | ||
401 | ep = container_of(_ep, struct fotg210_ep, ep); | |
402 | req = container_of(_req, struct fotg210_request, req); | |
403 | ||
404 | if (ep->fotg210->gadget.speed == USB_SPEED_UNKNOWN) | |
405 | return -ESHUTDOWN; | |
406 | ||
407 | spin_lock_irqsave(&ep->fotg210->lock, flags); | |
408 | ||
409 | if (list_empty(&ep->queue)) | |
410 | request = 1; | |
411 | ||
412 | list_add_tail(&req->queue, &ep->queue); | |
413 | ||
414 | req->req.actual = 0; | |
415 | req->req.status = -EINPROGRESS; | |
416 | ||
417 | if (!ep->epnum) /* ep0 */ | |
418 | fotg210_ep0_queue(ep, req); | |
419 | else if (request && !ep->stall) | |
420 | fotg210_enable_fifo_int(ep); | |
421 | ||
422 | spin_unlock_irqrestore(&ep->fotg210->lock, flags); | |
423 | ||
424 | return 0; | |
425 | } | |
426 | ||
427 | static int fotg210_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) | |
428 | { | |
429 | struct fotg210_ep *ep; | |
430 | struct fotg210_request *req; | |
431 | unsigned long flags; | |
432 | ||
433 | ep = container_of(_ep, struct fotg210_ep, ep); | |
434 | req = container_of(_req, struct fotg210_request, req); | |
435 | ||
436 | spin_lock_irqsave(&ep->fotg210->lock, flags); | |
437 | if (!list_empty(&ep->queue)) | |
438 | fotg210_done(ep, req, -ECONNRESET); | |
439 | spin_unlock_irqrestore(&ep->fotg210->lock, flags); | |
440 | ||
441 | return 0; | |
442 | } | |
443 | ||
444 | static void fotg210_set_epnstall(struct fotg210_ep *ep) | |
445 | { | |
446 | struct fotg210_udc *fotg210 = ep->fotg210; | |
447 | u32 value; | |
448 | void __iomem *reg; | |
449 | ||
450 | /* check if IN FIFO is empty before stall */ | |
451 | if (ep->dir_in) { | |
452 | do { | |
453 | value = ioread32(fotg210->reg + FOTG210_DCFESR); | |
454 | } while (!(value & DCFESR_FIFO_EMPTY(ep->epnum - 1))); | |
455 | } | |
456 | ||
457 | reg = (ep->dir_in) ? | |
458 | fotg210->reg + FOTG210_INEPMPSR(ep->epnum) : | |
459 | fotg210->reg + FOTG210_OUTEPMPSR(ep->epnum); | |
460 | value = ioread32(reg); | |
461 | value |= INOUTEPMPSR_STL_EP; | |
462 | iowrite32(value, reg); | |
463 | } | |
464 | ||
465 | static void fotg210_clear_epnstall(struct fotg210_ep *ep) | |
466 | { | |
467 | struct fotg210_udc *fotg210 = ep->fotg210; | |
468 | u32 value; | |
469 | void __iomem *reg; | |
470 | ||
471 | reg = (ep->dir_in) ? | |
472 | fotg210->reg + FOTG210_INEPMPSR(ep->epnum) : | |
473 | fotg210->reg + FOTG210_OUTEPMPSR(ep->epnum); | |
474 | value = ioread32(reg); | |
475 | value &= ~INOUTEPMPSR_STL_EP; | |
476 | iowrite32(value, reg); | |
477 | } | |
478 | ||
479 | static int fotg210_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedge) | |
480 | { | |
481 | struct fotg210_ep *ep; | |
482 | struct fotg210_udc *fotg210; | |
483 | unsigned long flags; | |
b84a8dee YHC |
484 | |
485 | ep = container_of(_ep, struct fotg210_ep, ep); | |
486 | ||
487 | fotg210 = ep->fotg210; | |
488 | ||
489 | spin_lock_irqsave(&ep->fotg210->lock, flags); | |
490 | ||
491 | if (value) { | |
492 | fotg210_set_epnstall(ep); | |
493 | ep->stall = 1; | |
494 | if (wedge) | |
495 | ep->wedged = 1; | |
496 | } else { | |
497 | fotg210_reset_tseq(fotg210, ep->epnum); | |
498 | fotg210_clear_epnstall(ep); | |
499 | ep->stall = 0; | |
500 | ep->wedged = 0; | |
501 | if (!list_empty(&ep->queue)) | |
502 | fotg210_enable_fifo_int(ep); | |
503 | } | |
504 | ||
505 | spin_unlock_irqrestore(&ep->fotg210->lock, flags); | |
811e5c3d | 506 | return 0; |
b84a8dee YHC |
507 | } |
508 | ||
509 | static int fotg210_ep_set_halt(struct usb_ep *_ep, int value) | |
510 | { | |
511 | return fotg210_set_halt_and_wedge(_ep, value, 0); | |
512 | } | |
513 | ||
514 | static int fotg210_ep_set_wedge(struct usb_ep *_ep) | |
515 | { | |
516 | return fotg210_set_halt_and_wedge(_ep, 1, 1); | |
517 | } | |
518 | ||
519 | static void fotg210_ep_fifo_flush(struct usb_ep *_ep) | |
520 | { | |
521 | } | |
522 | ||
977ac789 | 523 | static const struct usb_ep_ops fotg210_ep_ops = { |
b84a8dee YHC |
524 | .enable = fotg210_ep_enable, |
525 | .disable = fotg210_ep_disable, | |
526 | ||
527 | .alloc_request = fotg210_ep_alloc_request, | |
528 | .free_request = fotg210_ep_free_request, | |
529 | ||
530 | .queue = fotg210_ep_queue, | |
531 | .dequeue = fotg210_ep_dequeue, | |
532 | ||
533 | .set_halt = fotg210_ep_set_halt, | |
534 | .fifo_flush = fotg210_ep_fifo_flush, | |
535 | .set_wedge = fotg210_ep_set_wedge, | |
536 | }; | |
537 | ||
538 | static void fotg210_clear_tx0byte(struct fotg210_udc *fotg210) | |
539 | { | |
540 | u32 value = ioread32(fotg210->reg + FOTG210_TX0BYTE); | |
541 | ||
542 | value &= ~(TX0BYTE_EP1 | TX0BYTE_EP2 | TX0BYTE_EP3 | |
543 | | TX0BYTE_EP4); | |
544 | iowrite32(value, fotg210->reg + FOTG210_TX0BYTE); | |
545 | } | |
546 | ||
547 | static void fotg210_clear_rx0byte(struct fotg210_udc *fotg210) | |
548 | { | |
549 | u32 value = ioread32(fotg210->reg + FOTG210_RX0BYTE); | |
550 | ||
551 | value &= ~(RX0BYTE_EP1 | RX0BYTE_EP2 | RX0BYTE_EP3 | |
552 | | RX0BYTE_EP4); | |
553 | iowrite32(value, fotg210->reg + FOTG210_RX0BYTE); | |
554 | } | |
555 | ||
556 | /* read 8-byte setup packet only */ | |
557 | static void fotg210_rdsetupp(struct fotg210_udc *fotg210, | |
558 | u8 *buffer) | |
559 | { | |
560 | int i = 0; | |
561 | u8 *tmp = buffer; | |
562 | u32 data; | |
563 | u32 length = 8; | |
564 | ||
565 | iowrite32(DMATFNR_ACC_CXF, fotg210->reg + FOTG210_DMATFNR); | |
566 | ||
567 | for (i = (length >> 2); i > 0; i--) { | |
568 | data = ioread32(fotg210->reg + FOTG210_CXPORT); | |
569 | *tmp = data & 0xFF; | |
570 | *(tmp + 1) = (data >> 8) & 0xFF; | |
571 | *(tmp + 2) = (data >> 16) & 0xFF; | |
572 | *(tmp + 3) = (data >> 24) & 0xFF; | |
573 | tmp = tmp + 4; | |
574 | } | |
575 | ||
576 | switch (length % 4) { | |
577 | case 1: | |
578 | data = ioread32(fotg210->reg + FOTG210_CXPORT); | |
579 | *tmp = data & 0xFF; | |
580 | break; | |
581 | case 2: | |
582 | data = ioread32(fotg210->reg + FOTG210_CXPORT); | |
583 | *tmp = data & 0xFF; | |
584 | *(tmp + 1) = (data >> 8) & 0xFF; | |
585 | break; | |
586 | case 3: | |
587 | data = ioread32(fotg210->reg + FOTG210_CXPORT); | |
588 | *tmp = data & 0xFF; | |
589 | *(tmp + 1) = (data >> 8) & 0xFF; | |
590 | *(tmp + 2) = (data >> 16) & 0xFF; | |
591 | break; | |
592 | default: | |
593 | break; | |
594 | } | |
595 | ||
596 | iowrite32(DMATFNR_DISDMA, fotg210->reg + FOTG210_DMATFNR); | |
597 | } | |
598 | ||
599 | static void fotg210_set_configuration(struct fotg210_udc *fotg210) | |
600 | { | |
601 | u32 value = ioread32(fotg210->reg + FOTG210_DAR); | |
602 | ||
603 | value |= DAR_AFT_CONF; | |
604 | iowrite32(value, fotg210->reg + FOTG210_DAR); | |
605 | } | |
606 | ||
607 | static void fotg210_set_dev_addr(struct fotg210_udc *fotg210, u32 addr) | |
608 | { | |
609 | u32 value = ioread32(fotg210->reg + FOTG210_DAR); | |
610 | ||
611 | value |= (addr & 0x7F); | |
612 | iowrite32(value, fotg210->reg + FOTG210_DAR); | |
613 | } | |
614 | ||
615 | static void fotg210_set_cxstall(struct fotg210_udc *fotg210) | |
616 | { | |
617 | u32 value = ioread32(fotg210->reg + FOTG210_DCFESR); | |
618 | ||
619 | value |= DCFESR_CX_STL; | |
620 | iowrite32(value, fotg210->reg + FOTG210_DCFESR); | |
621 | } | |
622 | ||
623 | static void fotg210_request_error(struct fotg210_udc *fotg210) | |
624 | { | |
625 | fotg210_set_cxstall(fotg210); | |
626 | pr_err("request error!!\n"); | |
627 | } | |
628 | ||
629 | static void fotg210_set_address(struct fotg210_udc *fotg210, | |
630 | struct usb_ctrlrequest *ctrl) | |
631 | { | |
632 | if (ctrl->wValue >= 0x0100) { | |
633 | fotg210_request_error(fotg210); | |
634 | } else { | |
635 | fotg210_set_dev_addr(fotg210, ctrl->wValue); | |
636 | fotg210_set_cxdone(fotg210); | |
637 | } | |
638 | } | |
639 | ||
640 | static void fotg210_set_feature(struct fotg210_udc *fotg210, | |
641 | struct usb_ctrlrequest *ctrl) | |
642 | { | |
643 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | |
644 | case USB_RECIP_DEVICE: | |
645 | fotg210_set_cxdone(fotg210); | |
646 | break; | |
647 | case USB_RECIP_INTERFACE: | |
648 | fotg210_set_cxdone(fotg210); | |
649 | break; | |
650 | case USB_RECIP_ENDPOINT: { | |
651 | u8 epnum; | |
652 | epnum = le16_to_cpu(ctrl->wIndex) & USB_ENDPOINT_NUMBER_MASK; | |
653 | if (epnum) | |
654 | fotg210_set_epnstall(fotg210->ep[epnum]); | |
655 | else | |
656 | fotg210_set_cxstall(fotg210); | |
657 | fotg210_set_cxdone(fotg210); | |
658 | } | |
659 | break; | |
660 | default: | |
661 | fotg210_request_error(fotg210); | |
662 | break; | |
663 | } | |
664 | } | |
665 | ||
666 | static void fotg210_clear_feature(struct fotg210_udc *fotg210, | |
667 | struct usb_ctrlrequest *ctrl) | |
668 | { | |
669 | struct fotg210_ep *ep = | |
670 | fotg210->ep[ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK]; | |
671 | ||
672 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | |
673 | case USB_RECIP_DEVICE: | |
674 | fotg210_set_cxdone(fotg210); | |
675 | break; | |
676 | case USB_RECIP_INTERFACE: | |
677 | fotg210_set_cxdone(fotg210); | |
678 | break; | |
679 | case USB_RECIP_ENDPOINT: | |
680 | if (ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK) { | |
681 | if (ep->wedged) { | |
682 | fotg210_set_cxdone(fotg210); | |
683 | break; | |
684 | } | |
685 | if (ep->stall) | |
686 | fotg210_set_halt_and_wedge(&ep->ep, 0, 0); | |
687 | } | |
688 | fotg210_set_cxdone(fotg210); | |
689 | break; | |
690 | default: | |
691 | fotg210_request_error(fotg210); | |
692 | break; | |
693 | } | |
694 | } | |
695 | ||
696 | static int fotg210_is_epnstall(struct fotg210_ep *ep) | |
697 | { | |
698 | struct fotg210_udc *fotg210 = ep->fotg210; | |
699 | u32 value; | |
700 | void __iomem *reg; | |
701 | ||
702 | reg = (ep->dir_in) ? | |
703 | fotg210->reg + FOTG210_INEPMPSR(ep->epnum) : | |
704 | fotg210->reg + FOTG210_OUTEPMPSR(ep->epnum); | |
705 | value = ioread32(reg); | |
706 | return value & INOUTEPMPSR_STL_EP ? 1 : 0; | |
707 | } | |
708 | ||
709 | static void fotg210_get_status(struct fotg210_udc *fotg210, | |
710 | struct usb_ctrlrequest *ctrl) | |
711 | { | |
712 | u8 epnum; | |
713 | ||
714 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | |
715 | case USB_RECIP_DEVICE: | |
716 | fotg210->ep0_data = 1 << USB_DEVICE_SELF_POWERED; | |
717 | break; | |
718 | case USB_RECIP_INTERFACE: | |
719 | fotg210->ep0_data = 0; | |
720 | break; | |
721 | case USB_RECIP_ENDPOINT: | |
722 | epnum = ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK; | |
723 | if (epnum) | |
724 | fotg210->ep0_data = | |
725 | fotg210_is_epnstall(fotg210->ep[epnum]) | |
726 | << USB_ENDPOINT_HALT; | |
727 | else | |
728 | fotg210_request_error(fotg210); | |
729 | break; | |
730 | ||
731 | default: | |
732 | fotg210_request_error(fotg210); | |
733 | return; /* exit */ | |
734 | } | |
735 | ||
736 | fotg210->ep0_req->buf = &fotg210->ep0_data; | |
737 | fotg210->ep0_req->length = 2; | |
738 | ||
739 | spin_unlock(&fotg210->lock); | |
2337a77c | 740 | fotg210_ep_queue(fotg210->gadget.ep0, fotg210->ep0_req, GFP_ATOMIC); |
b84a8dee YHC |
741 | spin_lock(&fotg210->lock); |
742 | } | |
743 | ||
744 | static int fotg210_setup_packet(struct fotg210_udc *fotg210, | |
745 | struct usb_ctrlrequest *ctrl) | |
746 | { | |
747 | u8 *p = (u8 *)ctrl; | |
748 | u8 ret = 0; | |
749 | ||
750 | fotg210_rdsetupp(fotg210, p); | |
751 | ||
752 | fotg210->ep[0]->dir_in = ctrl->bRequestType & USB_DIR_IN; | |
753 | ||
754 | if (fotg210->gadget.speed == USB_SPEED_UNKNOWN) { | |
755 | u32 value = ioread32(fotg210->reg + FOTG210_DMCR); | |
756 | fotg210->gadget.speed = value & DMCR_HS_EN ? | |
757 | USB_SPEED_HIGH : USB_SPEED_FULL; | |
758 | } | |
759 | ||
760 | /* check request */ | |
761 | if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) { | |
762 | switch (ctrl->bRequest) { | |
763 | case USB_REQ_GET_STATUS: | |
764 | fotg210_get_status(fotg210, ctrl); | |
765 | break; | |
766 | case USB_REQ_CLEAR_FEATURE: | |
767 | fotg210_clear_feature(fotg210, ctrl); | |
768 | break; | |
769 | case USB_REQ_SET_FEATURE: | |
770 | fotg210_set_feature(fotg210, ctrl); | |
771 | break; | |
772 | case USB_REQ_SET_ADDRESS: | |
773 | fotg210_set_address(fotg210, ctrl); | |
774 | break; | |
775 | case USB_REQ_SET_CONFIGURATION: | |
776 | fotg210_set_configuration(fotg210); | |
777 | ret = 1; | |
778 | break; | |
779 | default: | |
780 | ret = 1; | |
781 | break; | |
782 | } | |
783 | } else { | |
784 | ret = 1; | |
785 | } | |
786 | ||
787 | return ret; | |
788 | } | |
789 | ||
790 | static void fotg210_ep0out(struct fotg210_udc *fotg210) | |
791 | { | |
792 | struct fotg210_ep *ep = fotg210->ep[0]; | |
793 | ||
794 | if (!list_empty(&ep->queue) && !ep->dir_in) { | |
795 | struct fotg210_request *req; | |
796 | ||
797 | req = list_first_entry(&ep->queue, | |
798 | struct fotg210_request, queue); | |
799 | ||
800 | if (req->req.length) | |
801 | fotg210_start_dma(ep, req); | |
802 | ||
803 | if ((req->req.length - req->req.actual) < ep->ep.maxpacket) | |
804 | fotg210_done(ep, req, 0); | |
805 | } else { | |
806 | pr_err("%s : empty queue\n", __func__); | |
807 | } | |
808 | } | |
809 | ||
810 | static void fotg210_ep0in(struct fotg210_udc *fotg210) | |
811 | { | |
812 | struct fotg210_ep *ep = fotg210->ep[0]; | |
813 | ||
814 | if ((!list_empty(&ep->queue)) && (ep->dir_in)) { | |
815 | struct fotg210_request *req; | |
816 | ||
817 | req = list_entry(ep->queue.next, | |
818 | struct fotg210_request, queue); | |
819 | ||
820 | if (req->req.length) | |
821 | fotg210_start_dma(ep, req); | |
822 | ||
823 | if ((req->req.length - req->req.actual) < ep->ep.maxpacket) | |
824 | fotg210_done(ep, req, 0); | |
825 | } else { | |
826 | fotg210_set_cxdone(fotg210); | |
827 | } | |
828 | } | |
829 | ||
830 | static void fotg210_clear_comabt_int(struct fotg210_udc *fotg210) | |
831 | { | |
832 | u32 value = ioread32(fotg210->reg + FOTG210_DISGR0); | |
833 | ||
834 | value &= ~DISGR0_CX_COMABT_INT; | |
835 | iowrite32(value, fotg210->reg + FOTG210_DISGR0); | |
836 | } | |
837 | ||
838 | static void fotg210_in_fifo_handler(struct fotg210_ep *ep) | |
839 | { | |
840 | struct fotg210_request *req = list_entry(ep->queue.next, | |
841 | struct fotg210_request, queue); | |
842 | ||
843 | if (req->req.length) | |
844 | fotg210_start_dma(ep, req); | |
845 | fotg210_done(ep, req, 0); | |
846 | } | |
847 | ||
848 | static void fotg210_out_fifo_handler(struct fotg210_ep *ep) | |
849 | { | |
850 | struct fotg210_request *req = list_entry(ep->queue.next, | |
851 | struct fotg210_request, queue); | |
852 | ||
853 | fotg210_start_dma(ep, req); | |
854 | ||
855 | /* finish out transfer */ | |
856 | if (req->req.length == req->req.actual || | |
857 | req->req.actual < ep->ep.maxpacket) | |
858 | fotg210_done(ep, req, 0); | |
859 | } | |
860 | ||
861 | static irqreturn_t fotg210_irq(int irq, void *_fotg210) | |
862 | { | |
863 | struct fotg210_udc *fotg210 = _fotg210; | |
864 | u32 int_grp = ioread32(fotg210->reg + FOTG210_DIGR); | |
865 | u32 int_msk = ioread32(fotg210->reg + FOTG210_DMIGR); | |
866 | ||
867 | int_grp &= ~int_msk; | |
868 | ||
869 | spin_lock(&fotg210->lock); | |
870 | ||
871 | if (int_grp & DIGR_INT_G2) { | |
872 | void __iomem *reg = fotg210->reg + FOTG210_DISGR2; | |
873 | u32 int_grp2 = ioread32(reg); | |
874 | u32 int_msk2 = ioread32(fotg210->reg + FOTG210_DMISGR2); | |
875 | u32 value; | |
876 | ||
877 | int_grp2 &= ~int_msk2; | |
878 | ||
879 | if (int_grp2 & DISGR2_USBRST_INT) { | |
880 | value = ioread32(reg); | |
881 | value &= ~DISGR2_USBRST_INT; | |
882 | iowrite32(value, reg); | |
883 | pr_info("fotg210 udc reset\n"); | |
884 | } | |
885 | if (int_grp2 & DISGR2_SUSP_INT) { | |
886 | value = ioread32(reg); | |
887 | value &= ~DISGR2_SUSP_INT; | |
888 | iowrite32(value, reg); | |
889 | pr_info("fotg210 udc suspend\n"); | |
890 | } | |
891 | if (int_grp2 & DISGR2_RESM_INT) { | |
892 | value = ioread32(reg); | |
893 | value &= ~DISGR2_RESM_INT; | |
894 | iowrite32(value, reg); | |
895 | pr_info("fotg210 udc resume\n"); | |
896 | } | |
897 | if (int_grp2 & DISGR2_ISO_SEQ_ERR_INT) { | |
898 | value = ioread32(reg); | |
899 | value &= ~DISGR2_ISO_SEQ_ERR_INT; | |
900 | iowrite32(value, reg); | |
901 | pr_info("fotg210 iso sequence error\n"); | |
902 | } | |
903 | if (int_grp2 & DISGR2_ISO_SEQ_ABORT_INT) { | |
904 | value = ioread32(reg); | |
905 | value &= ~DISGR2_ISO_SEQ_ABORT_INT; | |
906 | iowrite32(value, reg); | |
907 | pr_info("fotg210 iso sequence abort\n"); | |
908 | } | |
909 | if (int_grp2 & DISGR2_TX0BYTE_INT) { | |
910 | fotg210_clear_tx0byte(fotg210); | |
911 | value = ioread32(reg); | |
912 | value &= ~DISGR2_TX0BYTE_INT; | |
913 | iowrite32(value, reg); | |
914 | pr_info("fotg210 transferred 0 byte\n"); | |
915 | } | |
916 | if (int_grp2 & DISGR2_RX0BYTE_INT) { | |
917 | fotg210_clear_rx0byte(fotg210); | |
918 | value = ioread32(reg); | |
919 | value &= ~DISGR2_RX0BYTE_INT; | |
920 | iowrite32(value, reg); | |
921 | pr_info("fotg210 received 0 byte\n"); | |
922 | } | |
923 | if (int_grp2 & DISGR2_DMA_ERROR) { | |
924 | value = ioread32(reg); | |
925 | value &= ~DISGR2_DMA_ERROR; | |
926 | iowrite32(value, reg); | |
927 | } | |
928 | } | |
929 | ||
930 | if (int_grp & DIGR_INT_G0) { | |
931 | void __iomem *reg = fotg210->reg + FOTG210_DISGR0; | |
932 | u32 int_grp0 = ioread32(reg); | |
933 | u32 int_msk0 = ioread32(fotg210->reg + FOTG210_DMISGR0); | |
934 | struct usb_ctrlrequest ctrl; | |
935 | ||
936 | int_grp0 &= ~int_msk0; | |
937 | ||
938 | /* the highest priority in this source register */ | |
939 | if (int_grp0 & DISGR0_CX_COMABT_INT) { | |
940 | fotg210_clear_comabt_int(fotg210); | |
941 | pr_info("fotg210 CX command abort\n"); | |
942 | } | |
943 | ||
944 | if (int_grp0 & DISGR0_CX_SETUP_INT) { | |
945 | if (fotg210_setup_packet(fotg210, &ctrl)) { | |
946 | spin_unlock(&fotg210->lock); | |
947 | if (fotg210->driver->setup(&fotg210->gadget, | |
948 | &ctrl) < 0) | |
949 | fotg210_set_cxstall(fotg210); | |
950 | spin_lock(&fotg210->lock); | |
951 | } | |
952 | } | |
953 | if (int_grp0 & DISGR0_CX_COMEND_INT) | |
954 | pr_info("fotg210 cmd end\n"); | |
955 | ||
956 | if (int_grp0 & DISGR0_CX_IN_INT) | |
957 | fotg210_ep0in(fotg210); | |
958 | ||
959 | if (int_grp0 & DISGR0_CX_OUT_INT) | |
960 | fotg210_ep0out(fotg210); | |
961 | ||
962 | if (int_grp0 & DISGR0_CX_COMFAIL_INT) { | |
963 | fotg210_set_cxstall(fotg210); | |
964 | pr_info("fotg210 ep0 fail\n"); | |
965 | } | |
966 | } | |
967 | ||
968 | if (int_grp & DIGR_INT_G1) { | |
969 | void __iomem *reg = fotg210->reg + FOTG210_DISGR1; | |
970 | u32 int_grp1 = ioread32(reg); | |
971 | u32 int_msk1 = ioread32(fotg210->reg + FOTG210_DMISGR1); | |
972 | int fifo; | |
973 | ||
974 | int_grp1 &= ~int_msk1; | |
975 | ||
976 | for (fifo = 0; fifo < FOTG210_MAX_FIFO_NUM; fifo++) { | |
977 | if (int_grp1 & DISGR1_IN_INT(fifo)) | |
978 | fotg210_in_fifo_handler(fotg210->ep[fifo + 1]); | |
979 | ||
980 | if ((int_grp1 & DISGR1_OUT_INT(fifo)) || | |
981 | (int_grp1 & DISGR1_SPK_INT(fifo))) | |
982 | fotg210_out_fifo_handler(fotg210->ep[fifo + 1]); | |
983 | } | |
984 | } | |
985 | ||
986 | spin_unlock(&fotg210->lock); | |
987 | ||
988 | return IRQ_HANDLED; | |
989 | } | |
990 | ||
991 | static void fotg210_disable_unplug(struct fotg210_udc *fotg210) | |
992 | { | |
993 | u32 reg = ioread32(fotg210->reg + FOTG210_PHYTMSR); | |
994 | ||
995 | reg &= ~PHYTMSR_UNPLUG; | |
996 | iowrite32(reg, fotg210->reg + FOTG210_PHYTMSR); | |
997 | } | |
998 | ||
999 | static int fotg210_udc_start(struct usb_gadget *g, | |
1000 | struct usb_gadget_driver *driver) | |
1001 | { | |
1002 | struct fotg210_udc *fotg210 = gadget_to_fotg210(g); | |
1003 | u32 value; | |
1004 | ||
1005 | /* hook up the driver */ | |
1006 | driver->driver.bus = NULL; | |
1007 | fotg210->driver = driver; | |
1008 | ||
1009 | /* enable device global interrupt */ | |
1010 | value = ioread32(fotg210->reg + FOTG210_DMCR); | |
1011 | value |= DMCR_GLINT_EN; | |
1012 | iowrite32(value, fotg210->reg + FOTG210_DMCR); | |
1013 | ||
1014 | return 0; | |
1015 | } | |
1016 | ||
1017 | static void fotg210_init(struct fotg210_udc *fotg210) | |
1018 | { | |
1019 | u32 value; | |
1020 | ||
1021 | /* disable global interrupt and set int polarity to active high */ | |
1022 | iowrite32(GMIR_MHC_INT | GMIR_MOTG_INT | GMIR_INT_POLARITY, | |
1023 | fotg210->reg + FOTG210_GMIR); | |
1024 | ||
1025 | /* disable device global interrupt */ | |
1026 | value = ioread32(fotg210->reg + FOTG210_DMCR); | |
1027 | value &= ~DMCR_GLINT_EN; | |
1028 | iowrite32(value, fotg210->reg + FOTG210_DMCR); | |
1029 | ||
1030 | /* disable all fifo interrupt */ | |
1031 | iowrite32(~(u32)0, fotg210->reg + FOTG210_DMISGR1); | |
1032 | ||
1033 | /* disable cmd end */ | |
1034 | value = ioread32(fotg210->reg + FOTG210_DMISGR0); | |
1035 | value |= DMISGR0_MCX_COMEND; | |
1036 | iowrite32(value, fotg210->reg + FOTG210_DMISGR0); | |
1037 | } | |
1038 | ||
22835b80 | 1039 | static int fotg210_udc_stop(struct usb_gadget *g) |
b84a8dee YHC |
1040 | { |
1041 | struct fotg210_udc *fotg210 = gadget_to_fotg210(g); | |
1042 | unsigned long flags; | |
1043 | ||
1044 | spin_lock_irqsave(&fotg210->lock, flags); | |
1045 | ||
1046 | fotg210_init(fotg210); | |
1047 | fotg210->driver = NULL; | |
1048 | ||
1049 | spin_unlock_irqrestore(&fotg210->lock, flags); | |
1050 | ||
1051 | return 0; | |
1052 | } | |
1053 | ||
bee56235 | 1054 | static const struct usb_gadget_ops fotg210_gadget_ops = { |
b84a8dee YHC |
1055 | .udc_start = fotg210_udc_start, |
1056 | .udc_stop = fotg210_udc_stop, | |
1057 | }; | |
1058 | ||
88ae7423 | 1059 | static int fotg210_udc_remove(struct platform_device *pdev) |
b84a8dee | 1060 | { |
3cb40a59 | 1061 | struct fotg210_udc *fotg210 = platform_get_drvdata(pdev); |
c37bd528 | 1062 | int i; |
b84a8dee YHC |
1063 | |
1064 | usb_del_gadget_udc(&fotg210->gadget); | |
1065 | iounmap(fotg210->reg); | |
1066 | free_irq(platform_get_irq(pdev, 0), fotg210); | |
1067 | ||
1068 | fotg210_ep_free_request(&fotg210->ep[0]->ep, fotg210->ep0_req); | |
c37bd528 AV |
1069 | for (i = 0; i < FOTG210_MAX_NUM_EP; i++) |
1070 | kfree(fotg210->ep[i]); | |
b84a8dee YHC |
1071 | kfree(fotg210); |
1072 | ||
1073 | return 0; | |
1074 | } | |
1075 | ||
88ae7423 | 1076 | static int fotg210_udc_probe(struct platform_device *pdev) |
b84a8dee YHC |
1077 | { |
1078 | struct resource *res, *ires; | |
1079 | struct fotg210_udc *fotg210 = NULL; | |
1080 | struct fotg210_ep *_ep[FOTG210_MAX_NUM_EP]; | |
1081 | int ret = 0; | |
1082 | int i; | |
1083 | ||
1084 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1085 | if (!res) { | |
1086 | pr_err("platform_get_resource error.\n"); | |
1087 | return -ENODEV; | |
1088 | } | |
1089 | ||
1090 | ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
1091 | if (!ires) { | |
1092 | pr_err("platform_get_resource IORESOURCE_IRQ error.\n"); | |
1093 | return -ENODEV; | |
1094 | } | |
1095 | ||
1096 | ret = -ENOMEM; | |
1097 | ||
1098 | /* initialize udc */ | |
1099 | fotg210 = kzalloc(sizeof(struct fotg210_udc), GFP_KERNEL); | |
0351c329 | 1100 | if (fotg210 == NULL) |
c37bd528 | 1101 | goto err; |
b84a8dee YHC |
1102 | |
1103 | for (i = 0; i < FOTG210_MAX_NUM_EP; i++) { | |
1104 | _ep[i] = kzalloc(sizeof(struct fotg210_ep), GFP_KERNEL); | |
0351c329 | 1105 | if (_ep[i] == NULL) |
b84a8dee | 1106 | goto err_alloc; |
b84a8dee YHC |
1107 | fotg210->ep[i] = _ep[i]; |
1108 | } | |
1109 | ||
1110 | fotg210->reg = ioremap(res->start, resource_size(res)); | |
1111 | if (fotg210->reg == NULL) { | |
1112 | pr_err("ioremap error.\n"); | |
c37bd528 | 1113 | goto err_alloc; |
b84a8dee YHC |
1114 | } |
1115 | ||
1116 | spin_lock_init(&fotg210->lock); | |
1117 | ||
3cb40a59 | 1118 | platform_set_drvdata(pdev, fotg210); |
b84a8dee YHC |
1119 | |
1120 | fotg210->gadget.ops = &fotg210_gadget_ops; | |
1121 | ||
1122 | fotg210->gadget.max_speed = USB_SPEED_HIGH; | |
1123 | fotg210->gadget.dev.parent = &pdev->dev; | |
1124 | fotg210->gadget.dev.dma_mask = pdev->dev.dma_mask; | |
1125 | fotg210->gadget.name = udc_name; | |
1126 | ||
1127 | INIT_LIST_HEAD(&fotg210->gadget.ep_list); | |
1128 | ||
1129 | for (i = 0; i < FOTG210_MAX_NUM_EP; i++) { | |
1130 | struct fotg210_ep *ep = fotg210->ep[i]; | |
1131 | ||
1132 | if (i) { | |
1133 | INIT_LIST_HEAD(&fotg210->ep[i]->ep.ep_list); | |
1134 | list_add_tail(&fotg210->ep[i]->ep.ep_list, | |
1135 | &fotg210->gadget.ep_list); | |
1136 | } | |
1137 | ep->fotg210 = fotg210; | |
1138 | INIT_LIST_HEAD(&ep->queue); | |
1139 | ep->ep.name = fotg210_ep_name[i]; | |
1140 | ep->ep.ops = &fotg210_ep_ops; | |
e117e742 | 1141 | usb_ep_set_maxpacket_limit(&ep->ep, (unsigned short) ~0); |
8d29237a RB |
1142 | |
1143 | if (i == 0) { | |
1144 | ep->ep.caps.type_control = true; | |
1145 | } else { | |
1146 | ep->ep.caps.type_iso = true; | |
1147 | ep->ep.caps.type_bulk = true; | |
1148 | ep->ep.caps.type_int = true; | |
1149 | } | |
1150 | ||
1151 | ep->ep.caps.dir_in = true; | |
1152 | ep->ep.caps.dir_out = true; | |
b84a8dee | 1153 | } |
e117e742 | 1154 | usb_ep_set_maxpacket_limit(&fotg210->ep[0]->ep, 0x40); |
b84a8dee YHC |
1155 | fotg210->gadget.ep0 = &fotg210->ep[0]->ep; |
1156 | INIT_LIST_HEAD(&fotg210->gadget.ep0->ep_list); | |
1157 | ||
1158 | fotg210->ep0_req = fotg210_ep_alloc_request(&fotg210->ep[0]->ep, | |
1159 | GFP_KERNEL); | |
1160 | if (fotg210->ep0_req == NULL) | |
c37bd528 | 1161 | goto err_map; |
b84a8dee YHC |
1162 | |
1163 | fotg210_init(fotg210); | |
1164 | ||
1165 | fotg210_disable_unplug(fotg210); | |
1166 | ||
1167 | ret = request_irq(ires->start, fotg210_irq, IRQF_SHARED, | |
1168 | udc_name, fotg210); | |
1169 | if (ret < 0) { | |
1170 | pr_err("request_irq error (%d)\n", ret); | |
2184fe63 | 1171 | goto err_req; |
b84a8dee YHC |
1172 | } |
1173 | ||
1174 | ret = usb_add_gadget_udc(&pdev->dev, &fotg210->gadget); | |
1175 | if (ret) | |
1176 | goto err_add_udc; | |
1177 | ||
1178 | dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION); | |
1179 | ||
1180 | return 0; | |
1181 | ||
1182 | err_add_udc: | |
b84a8dee YHC |
1183 | free_irq(ires->start, fotg210); |
1184 | ||
1185 | err_req: | |
1186 | fotg210_ep_free_request(&fotg210->ep[0]->ep, fotg210->ep0_req); | |
1187 | ||
1188 | err_map: | |
c37bd528 | 1189 | iounmap(fotg210->reg); |
b84a8dee YHC |
1190 | |
1191 | err_alloc: | |
c37bd528 AV |
1192 | for (i = 0; i < FOTG210_MAX_NUM_EP; i++) |
1193 | kfree(fotg210->ep[i]); | |
b84a8dee YHC |
1194 | kfree(fotg210); |
1195 | ||
c37bd528 | 1196 | err: |
b84a8dee YHC |
1197 | return ret; |
1198 | } | |
1199 | ||
1200 | static struct platform_driver fotg210_driver = { | |
1201 | .driver = { | |
4697bf3f | 1202 | .name = udc_name, |
b84a8dee YHC |
1203 | }, |
1204 | .probe = fotg210_udc_probe, | |
1205 | .remove = fotg210_udc_remove, | |
1206 | }; | |
1207 | ||
1208 | module_platform_driver(fotg210_driver); | |
1209 | ||
dfe29020 | 1210 | MODULE_AUTHOR("Yuan-Hsin Chen, Feng-Hsin Chiang <john453@faraday-tech.com>"); |
b84a8dee YHC |
1211 | MODULE_LICENSE("GPL"); |
1212 | MODULE_DESCRIPTION(DRIVER_DESC); |