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b84a8dee YHC |
1 | /* |
2 | * FOTG210 UDC Driver supports Bulk transfer so far | |
3 | * | |
4 | * Copyright (C) 2013 Faraday Technology Corporation | |
5 | * | |
6 | * Author : Yuan-Hsin Chen <yhchen@faraday-tech.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; version 2 of the License. | |
11 | */ | |
12 | ||
13 | #include <linux/dma-mapping.h> | |
14 | #include <linux/err.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/io.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/usb/ch9.h> | |
20 | #include <linux/usb/gadget.h> | |
21 | ||
22 | #include "fotg210.h" | |
23 | ||
24 | #define DRIVER_DESC "FOTG210 USB Device Controller Driver" | |
25 | #define DRIVER_VERSION "30-April-2013" | |
26 | ||
27 | static const char udc_name[] = "fotg210_udc"; | |
28 | static const char * const fotg210_ep_name[] = { | |
29 | "ep0", "ep1", "ep2", "ep3", "ep4"}; | |
30 | ||
31 | static void fotg210_disable_fifo_int(struct fotg210_ep *ep) | |
32 | { | |
33 | u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR1); | |
34 | ||
35 | if (ep->dir_in) | |
36 | value |= DMISGR1_MF_IN_INT(ep->epnum - 1); | |
37 | else | |
38 | value |= DMISGR1_MF_OUTSPK_INT(ep->epnum - 1); | |
39 | iowrite32(value, ep->fotg210->reg + FOTG210_DMISGR1); | |
40 | } | |
41 | ||
42 | static void fotg210_enable_fifo_int(struct fotg210_ep *ep) | |
43 | { | |
44 | u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR1); | |
45 | ||
46 | if (ep->dir_in) | |
47 | value &= ~DMISGR1_MF_IN_INT(ep->epnum - 1); | |
48 | else | |
49 | value &= ~DMISGR1_MF_OUTSPK_INT(ep->epnum - 1); | |
50 | iowrite32(value, ep->fotg210->reg + FOTG210_DMISGR1); | |
51 | } | |
52 | ||
53 | static void fotg210_set_cxdone(struct fotg210_udc *fotg210) | |
54 | { | |
55 | u32 value = ioread32(fotg210->reg + FOTG210_DCFESR); | |
56 | ||
57 | value |= DCFESR_CX_DONE; | |
58 | iowrite32(value, fotg210->reg + FOTG210_DCFESR); | |
59 | } | |
60 | ||
61 | static void fotg210_done(struct fotg210_ep *ep, struct fotg210_request *req, | |
62 | int status) | |
63 | { | |
64 | list_del_init(&req->queue); | |
65 | ||
66 | /* don't modify queue heads during completion callback */ | |
67 | if (ep->fotg210->gadget.speed == USB_SPEED_UNKNOWN) | |
68 | req->req.status = -ESHUTDOWN; | |
69 | else | |
70 | req->req.status = status; | |
71 | ||
72 | spin_unlock(&ep->fotg210->lock); | |
304f7e5e | 73 | usb_gadget_giveback_request(&ep->ep, &req->req); |
b84a8dee YHC |
74 | spin_lock(&ep->fotg210->lock); |
75 | ||
76 | if (ep->epnum) { | |
77 | if (list_empty(&ep->queue)) | |
78 | fotg210_disable_fifo_int(ep); | |
79 | } else { | |
80 | fotg210_set_cxdone(ep->fotg210); | |
81 | } | |
82 | } | |
83 | ||
84 | static void fotg210_fifo_ep_mapping(struct fotg210_ep *ep, u32 epnum, | |
85 | u32 dir_in) | |
86 | { | |
87 | struct fotg210_udc *fotg210 = ep->fotg210; | |
88 | u32 val; | |
89 | ||
90 | /* Driver should map an ep to a fifo and then map the fifo | |
91 | * to the ep. What a brain-damaged design! | |
92 | */ | |
93 | ||
94 | /* map a fifo to an ep */ | |
95 | val = ioread32(fotg210->reg + FOTG210_EPMAP); | |
96 | val &= ~EPMAP_FIFONOMSK(epnum, dir_in); | |
97 | val |= EPMAP_FIFONO(epnum, dir_in); | |
98 | iowrite32(val, fotg210->reg + FOTG210_EPMAP); | |
99 | ||
100 | /* map the ep to the fifo */ | |
101 | val = ioread32(fotg210->reg + FOTG210_FIFOMAP); | |
102 | val &= ~FIFOMAP_EPNOMSK(epnum); | |
103 | val |= FIFOMAP_EPNO(epnum); | |
104 | iowrite32(val, fotg210->reg + FOTG210_FIFOMAP); | |
105 | ||
106 | /* enable fifo */ | |
107 | val = ioread32(fotg210->reg + FOTG210_FIFOCF); | |
108 | val |= FIFOCF_FIFO_EN(epnum - 1); | |
109 | iowrite32(val, fotg210->reg + FOTG210_FIFOCF); | |
110 | } | |
111 | ||
112 | static void fotg210_set_fifo_dir(struct fotg210_ep *ep, u32 epnum, u32 dir_in) | |
113 | { | |
114 | struct fotg210_udc *fotg210 = ep->fotg210; | |
115 | u32 val; | |
116 | ||
117 | val = ioread32(fotg210->reg + FOTG210_FIFOMAP); | |
118 | val |= (dir_in ? FIFOMAP_DIRIN(epnum - 1) : FIFOMAP_DIROUT(epnum - 1)); | |
119 | iowrite32(val, fotg210->reg + FOTG210_FIFOMAP); | |
120 | } | |
121 | ||
122 | static void fotg210_set_tfrtype(struct fotg210_ep *ep, u32 epnum, u32 type) | |
123 | { | |
124 | struct fotg210_udc *fotg210 = ep->fotg210; | |
125 | u32 val; | |
126 | ||
127 | val = ioread32(fotg210->reg + FOTG210_FIFOCF); | |
128 | val |= FIFOCF_TYPE(type, epnum - 1); | |
129 | iowrite32(val, fotg210->reg + FOTG210_FIFOCF); | |
130 | } | |
131 | ||
132 | static void fotg210_set_mps(struct fotg210_ep *ep, u32 epnum, u32 mps, | |
133 | u32 dir_in) | |
134 | { | |
135 | struct fotg210_udc *fotg210 = ep->fotg210; | |
136 | u32 val; | |
137 | u32 offset = dir_in ? FOTG210_INEPMPSR(epnum) : | |
138 | FOTG210_OUTEPMPSR(epnum); | |
139 | ||
140 | val = ioread32(fotg210->reg + offset); | |
141 | val |= INOUTEPMPSR_MPS(mps); | |
142 | iowrite32(val, fotg210->reg + offset); | |
143 | } | |
144 | ||
145 | static int fotg210_config_ep(struct fotg210_ep *ep, | |
146 | const struct usb_endpoint_descriptor *desc) | |
147 | { | |
148 | struct fotg210_udc *fotg210 = ep->fotg210; | |
149 | ||
150 | fotg210_set_fifo_dir(ep, ep->epnum, ep->dir_in); | |
151 | fotg210_set_tfrtype(ep, ep->epnum, ep->type); | |
152 | fotg210_set_mps(ep, ep->epnum, ep->ep.maxpacket, ep->dir_in); | |
153 | fotg210_fifo_ep_mapping(ep, ep->epnum, ep->dir_in); | |
154 | ||
155 | fotg210->ep[ep->epnum] = ep; | |
156 | ||
157 | return 0; | |
158 | } | |
159 | ||
160 | static int fotg210_ep_enable(struct usb_ep *_ep, | |
161 | const struct usb_endpoint_descriptor *desc) | |
162 | { | |
163 | struct fotg210_ep *ep; | |
164 | ||
165 | ep = container_of(_ep, struct fotg210_ep, ep); | |
166 | ||
167 | ep->desc = desc; | |
168 | ep->epnum = usb_endpoint_num(desc); | |
169 | ep->type = usb_endpoint_type(desc); | |
170 | ep->dir_in = usb_endpoint_dir_in(desc); | |
171 | ep->ep.maxpacket = usb_endpoint_maxp(desc); | |
172 | ||
173 | return fotg210_config_ep(ep, desc); | |
174 | } | |
175 | ||
176 | static void fotg210_reset_tseq(struct fotg210_udc *fotg210, u8 epnum) | |
177 | { | |
178 | struct fotg210_ep *ep = fotg210->ep[epnum]; | |
179 | u32 value; | |
180 | void __iomem *reg; | |
181 | ||
182 | reg = (ep->dir_in) ? | |
183 | fotg210->reg + FOTG210_INEPMPSR(epnum) : | |
184 | fotg210->reg + FOTG210_OUTEPMPSR(epnum); | |
185 | ||
186 | /* Note: Driver needs to set and clear INOUTEPMPSR_RESET_TSEQ | |
187 | * bit. Controller wouldn't clear this bit. WTF!!! | |
188 | */ | |
189 | ||
190 | value = ioread32(reg); | |
191 | value |= INOUTEPMPSR_RESET_TSEQ; | |
192 | iowrite32(value, reg); | |
193 | ||
194 | value = ioread32(reg); | |
195 | value &= ~INOUTEPMPSR_RESET_TSEQ; | |
196 | iowrite32(value, reg); | |
197 | } | |
198 | ||
199 | static int fotg210_ep_release(struct fotg210_ep *ep) | |
200 | { | |
201 | if (!ep->epnum) | |
202 | return 0; | |
203 | ep->epnum = 0; | |
204 | ep->stall = 0; | |
205 | ep->wedged = 0; | |
206 | ||
207 | fotg210_reset_tseq(ep->fotg210, ep->epnum); | |
208 | ||
209 | return 0; | |
210 | } | |
211 | ||
212 | static int fotg210_ep_disable(struct usb_ep *_ep) | |
213 | { | |
214 | struct fotg210_ep *ep; | |
215 | struct fotg210_request *req; | |
216 | unsigned long flags; | |
217 | ||
218 | BUG_ON(!_ep); | |
219 | ||
220 | ep = container_of(_ep, struct fotg210_ep, ep); | |
221 | ||
222 | while (!list_empty(&ep->queue)) { | |
223 | req = list_entry(ep->queue.next, | |
224 | struct fotg210_request, queue); | |
225 | spin_lock_irqsave(&ep->fotg210->lock, flags); | |
226 | fotg210_done(ep, req, -ECONNRESET); | |
227 | spin_unlock_irqrestore(&ep->fotg210->lock, flags); | |
228 | } | |
229 | ||
230 | return fotg210_ep_release(ep); | |
231 | } | |
232 | ||
233 | static struct usb_request *fotg210_ep_alloc_request(struct usb_ep *_ep, | |
234 | gfp_t gfp_flags) | |
235 | { | |
236 | struct fotg210_request *req; | |
237 | ||
238 | req = kzalloc(sizeof(struct fotg210_request), gfp_flags); | |
239 | if (!req) | |
240 | return NULL; | |
241 | ||
242 | INIT_LIST_HEAD(&req->queue); | |
243 | ||
244 | return &req->req; | |
245 | } | |
246 | ||
247 | static void fotg210_ep_free_request(struct usb_ep *_ep, | |
248 | struct usb_request *_req) | |
249 | { | |
250 | struct fotg210_request *req; | |
251 | ||
252 | req = container_of(_req, struct fotg210_request, req); | |
253 | kfree(req); | |
254 | } | |
255 | ||
256 | static void fotg210_enable_dma(struct fotg210_ep *ep, | |
257 | dma_addr_t d, u32 len) | |
258 | { | |
259 | u32 value; | |
260 | struct fotg210_udc *fotg210 = ep->fotg210; | |
261 | ||
262 | /* set transfer length and direction */ | |
263 | value = ioread32(fotg210->reg + FOTG210_DMACPSR1); | |
264 | value &= ~(DMACPSR1_DMA_LEN(0xFFFF) | DMACPSR1_DMA_TYPE(1)); | |
265 | value |= DMACPSR1_DMA_LEN(len) | DMACPSR1_DMA_TYPE(ep->dir_in); | |
266 | iowrite32(value, fotg210->reg + FOTG210_DMACPSR1); | |
267 | ||
268 | /* set device DMA target FIFO number */ | |
269 | value = ioread32(fotg210->reg + FOTG210_DMATFNR); | |
270 | if (ep->epnum) | |
271 | value |= DMATFNR_ACC_FN(ep->epnum - 1); | |
272 | else | |
273 | value |= DMATFNR_ACC_CXF; | |
274 | iowrite32(value, fotg210->reg + FOTG210_DMATFNR); | |
275 | ||
276 | /* set DMA memory address */ | |
277 | iowrite32(d, fotg210->reg + FOTG210_DMACPSR2); | |
278 | ||
279 | /* enable MDMA_EROR and MDMA_CMPLT interrupt */ | |
280 | value = ioread32(fotg210->reg + FOTG210_DMISGR2); | |
281 | value &= ~(DMISGR2_MDMA_CMPLT | DMISGR2_MDMA_ERROR); | |
282 | iowrite32(value, fotg210->reg + FOTG210_DMISGR2); | |
283 | ||
284 | /* start DMA */ | |
285 | value = ioread32(fotg210->reg + FOTG210_DMACPSR1); | |
286 | value |= DMACPSR1_DMA_START; | |
287 | iowrite32(value, fotg210->reg + FOTG210_DMACPSR1); | |
288 | } | |
289 | ||
290 | static void fotg210_disable_dma(struct fotg210_ep *ep) | |
291 | { | |
292 | iowrite32(DMATFNR_DISDMA, ep->fotg210->reg + FOTG210_DMATFNR); | |
293 | } | |
294 | ||
295 | static void fotg210_wait_dma_done(struct fotg210_ep *ep) | |
296 | { | |
297 | u32 value; | |
298 | ||
299 | do { | |
300 | value = ioread32(ep->fotg210->reg + FOTG210_DISGR2); | |
301 | if ((value & DISGR2_USBRST_INT) || | |
302 | (value & DISGR2_DMA_ERROR)) | |
303 | goto dma_reset; | |
304 | } while (!(value & DISGR2_DMA_CMPLT)); | |
305 | ||
306 | value &= ~DISGR2_DMA_CMPLT; | |
307 | iowrite32(value, ep->fotg210->reg + FOTG210_DISGR2); | |
308 | return; | |
309 | ||
310 | dma_reset: | |
311 | value = ioread32(ep->fotg210->reg + FOTG210_DMACPSR1); | |
312 | value |= DMACPSR1_DMA_ABORT; | |
313 | iowrite32(value, ep->fotg210->reg + FOTG210_DMACPSR1); | |
314 | ||
315 | /* reset fifo */ | |
316 | if (ep->epnum) { | |
317 | value = ioread32(ep->fotg210->reg + | |
318 | FOTG210_FIBCR(ep->epnum - 1)); | |
319 | value |= FIBCR_FFRST; | |
320 | iowrite32(value, ep->fotg210->reg + | |
321 | FOTG210_FIBCR(ep->epnum - 1)); | |
322 | } else { | |
323 | value = ioread32(ep->fotg210->reg + FOTG210_DCFESR); | |
324 | value |= DCFESR_CX_CLR; | |
325 | iowrite32(value, ep->fotg210->reg + FOTG210_DCFESR); | |
326 | } | |
327 | } | |
328 | ||
329 | static void fotg210_start_dma(struct fotg210_ep *ep, | |
330 | struct fotg210_request *req) | |
331 | { | |
332 | dma_addr_t d; | |
333 | u8 *buffer; | |
334 | u32 length; | |
335 | ||
336 | if (ep->epnum) { | |
337 | if (ep->dir_in) { | |
338 | buffer = req->req.buf; | |
339 | length = req->req.length; | |
340 | } else { | |
341 | buffer = req->req.buf + req->req.actual; | |
342 | length = ioread32(ep->fotg210->reg + | |
343 | FOTG210_FIBCR(ep->epnum - 1)); | |
344 | length &= FIBCR_BCFX; | |
345 | } | |
346 | } else { | |
347 | buffer = req->req.buf + req->req.actual; | |
348 | if (req->req.length - req->req.actual > ep->ep.maxpacket) | |
349 | length = ep->ep.maxpacket; | |
350 | else | |
351 | length = req->req.length; | |
352 | } | |
353 | ||
354 | d = dma_map_single(NULL, buffer, length, | |
355 | ep->dir_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE); | |
356 | ||
357 | if (dma_mapping_error(NULL, d)) { | |
358 | pr_err("dma_mapping_error\n"); | |
359 | return; | |
360 | } | |
361 | ||
362 | dma_sync_single_for_device(NULL, d, length, | |
363 | ep->dir_in ? DMA_TO_DEVICE : | |
364 | DMA_FROM_DEVICE); | |
365 | ||
366 | fotg210_enable_dma(ep, d, length); | |
367 | ||
368 | /* check if dma is done */ | |
369 | fotg210_wait_dma_done(ep); | |
370 | ||
371 | fotg210_disable_dma(ep); | |
372 | ||
373 | /* update actual transfer length */ | |
374 | req->req.actual += length; | |
375 | ||
376 | dma_unmap_single(NULL, d, length, DMA_TO_DEVICE); | |
377 | } | |
378 | ||
379 | static void fotg210_ep0_queue(struct fotg210_ep *ep, | |
380 | struct fotg210_request *req) | |
381 | { | |
382 | if (!req->req.length) { | |
383 | fotg210_done(ep, req, 0); | |
384 | return; | |
385 | } | |
386 | if (ep->dir_in) { /* if IN */ | |
1c99cabf | 387 | fotg210_start_dma(ep, req); |
b84a8dee YHC |
388 | if ((req->req.length == req->req.actual) || |
389 | (req->req.actual < ep->ep.maxpacket)) | |
390 | fotg210_done(ep, req, 0); | |
391 | } else { /* OUT */ | |
1c99cabf | 392 | u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR0); |
b84a8dee | 393 | |
1c99cabf DC |
394 | value &= ~DMISGR0_MCX_OUT_INT; |
395 | iowrite32(value, ep->fotg210->reg + FOTG210_DMISGR0); | |
b84a8dee YHC |
396 | } |
397 | } | |
398 | ||
399 | static int fotg210_ep_queue(struct usb_ep *_ep, struct usb_request *_req, | |
400 | gfp_t gfp_flags) | |
401 | { | |
402 | struct fotg210_ep *ep; | |
403 | struct fotg210_request *req; | |
404 | unsigned long flags; | |
405 | int request = 0; | |
406 | ||
407 | ep = container_of(_ep, struct fotg210_ep, ep); | |
408 | req = container_of(_req, struct fotg210_request, req); | |
409 | ||
410 | if (ep->fotg210->gadget.speed == USB_SPEED_UNKNOWN) | |
411 | return -ESHUTDOWN; | |
412 | ||
413 | spin_lock_irqsave(&ep->fotg210->lock, flags); | |
414 | ||
415 | if (list_empty(&ep->queue)) | |
416 | request = 1; | |
417 | ||
418 | list_add_tail(&req->queue, &ep->queue); | |
419 | ||
420 | req->req.actual = 0; | |
421 | req->req.status = -EINPROGRESS; | |
422 | ||
423 | if (!ep->epnum) /* ep0 */ | |
424 | fotg210_ep0_queue(ep, req); | |
425 | else if (request && !ep->stall) | |
426 | fotg210_enable_fifo_int(ep); | |
427 | ||
428 | spin_unlock_irqrestore(&ep->fotg210->lock, flags); | |
429 | ||
430 | return 0; | |
431 | } | |
432 | ||
433 | static int fotg210_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) | |
434 | { | |
435 | struct fotg210_ep *ep; | |
436 | struct fotg210_request *req; | |
437 | unsigned long flags; | |
438 | ||
439 | ep = container_of(_ep, struct fotg210_ep, ep); | |
440 | req = container_of(_req, struct fotg210_request, req); | |
441 | ||
442 | spin_lock_irqsave(&ep->fotg210->lock, flags); | |
443 | if (!list_empty(&ep->queue)) | |
444 | fotg210_done(ep, req, -ECONNRESET); | |
445 | spin_unlock_irqrestore(&ep->fotg210->lock, flags); | |
446 | ||
447 | return 0; | |
448 | } | |
449 | ||
450 | static void fotg210_set_epnstall(struct fotg210_ep *ep) | |
451 | { | |
452 | struct fotg210_udc *fotg210 = ep->fotg210; | |
453 | u32 value; | |
454 | void __iomem *reg; | |
455 | ||
456 | /* check if IN FIFO is empty before stall */ | |
457 | if (ep->dir_in) { | |
458 | do { | |
459 | value = ioread32(fotg210->reg + FOTG210_DCFESR); | |
460 | } while (!(value & DCFESR_FIFO_EMPTY(ep->epnum - 1))); | |
461 | } | |
462 | ||
463 | reg = (ep->dir_in) ? | |
464 | fotg210->reg + FOTG210_INEPMPSR(ep->epnum) : | |
465 | fotg210->reg + FOTG210_OUTEPMPSR(ep->epnum); | |
466 | value = ioread32(reg); | |
467 | value |= INOUTEPMPSR_STL_EP; | |
468 | iowrite32(value, reg); | |
469 | } | |
470 | ||
471 | static void fotg210_clear_epnstall(struct fotg210_ep *ep) | |
472 | { | |
473 | struct fotg210_udc *fotg210 = ep->fotg210; | |
474 | u32 value; | |
475 | void __iomem *reg; | |
476 | ||
477 | reg = (ep->dir_in) ? | |
478 | fotg210->reg + FOTG210_INEPMPSR(ep->epnum) : | |
479 | fotg210->reg + FOTG210_OUTEPMPSR(ep->epnum); | |
480 | value = ioread32(reg); | |
481 | value &= ~INOUTEPMPSR_STL_EP; | |
482 | iowrite32(value, reg); | |
483 | } | |
484 | ||
485 | static int fotg210_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedge) | |
486 | { | |
487 | struct fotg210_ep *ep; | |
488 | struct fotg210_udc *fotg210; | |
489 | unsigned long flags; | |
490 | int ret = 0; | |
491 | ||
492 | ep = container_of(_ep, struct fotg210_ep, ep); | |
493 | ||
494 | fotg210 = ep->fotg210; | |
495 | ||
496 | spin_lock_irqsave(&ep->fotg210->lock, flags); | |
497 | ||
498 | if (value) { | |
499 | fotg210_set_epnstall(ep); | |
500 | ep->stall = 1; | |
501 | if (wedge) | |
502 | ep->wedged = 1; | |
503 | } else { | |
504 | fotg210_reset_tseq(fotg210, ep->epnum); | |
505 | fotg210_clear_epnstall(ep); | |
506 | ep->stall = 0; | |
507 | ep->wedged = 0; | |
508 | if (!list_empty(&ep->queue)) | |
509 | fotg210_enable_fifo_int(ep); | |
510 | } | |
511 | ||
512 | spin_unlock_irqrestore(&ep->fotg210->lock, flags); | |
513 | return ret; | |
514 | } | |
515 | ||
516 | static int fotg210_ep_set_halt(struct usb_ep *_ep, int value) | |
517 | { | |
518 | return fotg210_set_halt_and_wedge(_ep, value, 0); | |
519 | } | |
520 | ||
521 | static int fotg210_ep_set_wedge(struct usb_ep *_ep) | |
522 | { | |
523 | return fotg210_set_halt_and_wedge(_ep, 1, 1); | |
524 | } | |
525 | ||
526 | static void fotg210_ep_fifo_flush(struct usb_ep *_ep) | |
527 | { | |
528 | } | |
529 | ||
530 | static struct usb_ep_ops fotg210_ep_ops = { | |
531 | .enable = fotg210_ep_enable, | |
532 | .disable = fotg210_ep_disable, | |
533 | ||
534 | .alloc_request = fotg210_ep_alloc_request, | |
535 | .free_request = fotg210_ep_free_request, | |
536 | ||
537 | .queue = fotg210_ep_queue, | |
538 | .dequeue = fotg210_ep_dequeue, | |
539 | ||
540 | .set_halt = fotg210_ep_set_halt, | |
541 | .fifo_flush = fotg210_ep_fifo_flush, | |
542 | .set_wedge = fotg210_ep_set_wedge, | |
543 | }; | |
544 | ||
545 | static void fotg210_clear_tx0byte(struct fotg210_udc *fotg210) | |
546 | { | |
547 | u32 value = ioread32(fotg210->reg + FOTG210_TX0BYTE); | |
548 | ||
549 | value &= ~(TX0BYTE_EP1 | TX0BYTE_EP2 | TX0BYTE_EP3 | |
550 | | TX0BYTE_EP4); | |
551 | iowrite32(value, fotg210->reg + FOTG210_TX0BYTE); | |
552 | } | |
553 | ||
554 | static void fotg210_clear_rx0byte(struct fotg210_udc *fotg210) | |
555 | { | |
556 | u32 value = ioread32(fotg210->reg + FOTG210_RX0BYTE); | |
557 | ||
558 | value &= ~(RX0BYTE_EP1 | RX0BYTE_EP2 | RX0BYTE_EP3 | |
559 | | RX0BYTE_EP4); | |
560 | iowrite32(value, fotg210->reg + FOTG210_RX0BYTE); | |
561 | } | |
562 | ||
563 | /* read 8-byte setup packet only */ | |
564 | static void fotg210_rdsetupp(struct fotg210_udc *fotg210, | |
565 | u8 *buffer) | |
566 | { | |
567 | int i = 0; | |
568 | u8 *tmp = buffer; | |
569 | u32 data; | |
570 | u32 length = 8; | |
571 | ||
572 | iowrite32(DMATFNR_ACC_CXF, fotg210->reg + FOTG210_DMATFNR); | |
573 | ||
574 | for (i = (length >> 2); i > 0; i--) { | |
575 | data = ioread32(fotg210->reg + FOTG210_CXPORT); | |
576 | *tmp = data & 0xFF; | |
577 | *(tmp + 1) = (data >> 8) & 0xFF; | |
578 | *(tmp + 2) = (data >> 16) & 0xFF; | |
579 | *(tmp + 3) = (data >> 24) & 0xFF; | |
580 | tmp = tmp + 4; | |
581 | } | |
582 | ||
583 | switch (length % 4) { | |
584 | case 1: | |
585 | data = ioread32(fotg210->reg + FOTG210_CXPORT); | |
586 | *tmp = data & 0xFF; | |
587 | break; | |
588 | case 2: | |
589 | data = ioread32(fotg210->reg + FOTG210_CXPORT); | |
590 | *tmp = data & 0xFF; | |
591 | *(tmp + 1) = (data >> 8) & 0xFF; | |
592 | break; | |
593 | case 3: | |
594 | data = ioread32(fotg210->reg + FOTG210_CXPORT); | |
595 | *tmp = data & 0xFF; | |
596 | *(tmp + 1) = (data >> 8) & 0xFF; | |
597 | *(tmp + 2) = (data >> 16) & 0xFF; | |
598 | break; | |
599 | default: | |
600 | break; | |
601 | } | |
602 | ||
603 | iowrite32(DMATFNR_DISDMA, fotg210->reg + FOTG210_DMATFNR); | |
604 | } | |
605 | ||
606 | static void fotg210_set_configuration(struct fotg210_udc *fotg210) | |
607 | { | |
608 | u32 value = ioread32(fotg210->reg + FOTG210_DAR); | |
609 | ||
610 | value |= DAR_AFT_CONF; | |
611 | iowrite32(value, fotg210->reg + FOTG210_DAR); | |
612 | } | |
613 | ||
614 | static void fotg210_set_dev_addr(struct fotg210_udc *fotg210, u32 addr) | |
615 | { | |
616 | u32 value = ioread32(fotg210->reg + FOTG210_DAR); | |
617 | ||
618 | value |= (addr & 0x7F); | |
619 | iowrite32(value, fotg210->reg + FOTG210_DAR); | |
620 | } | |
621 | ||
622 | static void fotg210_set_cxstall(struct fotg210_udc *fotg210) | |
623 | { | |
624 | u32 value = ioread32(fotg210->reg + FOTG210_DCFESR); | |
625 | ||
626 | value |= DCFESR_CX_STL; | |
627 | iowrite32(value, fotg210->reg + FOTG210_DCFESR); | |
628 | } | |
629 | ||
630 | static void fotg210_request_error(struct fotg210_udc *fotg210) | |
631 | { | |
632 | fotg210_set_cxstall(fotg210); | |
633 | pr_err("request error!!\n"); | |
634 | } | |
635 | ||
636 | static void fotg210_set_address(struct fotg210_udc *fotg210, | |
637 | struct usb_ctrlrequest *ctrl) | |
638 | { | |
639 | if (ctrl->wValue >= 0x0100) { | |
640 | fotg210_request_error(fotg210); | |
641 | } else { | |
642 | fotg210_set_dev_addr(fotg210, ctrl->wValue); | |
643 | fotg210_set_cxdone(fotg210); | |
644 | } | |
645 | } | |
646 | ||
647 | static void fotg210_set_feature(struct fotg210_udc *fotg210, | |
648 | struct usb_ctrlrequest *ctrl) | |
649 | { | |
650 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | |
651 | case USB_RECIP_DEVICE: | |
652 | fotg210_set_cxdone(fotg210); | |
653 | break; | |
654 | case USB_RECIP_INTERFACE: | |
655 | fotg210_set_cxdone(fotg210); | |
656 | break; | |
657 | case USB_RECIP_ENDPOINT: { | |
658 | u8 epnum; | |
659 | epnum = le16_to_cpu(ctrl->wIndex) & USB_ENDPOINT_NUMBER_MASK; | |
660 | if (epnum) | |
661 | fotg210_set_epnstall(fotg210->ep[epnum]); | |
662 | else | |
663 | fotg210_set_cxstall(fotg210); | |
664 | fotg210_set_cxdone(fotg210); | |
665 | } | |
666 | break; | |
667 | default: | |
668 | fotg210_request_error(fotg210); | |
669 | break; | |
670 | } | |
671 | } | |
672 | ||
673 | static void fotg210_clear_feature(struct fotg210_udc *fotg210, | |
674 | struct usb_ctrlrequest *ctrl) | |
675 | { | |
676 | struct fotg210_ep *ep = | |
677 | fotg210->ep[ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK]; | |
678 | ||
679 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | |
680 | case USB_RECIP_DEVICE: | |
681 | fotg210_set_cxdone(fotg210); | |
682 | break; | |
683 | case USB_RECIP_INTERFACE: | |
684 | fotg210_set_cxdone(fotg210); | |
685 | break; | |
686 | case USB_RECIP_ENDPOINT: | |
687 | if (ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK) { | |
688 | if (ep->wedged) { | |
689 | fotg210_set_cxdone(fotg210); | |
690 | break; | |
691 | } | |
692 | if (ep->stall) | |
693 | fotg210_set_halt_and_wedge(&ep->ep, 0, 0); | |
694 | } | |
695 | fotg210_set_cxdone(fotg210); | |
696 | break; | |
697 | default: | |
698 | fotg210_request_error(fotg210); | |
699 | break; | |
700 | } | |
701 | } | |
702 | ||
703 | static int fotg210_is_epnstall(struct fotg210_ep *ep) | |
704 | { | |
705 | struct fotg210_udc *fotg210 = ep->fotg210; | |
706 | u32 value; | |
707 | void __iomem *reg; | |
708 | ||
709 | reg = (ep->dir_in) ? | |
710 | fotg210->reg + FOTG210_INEPMPSR(ep->epnum) : | |
711 | fotg210->reg + FOTG210_OUTEPMPSR(ep->epnum); | |
712 | value = ioread32(reg); | |
713 | return value & INOUTEPMPSR_STL_EP ? 1 : 0; | |
714 | } | |
715 | ||
716 | static void fotg210_get_status(struct fotg210_udc *fotg210, | |
717 | struct usb_ctrlrequest *ctrl) | |
718 | { | |
719 | u8 epnum; | |
720 | ||
721 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | |
722 | case USB_RECIP_DEVICE: | |
723 | fotg210->ep0_data = 1 << USB_DEVICE_SELF_POWERED; | |
724 | break; | |
725 | case USB_RECIP_INTERFACE: | |
726 | fotg210->ep0_data = 0; | |
727 | break; | |
728 | case USB_RECIP_ENDPOINT: | |
729 | epnum = ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK; | |
730 | if (epnum) | |
731 | fotg210->ep0_data = | |
732 | fotg210_is_epnstall(fotg210->ep[epnum]) | |
733 | << USB_ENDPOINT_HALT; | |
734 | else | |
735 | fotg210_request_error(fotg210); | |
736 | break; | |
737 | ||
738 | default: | |
739 | fotg210_request_error(fotg210); | |
740 | return; /* exit */ | |
741 | } | |
742 | ||
743 | fotg210->ep0_req->buf = &fotg210->ep0_data; | |
744 | fotg210->ep0_req->length = 2; | |
745 | ||
746 | spin_unlock(&fotg210->lock); | |
747 | fotg210_ep_queue(fotg210->gadget.ep0, fotg210->ep0_req, GFP_KERNEL); | |
748 | spin_lock(&fotg210->lock); | |
749 | } | |
750 | ||
751 | static int fotg210_setup_packet(struct fotg210_udc *fotg210, | |
752 | struct usb_ctrlrequest *ctrl) | |
753 | { | |
754 | u8 *p = (u8 *)ctrl; | |
755 | u8 ret = 0; | |
756 | ||
757 | fotg210_rdsetupp(fotg210, p); | |
758 | ||
759 | fotg210->ep[0]->dir_in = ctrl->bRequestType & USB_DIR_IN; | |
760 | ||
761 | if (fotg210->gadget.speed == USB_SPEED_UNKNOWN) { | |
762 | u32 value = ioread32(fotg210->reg + FOTG210_DMCR); | |
763 | fotg210->gadget.speed = value & DMCR_HS_EN ? | |
764 | USB_SPEED_HIGH : USB_SPEED_FULL; | |
765 | } | |
766 | ||
767 | /* check request */ | |
768 | if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) { | |
769 | switch (ctrl->bRequest) { | |
770 | case USB_REQ_GET_STATUS: | |
771 | fotg210_get_status(fotg210, ctrl); | |
772 | break; | |
773 | case USB_REQ_CLEAR_FEATURE: | |
774 | fotg210_clear_feature(fotg210, ctrl); | |
775 | break; | |
776 | case USB_REQ_SET_FEATURE: | |
777 | fotg210_set_feature(fotg210, ctrl); | |
778 | break; | |
779 | case USB_REQ_SET_ADDRESS: | |
780 | fotg210_set_address(fotg210, ctrl); | |
781 | break; | |
782 | case USB_REQ_SET_CONFIGURATION: | |
783 | fotg210_set_configuration(fotg210); | |
784 | ret = 1; | |
785 | break; | |
786 | default: | |
787 | ret = 1; | |
788 | break; | |
789 | } | |
790 | } else { | |
791 | ret = 1; | |
792 | } | |
793 | ||
794 | return ret; | |
795 | } | |
796 | ||
797 | static void fotg210_ep0out(struct fotg210_udc *fotg210) | |
798 | { | |
799 | struct fotg210_ep *ep = fotg210->ep[0]; | |
800 | ||
801 | if (!list_empty(&ep->queue) && !ep->dir_in) { | |
802 | struct fotg210_request *req; | |
803 | ||
804 | req = list_first_entry(&ep->queue, | |
805 | struct fotg210_request, queue); | |
806 | ||
807 | if (req->req.length) | |
808 | fotg210_start_dma(ep, req); | |
809 | ||
810 | if ((req->req.length - req->req.actual) < ep->ep.maxpacket) | |
811 | fotg210_done(ep, req, 0); | |
812 | } else { | |
813 | pr_err("%s : empty queue\n", __func__); | |
814 | } | |
815 | } | |
816 | ||
817 | static void fotg210_ep0in(struct fotg210_udc *fotg210) | |
818 | { | |
819 | struct fotg210_ep *ep = fotg210->ep[0]; | |
820 | ||
821 | if ((!list_empty(&ep->queue)) && (ep->dir_in)) { | |
822 | struct fotg210_request *req; | |
823 | ||
824 | req = list_entry(ep->queue.next, | |
825 | struct fotg210_request, queue); | |
826 | ||
827 | if (req->req.length) | |
828 | fotg210_start_dma(ep, req); | |
829 | ||
830 | if ((req->req.length - req->req.actual) < ep->ep.maxpacket) | |
831 | fotg210_done(ep, req, 0); | |
832 | } else { | |
833 | fotg210_set_cxdone(fotg210); | |
834 | } | |
835 | } | |
836 | ||
837 | static void fotg210_clear_comabt_int(struct fotg210_udc *fotg210) | |
838 | { | |
839 | u32 value = ioread32(fotg210->reg + FOTG210_DISGR0); | |
840 | ||
841 | value &= ~DISGR0_CX_COMABT_INT; | |
842 | iowrite32(value, fotg210->reg + FOTG210_DISGR0); | |
843 | } | |
844 | ||
845 | static void fotg210_in_fifo_handler(struct fotg210_ep *ep) | |
846 | { | |
847 | struct fotg210_request *req = list_entry(ep->queue.next, | |
848 | struct fotg210_request, queue); | |
849 | ||
850 | if (req->req.length) | |
851 | fotg210_start_dma(ep, req); | |
852 | fotg210_done(ep, req, 0); | |
853 | } | |
854 | ||
855 | static void fotg210_out_fifo_handler(struct fotg210_ep *ep) | |
856 | { | |
857 | struct fotg210_request *req = list_entry(ep->queue.next, | |
858 | struct fotg210_request, queue); | |
859 | ||
860 | fotg210_start_dma(ep, req); | |
861 | ||
862 | /* finish out transfer */ | |
863 | if (req->req.length == req->req.actual || | |
864 | req->req.actual < ep->ep.maxpacket) | |
865 | fotg210_done(ep, req, 0); | |
866 | } | |
867 | ||
868 | static irqreturn_t fotg210_irq(int irq, void *_fotg210) | |
869 | { | |
870 | struct fotg210_udc *fotg210 = _fotg210; | |
871 | u32 int_grp = ioread32(fotg210->reg + FOTG210_DIGR); | |
872 | u32 int_msk = ioread32(fotg210->reg + FOTG210_DMIGR); | |
873 | ||
874 | int_grp &= ~int_msk; | |
875 | ||
876 | spin_lock(&fotg210->lock); | |
877 | ||
878 | if (int_grp & DIGR_INT_G2) { | |
879 | void __iomem *reg = fotg210->reg + FOTG210_DISGR2; | |
880 | u32 int_grp2 = ioread32(reg); | |
881 | u32 int_msk2 = ioread32(fotg210->reg + FOTG210_DMISGR2); | |
882 | u32 value; | |
883 | ||
884 | int_grp2 &= ~int_msk2; | |
885 | ||
886 | if (int_grp2 & DISGR2_USBRST_INT) { | |
887 | value = ioread32(reg); | |
888 | value &= ~DISGR2_USBRST_INT; | |
889 | iowrite32(value, reg); | |
890 | pr_info("fotg210 udc reset\n"); | |
891 | } | |
892 | if (int_grp2 & DISGR2_SUSP_INT) { | |
893 | value = ioread32(reg); | |
894 | value &= ~DISGR2_SUSP_INT; | |
895 | iowrite32(value, reg); | |
896 | pr_info("fotg210 udc suspend\n"); | |
897 | } | |
898 | if (int_grp2 & DISGR2_RESM_INT) { | |
899 | value = ioread32(reg); | |
900 | value &= ~DISGR2_RESM_INT; | |
901 | iowrite32(value, reg); | |
902 | pr_info("fotg210 udc resume\n"); | |
903 | } | |
904 | if (int_grp2 & DISGR2_ISO_SEQ_ERR_INT) { | |
905 | value = ioread32(reg); | |
906 | value &= ~DISGR2_ISO_SEQ_ERR_INT; | |
907 | iowrite32(value, reg); | |
908 | pr_info("fotg210 iso sequence error\n"); | |
909 | } | |
910 | if (int_grp2 & DISGR2_ISO_SEQ_ABORT_INT) { | |
911 | value = ioread32(reg); | |
912 | value &= ~DISGR2_ISO_SEQ_ABORT_INT; | |
913 | iowrite32(value, reg); | |
914 | pr_info("fotg210 iso sequence abort\n"); | |
915 | } | |
916 | if (int_grp2 & DISGR2_TX0BYTE_INT) { | |
917 | fotg210_clear_tx0byte(fotg210); | |
918 | value = ioread32(reg); | |
919 | value &= ~DISGR2_TX0BYTE_INT; | |
920 | iowrite32(value, reg); | |
921 | pr_info("fotg210 transferred 0 byte\n"); | |
922 | } | |
923 | if (int_grp2 & DISGR2_RX0BYTE_INT) { | |
924 | fotg210_clear_rx0byte(fotg210); | |
925 | value = ioread32(reg); | |
926 | value &= ~DISGR2_RX0BYTE_INT; | |
927 | iowrite32(value, reg); | |
928 | pr_info("fotg210 received 0 byte\n"); | |
929 | } | |
930 | if (int_grp2 & DISGR2_DMA_ERROR) { | |
931 | value = ioread32(reg); | |
932 | value &= ~DISGR2_DMA_ERROR; | |
933 | iowrite32(value, reg); | |
934 | } | |
935 | } | |
936 | ||
937 | if (int_grp & DIGR_INT_G0) { | |
938 | void __iomem *reg = fotg210->reg + FOTG210_DISGR0; | |
939 | u32 int_grp0 = ioread32(reg); | |
940 | u32 int_msk0 = ioread32(fotg210->reg + FOTG210_DMISGR0); | |
941 | struct usb_ctrlrequest ctrl; | |
942 | ||
943 | int_grp0 &= ~int_msk0; | |
944 | ||
945 | /* the highest priority in this source register */ | |
946 | if (int_grp0 & DISGR0_CX_COMABT_INT) { | |
947 | fotg210_clear_comabt_int(fotg210); | |
948 | pr_info("fotg210 CX command abort\n"); | |
949 | } | |
950 | ||
951 | if (int_grp0 & DISGR0_CX_SETUP_INT) { | |
952 | if (fotg210_setup_packet(fotg210, &ctrl)) { | |
953 | spin_unlock(&fotg210->lock); | |
954 | if (fotg210->driver->setup(&fotg210->gadget, | |
955 | &ctrl) < 0) | |
956 | fotg210_set_cxstall(fotg210); | |
957 | spin_lock(&fotg210->lock); | |
958 | } | |
959 | } | |
960 | if (int_grp0 & DISGR0_CX_COMEND_INT) | |
961 | pr_info("fotg210 cmd end\n"); | |
962 | ||
963 | if (int_grp0 & DISGR0_CX_IN_INT) | |
964 | fotg210_ep0in(fotg210); | |
965 | ||
966 | if (int_grp0 & DISGR0_CX_OUT_INT) | |
967 | fotg210_ep0out(fotg210); | |
968 | ||
969 | if (int_grp0 & DISGR0_CX_COMFAIL_INT) { | |
970 | fotg210_set_cxstall(fotg210); | |
971 | pr_info("fotg210 ep0 fail\n"); | |
972 | } | |
973 | } | |
974 | ||
975 | if (int_grp & DIGR_INT_G1) { | |
976 | void __iomem *reg = fotg210->reg + FOTG210_DISGR1; | |
977 | u32 int_grp1 = ioread32(reg); | |
978 | u32 int_msk1 = ioread32(fotg210->reg + FOTG210_DMISGR1); | |
979 | int fifo; | |
980 | ||
981 | int_grp1 &= ~int_msk1; | |
982 | ||
983 | for (fifo = 0; fifo < FOTG210_MAX_FIFO_NUM; fifo++) { | |
984 | if (int_grp1 & DISGR1_IN_INT(fifo)) | |
985 | fotg210_in_fifo_handler(fotg210->ep[fifo + 1]); | |
986 | ||
987 | if ((int_grp1 & DISGR1_OUT_INT(fifo)) || | |
988 | (int_grp1 & DISGR1_SPK_INT(fifo))) | |
989 | fotg210_out_fifo_handler(fotg210->ep[fifo + 1]); | |
990 | } | |
991 | } | |
992 | ||
993 | spin_unlock(&fotg210->lock); | |
994 | ||
995 | return IRQ_HANDLED; | |
996 | } | |
997 | ||
998 | static void fotg210_disable_unplug(struct fotg210_udc *fotg210) | |
999 | { | |
1000 | u32 reg = ioread32(fotg210->reg + FOTG210_PHYTMSR); | |
1001 | ||
1002 | reg &= ~PHYTMSR_UNPLUG; | |
1003 | iowrite32(reg, fotg210->reg + FOTG210_PHYTMSR); | |
1004 | } | |
1005 | ||
1006 | static int fotg210_udc_start(struct usb_gadget *g, | |
1007 | struct usb_gadget_driver *driver) | |
1008 | { | |
1009 | struct fotg210_udc *fotg210 = gadget_to_fotg210(g); | |
1010 | u32 value; | |
1011 | ||
1012 | /* hook up the driver */ | |
1013 | driver->driver.bus = NULL; | |
1014 | fotg210->driver = driver; | |
1015 | ||
1016 | /* enable device global interrupt */ | |
1017 | value = ioread32(fotg210->reg + FOTG210_DMCR); | |
1018 | value |= DMCR_GLINT_EN; | |
1019 | iowrite32(value, fotg210->reg + FOTG210_DMCR); | |
1020 | ||
1021 | return 0; | |
1022 | } | |
1023 | ||
1024 | static void fotg210_init(struct fotg210_udc *fotg210) | |
1025 | { | |
1026 | u32 value; | |
1027 | ||
1028 | /* disable global interrupt and set int polarity to active high */ | |
1029 | iowrite32(GMIR_MHC_INT | GMIR_MOTG_INT | GMIR_INT_POLARITY, | |
1030 | fotg210->reg + FOTG210_GMIR); | |
1031 | ||
1032 | /* disable device global interrupt */ | |
1033 | value = ioread32(fotg210->reg + FOTG210_DMCR); | |
1034 | value &= ~DMCR_GLINT_EN; | |
1035 | iowrite32(value, fotg210->reg + FOTG210_DMCR); | |
1036 | ||
1037 | /* disable all fifo interrupt */ | |
1038 | iowrite32(~(u32)0, fotg210->reg + FOTG210_DMISGR1); | |
1039 | ||
1040 | /* disable cmd end */ | |
1041 | value = ioread32(fotg210->reg + FOTG210_DMISGR0); | |
1042 | value |= DMISGR0_MCX_COMEND; | |
1043 | iowrite32(value, fotg210->reg + FOTG210_DMISGR0); | |
1044 | } | |
1045 | ||
22835b80 | 1046 | static int fotg210_udc_stop(struct usb_gadget *g) |
b84a8dee YHC |
1047 | { |
1048 | struct fotg210_udc *fotg210 = gadget_to_fotg210(g); | |
1049 | unsigned long flags; | |
1050 | ||
1051 | spin_lock_irqsave(&fotg210->lock, flags); | |
1052 | ||
1053 | fotg210_init(fotg210); | |
1054 | fotg210->driver = NULL; | |
1055 | ||
1056 | spin_unlock_irqrestore(&fotg210->lock, flags); | |
1057 | ||
1058 | return 0; | |
1059 | } | |
1060 | ||
1061 | static struct usb_gadget_ops fotg210_gadget_ops = { | |
1062 | .udc_start = fotg210_udc_start, | |
1063 | .udc_stop = fotg210_udc_stop, | |
1064 | }; | |
1065 | ||
88ae7423 | 1066 | static int fotg210_udc_remove(struct platform_device *pdev) |
b84a8dee | 1067 | { |
3cb40a59 | 1068 | struct fotg210_udc *fotg210 = platform_get_drvdata(pdev); |
b84a8dee YHC |
1069 | |
1070 | usb_del_gadget_udc(&fotg210->gadget); | |
1071 | iounmap(fotg210->reg); | |
1072 | free_irq(platform_get_irq(pdev, 0), fotg210); | |
1073 | ||
1074 | fotg210_ep_free_request(&fotg210->ep[0]->ep, fotg210->ep0_req); | |
1075 | kfree(fotg210); | |
1076 | ||
1077 | return 0; | |
1078 | } | |
1079 | ||
88ae7423 | 1080 | static int fotg210_udc_probe(struct platform_device *pdev) |
b84a8dee YHC |
1081 | { |
1082 | struct resource *res, *ires; | |
1083 | struct fotg210_udc *fotg210 = NULL; | |
1084 | struct fotg210_ep *_ep[FOTG210_MAX_NUM_EP]; | |
1085 | int ret = 0; | |
1086 | int i; | |
1087 | ||
1088 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1089 | if (!res) { | |
1090 | pr_err("platform_get_resource error.\n"); | |
1091 | return -ENODEV; | |
1092 | } | |
1093 | ||
1094 | ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
1095 | if (!ires) { | |
1096 | pr_err("platform_get_resource IORESOURCE_IRQ error.\n"); | |
1097 | return -ENODEV; | |
1098 | } | |
1099 | ||
1100 | ret = -ENOMEM; | |
1101 | ||
1102 | /* initialize udc */ | |
1103 | fotg210 = kzalloc(sizeof(struct fotg210_udc), GFP_KERNEL); | |
0351c329 | 1104 | if (fotg210 == NULL) |
b84a8dee | 1105 | goto err_alloc; |
b84a8dee YHC |
1106 | |
1107 | for (i = 0; i < FOTG210_MAX_NUM_EP; i++) { | |
1108 | _ep[i] = kzalloc(sizeof(struct fotg210_ep), GFP_KERNEL); | |
0351c329 | 1109 | if (_ep[i] == NULL) |
b84a8dee | 1110 | goto err_alloc; |
b84a8dee YHC |
1111 | fotg210->ep[i] = _ep[i]; |
1112 | } | |
1113 | ||
1114 | fotg210->reg = ioremap(res->start, resource_size(res)); | |
1115 | if (fotg210->reg == NULL) { | |
1116 | pr_err("ioremap error.\n"); | |
1117 | goto err_map; | |
1118 | } | |
1119 | ||
1120 | spin_lock_init(&fotg210->lock); | |
1121 | ||
3cb40a59 | 1122 | platform_set_drvdata(pdev, fotg210); |
b84a8dee YHC |
1123 | |
1124 | fotg210->gadget.ops = &fotg210_gadget_ops; | |
1125 | ||
1126 | fotg210->gadget.max_speed = USB_SPEED_HIGH; | |
1127 | fotg210->gadget.dev.parent = &pdev->dev; | |
1128 | fotg210->gadget.dev.dma_mask = pdev->dev.dma_mask; | |
1129 | fotg210->gadget.name = udc_name; | |
1130 | ||
1131 | INIT_LIST_HEAD(&fotg210->gadget.ep_list); | |
1132 | ||
1133 | for (i = 0; i < FOTG210_MAX_NUM_EP; i++) { | |
1134 | struct fotg210_ep *ep = fotg210->ep[i]; | |
1135 | ||
1136 | if (i) { | |
1137 | INIT_LIST_HEAD(&fotg210->ep[i]->ep.ep_list); | |
1138 | list_add_tail(&fotg210->ep[i]->ep.ep_list, | |
1139 | &fotg210->gadget.ep_list); | |
1140 | } | |
1141 | ep->fotg210 = fotg210; | |
1142 | INIT_LIST_HEAD(&ep->queue); | |
1143 | ep->ep.name = fotg210_ep_name[i]; | |
1144 | ep->ep.ops = &fotg210_ep_ops; | |
e117e742 | 1145 | usb_ep_set_maxpacket_limit(&ep->ep, (unsigned short) ~0); |
8d29237a RB |
1146 | |
1147 | if (i == 0) { | |
1148 | ep->ep.caps.type_control = true; | |
1149 | } else { | |
1150 | ep->ep.caps.type_iso = true; | |
1151 | ep->ep.caps.type_bulk = true; | |
1152 | ep->ep.caps.type_int = true; | |
1153 | } | |
1154 | ||
1155 | ep->ep.caps.dir_in = true; | |
1156 | ep->ep.caps.dir_out = true; | |
b84a8dee | 1157 | } |
e117e742 | 1158 | usb_ep_set_maxpacket_limit(&fotg210->ep[0]->ep, 0x40); |
b84a8dee YHC |
1159 | fotg210->gadget.ep0 = &fotg210->ep[0]->ep; |
1160 | INIT_LIST_HEAD(&fotg210->gadget.ep0->ep_list); | |
1161 | ||
1162 | fotg210->ep0_req = fotg210_ep_alloc_request(&fotg210->ep[0]->ep, | |
1163 | GFP_KERNEL); | |
1164 | if (fotg210->ep0_req == NULL) | |
1165 | goto err_req; | |
1166 | ||
1167 | fotg210_init(fotg210); | |
1168 | ||
1169 | fotg210_disable_unplug(fotg210); | |
1170 | ||
1171 | ret = request_irq(ires->start, fotg210_irq, IRQF_SHARED, | |
1172 | udc_name, fotg210); | |
1173 | if (ret < 0) { | |
1174 | pr_err("request_irq error (%d)\n", ret); | |
2184fe63 | 1175 | goto err_req; |
b84a8dee YHC |
1176 | } |
1177 | ||
1178 | ret = usb_add_gadget_udc(&pdev->dev, &fotg210->gadget); | |
1179 | if (ret) | |
1180 | goto err_add_udc; | |
1181 | ||
1182 | dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION); | |
1183 | ||
1184 | return 0; | |
1185 | ||
1186 | err_add_udc: | |
b84a8dee YHC |
1187 | free_irq(ires->start, fotg210); |
1188 | ||
1189 | err_req: | |
1190 | fotg210_ep_free_request(&fotg210->ep[0]->ep, fotg210->ep0_req); | |
1191 | ||
1192 | err_map: | |
1193 | if (fotg210->reg) | |
1194 | iounmap(fotg210->reg); | |
1195 | ||
1196 | err_alloc: | |
1197 | kfree(fotg210); | |
1198 | ||
1199 | return ret; | |
1200 | } | |
1201 | ||
1202 | static struct platform_driver fotg210_driver = { | |
1203 | .driver = { | |
1204 | .name = (char *)udc_name, | |
b84a8dee YHC |
1205 | }, |
1206 | .probe = fotg210_udc_probe, | |
1207 | .remove = fotg210_udc_remove, | |
1208 | }; | |
1209 | ||
1210 | module_platform_driver(fotg210_driver); | |
1211 | ||
dfe29020 | 1212 | MODULE_AUTHOR("Yuan-Hsin Chen, Feng-Hsin Chiang <john453@faraday-tech.com>"); |
b84a8dee YHC |
1213 | MODULE_LICENSE("GPL"); |
1214 | MODULE_DESCRIPTION(DRIVER_DESC); |