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5fd54ace | 1 | // SPDX-License-Identifier: GPL-2.0+ |
bae4bd84 DB |
2 | /* |
3 | * at91_udc -- driver for at91-series USB peripheral controller | |
4 | * | |
5 | * Copyright (C) 2004 by Thomas Rathbone | |
6 | * Copyright (C) 2005 by HP Labs | |
7 | * Copyright (C) 2005 by David Brownell | |
bae4bd84 DB |
8 | */ |
9 | ||
f3db6e82 | 10 | #undef VERBOSE_DEBUG |
bae4bd84 DB |
11 | #undef PACKET_TRACE |
12 | ||
bae4bd84 DB |
13 | #include <linux/kernel.h> |
14 | #include <linux/module.h> | |
15 | #include <linux/platform_device.h> | |
16 | #include <linux/delay.h> | |
17 | #include <linux/ioport.h> | |
bae4bd84 | 18 | #include <linux/slab.h> |
bae4bd84 | 19 | #include <linux/errno.h> |
bae4bd84 DB |
20 | #include <linux/list.h> |
21 | #include <linux/interrupt.h> | |
22 | #include <linux/proc_fs.h> | |
eed39366 | 23 | #include <linux/prefetch.h> |
bae4bd84 | 24 | #include <linux/clk.h> |
5f848137 | 25 | #include <linux/usb/ch9.h> |
9454a57a | 26 | #include <linux/usb/gadget.h> |
d1494a34 JCPV |
27 | #include <linux/of.h> |
28 | #include <linux/of_gpio.h> | |
bcd2360c | 29 | #include <linux/platform_data/atmel.h> |
f0bceab4 BB |
30 | #include <linux/regmap.h> |
31 | #include <linux/mfd/syscon.h> | |
32 | #include <linux/mfd/syscon/atmel-matrix.h> | |
bae4bd84 DB |
33 | |
34 | #include "at91_udc.h" | |
35 | ||
36 | ||
37 | /* | |
38 | * This controller is simple and PIO-only. It's used in many AT91-series | |
8b2e7668 DB |
39 | * full speed USB controllers, including the at91rm9200 (arm920T, with MMU), |
40 | * at91sam926x (arm926ejs, with MMU), and several no-mmu versions. | |
bae4bd84 | 41 | * |
d7558148 | 42 | * This driver expects the board has been wired with two GPIOs supporting |
bae4bd84 | 43 | * a VBUS sensing IRQ, and a D+ pullup. (They may be omitted, but the |
8b2e7668 DB |
44 | * testing hasn't covered such cases.) |
45 | * | |
46 | * The pullup is most important (so it's integrated on sam926x parts). It | |
bae4bd84 | 47 | * provides software control over whether the host enumerates the device. |
8b2e7668 | 48 | * |
bae4bd84 DB |
49 | * The VBUS sensing helps during enumeration, and allows both USB clocks |
50 | * (and the transceiver) to stay gated off until they're necessary, saving | |
8b2e7668 DB |
51 | * power. During USB suspend, the 48 MHz clock is gated off in hardware; |
52 | * it may also be gated off by software during some Linux sleep states. | |
bae4bd84 DB |
53 | */ |
54 | ||
8b2e7668 | 55 | #define DRIVER_VERSION "3 May 2006" |
bae4bd84 DB |
56 | |
57 | static const char driver_name [] = "at91_udc"; | |
b9ed96d7 RB |
58 | |
59 | static const struct { | |
60 | const char *name; | |
61 | const struct usb_ep_caps caps; | |
62 | } ep_info[] = { | |
63 | #define EP_INFO(_name, _caps) \ | |
64 | { \ | |
65 | .name = _name, \ | |
66 | .caps = _caps, \ | |
67 | } | |
68 | ||
69 | EP_INFO("ep0", | |
70 | USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)), | |
71 | EP_INFO("ep1", | |
72 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)), | |
73 | EP_INFO("ep2", | |
74 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)), | |
75 | EP_INFO("ep3-int", | |
76 | USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_ALL)), | |
77 | EP_INFO("ep4", | |
78 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)), | |
79 | EP_INFO("ep5", | |
80 | USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)), | |
81 | ||
82 | #undef EP_INFO | |
a5514d14 | 83 | }; |
b9ed96d7 RB |
84 | |
85 | #define ep0name ep_info[0].name | |
bae4bd84 | 86 | |
4037242c | 87 | #define VBUS_POLL_TIMEOUT msecs_to_jiffies(1000) |
bae4bd84 | 88 | |
4f4c5e36 HH |
89 | #define at91_udp_read(udc, reg) \ |
90 | __raw_readl((udc)->udp_baseaddr + (reg)) | |
91 | #define at91_udp_write(udc, reg, val) \ | |
92 | __raw_writel((val), (udc)->udp_baseaddr + (reg)) | |
bae4bd84 DB |
93 | |
94 | /*-------------------------------------------------------------------------*/ | |
95 | ||
96 | #ifdef CONFIG_USB_GADGET_DEBUG_FILES | |
97 | ||
98 | #include <linux/seq_file.h> | |
99 | ||
100 | static const char debug_filename[] = "driver/udc"; | |
101 | ||
102 | #define FOURBITS "%s%s%s%s" | |
103 | #define EIGHTBITS FOURBITS FOURBITS | |
104 | ||
105 | static void proc_ep_show(struct seq_file *s, struct at91_ep *ep) | |
106 | { | |
107 | static char *types[] = { | |
108 | "control", "out-iso", "out-bulk", "out-int", | |
109 | "BOGUS", "in-iso", "in-bulk", "in-int"}; | |
110 | ||
111 | u32 csr; | |
112 | struct at91_request *req; | |
113 | unsigned long flags; | |
4f4c5e36 | 114 | struct at91_udc *udc = ep->udc; |
bae4bd84 | 115 | |
4f4c5e36 | 116 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
117 | |
118 | csr = __raw_readl(ep->creg); | |
119 | ||
120 | /* NOTE: not collecting per-endpoint irq statistics... */ | |
121 | ||
122 | seq_printf(s, "\n"); | |
123 | seq_printf(s, "%s, maxpacket %d %s%s %s%s\n", | |
124 | ep->ep.name, ep->ep.maxpacket, | |
125 | ep->is_in ? "in" : "out", | |
126 | ep->is_iso ? " iso" : "", | |
127 | ep->is_pingpong | |
128 | ? (ep->fifo_bank ? "pong" : "ping") | |
129 | : "", | |
130 | ep->stopped ? " stopped" : ""); | |
131 | seq_printf(s, "csr %08x rxbytes=%d %s %s %s" EIGHTBITS "\n", | |
132 | csr, | |
133 | (csr & 0x07ff0000) >> 16, | |
134 | (csr & (1 << 15)) ? "enabled" : "disabled", | |
135 | (csr & (1 << 11)) ? "DATA1" : "DATA0", | |
136 | types[(csr & 0x700) >> 8], | |
137 | ||
138 | /* iff type is control then print current direction */ | |
139 | (!(csr & 0x700)) | |
140 | ? ((csr & (1 << 7)) ? " IN" : " OUT") | |
141 | : "", | |
142 | (csr & (1 << 6)) ? " rxdatabk1" : "", | |
143 | (csr & (1 << 5)) ? " forcestall" : "", | |
144 | (csr & (1 << 4)) ? " txpktrdy" : "", | |
145 | ||
146 | (csr & (1 << 3)) ? " stallsent" : "", | |
147 | (csr & (1 << 2)) ? " rxsetup" : "", | |
148 | (csr & (1 << 1)) ? " rxdatabk0" : "", | |
149 | (csr & (1 << 0)) ? " txcomp" : ""); | |
150 | if (list_empty (&ep->queue)) | |
151 | seq_printf(s, "\t(queue empty)\n"); | |
152 | ||
153 | else list_for_each_entry (req, &ep->queue, queue) { | |
154 | unsigned length = req->req.actual; | |
155 | ||
156 | seq_printf(s, "\treq %p len %d/%d buf %p\n", | |
157 | &req->req, length, | |
158 | req->req.length, req->req.buf); | |
159 | } | |
4f4c5e36 | 160 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
161 | } |
162 | ||
163 | static void proc_irq_show(struct seq_file *s, const char *label, u32 mask) | |
164 | { | |
165 | int i; | |
166 | ||
167 | seq_printf(s, "%s %04x:%s%s" FOURBITS, label, mask, | |
168 | (mask & (1 << 13)) ? " wakeup" : "", | |
169 | (mask & (1 << 12)) ? " endbusres" : "", | |
170 | ||
171 | (mask & (1 << 11)) ? " sofint" : "", | |
172 | (mask & (1 << 10)) ? " extrsm" : "", | |
173 | (mask & (1 << 9)) ? " rxrsm" : "", | |
174 | (mask & (1 << 8)) ? " rxsusp" : ""); | |
175 | for (i = 0; i < 8; i++) { | |
176 | if (mask & (1 << i)) | |
177 | seq_printf(s, " ep%d", i); | |
178 | } | |
179 | seq_printf(s, "\n"); | |
180 | } | |
181 | ||
182 | static int proc_udc_show(struct seq_file *s, void *unused) | |
183 | { | |
184 | struct at91_udc *udc = s->private; | |
185 | struct at91_ep *ep; | |
186 | u32 tmp; | |
187 | ||
188 | seq_printf(s, "%s: version %s\n", driver_name, DRIVER_VERSION); | |
189 | ||
190 | seq_printf(s, "vbus %s, pullup %s, %s powered%s, gadget %s\n\n", | |
191 | udc->vbus ? "present" : "off", | |
192 | udc->enabled | |
193 | ? (udc->vbus ? "active" : "enabled") | |
194 | : "disabled", | |
7301971f | 195 | udc->gadget.is_selfpowered ? "self" : "VBUS", |
bae4bd84 DB |
196 | udc->suspended ? ", suspended" : "", |
197 | udc->driver ? udc->driver->driver.name : "(none)"); | |
198 | ||
199 | /* don't access registers when interface isn't clocked */ | |
200 | if (!udc->clocked) { | |
201 | seq_printf(s, "(not clocked)\n"); | |
202 | return 0; | |
203 | } | |
204 | ||
ffd3326b | 205 | tmp = at91_udp_read(udc, AT91_UDP_FRM_NUM); |
bae4bd84 DB |
206 | seq_printf(s, "frame %05x:%s%s frame=%d\n", tmp, |
207 | (tmp & AT91_UDP_FRM_OK) ? " ok" : "", | |
208 | (tmp & AT91_UDP_FRM_ERR) ? " err" : "", | |
209 | (tmp & AT91_UDP_NUM)); | |
210 | ||
ffd3326b | 211 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
bae4bd84 DB |
212 | seq_printf(s, "glbstate %02x:%s" FOURBITS "\n", tmp, |
213 | (tmp & AT91_UDP_RMWUPE) ? " rmwupe" : "", | |
214 | (tmp & AT91_UDP_RSMINPR) ? " rsminpr" : "", | |
215 | (tmp & AT91_UDP_ESR) ? " esr" : "", | |
216 | (tmp & AT91_UDP_CONFG) ? " confg" : "", | |
217 | (tmp & AT91_UDP_FADDEN) ? " fadden" : ""); | |
218 | ||
ffd3326b | 219 | tmp = at91_udp_read(udc, AT91_UDP_FADDR); |
bae4bd84 DB |
220 | seq_printf(s, "faddr %03x:%s fadd=%d\n", tmp, |
221 | (tmp & AT91_UDP_FEN) ? " fen" : "", | |
222 | (tmp & AT91_UDP_FADD)); | |
223 | ||
ffd3326b AV |
224 | proc_irq_show(s, "imr ", at91_udp_read(udc, AT91_UDP_IMR)); |
225 | proc_irq_show(s, "isr ", at91_udp_read(udc, AT91_UDP_ISR)); | |
bae4bd84 DB |
226 | |
227 | if (udc->enabled && udc->vbus) { | |
228 | proc_ep_show(s, &udc->ep[0]); | |
229 | list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) { | |
5a6506f0 | 230 | if (ep->ep.desc) |
bae4bd84 DB |
231 | proc_ep_show(s, ep); |
232 | } | |
233 | } | |
234 | return 0; | |
235 | } | |
236 | ||
237 | static int proc_udc_open(struct inode *inode, struct file *file) | |
238 | { | |
d9dda78b | 239 | return single_open(file, proc_udc_show, PDE_DATA(inode)); |
bae4bd84 DB |
240 | } |
241 | ||
066202dd | 242 | static const struct file_operations proc_ops = { |
cdefa185 | 243 | .owner = THIS_MODULE, |
bae4bd84 DB |
244 | .open = proc_udc_open, |
245 | .read = seq_read, | |
246 | .llseek = seq_lseek, | |
247 | .release = single_release, | |
248 | }; | |
249 | ||
250 | static void create_debug_file(struct at91_udc *udc) | |
251 | { | |
cdefa185 | 252 | udc->pde = proc_create_data(debug_filename, 0, NULL, &proc_ops, udc); |
bae4bd84 DB |
253 | } |
254 | ||
255 | static void remove_debug_file(struct at91_udc *udc) | |
256 | { | |
257 | if (udc->pde) | |
258 | remove_proc_entry(debug_filename, NULL); | |
259 | } | |
260 | ||
261 | #else | |
262 | ||
263 | static inline void create_debug_file(struct at91_udc *udc) {} | |
264 | static inline void remove_debug_file(struct at91_udc *udc) {} | |
265 | ||
266 | #endif | |
267 | ||
268 | ||
269 | /*-------------------------------------------------------------------------*/ | |
270 | ||
271 | static void done(struct at91_ep *ep, struct at91_request *req, int status) | |
272 | { | |
273 | unsigned stopped = ep->stopped; | |
ffd3326b | 274 | struct at91_udc *udc = ep->udc; |
bae4bd84 DB |
275 | |
276 | list_del_init(&req->queue); | |
277 | if (req->req.status == -EINPROGRESS) | |
278 | req->req.status = status; | |
279 | else | |
280 | status = req->req.status; | |
281 | if (status && status != -ESHUTDOWN) | |
282 | VDBG("%s done %p, status %d\n", ep->ep.name, req, status); | |
283 | ||
284 | ep->stopped = 1; | |
4f4c5e36 | 285 | spin_unlock(&udc->lock); |
304f7e5e | 286 | usb_gadget_giveback_request(&ep->ep, &req->req); |
4f4c5e36 | 287 | spin_lock(&udc->lock); |
bae4bd84 DB |
288 | ep->stopped = stopped; |
289 | ||
290 | /* ep0 is always ready; other endpoints need a non-empty queue */ | |
291 | if (list_empty(&ep->queue) && ep->int_mask != (1 << 0)) | |
ffd3326b | 292 | at91_udp_write(udc, AT91_UDP_IDR, ep->int_mask); |
bae4bd84 DB |
293 | } |
294 | ||
295 | /*-------------------------------------------------------------------------*/ | |
296 | ||
297 | /* bits indicating OUT fifo has data ready */ | |
298 | #define RX_DATA_READY (AT91_UDP_RX_DATA_BK0 | AT91_UDP_RX_DATA_BK1) | |
299 | ||
300 | /* | |
301 | * Endpoint FIFO CSR bits have a mix of bits, making it unsafe to just write | |
302 | * back most of the value you just read (because of side effects, including | |
303 | * bits that may change after reading and before writing). | |
304 | * | |
305 | * Except when changing a specific bit, always write values which: | |
306 | * - clear SET_FX bits (setting them could change something) | |
307 | * - set CLR_FX bits (clearing them could change something) | |
308 | * | |
309 | * There are also state bits like FORCESTALL, EPEDS, DIR, and EPTYPE | |
310 | * that shouldn't normally be changed. | |
8b2e7668 DB |
311 | * |
312 | * NOTE at91sam9260 docs mention synch between UDPCK and MCK clock domains, | |
313 | * implying a need to wait for one write to complete (test relevant bits) | |
314 | * before starting the next write. This shouldn't be an issue given how | |
315 | * infrequently we write, except maybe for write-then-read idioms. | |
bae4bd84 DB |
316 | */ |
317 | #define SET_FX (AT91_UDP_TXPKTRDY) | |
8b2e7668 DB |
318 | #define CLR_FX (RX_DATA_READY | AT91_UDP_RXSETUP \ |
319 | | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP) | |
bae4bd84 DB |
320 | |
321 | /* pull OUT packet data from the endpoint's fifo */ | |
322 | static int read_fifo (struct at91_ep *ep, struct at91_request *req) | |
323 | { | |
324 | u32 __iomem *creg = ep->creg; | |
325 | u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); | |
326 | u32 csr; | |
327 | u8 *buf; | |
328 | unsigned int count, bufferspace, is_done; | |
329 | ||
330 | buf = req->req.buf + req->req.actual; | |
331 | bufferspace = req->req.length - req->req.actual; | |
332 | ||
333 | /* | |
334 | * there might be nothing to read if ep_queue() calls us, | |
335 | * or if we already emptied both pingpong buffers | |
336 | */ | |
337 | rescan: | |
338 | csr = __raw_readl(creg); | |
339 | if ((csr & RX_DATA_READY) == 0) | |
340 | return 0; | |
341 | ||
342 | count = (csr & AT91_UDP_RXBYTECNT) >> 16; | |
343 | if (count > ep->ep.maxpacket) | |
344 | count = ep->ep.maxpacket; | |
345 | if (count > bufferspace) { | |
346 | DBG("%s buffer overflow\n", ep->ep.name); | |
347 | req->req.status = -EOVERFLOW; | |
348 | count = bufferspace; | |
349 | } | |
350 | __raw_readsb(dreg, buf, count); | |
351 | ||
352 | /* release and swap pingpong mem bank */ | |
353 | csr |= CLR_FX; | |
354 | if (ep->is_pingpong) { | |
355 | if (ep->fifo_bank == 0) { | |
356 | csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); | |
357 | ep->fifo_bank = 1; | |
358 | } else { | |
359 | csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK1); | |
360 | ep->fifo_bank = 0; | |
361 | } | |
362 | } else | |
363 | csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); | |
364 | __raw_writel(csr, creg); | |
365 | ||
366 | req->req.actual += count; | |
367 | is_done = (count < ep->ep.maxpacket); | |
368 | if (count == bufferspace) | |
369 | is_done = 1; | |
370 | ||
371 | PACKET("%s %p out/%d%s\n", ep->ep.name, &req->req, count, | |
372 | is_done ? " (done)" : ""); | |
373 | ||
374 | /* | |
375 | * avoid extra trips through IRQ logic for packets already in | |
376 | * the fifo ... maybe preventing an extra (expensive) OUT-NAK | |
377 | */ | |
378 | if (is_done) | |
379 | done(ep, req, 0); | |
380 | else if (ep->is_pingpong) { | |
76225374 HH |
381 | /* |
382 | * One dummy read to delay the code because of a HW glitch: | |
383 | * CSR returns bad RXCOUNT when read too soon after updating | |
384 | * RX_DATA_BK flags. | |
385 | */ | |
386 | csr = __raw_readl(creg); | |
387 | ||
bae4bd84 DB |
388 | bufferspace -= count; |
389 | buf += count; | |
390 | goto rescan; | |
391 | } | |
392 | ||
393 | return is_done; | |
394 | } | |
395 | ||
396 | /* load fifo for an IN packet */ | |
397 | static int write_fifo(struct at91_ep *ep, struct at91_request *req) | |
398 | { | |
399 | u32 __iomem *creg = ep->creg; | |
400 | u32 csr = __raw_readl(creg); | |
401 | u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); | |
402 | unsigned total, count, is_last; | |
3cf27234 | 403 | u8 *buf; |
bae4bd84 DB |
404 | |
405 | /* | |
406 | * TODO: allow for writing two packets to the fifo ... that'll | |
407 | * reduce the amount of IN-NAKing, but probably won't affect | |
408 | * throughput much. (Unlike preventing OUT-NAKing!) | |
409 | */ | |
410 | ||
411 | /* | |
412 | * If ep_queue() calls us, the queue is empty and possibly in | |
413 | * odd states like TXCOMP not yet cleared (we do it, saving at | |
414 | * least one IRQ) or the fifo not yet being free. Those aren't | |
415 | * issues normally (IRQ handler fast path). | |
416 | */ | |
417 | if (unlikely(csr & (AT91_UDP_TXCOMP | AT91_UDP_TXPKTRDY))) { | |
418 | if (csr & AT91_UDP_TXCOMP) { | |
419 | csr |= CLR_FX; | |
420 | csr &= ~(SET_FX | AT91_UDP_TXCOMP); | |
421 | __raw_writel(csr, creg); | |
422 | csr = __raw_readl(creg); | |
423 | } | |
424 | if (csr & AT91_UDP_TXPKTRDY) | |
425 | return 0; | |
426 | } | |
427 | ||
3cf27234 DB |
428 | buf = req->req.buf + req->req.actual; |
429 | prefetch(buf); | |
bae4bd84 DB |
430 | total = req->req.length - req->req.actual; |
431 | if (ep->ep.maxpacket < total) { | |
432 | count = ep->ep.maxpacket; | |
433 | is_last = 0; | |
434 | } else { | |
435 | count = total; | |
436 | is_last = (count < ep->ep.maxpacket) || !req->req.zero; | |
437 | } | |
438 | ||
439 | /* | |
440 | * Write the packet, maybe it's a ZLP. | |
441 | * | |
442 | * NOTE: incrementing req->actual before we receive the ACK means | |
443 | * gadget driver IN bytecounts can be wrong in fault cases. That's | |
444 | * fixable with PIO drivers like this one (save "count" here, and | |
445 | * do the increment later on TX irq), but not for most DMA hardware. | |
446 | * | |
447 | * So all gadget drivers must accept that potential error. Some | |
448 | * hardware supports precise fifo status reporting, letting them | |
449 | * recover when the actual bytecount matters (e.g. for USB Test | |
450 | * and Measurement Class devices). | |
451 | */ | |
3cf27234 | 452 | __raw_writesb(dreg, buf, count); |
bae4bd84 DB |
453 | csr &= ~SET_FX; |
454 | csr |= CLR_FX | AT91_UDP_TXPKTRDY; | |
455 | __raw_writel(csr, creg); | |
456 | req->req.actual += count; | |
457 | ||
458 | PACKET("%s %p in/%d%s\n", ep->ep.name, &req->req, count, | |
459 | is_last ? " (done)" : ""); | |
460 | if (is_last) | |
461 | done(ep, req, 0); | |
462 | return is_last; | |
463 | } | |
464 | ||
465 | static void nuke(struct at91_ep *ep, int status) | |
466 | { | |
467 | struct at91_request *req; | |
468 | ||
1a8060d9 | 469 | /* terminate any request in the queue */ |
bae4bd84 DB |
470 | ep->stopped = 1; |
471 | if (list_empty(&ep->queue)) | |
472 | return; | |
473 | ||
441b62c1 | 474 | VDBG("%s %s\n", __func__, ep->ep.name); |
bae4bd84 DB |
475 | while (!list_empty(&ep->queue)) { |
476 | req = list_entry(ep->queue.next, struct at91_request, queue); | |
477 | done(ep, req, status); | |
478 | } | |
479 | } | |
480 | ||
481 | /*-------------------------------------------------------------------------*/ | |
482 | ||
8b2e7668 DB |
483 | static int at91_ep_enable(struct usb_ep *_ep, |
484 | const struct usb_endpoint_descriptor *desc) | |
bae4bd84 DB |
485 | { |
486 | struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); | |
162ca3ca | 487 | struct at91_udc *udc; |
bae4bd84 DB |
488 | u16 maxpacket; |
489 | u32 tmp; | |
490 | unsigned long flags; | |
491 | ||
492 | if (!_ep || !ep | |
f3bb8e63 | 493 | || !desc || _ep->name == ep0name |
bae4bd84 | 494 | || desc->bDescriptorType != USB_DT_ENDPOINT |
29cc8897 | 495 | || (maxpacket = usb_endpoint_maxp(desc)) == 0 |
bae4bd84 DB |
496 | || maxpacket > ep->maxpacket) { |
497 | DBG("bad ep or descriptor\n"); | |
498 | return -EINVAL; | |
499 | } | |
500 | ||
162ca3ca | 501 | udc = ep->udc; |
4f4c5e36 | 502 | if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) { |
bae4bd84 DB |
503 | DBG("bogus device state\n"); |
504 | return -ESHUTDOWN; | |
505 | } | |
506 | ||
81c8d8d2 | 507 | tmp = usb_endpoint_type(desc); |
bae4bd84 DB |
508 | switch (tmp) { |
509 | case USB_ENDPOINT_XFER_CONTROL: | |
510 | DBG("only one control endpoint\n"); | |
511 | return -EINVAL; | |
512 | case USB_ENDPOINT_XFER_INT: | |
513 | if (maxpacket > 64) | |
514 | goto bogus_max; | |
515 | break; | |
516 | case USB_ENDPOINT_XFER_BULK: | |
517 | switch (maxpacket) { | |
518 | case 8: | |
519 | case 16: | |
520 | case 32: | |
521 | case 64: | |
522 | goto ok; | |
523 | } | |
524 | bogus_max: | |
525 | DBG("bogus maxpacket %d\n", maxpacket); | |
526 | return -EINVAL; | |
527 | case USB_ENDPOINT_XFER_ISOC: | |
528 | if (!ep->is_pingpong) { | |
529 | DBG("iso requires double buffering\n"); | |
530 | return -EINVAL; | |
531 | } | |
532 | break; | |
533 | } | |
534 | ||
535 | ok: | |
4f4c5e36 | 536 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
537 | |
538 | /* initialize endpoint to match this descriptor */ | |
81c8d8d2 | 539 | ep->is_in = usb_endpoint_dir_in(desc); |
bae4bd84 DB |
540 | ep->is_iso = (tmp == USB_ENDPOINT_XFER_ISOC); |
541 | ep->stopped = 0; | |
542 | if (ep->is_in) | |
543 | tmp |= 0x04; | |
544 | tmp <<= 8; | |
545 | tmp |= AT91_UDP_EPEDS; | |
546 | __raw_writel(tmp, ep->creg); | |
547 | ||
bae4bd84 DB |
548 | ep->ep.maxpacket = maxpacket; |
549 | ||
550 | /* | |
551 | * reset/init endpoint fifo. NOTE: leaves fifo_bank alone, | |
552 | * since endpoint resets don't reset hw pingpong state. | |
553 | */ | |
4f4c5e36 HH |
554 | at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); |
555 | at91_udp_write(udc, AT91_UDP_RST_EP, 0); | |
bae4bd84 | 556 | |
4f4c5e36 | 557 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
558 | return 0; |
559 | } | |
560 | ||
561 | static int at91_ep_disable (struct usb_ep * _ep) | |
562 | { | |
563 | struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); | |
ffd3326b | 564 | struct at91_udc *udc = ep->udc; |
bae4bd84 DB |
565 | unsigned long flags; |
566 | ||
567 | if (ep == &ep->udc->ep[0]) | |
568 | return -EINVAL; | |
569 | ||
4f4c5e36 | 570 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
571 | |
572 | nuke(ep, -ESHUTDOWN); | |
573 | ||
574 | /* restore the endpoint's pristine config */ | |
f9c56cdd | 575 | ep->ep.desc = NULL; |
bae4bd84 DB |
576 | ep->ep.maxpacket = ep->maxpacket; |
577 | ||
578 | /* reset fifos and endpoint */ | |
579 | if (ep->udc->clocked) { | |
ffd3326b AV |
580 | at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); |
581 | at91_udp_write(udc, AT91_UDP_RST_EP, 0); | |
bae4bd84 DB |
582 | __raw_writel(0, ep->creg); |
583 | } | |
584 | ||
4f4c5e36 | 585 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
586 | return 0; |
587 | } | |
588 | ||
589 | /* | |
590 | * this is a PIO-only driver, so there's nothing | |
591 | * interesting for request or buffer allocation. | |
592 | */ | |
593 | ||
8b2e7668 | 594 | static struct usb_request * |
f3db6e82 | 595 | at91_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) |
bae4bd84 DB |
596 | { |
597 | struct at91_request *req; | |
598 | ||
cd861280 | 599 | req = kzalloc(sizeof (struct at91_request), gfp_flags); |
bae4bd84 DB |
600 | if (!req) |
601 | return NULL; | |
602 | ||
603 | INIT_LIST_HEAD(&req->queue); | |
604 | return &req->req; | |
605 | } | |
606 | ||
607 | static void at91_ep_free_request(struct usb_ep *_ep, struct usb_request *_req) | |
608 | { | |
609 | struct at91_request *req; | |
610 | ||
611 | req = container_of(_req, struct at91_request, req); | |
612 | BUG_ON(!list_empty(&req->queue)); | |
613 | kfree(req); | |
614 | } | |
615 | ||
bae4bd84 DB |
616 | static int at91_ep_queue(struct usb_ep *_ep, |
617 | struct usb_request *_req, gfp_t gfp_flags) | |
618 | { | |
619 | struct at91_request *req; | |
620 | struct at91_ep *ep; | |
4f4c5e36 | 621 | struct at91_udc *udc; |
bae4bd84 DB |
622 | int status; |
623 | unsigned long flags; | |
624 | ||
625 | req = container_of(_req, struct at91_request, req); | |
626 | ep = container_of(_ep, struct at91_ep, ep); | |
627 | ||
628 | if (!_req || !_req->complete | |
629 | || !_req->buf || !list_empty(&req->queue)) { | |
630 | DBG("invalid request\n"); | |
631 | return -EINVAL; | |
632 | } | |
633 | ||
5a6506f0 | 634 | if (!_ep || (!ep->ep.desc && ep->ep.name != ep0name)) { |
bae4bd84 DB |
635 | DBG("invalid ep\n"); |
636 | return -EINVAL; | |
637 | } | |
638 | ||
4f4c5e36 | 639 | udc = ep->udc; |
bae4bd84 | 640 | |
4f4c5e36 | 641 | if (!udc || !udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) { |
bae4bd84 DB |
642 | DBG("invalid device\n"); |
643 | return -EINVAL; | |
644 | } | |
645 | ||
646 | _req->status = -EINPROGRESS; | |
647 | _req->actual = 0; | |
648 | ||
4f4c5e36 | 649 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
650 | |
651 | /* try to kickstart any empty and idle queue */ | |
652 | if (list_empty(&ep->queue) && !ep->stopped) { | |
653 | int is_ep0; | |
654 | ||
655 | /* | |
656 | * If this control request has a non-empty DATA stage, this | |
657 | * will start that stage. It works just like a non-control | |
658 | * request (until the status stage starts, maybe early). | |
659 | * | |
660 | * If the data stage is empty, then this starts a successful | |
661 | * IN/STATUS stage. (Unsuccessful ones use set_halt.) | |
662 | */ | |
663 | is_ep0 = (ep->ep.name == ep0name); | |
664 | if (is_ep0) { | |
665 | u32 tmp; | |
666 | ||
4f4c5e36 | 667 | if (!udc->req_pending) { |
bae4bd84 DB |
668 | status = -EINVAL; |
669 | goto done; | |
670 | } | |
671 | ||
672 | /* | |
673 | * defer changing CONFG until after the gadget driver | |
674 | * reconfigures the endpoints. | |
675 | */ | |
4f4c5e36 HH |
676 | if (udc->wait_for_config_ack) { |
677 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); | |
bae4bd84 DB |
678 | tmp ^= AT91_UDP_CONFG; |
679 | VDBG("toggle config\n"); | |
4f4c5e36 | 680 | at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); |
bae4bd84 DB |
681 | } |
682 | if (req->req.length == 0) { | |
683 | ep0_in_status: | |
684 | PACKET("ep0 in/status\n"); | |
685 | status = 0; | |
686 | tmp = __raw_readl(ep->creg); | |
687 | tmp &= ~SET_FX; | |
688 | tmp |= CLR_FX | AT91_UDP_TXPKTRDY; | |
689 | __raw_writel(tmp, ep->creg); | |
4f4c5e36 | 690 | udc->req_pending = 0; |
bae4bd84 DB |
691 | goto done; |
692 | } | |
693 | } | |
694 | ||
695 | if (ep->is_in) | |
696 | status = write_fifo(ep, req); | |
697 | else { | |
698 | status = read_fifo(ep, req); | |
699 | ||
700 | /* IN/STATUS stage is otherwise triggered by irq */ | |
701 | if (status && is_ep0) | |
702 | goto ep0_in_status; | |
703 | } | |
704 | } else | |
705 | status = 0; | |
706 | ||
707 | if (req && !status) { | |
708 | list_add_tail (&req->queue, &ep->queue); | |
4f4c5e36 | 709 | at91_udp_write(udc, AT91_UDP_IER, ep->int_mask); |
bae4bd84 DB |
710 | } |
711 | done: | |
4f4c5e36 | 712 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
713 | return (status < 0) ? status : 0; |
714 | } | |
715 | ||
716 | static int at91_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) | |
717 | { | |
4f4c5e36 | 718 | struct at91_ep *ep; |
bae4bd84 | 719 | struct at91_request *req; |
4f4c5e36 HH |
720 | unsigned long flags; |
721 | struct at91_udc *udc; | |
bae4bd84 DB |
722 | |
723 | ep = container_of(_ep, struct at91_ep, ep); | |
724 | if (!_ep || ep->ep.name == ep0name) | |
725 | return -EINVAL; | |
726 | ||
4f4c5e36 HH |
727 | udc = ep->udc; |
728 | ||
729 | spin_lock_irqsave(&udc->lock, flags); | |
730 | ||
bae4bd84 DB |
731 | /* make sure it's actually queued on this endpoint */ |
732 | list_for_each_entry (req, &ep->queue, queue) { | |
733 | if (&req->req == _req) | |
734 | break; | |
735 | } | |
4f4c5e36 HH |
736 | if (&req->req != _req) { |
737 | spin_unlock_irqrestore(&udc->lock, flags); | |
bae4bd84 | 738 | return -EINVAL; |
4f4c5e36 | 739 | } |
bae4bd84 DB |
740 | |
741 | done(ep, req, -ECONNRESET); | |
4f4c5e36 | 742 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
743 | return 0; |
744 | } | |
745 | ||
746 | static int at91_ep_set_halt(struct usb_ep *_ep, int value) | |
747 | { | |
748 | struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); | |
ffd3326b | 749 | struct at91_udc *udc = ep->udc; |
bae4bd84 DB |
750 | u32 __iomem *creg; |
751 | u32 csr; | |
752 | unsigned long flags; | |
753 | int status = 0; | |
754 | ||
755 | if (!_ep || ep->is_iso || !ep->udc->clocked) | |
756 | return -EINVAL; | |
757 | ||
758 | creg = ep->creg; | |
4f4c5e36 | 759 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
760 | |
761 | csr = __raw_readl(creg); | |
762 | ||
763 | /* | |
764 | * fail with still-busy IN endpoints, ensuring correct sequencing | |
765 | * of data tx then stall. note that the fifo rx bytecount isn't | |
766 | * completely accurate as a tx bytecount. | |
767 | */ | |
768 | if (ep->is_in && (!list_empty(&ep->queue) || (csr >> 16) != 0)) | |
769 | status = -EAGAIN; | |
770 | else { | |
771 | csr |= CLR_FX; | |
772 | csr &= ~SET_FX; | |
773 | if (value) { | |
774 | csr |= AT91_UDP_FORCESTALL; | |
775 | VDBG("halt %s\n", ep->ep.name); | |
776 | } else { | |
ffd3326b AV |
777 | at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); |
778 | at91_udp_write(udc, AT91_UDP_RST_EP, 0); | |
bae4bd84 DB |
779 | csr &= ~AT91_UDP_FORCESTALL; |
780 | } | |
781 | __raw_writel(csr, creg); | |
782 | } | |
783 | ||
4f4c5e36 | 784 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
785 | return status; |
786 | } | |
787 | ||
398acce7 | 788 | static const struct usb_ep_ops at91_ep_ops = { |
bae4bd84 DB |
789 | .enable = at91_ep_enable, |
790 | .disable = at91_ep_disable, | |
791 | .alloc_request = at91_ep_alloc_request, | |
792 | .free_request = at91_ep_free_request, | |
bae4bd84 DB |
793 | .queue = at91_ep_queue, |
794 | .dequeue = at91_ep_dequeue, | |
795 | .set_halt = at91_ep_set_halt, | |
1a8060d9 | 796 | /* there's only imprecise fifo status reporting */ |
bae4bd84 DB |
797 | }; |
798 | ||
799 | /*-------------------------------------------------------------------------*/ | |
800 | ||
801 | static int at91_get_frame(struct usb_gadget *gadget) | |
802 | { | |
ffd3326b AV |
803 | struct at91_udc *udc = to_udc(gadget); |
804 | ||
bae4bd84 DB |
805 | if (!to_udc(gadget)->clocked) |
806 | return -EINVAL; | |
ffd3326b | 807 | return at91_udp_read(udc, AT91_UDP_FRM_NUM) & AT91_UDP_NUM; |
bae4bd84 DB |
808 | } |
809 | ||
810 | static int at91_wakeup(struct usb_gadget *gadget) | |
811 | { | |
812 | struct at91_udc *udc = to_udc(gadget); | |
813 | u32 glbstate; | |
814 | int status = -EINVAL; | |
815 | unsigned long flags; | |
816 | ||
441b62c1 | 817 | DBG("%s\n", __func__ ); |
4f4c5e36 | 818 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
819 | |
820 | if (!udc->clocked || !udc->suspended) | |
821 | goto done; | |
822 | ||
823 | /* NOTE: some "early versions" handle ESR differently ... */ | |
824 | ||
ffd3326b | 825 | glbstate = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
bae4bd84 DB |
826 | if (!(glbstate & AT91_UDP_ESR)) |
827 | goto done; | |
828 | glbstate |= AT91_UDP_ESR; | |
ffd3326b | 829 | at91_udp_write(udc, AT91_UDP_GLB_STAT, glbstate); |
bae4bd84 DB |
830 | |
831 | done: | |
4f4c5e36 | 832 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
833 | return status; |
834 | } | |
835 | ||
25985edc | 836 | /* reinit == restore initial software state */ |
bae4bd84 DB |
837 | static void udc_reinit(struct at91_udc *udc) |
838 | { | |
839 | u32 i; | |
840 | ||
841 | INIT_LIST_HEAD(&udc->gadget.ep_list); | |
842 | INIT_LIST_HEAD(&udc->gadget.ep0->ep_list); | |
02ded1b0 | 843 | udc->gadget.quirk_stall_not_supp = 1; |
bae4bd84 DB |
844 | |
845 | for (i = 0; i < NUM_ENDPOINTS; i++) { | |
846 | struct at91_ep *ep = &udc->ep[i]; | |
847 | ||
848 | if (i != 0) | |
849 | list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); | |
5a6506f0 | 850 | ep->ep.desc = NULL; |
bae4bd84 DB |
851 | ep->stopped = 0; |
852 | ep->fifo_bank = 0; | |
e117e742 | 853 | usb_ep_set_maxpacket_limit(&ep->ep, ep->maxpacket); |
ffd3326b | 854 | ep->creg = (void __iomem *) udc->udp_baseaddr + AT91_UDP_CSR(i); |
1a8060d9 | 855 | /* initialize one queue per endpoint */ |
bae4bd84 DB |
856 | INIT_LIST_HEAD(&ep->queue); |
857 | } | |
858 | } | |
859 | ||
236e5064 PC |
860 | static void reset_gadget(struct at91_udc *udc) |
861 | { | |
862 | struct usb_gadget_driver *driver = udc->driver; | |
863 | int i; | |
864 | ||
865 | if (udc->gadget.speed == USB_SPEED_UNKNOWN) | |
866 | driver = NULL; | |
867 | udc->gadget.speed = USB_SPEED_UNKNOWN; | |
868 | udc->suspended = 0; | |
869 | ||
870 | for (i = 0; i < NUM_ENDPOINTS; i++) { | |
871 | struct at91_ep *ep = &udc->ep[i]; | |
872 | ||
873 | ep->stopped = 1; | |
874 | nuke(ep, -ESHUTDOWN); | |
875 | } | |
876 | if (driver) { | |
877 | spin_unlock(&udc->lock); | |
878 | usb_gadget_udc_reset(&udc->gadget, driver); | |
879 | spin_lock(&udc->lock); | |
880 | } | |
881 | ||
882 | udc_reinit(udc); | |
883 | } | |
884 | ||
bae4bd84 DB |
885 | static void stop_activity(struct at91_udc *udc) |
886 | { | |
887 | struct usb_gadget_driver *driver = udc->driver; | |
888 | int i; | |
889 | ||
890 | if (udc->gadget.speed == USB_SPEED_UNKNOWN) | |
891 | driver = NULL; | |
892 | udc->gadget.speed = USB_SPEED_UNKNOWN; | |
8b2e7668 | 893 | udc->suspended = 0; |
bae4bd84 DB |
894 | |
895 | for (i = 0; i < NUM_ENDPOINTS; i++) { | |
896 | struct at91_ep *ep = &udc->ep[i]; | |
897 | ep->stopped = 1; | |
898 | nuke(ep, -ESHUTDOWN); | |
899 | } | |
4f4c5e36 HH |
900 | if (driver) { |
901 | spin_unlock(&udc->lock); | |
bae4bd84 | 902 | driver->disconnect(&udc->gadget); |
4f4c5e36 HH |
903 | spin_lock(&udc->lock); |
904 | } | |
bae4bd84 DB |
905 | |
906 | udc_reinit(udc); | |
907 | } | |
908 | ||
909 | static void clk_on(struct at91_udc *udc) | |
910 | { | |
911 | if (udc->clocked) | |
912 | return; | |
913 | udc->clocked = 1; | |
c0aefc75 | 914 | |
b2ba27a5 RW |
915 | clk_enable(udc->iclk); |
916 | clk_enable(udc->fclk); | |
bae4bd84 DB |
917 | } |
918 | ||
919 | static void clk_off(struct at91_udc *udc) | |
920 | { | |
921 | if (!udc->clocked) | |
922 | return; | |
923 | udc->clocked = 0; | |
924 | udc->gadget.speed = USB_SPEED_UNKNOWN; | |
b2ba27a5 RW |
925 | clk_disable(udc->fclk); |
926 | clk_disable(udc->iclk); | |
bae4bd84 DB |
927 | } |
928 | ||
929 | /* | |
930 | * activate/deactivate link with host; minimize power usage for | |
931 | * inactive links by cutting clocks and transceiver power. | |
932 | */ | |
933 | static void pullup(struct at91_udc *udc, int is_on) | |
934 | { | |
935 | if (!udc->enabled || !udc->vbus) | |
936 | is_on = 0; | |
937 | DBG("%sactive\n", is_on ? "" : "in"); | |
ffd3326b | 938 | |
bae4bd84 DB |
939 | if (is_on) { |
940 | clk_on(udc); | |
08cbc706 | 941 | at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM); |
ffd3326b | 942 | at91_udp_write(udc, AT91_UDP_TXVC, 0); |
ffd3326b | 943 | } else { |
bae4bd84 | 944 | stop_activity(udc); |
08cbc706 | 945 | at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM); |
ffd3326b | 946 | at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS); |
bae4bd84 | 947 | clk_off(udc); |
bae4bd84 | 948 | } |
f0bceab4 BB |
949 | |
950 | if (udc->caps && udc->caps->pullup) | |
951 | udc->caps->pullup(udc, is_on); | |
bae4bd84 DB |
952 | } |
953 | ||
954 | /* vbus is here! turn everything on that's ready */ | |
955 | static int at91_vbus_session(struct usb_gadget *gadget, int is_active) | |
956 | { | |
957 | struct at91_udc *udc = to_udc(gadget); | |
958 | unsigned long flags; | |
959 | ||
1a8060d9 | 960 | /* VDBG("vbus %s\n", is_active ? "on" : "off"); */ |
4f4c5e36 | 961 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 | 962 | udc->vbus = (is_active != 0); |
bfb7fb79 WK |
963 | if (udc->driver) |
964 | pullup(udc, is_active); | |
965 | else | |
966 | pullup(udc, 0); | |
4f4c5e36 | 967 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
968 | return 0; |
969 | } | |
970 | ||
971 | static int at91_pullup(struct usb_gadget *gadget, int is_on) | |
972 | { | |
973 | struct at91_udc *udc = to_udc(gadget); | |
974 | unsigned long flags; | |
975 | ||
4f4c5e36 | 976 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
977 | udc->enabled = is_on = !!is_on; |
978 | pullup(udc, is_on); | |
4f4c5e36 | 979 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
980 | return 0; |
981 | } | |
982 | ||
983 | static int at91_set_selfpowered(struct usb_gadget *gadget, int is_on) | |
984 | { | |
985 | struct at91_udc *udc = to_udc(gadget); | |
986 | unsigned long flags; | |
987 | ||
4f4c5e36 | 988 | spin_lock_irqsave(&udc->lock, flags); |
7301971f | 989 | gadget->is_selfpowered = (is_on != 0); |
4f4c5e36 | 990 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
991 | return 0; |
992 | } | |
993 | ||
f3d8bf34 SAS |
994 | static int at91_start(struct usb_gadget *gadget, |
995 | struct usb_gadget_driver *driver); | |
22835b80 FB |
996 | static int at91_stop(struct usb_gadget *gadget); |
997 | ||
bae4bd84 DB |
998 | static const struct usb_gadget_ops at91_udc_ops = { |
999 | .get_frame = at91_get_frame, | |
1000 | .wakeup = at91_wakeup, | |
1001 | .set_selfpowered = at91_set_selfpowered, | |
1002 | .vbus_session = at91_vbus_session, | |
1003 | .pullup = at91_pullup, | |
f3d8bf34 SAS |
1004 | .udc_start = at91_start, |
1005 | .udc_stop = at91_stop, | |
bae4bd84 DB |
1006 | |
1007 | /* | |
1008 | * VBUS-powered devices may also also want to support bigger | |
1009 | * power budgets after an appropriate SET_CONFIGURATION. | |
1010 | */ | |
1a8060d9 | 1011 | /* .vbus_power = at91_vbus_power, */ |
bae4bd84 DB |
1012 | }; |
1013 | ||
1014 | /*-------------------------------------------------------------------------*/ | |
1015 | ||
1016 | static int handle_ep(struct at91_ep *ep) | |
1017 | { | |
1018 | struct at91_request *req; | |
1019 | u32 __iomem *creg = ep->creg; | |
1020 | u32 csr = __raw_readl(creg); | |
1021 | ||
1022 | if (!list_empty(&ep->queue)) | |
1023 | req = list_entry(ep->queue.next, | |
1024 | struct at91_request, queue); | |
1025 | else | |
1026 | req = NULL; | |
1027 | ||
1028 | if (ep->is_in) { | |
1029 | if (csr & (AT91_UDP_STALLSENT | AT91_UDP_TXCOMP)) { | |
1030 | csr |= CLR_FX; | |
1031 | csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP); | |
1032 | __raw_writel(csr, creg); | |
1033 | } | |
1034 | if (req) | |
1035 | return write_fifo(ep, req); | |
1036 | ||
1037 | } else { | |
1038 | if (csr & AT91_UDP_STALLSENT) { | |
1039 | /* STALLSENT bit == ISOERR */ | |
1040 | if (ep->is_iso && req) | |
1041 | req->req.status = -EILSEQ; | |
1042 | csr |= CLR_FX; | |
1043 | csr &= ~(SET_FX | AT91_UDP_STALLSENT); | |
1044 | __raw_writel(csr, creg); | |
1045 | csr = __raw_readl(creg); | |
1046 | } | |
1047 | if (req && (csr & RX_DATA_READY)) | |
1048 | return read_fifo(ep, req); | |
1049 | } | |
1050 | return 0; | |
1051 | } | |
1052 | ||
1053 | union setup { | |
1054 | u8 raw[8]; | |
1055 | struct usb_ctrlrequest r; | |
1056 | }; | |
1057 | ||
1058 | static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr) | |
1059 | { | |
1060 | u32 __iomem *creg = ep->creg; | |
1061 | u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); | |
1062 | unsigned rxcount, i = 0; | |
1063 | u32 tmp; | |
1064 | union setup pkt; | |
1065 | int status = 0; | |
1066 | ||
1067 | /* read and ack SETUP; hard-fail for bogus packets */ | |
1068 | rxcount = (csr & AT91_UDP_RXBYTECNT) >> 16; | |
1069 | if (likely(rxcount == 8)) { | |
1070 | while (rxcount--) | |
1071 | pkt.raw[i++] = __raw_readb(dreg); | |
1072 | if (pkt.r.bRequestType & USB_DIR_IN) { | |
1073 | csr |= AT91_UDP_DIR; | |
1074 | ep->is_in = 1; | |
1075 | } else { | |
1076 | csr &= ~AT91_UDP_DIR; | |
1077 | ep->is_in = 0; | |
1078 | } | |
1079 | } else { | |
1a8060d9 | 1080 | /* REVISIT this happens sometimes under load; why?? */ |
bae4bd84 DB |
1081 | ERR("SETUP len %d, csr %08x\n", rxcount, csr); |
1082 | status = -EINVAL; | |
1083 | } | |
1084 | csr |= CLR_FX; | |
1085 | csr &= ~(SET_FX | AT91_UDP_RXSETUP); | |
1086 | __raw_writel(csr, creg); | |
1087 | udc->wait_for_addr_ack = 0; | |
1088 | udc->wait_for_config_ack = 0; | |
1089 | ep->stopped = 0; | |
1090 | if (unlikely(status != 0)) | |
1091 | goto stall; | |
1092 | ||
1093 | #define w_index le16_to_cpu(pkt.r.wIndex) | |
1094 | #define w_value le16_to_cpu(pkt.r.wValue) | |
1095 | #define w_length le16_to_cpu(pkt.r.wLength) | |
1096 | ||
1097 | VDBG("SETUP %02x.%02x v%04x i%04x l%04x\n", | |
1098 | pkt.r.bRequestType, pkt.r.bRequest, | |
1099 | w_value, w_index, w_length); | |
1100 | ||
1101 | /* | |
1102 | * A few standard requests get handled here, ones that touch | |
1103 | * hardware ... notably for device and endpoint features. | |
1104 | */ | |
1105 | udc->req_pending = 1; | |
1106 | csr = __raw_readl(creg); | |
1107 | csr |= CLR_FX; | |
1108 | csr &= ~SET_FX; | |
1109 | switch ((pkt.r.bRequestType << 8) | pkt.r.bRequest) { | |
1110 | ||
1111 | case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) | |
1112 | | USB_REQ_SET_ADDRESS: | |
1113 | __raw_writel(csr | AT91_UDP_TXPKTRDY, creg); | |
1114 | udc->addr = w_value; | |
1115 | udc->wait_for_addr_ack = 1; | |
1116 | udc->req_pending = 0; | |
1117 | /* FADDR is set later, when we ack host STATUS */ | |
1118 | return; | |
1119 | ||
1120 | case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) | |
1121 | | USB_REQ_SET_CONFIGURATION: | |
ffd3326b | 1122 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_CONFG; |
bae4bd84 DB |
1123 | if (pkt.r.wValue) |
1124 | udc->wait_for_config_ack = (tmp == 0); | |
1125 | else | |
1126 | udc->wait_for_config_ack = (tmp != 0); | |
1127 | if (udc->wait_for_config_ack) | |
1128 | VDBG("wait for config\n"); | |
1129 | /* CONFG is toggled later, if gadget driver succeeds */ | |
1130 | break; | |
1131 | ||
1132 | /* | |
1133 | * Hosts may set or clear remote wakeup status, and | |
1134 | * devices may report they're VBUS powered. | |
1135 | */ | |
1136 | case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) | |
1137 | | USB_REQ_GET_STATUS: | |
7301971f | 1138 | tmp = (udc->gadget.is_selfpowered << USB_DEVICE_SELF_POWERED); |
ffd3326b | 1139 | if (at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_ESR) |
bae4bd84 DB |
1140 | tmp |= (1 << USB_DEVICE_REMOTE_WAKEUP); |
1141 | PACKET("get device status\n"); | |
1142 | __raw_writeb(tmp, dreg); | |
1143 | __raw_writeb(0, dreg); | |
1144 | goto write_in; | |
1145 | /* then STATUS starts later, automatically */ | |
1146 | case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) | |
1147 | | USB_REQ_SET_FEATURE: | |
1148 | if (w_value != USB_DEVICE_REMOTE_WAKEUP) | |
1149 | goto stall; | |
ffd3326b | 1150 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
bae4bd84 | 1151 | tmp |= AT91_UDP_ESR; |
ffd3326b | 1152 | at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); |
bae4bd84 DB |
1153 | goto succeed; |
1154 | case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) | |
1155 | | USB_REQ_CLEAR_FEATURE: | |
1156 | if (w_value != USB_DEVICE_REMOTE_WAKEUP) | |
1157 | goto stall; | |
ffd3326b | 1158 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
bae4bd84 | 1159 | tmp &= ~AT91_UDP_ESR; |
ffd3326b | 1160 | at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); |
bae4bd84 DB |
1161 | goto succeed; |
1162 | ||
1163 | /* | |
1164 | * Interfaces have no feature settings; this is pretty useless. | |
1165 | * we won't even insist the interface exists... | |
1166 | */ | |
1167 | case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) | |
1168 | | USB_REQ_GET_STATUS: | |
1169 | PACKET("get interface status\n"); | |
1170 | __raw_writeb(0, dreg); | |
1171 | __raw_writeb(0, dreg); | |
1172 | goto write_in; | |
1173 | /* then STATUS starts later, automatically */ | |
1174 | case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) | |
1175 | | USB_REQ_SET_FEATURE: | |
1176 | case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) | |
1177 | | USB_REQ_CLEAR_FEATURE: | |
1178 | goto stall; | |
1179 | ||
1180 | /* | |
1181 | * Hosts may clear bulk/intr endpoint halt after the gadget | |
1182 | * driver sets it (not widely used); or set it (for testing) | |
1183 | */ | |
1184 | case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) | |
1185 | | USB_REQ_GET_STATUS: | |
1186 | tmp = w_index & USB_ENDPOINT_NUMBER_MASK; | |
1187 | ep = &udc->ep[tmp]; | |
5a6506f0 | 1188 | if (tmp >= NUM_ENDPOINTS || (tmp && !ep->ep.desc)) |
bae4bd84 DB |
1189 | goto stall; |
1190 | ||
1191 | if (tmp) { | |
1192 | if ((w_index & USB_DIR_IN)) { | |
1193 | if (!ep->is_in) | |
1194 | goto stall; | |
1195 | } else if (ep->is_in) | |
1196 | goto stall; | |
1197 | } | |
1198 | PACKET("get %s status\n", ep->ep.name); | |
1199 | if (__raw_readl(ep->creg) & AT91_UDP_FORCESTALL) | |
1200 | tmp = (1 << USB_ENDPOINT_HALT); | |
1201 | else | |
1202 | tmp = 0; | |
1203 | __raw_writeb(tmp, dreg); | |
1204 | __raw_writeb(0, dreg); | |
1205 | goto write_in; | |
1206 | /* then STATUS starts later, automatically */ | |
1207 | case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) | |
1208 | | USB_REQ_SET_FEATURE: | |
1209 | tmp = w_index & USB_ENDPOINT_NUMBER_MASK; | |
1210 | ep = &udc->ep[tmp]; | |
1440e096 | 1211 | if (w_value != USB_ENDPOINT_HALT || tmp >= NUM_ENDPOINTS) |
bae4bd84 | 1212 | goto stall; |
5a6506f0 | 1213 | if (!ep->ep.desc || ep->is_iso) |
bae4bd84 DB |
1214 | goto stall; |
1215 | if ((w_index & USB_DIR_IN)) { | |
1216 | if (!ep->is_in) | |
1217 | goto stall; | |
1218 | } else if (ep->is_in) | |
1219 | goto stall; | |
1220 | ||
1221 | tmp = __raw_readl(ep->creg); | |
1222 | tmp &= ~SET_FX; | |
1223 | tmp |= CLR_FX | AT91_UDP_FORCESTALL; | |
1224 | __raw_writel(tmp, ep->creg); | |
1225 | goto succeed; | |
1226 | case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) | |
1227 | | USB_REQ_CLEAR_FEATURE: | |
1228 | tmp = w_index & USB_ENDPOINT_NUMBER_MASK; | |
1229 | ep = &udc->ep[tmp]; | |
1440e096 | 1230 | if (w_value != USB_ENDPOINT_HALT || tmp >= NUM_ENDPOINTS) |
bae4bd84 DB |
1231 | goto stall; |
1232 | if (tmp == 0) | |
1233 | goto succeed; | |
5a6506f0 | 1234 | if (!ep->ep.desc || ep->is_iso) |
bae4bd84 DB |
1235 | goto stall; |
1236 | if ((w_index & USB_DIR_IN)) { | |
1237 | if (!ep->is_in) | |
1238 | goto stall; | |
1239 | } else if (ep->is_in) | |
1240 | goto stall; | |
1241 | ||
ffd3326b AV |
1242 | at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); |
1243 | at91_udp_write(udc, AT91_UDP_RST_EP, 0); | |
bae4bd84 DB |
1244 | tmp = __raw_readl(ep->creg); |
1245 | tmp |= CLR_FX; | |
1246 | tmp &= ~(SET_FX | AT91_UDP_FORCESTALL); | |
1247 | __raw_writel(tmp, ep->creg); | |
1248 | if (!list_empty(&ep->queue)) | |
1249 | handle_ep(ep); | |
1250 | goto succeed; | |
1251 | } | |
1252 | ||
1253 | #undef w_value | |
1254 | #undef w_index | |
1255 | #undef w_length | |
1256 | ||
1257 | /* pass request up to the gadget driver */ | |
4f4c5e36 HH |
1258 | if (udc->driver) { |
1259 | spin_unlock(&udc->lock); | |
bfb7fb79 | 1260 | status = udc->driver->setup(&udc->gadget, &pkt.r); |
4f4c5e36 HH |
1261 | spin_lock(&udc->lock); |
1262 | } | |
bfb7fb79 WK |
1263 | else |
1264 | status = -ENODEV; | |
bae4bd84 DB |
1265 | if (status < 0) { |
1266 | stall: | |
1267 | VDBG("req %02x.%02x protocol STALL; stat %d\n", | |
1268 | pkt.r.bRequestType, pkt.r.bRequest, status); | |
1269 | csr |= AT91_UDP_FORCESTALL; | |
1270 | __raw_writel(csr, creg); | |
1271 | udc->req_pending = 0; | |
1272 | } | |
1273 | return; | |
1274 | ||
1275 | succeed: | |
1276 | /* immediate successful (IN) STATUS after zero length DATA */ | |
1277 | PACKET("ep0 in/status\n"); | |
1278 | write_in: | |
1279 | csr |= AT91_UDP_TXPKTRDY; | |
1280 | __raw_writel(csr, creg); | |
1281 | udc->req_pending = 0; | |
bae4bd84 DB |
1282 | } |
1283 | ||
1284 | static void handle_ep0(struct at91_udc *udc) | |
1285 | { | |
1286 | struct at91_ep *ep0 = &udc->ep[0]; | |
1287 | u32 __iomem *creg = ep0->creg; | |
1288 | u32 csr = __raw_readl(creg); | |
1289 | struct at91_request *req; | |
1290 | ||
1291 | if (unlikely(csr & AT91_UDP_STALLSENT)) { | |
1292 | nuke(ep0, -EPROTO); | |
1293 | udc->req_pending = 0; | |
1294 | csr |= CLR_FX; | |
1295 | csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_FORCESTALL); | |
1296 | __raw_writel(csr, creg); | |
1297 | VDBG("ep0 stalled\n"); | |
1298 | csr = __raw_readl(creg); | |
1299 | } | |
1300 | if (csr & AT91_UDP_RXSETUP) { | |
1301 | nuke(ep0, 0); | |
1302 | udc->req_pending = 0; | |
1303 | handle_setup(udc, ep0, csr); | |
1304 | return; | |
1305 | } | |
1306 | ||
1307 | if (list_empty(&ep0->queue)) | |
1308 | req = NULL; | |
1309 | else | |
1310 | req = list_entry(ep0->queue.next, struct at91_request, queue); | |
1311 | ||
1312 | /* host ACKed an IN packet that we sent */ | |
1313 | if (csr & AT91_UDP_TXCOMP) { | |
1314 | csr |= CLR_FX; | |
1315 | csr &= ~(SET_FX | AT91_UDP_TXCOMP); | |
1316 | ||
1317 | /* write more IN DATA? */ | |
1318 | if (req && ep0->is_in) { | |
1319 | if (handle_ep(ep0)) | |
1320 | udc->req_pending = 0; | |
1321 | ||
1322 | /* | |
1323 | * Ack after: | |
1324 | * - last IN DATA packet (including GET_STATUS) | |
1325 | * - IN/STATUS for OUT DATA | |
1326 | * - IN/STATUS for any zero-length DATA stage | |
1327 | * except for the IN DATA case, the host should send | |
1328 | * an OUT status later, which we'll ack. | |
1329 | */ | |
1330 | } else { | |
1331 | udc->req_pending = 0; | |
1332 | __raw_writel(csr, creg); | |
1333 | ||
1334 | /* | |
1335 | * SET_ADDRESS takes effect only after the STATUS | |
1336 | * (to the original address) gets acked. | |
1337 | */ | |
1338 | if (udc->wait_for_addr_ack) { | |
1339 | u32 tmp; | |
1340 | ||
ffd3326b | 1341 | at91_udp_write(udc, AT91_UDP_FADDR, |
8b2e7668 | 1342 | AT91_UDP_FEN | udc->addr); |
ffd3326b | 1343 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
bae4bd84 DB |
1344 | tmp &= ~AT91_UDP_FADDEN; |
1345 | if (udc->addr) | |
1346 | tmp |= AT91_UDP_FADDEN; | |
ffd3326b | 1347 | at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); |
bae4bd84 DB |
1348 | |
1349 | udc->wait_for_addr_ack = 0; | |
1350 | VDBG("address %d\n", udc->addr); | |
1351 | } | |
1352 | } | |
1353 | } | |
1354 | ||
1355 | /* OUT packet arrived ... */ | |
1356 | else if (csr & AT91_UDP_RX_DATA_BK0) { | |
1357 | csr |= CLR_FX; | |
1358 | csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); | |
1359 | ||
1360 | /* OUT DATA stage */ | |
1361 | if (!ep0->is_in) { | |
1362 | if (req) { | |
1363 | if (handle_ep(ep0)) { | |
1364 | /* send IN/STATUS */ | |
1365 | PACKET("ep0 in/status\n"); | |
1366 | csr = __raw_readl(creg); | |
1367 | csr &= ~SET_FX; | |
1368 | csr |= CLR_FX | AT91_UDP_TXPKTRDY; | |
1369 | __raw_writel(csr, creg); | |
1370 | udc->req_pending = 0; | |
1371 | } | |
1372 | } else if (udc->req_pending) { | |
1373 | /* | |
1374 | * AT91 hardware has a hard time with this | |
1375 | * "deferred response" mode for control-OUT | |
1376 | * transfers. (For control-IN it's fine.) | |
1377 | * | |
1378 | * The normal solution leaves OUT data in the | |
1379 | * fifo until the gadget driver is ready. | |
1380 | * We couldn't do that here without disabling | |
1381 | * the IRQ that tells about SETUP packets, | |
1382 | * e.g. when the host gets impatient... | |
1383 | * | |
1384 | * Working around it by copying into a buffer | |
1385 | * would almost be a non-deferred response, | |
1386 | * except that it wouldn't permit reliable | |
1387 | * stalling of the request. Instead, demand | |
1388 | * that gadget drivers not use this mode. | |
1389 | */ | |
1390 | DBG("no control-OUT deferred responses!\n"); | |
1391 | __raw_writel(csr | AT91_UDP_FORCESTALL, creg); | |
1392 | udc->req_pending = 0; | |
1393 | } | |
1394 | ||
1395 | /* STATUS stage for control-IN; ack. */ | |
1396 | } else { | |
1397 | PACKET("ep0 out/status ACK\n"); | |
1398 | __raw_writel(csr, creg); | |
1399 | ||
1400 | /* "early" status stage */ | |
1401 | if (req) | |
1402 | done(ep0, req, 0); | |
1403 | } | |
1404 | } | |
1405 | } | |
1406 | ||
7d12e780 | 1407 | static irqreturn_t at91_udc_irq (int irq, void *_udc) |
bae4bd84 DB |
1408 | { |
1409 | struct at91_udc *udc = _udc; | |
1410 | u32 rescans = 5; | |
c6c35237 | 1411 | int disable_clock = 0; |
4f4c5e36 HH |
1412 | unsigned long flags; |
1413 | ||
1414 | spin_lock_irqsave(&udc->lock, flags); | |
c6c35237 HH |
1415 | |
1416 | if (!udc->clocked) { | |
1417 | clk_on(udc); | |
1418 | disable_clock = 1; | |
1419 | } | |
bae4bd84 DB |
1420 | |
1421 | while (rescans--) { | |
8b2e7668 | 1422 | u32 status; |
bae4bd84 | 1423 | |
ffd3326b AV |
1424 | status = at91_udp_read(udc, AT91_UDP_ISR) |
1425 | & at91_udp_read(udc, AT91_UDP_IMR); | |
bae4bd84 DB |
1426 | if (!status) |
1427 | break; | |
1428 | ||
1429 | /* USB reset irq: not maskable */ | |
1430 | if (status & AT91_UDP_ENDBUSRES) { | |
ffd3326b AV |
1431 | at91_udp_write(udc, AT91_UDP_IDR, ~MINIMUS_INTERRUPTUS); |
1432 | at91_udp_write(udc, AT91_UDP_IER, MINIMUS_INTERRUPTUS); | |
bae4bd84 | 1433 | /* Atmel code clears this irq twice */ |
ffd3326b AV |
1434 | at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES); |
1435 | at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES); | |
bae4bd84 DB |
1436 | VDBG("end bus reset\n"); |
1437 | udc->addr = 0; | |
236e5064 | 1438 | reset_gadget(udc); |
bae4bd84 DB |
1439 | |
1440 | /* enable ep0 */ | |
ffd3326b | 1441 | at91_udp_write(udc, AT91_UDP_CSR(0), |
8b2e7668 | 1442 | AT91_UDP_EPEDS | AT91_UDP_EPTYPE_CTRL); |
bae4bd84 DB |
1443 | udc->gadget.speed = USB_SPEED_FULL; |
1444 | udc->suspended = 0; | |
ffd3326b | 1445 | at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_EP(0)); |
bae4bd84 DB |
1446 | |
1447 | /* | |
1448 | * NOTE: this driver keeps clocks off unless the | |
8b2e7668 DB |
1449 | * USB host is present. That saves power, but for |
1450 | * boards that don't support VBUS detection, both | |
1451 | * clocks need to be active most of the time. | |
bae4bd84 DB |
1452 | */ |
1453 | ||
1454 | /* host initiated suspend (3+ms bus idle) */ | |
1455 | } else if (status & AT91_UDP_RXSUSP) { | |
ffd3326b AV |
1456 | at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXSUSP); |
1457 | at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXRSM); | |
1458 | at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXSUSP); | |
1a8060d9 | 1459 | /* VDBG("bus suspend\n"); */ |
bae4bd84 DB |
1460 | if (udc->suspended) |
1461 | continue; | |
1462 | udc->suspended = 1; | |
1463 | ||
1464 | /* | |
1465 | * NOTE: when suspending a VBUS-powered device, the | |
1466 | * gadget driver should switch into slow clock mode | |
1467 | * and then into standby to avoid drawing more than | |
1468 | * 500uA power (2500uA for some high-power configs). | |
1469 | */ | |
4f4c5e36 HH |
1470 | if (udc->driver && udc->driver->suspend) { |
1471 | spin_unlock(&udc->lock); | |
bae4bd84 | 1472 | udc->driver->suspend(&udc->gadget); |
4f4c5e36 HH |
1473 | spin_lock(&udc->lock); |
1474 | } | |
bae4bd84 DB |
1475 | |
1476 | /* host initiated resume */ | |
1477 | } else if (status & AT91_UDP_RXRSM) { | |
ffd3326b AV |
1478 | at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM); |
1479 | at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXSUSP); | |
1480 | at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM); | |
1a8060d9 | 1481 | /* VDBG("bus resume\n"); */ |
bae4bd84 DB |
1482 | if (!udc->suspended) |
1483 | continue; | |
1484 | udc->suspended = 0; | |
1485 | ||
1486 | /* | |
1487 | * NOTE: for a VBUS-powered device, the gadget driver | |
1488 | * would normally want to switch out of slow clock | |
1489 | * mode into normal mode. | |
1490 | */ | |
4f4c5e36 HH |
1491 | if (udc->driver && udc->driver->resume) { |
1492 | spin_unlock(&udc->lock); | |
bae4bd84 | 1493 | udc->driver->resume(&udc->gadget); |
4f4c5e36 HH |
1494 | spin_lock(&udc->lock); |
1495 | } | |
bae4bd84 DB |
1496 | |
1497 | /* endpoint IRQs are cleared by handling them */ | |
1498 | } else { | |
1499 | int i; | |
1500 | unsigned mask = 1; | |
1501 | struct at91_ep *ep = &udc->ep[1]; | |
1502 | ||
1503 | if (status & mask) | |
1504 | handle_ep0(udc); | |
1505 | for (i = 1; i < NUM_ENDPOINTS; i++) { | |
1506 | mask <<= 1; | |
1507 | if (status & mask) | |
1508 | handle_ep(ep); | |
1509 | ep++; | |
1510 | } | |
1511 | } | |
1512 | } | |
1513 | ||
c6c35237 HH |
1514 | if (disable_clock) |
1515 | clk_off(udc); | |
1516 | ||
4f4c5e36 HH |
1517 | spin_unlock_irqrestore(&udc->lock, flags); |
1518 | ||
bae4bd84 DB |
1519 | return IRQ_HANDLED; |
1520 | } | |
1521 | ||
1522 | /*-------------------------------------------------------------------------*/ | |
1523 | ||
4037242c RM |
1524 | static void at91_vbus_update(struct at91_udc *udc, unsigned value) |
1525 | { | |
1526 | value ^= udc->board.vbus_active_low; | |
1527 | if (value != udc->vbus) | |
1528 | at91_vbus_session(&udc->gadget, value); | |
1529 | } | |
1530 | ||
7d12e780 | 1531 | static irqreturn_t at91_vbus_irq(int irq, void *_udc) |
bae4bd84 DB |
1532 | { |
1533 | struct at91_udc *udc = _udc; | |
bae4bd84 DB |
1534 | |
1535 | /* vbus needs at least brief debouncing */ | |
1536 | udelay(10); | |
4037242c | 1537 | at91_vbus_update(udc, gpio_get_value(udc->board.vbus_pin)); |
bae4bd84 DB |
1538 | |
1539 | return IRQ_HANDLED; | |
1540 | } | |
1541 | ||
4037242c RM |
1542 | static void at91_vbus_timer_work(struct work_struct *work) |
1543 | { | |
1544 | struct at91_udc *udc = container_of(work, struct at91_udc, | |
1545 | vbus_timer_work); | |
1546 | ||
1547 | at91_vbus_update(udc, gpio_get_value_cansleep(udc->board.vbus_pin)); | |
1548 | ||
1549 | if (!timer_pending(&udc->vbus_timer)) | |
1550 | mod_timer(&udc->vbus_timer, jiffies + VBUS_POLL_TIMEOUT); | |
1551 | } | |
1552 | ||
e99e88a9 | 1553 | static void at91_vbus_timer(struct timer_list *t) |
4037242c | 1554 | { |
e99e88a9 | 1555 | struct at91_udc *udc = from_timer(udc, t, vbus_timer); |
4037242c RM |
1556 | |
1557 | /* | |
1558 | * If we are polling vbus it is likely that the gpio is on an | |
1559 | * bus such as i2c or spi which may sleep, so schedule some work | |
1560 | * to read the vbus gpio | |
1561 | */ | |
348409a2 | 1562 | schedule_work(&udc->vbus_timer_work); |
4037242c RM |
1563 | } |
1564 | ||
f3d8bf34 SAS |
1565 | static int at91_start(struct usb_gadget *gadget, |
1566 | struct usb_gadget_driver *driver) | |
bae4bd84 | 1567 | { |
f3d8bf34 | 1568 | struct at91_udc *udc; |
bae4bd84 | 1569 | |
f3d8bf34 | 1570 | udc = container_of(gadget, struct at91_udc, gadget); |
bae4bd84 | 1571 | udc->driver = driver; |
65c84ea1 | 1572 | udc->gadget.dev.of_node = udc->pdev->dev.of_node; |
bae4bd84 | 1573 | udc->enabled = 1; |
7301971f | 1574 | udc->gadget.is_selfpowered = 1; |
bae4bd84 | 1575 | |
bae4bd84 DB |
1576 | return 0; |
1577 | } | |
bae4bd84 | 1578 | |
22835b80 | 1579 | static int at91_stop(struct usb_gadget *gadget) |
bae4bd84 | 1580 | { |
f3d8bf34 | 1581 | struct at91_udc *udc; |
4f4c5e36 | 1582 | unsigned long flags; |
bae4bd84 | 1583 | |
f3d8bf34 | 1584 | udc = container_of(gadget, struct at91_udc, gadget); |
4f4c5e36 | 1585 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 | 1586 | udc->enabled = 0; |
ffd3326b | 1587 | at91_udp_write(udc, AT91_UDP_IDR, ~0); |
4f4c5e36 | 1588 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 | 1589 | |
bae4bd84 DB |
1590 | udc->driver = NULL; |
1591 | ||
bae4bd84 DB |
1592 | return 0; |
1593 | } | |
bae4bd84 DB |
1594 | |
1595 | /*-------------------------------------------------------------------------*/ | |
1596 | ||
1597 | static void at91udc_shutdown(struct platform_device *dev) | |
1598 | { | |
4f4c5e36 HH |
1599 | struct at91_udc *udc = platform_get_drvdata(dev); |
1600 | unsigned long flags; | |
1601 | ||
bae4bd84 | 1602 | /* force disconnect on reboot */ |
4f4c5e36 | 1603 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 | 1604 | pullup(platform_get_drvdata(dev), 0); |
4f4c5e36 | 1605 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
1606 | } |
1607 | ||
f0bceab4 BB |
1608 | static int at91rm9200_udc_init(struct at91_udc *udc) |
1609 | { | |
1610 | struct at91_ep *ep; | |
1611 | int ret; | |
1612 | int i; | |
1613 | ||
1614 | for (i = 0; i < NUM_ENDPOINTS; i++) { | |
1615 | ep = &udc->ep[i]; | |
1616 | ||
1617 | switch (i) { | |
1618 | case 0: | |
1619 | case 3: | |
1620 | ep->maxpacket = 8; | |
1621 | break; | |
1622 | case 1 ... 2: | |
1623 | ep->maxpacket = 64; | |
1624 | break; | |
1625 | case 4 ... 5: | |
1626 | ep->maxpacket = 256; | |
1627 | break; | |
1628 | } | |
1629 | } | |
1630 | ||
1631 | if (!gpio_is_valid(udc->board.pullup_pin)) { | |
1632 | DBG("no D+ pullup?\n"); | |
1633 | return -ENODEV; | |
1634 | } | |
1635 | ||
1636 | ret = devm_gpio_request(&udc->pdev->dev, udc->board.pullup_pin, | |
1637 | "udc_pullup"); | |
1638 | if (ret) { | |
1639 | DBG("D+ pullup is busy\n"); | |
1640 | return ret; | |
1641 | } | |
1642 | ||
1643 | gpio_direction_output(udc->board.pullup_pin, | |
1644 | udc->board.pullup_active_low); | |
1645 | ||
1646 | return 0; | |
1647 | } | |
1648 | ||
1649 | static void at91rm9200_udc_pullup(struct at91_udc *udc, int is_on) | |
1650 | { | |
1651 | int active = !udc->board.pullup_active_low; | |
1652 | ||
1653 | if (is_on) | |
1654 | gpio_set_value(udc->board.pullup_pin, active); | |
1655 | else | |
1656 | gpio_set_value(udc->board.pullup_pin, !active); | |
1657 | } | |
1658 | ||
1659 | static const struct at91_udc_caps at91rm9200_udc_caps = { | |
1660 | .init = at91rm9200_udc_init, | |
1661 | .pullup = at91rm9200_udc_pullup, | |
1662 | }; | |
1663 | ||
1664 | static int at91sam9260_udc_init(struct at91_udc *udc) | |
1665 | { | |
1666 | struct at91_ep *ep; | |
1667 | int i; | |
1668 | ||
1669 | for (i = 0; i < NUM_ENDPOINTS; i++) { | |
1670 | ep = &udc->ep[i]; | |
1671 | ||
1672 | switch (i) { | |
1673 | case 0 ... 3: | |
1674 | ep->maxpacket = 64; | |
1675 | break; | |
1676 | case 4 ... 5: | |
1677 | ep->maxpacket = 512; | |
1678 | break; | |
1679 | } | |
1680 | } | |
1681 | ||
1682 | return 0; | |
1683 | } | |
1684 | ||
1685 | static void at91sam9260_udc_pullup(struct at91_udc *udc, int is_on) | |
1686 | { | |
1687 | u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC); | |
1688 | ||
1689 | if (is_on) | |
1690 | txvc |= AT91_UDP_TXVC_PUON; | |
1691 | else | |
1692 | txvc &= ~AT91_UDP_TXVC_PUON; | |
1693 | ||
1694 | at91_udp_write(udc, AT91_UDP_TXVC, txvc); | |
1695 | } | |
1696 | ||
1697 | static const struct at91_udc_caps at91sam9260_udc_caps = { | |
1698 | .init = at91sam9260_udc_init, | |
1699 | .pullup = at91sam9260_udc_pullup, | |
1700 | }; | |
1701 | ||
1702 | static int at91sam9261_udc_init(struct at91_udc *udc) | |
1703 | { | |
1704 | struct at91_ep *ep; | |
1705 | int i; | |
1706 | ||
1707 | for (i = 0; i < NUM_ENDPOINTS; i++) { | |
1708 | ep = &udc->ep[i]; | |
1709 | ||
1710 | switch (i) { | |
1711 | case 0: | |
1712 | ep->maxpacket = 8; | |
1713 | break; | |
1714 | case 1 ... 3: | |
1715 | ep->maxpacket = 64; | |
1716 | break; | |
1717 | case 4 ... 5: | |
1718 | ep->maxpacket = 256; | |
1719 | break; | |
1720 | } | |
1721 | } | |
1722 | ||
1723 | udc->matrix = syscon_regmap_lookup_by_phandle(udc->pdev->dev.of_node, | |
1724 | "atmel,matrix"); | |
46cdd190 | 1725 | return PTR_ERR_OR_ZERO(udc->matrix); |
f0bceab4 BB |
1726 | } |
1727 | ||
1728 | static void at91sam9261_udc_pullup(struct at91_udc *udc, int is_on) | |
1729 | { | |
1730 | u32 usbpucr = 0; | |
1731 | ||
1732 | if (is_on) | |
1733 | usbpucr = AT91_MATRIX_USBPUCR_PUON; | |
1734 | ||
1735 | regmap_update_bits(udc->matrix, AT91SAM9261_MATRIX_USBPUCR, | |
1736 | AT91_MATRIX_USBPUCR_PUON, usbpucr); | |
1737 | } | |
1738 | ||
1739 | static const struct at91_udc_caps at91sam9261_udc_caps = { | |
1740 | .init = at91sam9261_udc_init, | |
1741 | .pullup = at91sam9261_udc_pullup, | |
1742 | }; | |
1743 | ||
1744 | static int at91sam9263_udc_init(struct at91_udc *udc) | |
1745 | { | |
1746 | struct at91_ep *ep; | |
1747 | int i; | |
1748 | ||
1749 | for (i = 0; i < NUM_ENDPOINTS; i++) { | |
1750 | ep = &udc->ep[i]; | |
1751 | ||
1752 | switch (i) { | |
1753 | case 0: | |
1754 | case 1: | |
1755 | case 2: | |
1756 | case 3: | |
1757 | ep->maxpacket = 64; | |
1758 | break; | |
1759 | case 4: | |
1760 | case 5: | |
1761 | ep->maxpacket = 256; | |
1762 | break; | |
1763 | } | |
1764 | } | |
1765 | ||
1766 | return 0; | |
1767 | } | |
1768 | ||
1769 | static const struct at91_udc_caps at91sam9263_udc_caps = { | |
1770 | .init = at91sam9263_udc_init, | |
1771 | .pullup = at91sam9260_udc_pullup, | |
1772 | }; | |
1773 | ||
1774 | static const struct of_device_id at91_udc_dt_ids[] = { | |
1775 | { | |
1776 | .compatible = "atmel,at91rm9200-udc", | |
1777 | .data = &at91rm9200_udc_caps, | |
1778 | }, | |
1779 | { | |
1780 | .compatible = "atmel,at91sam9260-udc", | |
1781 | .data = &at91sam9260_udc_caps, | |
1782 | }, | |
1783 | { | |
1784 | .compatible = "atmel,at91sam9261-udc", | |
1785 | .data = &at91sam9261_udc_caps, | |
1786 | }, | |
1787 | { | |
1788 | .compatible = "atmel,at91sam9263-udc", | |
1789 | .data = &at91sam9263_udc_caps, | |
1790 | }, | |
1791 | { /* sentinel */ } | |
1792 | }; | |
1793 | MODULE_DEVICE_TABLE(of, at91_udc_dt_ids); | |
1794 | ||
1795 | static void at91udc_of_init(struct at91_udc *udc, struct device_node *np) | |
d1494a34 JCPV |
1796 | { |
1797 | struct at91_udc_data *board = &udc->board; | |
f0bceab4 | 1798 | const struct of_device_id *match; |
d1494a34 | 1799 | enum of_gpio_flags flags; |
f0bceab4 | 1800 | u32 val; |
d1494a34 JCPV |
1801 | |
1802 | if (of_property_read_u32(np, "atmel,vbus-polled", &val) == 0) | |
1803 | board->vbus_polled = 1; | |
1804 | ||
1805 | board->vbus_pin = of_get_named_gpio_flags(np, "atmel,vbus-gpio", 0, | |
1806 | &flags); | |
1807 | board->vbus_active_low = (flags & OF_GPIO_ACTIVE_LOW) ? 1 : 0; | |
1808 | ||
1809 | board->pullup_pin = of_get_named_gpio_flags(np, "atmel,pullup-gpio", 0, | |
1810 | &flags); | |
1811 | ||
1812 | board->pullup_active_low = (flags & OF_GPIO_ACTIVE_LOW) ? 1 : 0; | |
f0bceab4 BB |
1813 | |
1814 | match = of_match_node(at91_udc_dt_ids, np); | |
1815 | if (match) | |
1816 | udc->caps = match->data; | |
d1494a34 JCPV |
1817 | } |
1818 | ||
41ac7b3a | 1819 | static int at91udc_probe(struct platform_device *pdev) |
bae4bd84 DB |
1820 | { |
1821 | struct device *dev = &pdev->dev; | |
1822 | struct at91_udc *udc; | |
1823 | int retval; | |
ffd3326b | 1824 | struct resource *res; |
f0bceab4 BB |
1825 | struct at91_ep *ep; |
1826 | int i; | |
bae4bd84 | 1827 | |
a5514d14 BB |
1828 | udc = devm_kzalloc(dev, sizeof(*udc), GFP_KERNEL); |
1829 | if (!udc) | |
1830 | return -ENOMEM; | |
bae4bd84 DB |
1831 | |
1832 | /* init software state */ | |
bae4bd84 | 1833 | udc->gadget.dev.parent = dev; |
9f00fc1d | 1834 | at91udc_of_init(udc, pdev->dev.of_node); |
bae4bd84 | 1835 | udc->pdev = pdev; |
bae4bd84 | 1836 | udc->enabled = 0; |
4f4c5e36 | 1837 | spin_lock_init(&udc->lock); |
bae4bd84 | 1838 | |
a5514d14 BB |
1839 | udc->gadget.ops = &at91_udc_ops; |
1840 | udc->gadget.ep0 = &udc->ep[0].ep; | |
1841 | udc->gadget.name = driver_name; | |
1842 | udc->gadget.dev.init_name = "gadget"; | |
f3db6e82 | 1843 | |
a5514d14 BB |
1844 | for (i = 0; i < NUM_ENDPOINTS; i++) { |
1845 | ep = &udc->ep[i]; | |
b9ed96d7 RB |
1846 | ep->ep.name = ep_info[i].name; |
1847 | ep->ep.caps = ep_info[i].caps; | |
a5514d14 BB |
1848 | ep->ep.ops = &at91_ep_ops; |
1849 | ep->udc = udc; | |
1850 | ep->int_mask = BIT(i); | |
1851 | if (i != 0 && i != 3) | |
1852 | ep->is_pingpong = 1; | |
bb24280f DB |
1853 | } |
1854 | ||
422cde25 BB |
1855 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
1856 | udc->udp_baseaddr = devm_ioremap_resource(dev, res); | |
1857 | if (IS_ERR(udc->udp_baseaddr)) | |
1858 | return PTR_ERR(udc->udp_baseaddr); | |
ffd3326b | 1859 | |
f0bceab4 BB |
1860 | if (udc->caps && udc->caps->init) { |
1861 | retval = udc->caps->init(udc); | |
1862 | if (retval) | |
1863 | return retval; | |
ffd3326b AV |
1864 | } |
1865 | ||
1866 | udc_reinit(udc); | |
1867 | ||
bae4bd84 | 1868 | /* get interface and function clocks */ |
422cde25 BB |
1869 | udc->iclk = devm_clk_get(dev, "pclk"); |
1870 | if (IS_ERR(udc->iclk)) | |
1871 | return PTR_ERR(udc->iclk); | |
1872 | ||
1873 | udc->fclk = devm_clk_get(dev, "hclk"); | |
1874 | if (IS_ERR(udc->fclk)) | |
1875 | return PTR_ERR(udc->fclk); | |
bae4bd84 | 1876 | |
8b2e7668 | 1877 | /* don't do anything until we have both gadget driver and VBUS */ |
9aa02165 | 1878 | clk_set_rate(udc->fclk, 48000000); |
b2ba27a5 RW |
1879 | retval = clk_prepare(udc->fclk); |
1880 | if (retval) | |
422cde25 | 1881 | return retval; |
b2ba27a5 | 1882 | |
76280832 BB |
1883 | retval = clk_prepare_enable(udc->iclk); |
1884 | if (retval) | |
422cde25 BB |
1885 | goto err_unprepare_fclk; |
1886 | ||
ffd3326b AV |
1887 | at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS); |
1888 | at91_udp_write(udc, AT91_UDP_IDR, 0xffffffff); | |
29ba4b53 AV |
1889 | /* Clear all pending interrupts - UDP may be used by bootloader. */ |
1890 | at91_udp_write(udc, AT91_UDP_ICR, 0xffffffff); | |
b2ba27a5 | 1891 | clk_disable(udc->iclk); |
bae4bd84 DB |
1892 | |
1893 | /* request UDC and maybe VBUS irqs */ | |
8b2e7668 | 1894 | udc->udp_irq = platform_get_irq(pdev, 0); |
422cde25 BB |
1895 | retval = devm_request_irq(dev, udc->udp_irq, at91_udc_irq, 0, |
1896 | driver_name, udc); | |
1897 | if (retval) { | |
8b2e7668 | 1898 | DBG("request irq %d failed\n", udc->udp_irq); |
422cde25 | 1899 | goto err_unprepare_iclk; |
bae4bd84 | 1900 | } |
422cde25 | 1901 | |
3285e0ec | 1902 | if (gpio_is_valid(udc->board.vbus_pin)) { |
422cde25 BB |
1903 | retval = devm_gpio_request(dev, udc->board.vbus_pin, |
1904 | "udc_vbus"); | |
1905 | if (retval) { | |
f3db6e82 | 1906 | DBG("request vbus pin failed\n"); |
422cde25 | 1907 | goto err_unprepare_iclk; |
f3db6e82 | 1908 | } |
422cde25 | 1909 | |
f3db6e82 DB |
1910 | gpio_direction_input(udc->board.vbus_pin); |
1911 | ||
29ba4b53 AV |
1912 | /* |
1913 | * Get the initial state of VBUS - we cannot expect | |
1914 | * a pending interrupt. | |
1915 | */ | |
4037242c RM |
1916 | udc->vbus = gpio_get_value_cansleep(udc->board.vbus_pin) ^ |
1917 | udc->board.vbus_active_low; | |
1918 | ||
1919 | if (udc->board.vbus_polled) { | |
1920 | INIT_WORK(&udc->vbus_timer_work, at91_vbus_timer_work); | |
e99e88a9 | 1921 | timer_setup(&udc->vbus_timer, at91_vbus_timer, 0); |
4037242c RM |
1922 | mod_timer(&udc->vbus_timer, |
1923 | jiffies + VBUS_POLL_TIMEOUT); | |
1924 | } else { | |
422cde25 BB |
1925 | retval = devm_request_irq(dev, |
1926 | gpio_to_irq(udc->board.vbus_pin), | |
1927 | at91_vbus_irq, 0, driver_name, udc); | |
1928 | if (retval) { | |
4037242c RM |
1929 | DBG("request vbus irq %d failed\n", |
1930 | udc->board.vbus_pin); | |
422cde25 | 1931 | goto err_unprepare_iclk; |
4037242c | 1932 | } |
bae4bd84 DB |
1933 | } |
1934 | } else { | |
1935 | DBG("no VBUS detection, assuming always-on\n"); | |
1936 | udc->vbus = 1; | |
1937 | } | |
0f91349b SAS |
1938 | retval = usb_add_gadget_udc(dev, &udc->gadget); |
1939 | if (retval) | |
422cde25 | 1940 | goto err_unprepare_iclk; |
bae4bd84 | 1941 | dev_set_drvdata(dev, udc); |
8b2e7668 | 1942 | device_init_wakeup(dev, 1); |
bae4bd84 DB |
1943 | create_debug_file(udc); |
1944 | ||
1945 | INFO("%s version %s\n", driver_name, DRIVER_VERSION); | |
1946 | return 0; | |
422cde25 BB |
1947 | |
1948 | err_unprepare_iclk: | |
b2ba27a5 | 1949 | clk_unprepare(udc->iclk); |
422cde25 | 1950 | err_unprepare_fclk: |
b2ba27a5 | 1951 | clk_unprepare(udc->fclk); |
422cde25 | 1952 | |
bae4bd84 | 1953 | DBG("%s probe failed, %d\n", driver_name, retval); |
422cde25 | 1954 | |
bae4bd84 DB |
1955 | return retval; |
1956 | } | |
1957 | ||
c94e289f | 1958 | static int at91udc_remove(struct platform_device *pdev) |
bae4bd84 | 1959 | { |
8b2e7668 | 1960 | struct at91_udc *udc = platform_get_drvdata(pdev); |
4f4c5e36 | 1961 | unsigned long flags; |
bae4bd84 DB |
1962 | |
1963 | DBG("remove\n"); | |
1964 | ||
0f91349b | 1965 | usb_del_gadget_udc(&udc->gadget); |
6bea476c DB |
1966 | if (udc->driver) |
1967 | return -EBUSY; | |
bae4bd84 | 1968 | |
4f4c5e36 | 1969 | spin_lock_irqsave(&udc->lock, flags); |
6bea476c | 1970 | pullup(udc, 0); |
4f4c5e36 | 1971 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 | 1972 | |
8b2e7668 | 1973 | device_init_wakeup(&pdev->dev, 0); |
bae4bd84 | 1974 | remove_debug_file(udc); |
b2ba27a5 RW |
1975 | clk_unprepare(udc->fclk); |
1976 | clk_unprepare(udc->iclk); | |
1977 | ||
bae4bd84 DB |
1978 | return 0; |
1979 | } | |
1980 | ||
1981 | #ifdef CONFIG_PM | |
8b2e7668 | 1982 | static int at91udc_suspend(struct platform_device *pdev, pm_message_t mesg) |
bae4bd84 | 1983 | { |
8b2e7668 DB |
1984 | struct at91_udc *udc = platform_get_drvdata(pdev); |
1985 | int wake = udc->driver && device_may_wakeup(&pdev->dev); | |
4f4c5e36 | 1986 | unsigned long flags; |
bae4bd84 | 1987 | |
8b2e7668 DB |
1988 | /* Unless we can act normally to the host (letting it wake us up |
1989 | * whenever it has work for us) force disconnect. Wakeup requires | |
1990 | * PLLB for USB events (signaling for reset, wakeup, or incoming | |
1991 | * tokens) and VBUS irqs (on systems which support them). | |
bae4bd84 | 1992 | */ |
8b2e7668 DB |
1993 | if ((!udc->suspended && udc->addr) |
1994 | || !wake | |
1995 | || at91_suspend_entering_slow_clock()) { | |
4f4c5e36 | 1996 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 | 1997 | pullup(udc, 0); |
66e56ce7 | 1998 | wake = 0; |
4f4c5e36 | 1999 | spin_unlock_irqrestore(&udc->lock, flags); |
8b2e7668 DB |
2000 | } else |
2001 | enable_irq_wake(udc->udp_irq); | |
2002 | ||
66e56ce7 | 2003 | udc->active_suspend = wake; |
3285e0ec | 2004 | if (gpio_is_valid(udc->board.vbus_pin) && !udc->board.vbus_polled && wake) |
66e56ce7 | 2005 | enable_irq_wake(udc->board.vbus_pin); |
bae4bd84 DB |
2006 | return 0; |
2007 | } | |
2008 | ||
8b2e7668 | 2009 | static int at91udc_resume(struct platform_device *pdev) |
bae4bd84 | 2010 | { |
8b2e7668 | 2011 | struct at91_udc *udc = platform_get_drvdata(pdev); |
4f4c5e36 | 2012 | unsigned long flags; |
bae4bd84 | 2013 | |
3285e0ec | 2014 | if (gpio_is_valid(udc->board.vbus_pin) && !udc->board.vbus_polled && |
4037242c | 2015 | udc->active_suspend) |
66e56ce7 DB |
2016 | disable_irq_wake(udc->board.vbus_pin); |
2017 | ||
bae4bd84 | 2018 | /* maybe reconnect to host; if so, clocks on */ |
66e56ce7 DB |
2019 | if (udc->active_suspend) |
2020 | disable_irq_wake(udc->udp_irq); | |
4f4c5e36 HH |
2021 | else { |
2022 | spin_lock_irqsave(&udc->lock, flags); | |
66e56ce7 | 2023 | pullup(udc, 1); |
4f4c5e36 HH |
2024 | spin_unlock_irqrestore(&udc->lock, flags); |
2025 | } | |
bae4bd84 DB |
2026 | return 0; |
2027 | } | |
2028 | #else | |
2029 | #define at91udc_suspend NULL | |
2030 | #define at91udc_resume NULL | |
2031 | #endif | |
2032 | ||
dee497df | 2033 | static struct platform_driver at91_udc_driver = { |
c94e289f | 2034 | .remove = at91udc_remove, |
bae4bd84 DB |
2035 | .shutdown = at91udc_shutdown, |
2036 | .suspend = at91udc_suspend, | |
8b2e7668 | 2037 | .resume = at91udc_resume, |
bae4bd84 DB |
2038 | .driver = { |
2039 | .name = (char *) driver_name, | |
9f00fc1d | 2040 | .of_match_table = at91_udc_dt_ids, |
bae4bd84 DB |
2041 | }, |
2042 | }; | |
2043 | ||
52f7a82b | 2044 | module_platform_driver_probe(at91_udc_driver, at91udc_probe); |
bae4bd84 | 2045 | |
8b2e7668 | 2046 | MODULE_DESCRIPTION("AT91 udc driver"); |
bae4bd84 DB |
2047 | MODULE_AUTHOR("Thomas Rathbone, David Brownell"); |
2048 | MODULE_LICENSE("GPL"); | |
f34c32f1 | 2049 | MODULE_ALIAS("platform:at91_udc"); |