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3fc154b6 AP |
1 | /* |
2 | * linux/drivers/usb/gadget/s3c2410_udc.c | |
3 | * | |
4 | * Samsung S3C24xx series on-chip full speed USB device controllers | |
5 | * | |
d36b6910 | 6 | * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard |
3fc154b6 AP |
7 | * Additional cleanups by Ben Dooks <ben-linux@fluff.org> |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
3fc154b6 AP |
13 | */ |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/delay.h> | |
18 | #include <linux/ioport.h> | |
19 | #include <linux/sched.h> | |
20 | #include <linux/slab.h> | |
3fc154b6 AP |
21 | #include <linux/errno.h> |
22 | #include <linux/init.h> | |
23 | #include <linux/timer.h> | |
24 | #include <linux/list.h> | |
25 | #include <linux/interrupt.h> | |
26 | #include <linux/platform_device.h> | |
3fc154b6 | 27 | #include <linux/clk.h> |
ea99ecfd | 28 | #include <linux/gpio.h> |
b38b03b3 | 29 | #include <linux/prefetch.h> |
3fc154b6 AP |
30 | |
31 | #include <linux/debugfs.h> | |
32 | #include <linux/seq_file.h> | |
33 | ||
34 | #include <linux/usb.h> | |
9454a57a | 35 | #include <linux/usb/gadget.h> |
3fc154b6 AP |
36 | |
37 | #include <asm/byteorder.h> | |
38 | #include <asm/io.h> | |
39 | #include <asm/irq.h> | |
40 | #include <asm/system.h> | |
41 | #include <asm/unaligned.h> | |
a09e64fb | 42 | #include <mach/irqs.h> |
3fc154b6 | 43 | |
a09e64fb | 44 | #include <mach/hardware.h> |
899d566a | 45 | |
57bd4b91 BD |
46 | #include <plat/regs-udc.h> |
47 | #include <plat/udc.h> | |
3fc154b6 | 48 | |
3fc154b6 AP |
49 | |
50 | #include "s3c2410_udc.h" | |
51 | ||
52 | #define DRIVER_DESC "S3C2410 USB Device Controller Gadget" | |
53 | #define DRIVER_VERSION "29 Apr 2007" | |
d36b6910 | 54 | #define DRIVER_AUTHOR "Herbert Pötzl <herbert@13thfloor.at>, " \ |
3fc154b6 AP |
55 | "Arnaud Patard <arnaud.patard@rtp-net.org>" |
56 | ||
57 | static const char gadget_name[] = "s3c2410_udc"; | |
58 | static const char driver_desc[] = DRIVER_DESC; | |
59 | ||
60 | static struct s3c2410_udc *the_controller; | |
61 | static struct clk *udc_clock; | |
62 | static struct clk *usb_bus_clock; | |
63 | static void __iomem *base_addr; | |
64 | static u64 rsrc_start; | |
65 | static u64 rsrc_len; | |
66 | static struct dentry *s3c2410_udc_debugfs_root; | |
67 | ||
68 | static inline u32 udc_read(u32 reg) | |
69 | { | |
70 | return readb(base_addr + reg); | |
71 | } | |
72 | ||
73 | static inline void udc_write(u32 value, u32 reg) | |
74 | { | |
75 | writeb(value, base_addr + reg); | |
76 | } | |
77 | ||
78 | static inline void udc_writeb(void __iomem *base, u32 value, u32 reg) | |
79 | { | |
80 | writeb(value, base + reg); | |
81 | } | |
82 | ||
83 | static struct s3c2410_udc_mach_info *udc_info; | |
84 | ||
85 | /*************************** DEBUG FUNCTION ***************************/ | |
86 | #define DEBUG_NORMAL 1 | |
87 | #define DEBUG_VERBOSE 2 | |
88 | ||
89 | #ifdef CONFIG_USB_S3C2410_DEBUG | |
90 | #define USB_S3C2410_DEBUG_LEVEL 0 | |
91 | ||
92 | static uint32_t s3c2410_ticks = 0; | |
93 | ||
94 | static int dprintk(int level, const char *fmt, ...) | |
95 | { | |
96 | static char printk_buf[1024]; | |
97 | static long prevticks; | |
98 | static int invocation; | |
99 | va_list args; | |
100 | int len; | |
101 | ||
102 | if (level > USB_S3C2410_DEBUG_LEVEL) | |
103 | return 0; | |
104 | ||
105 | if (s3c2410_ticks != prevticks) { | |
106 | prevticks = s3c2410_ticks; | |
107 | invocation = 0; | |
108 | } | |
109 | ||
110 | len = scnprintf(printk_buf, | |
111 | sizeof(printk_buf), "%1lu.%02d USB: ", | |
112 | prevticks, invocation++); | |
113 | ||
114 | va_start(args, fmt); | |
115 | len = vscnprintf(printk_buf+len, | |
116 | sizeof(printk_buf)-len, fmt, args); | |
117 | va_end(args); | |
118 | ||
119 | return printk(KERN_DEBUG "%s", printk_buf); | |
120 | } | |
121 | #else | |
122 | static int dprintk(int level, const char *fmt, ...) | |
123 | { | |
124 | return 0; | |
125 | } | |
126 | #endif | |
127 | static int s3c2410_udc_debugfs_seq_show(struct seq_file *m, void *p) | |
128 | { | |
129 | u32 addr_reg,pwr_reg,ep_int_reg,usb_int_reg; | |
130 | u32 ep_int_en_reg, usb_int_en_reg, ep0_csr; | |
131 | u32 ep1_i_csr1,ep1_i_csr2,ep1_o_csr1,ep1_o_csr2; | |
132 | u32 ep2_i_csr1,ep2_i_csr2,ep2_o_csr1,ep2_o_csr2; | |
133 | ||
134 | addr_reg = udc_read(S3C2410_UDC_FUNC_ADDR_REG); | |
135 | pwr_reg = udc_read(S3C2410_UDC_PWR_REG); | |
136 | ep_int_reg = udc_read(S3C2410_UDC_EP_INT_REG); | |
137 | usb_int_reg = udc_read(S3C2410_UDC_USB_INT_REG); | |
138 | ep_int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG); | |
139 | usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG); | |
140 | udc_write(0, S3C2410_UDC_INDEX_REG); | |
141 | ep0_csr = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
142 | udc_write(1, S3C2410_UDC_INDEX_REG); | |
143 | ep1_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
144 | ep1_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG); | |
145 | ep1_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
146 | ep1_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG); | |
147 | udc_write(2, S3C2410_UDC_INDEX_REG); | |
148 | ep2_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
149 | ep2_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG); | |
150 | ep2_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
151 | ep2_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG); | |
152 | ||
153 | seq_printf(m, "FUNC_ADDR_REG : 0x%04X\n" | |
154 | "PWR_REG : 0x%04X\n" | |
155 | "EP_INT_REG : 0x%04X\n" | |
156 | "USB_INT_REG : 0x%04X\n" | |
157 | "EP_INT_EN_REG : 0x%04X\n" | |
158 | "USB_INT_EN_REG : 0x%04X\n" | |
159 | "EP0_CSR : 0x%04X\n" | |
160 | "EP1_I_CSR1 : 0x%04X\n" | |
161 | "EP1_I_CSR2 : 0x%04X\n" | |
162 | "EP1_O_CSR1 : 0x%04X\n" | |
163 | "EP1_O_CSR2 : 0x%04X\n" | |
164 | "EP2_I_CSR1 : 0x%04X\n" | |
165 | "EP2_I_CSR2 : 0x%04X\n" | |
166 | "EP2_O_CSR1 : 0x%04X\n" | |
167 | "EP2_O_CSR2 : 0x%04X\n", | |
168 | addr_reg,pwr_reg,ep_int_reg,usb_int_reg, | |
169 | ep_int_en_reg, usb_int_en_reg, ep0_csr, | |
170 | ep1_i_csr1,ep1_i_csr2,ep1_o_csr1,ep1_o_csr2, | |
171 | ep2_i_csr1,ep2_i_csr2,ep2_o_csr1,ep2_o_csr2 | |
172 | ); | |
173 | ||
174 | return 0; | |
175 | } | |
176 | ||
177 | static int s3c2410_udc_debugfs_fops_open(struct inode *inode, | |
178 | struct file *file) | |
179 | { | |
180 | return single_open(file, s3c2410_udc_debugfs_seq_show, NULL); | |
181 | } | |
182 | ||
183 | static const struct file_operations s3c2410_udc_debugfs_fops = { | |
184 | .open = s3c2410_udc_debugfs_fops_open, | |
185 | .read = seq_read, | |
186 | .llseek = seq_lseek, | |
187 | .release = single_release, | |
188 | .owner = THIS_MODULE, | |
189 | }; | |
190 | ||
191 | /* io macros */ | |
192 | ||
193 | static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base) | |
194 | { | |
195 | udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); | |
196 | udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY, | |
197 | S3C2410_UDC_EP0_CSR_REG); | |
198 | } | |
199 | ||
200 | static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base) | |
201 | { | |
202 | udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); | |
203 | writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG); | |
204 | } | |
205 | ||
206 | static inline void s3c2410_udc_clear_ep0_se(void __iomem *base) | |
207 | { | |
208 | udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); | |
209 | udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG); | |
210 | } | |
211 | ||
212 | static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base) | |
213 | { | |
214 | udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); | |
215 | udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG); | |
216 | } | |
217 | ||
218 | static inline void s3c2410_udc_set_ep0_de(void __iomem *base) | |
219 | { | |
220 | udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); | |
221 | udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG); | |
222 | } | |
223 | ||
224 | inline void s3c2410_udc_set_ep0_ss(void __iomem *b) | |
225 | { | |
226 | udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); | |
227 | udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG); | |
228 | } | |
229 | ||
230 | static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base) | |
231 | { | |
232 | udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); | |
233 | ||
234 | udc_writeb(base,(S3C2410_UDC_EP0_CSR_SOPKTRDY | |
235 | | S3C2410_UDC_EP0_CSR_DE), | |
236 | S3C2410_UDC_EP0_CSR_REG); | |
237 | } | |
238 | ||
239 | static inline void s3c2410_udc_set_ep0_sse_out(void __iomem *base) | |
240 | { | |
241 | udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); | |
242 | udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY | |
243 | | S3C2410_UDC_EP0_CSR_SSE), | |
244 | S3C2410_UDC_EP0_CSR_REG); | |
245 | } | |
246 | ||
247 | static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base) | |
248 | { | |
249 | udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); | |
250 | udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY | |
251 | | S3C2410_UDC_EP0_CSR_DE), | |
252 | S3C2410_UDC_EP0_CSR_REG); | |
253 | } | |
254 | ||
255 | /*------------------------- I/O ----------------------------------*/ | |
256 | ||
257 | /* | |
258 | * s3c2410_udc_done | |
259 | */ | |
260 | static void s3c2410_udc_done(struct s3c2410_ep *ep, | |
261 | struct s3c2410_request *req, int status) | |
262 | { | |
263 | unsigned halted = ep->halted; | |
264 | ||
265 | list_del_init(&req->queue); | |
266 | ||
267 | if (likely (req->req.status == -EINPROGRESS)) | |
268 | req->req.status = status; | |
269 | else | |
270 | status = req->req.status; | |
271 | ||
272 | ep->halted = 1; | |
273 | req->req.complete(&ep->ep, &req->req); | |
274 | ep->halted = halted; | |
275 | } | |
276 | ||
277 | static void s3c2410_udc_nuke(struct s3c2410_udc *udc, | |
278 | struct s3c2410_ep *ep, int status) | |
279 | { | |
280 | /* Sanity check */ | |
281 | if (&ep->queue == NULL) | |
282 | return; | |
283 | ||
284 | while (!list_empty (&ep->queue)) { | |
285 | struct s3c2410_request *req; | |
286 | req = list_entry (ep->queue.next, struct s3c2410_request, | |
287 | queue); | |
288 | s3c2410_udc_done(ep, req, status); | |
289 | } | |
290 | } | |
291 | ||
292 | static inline void s3c2410_udc_clear_ep_state(struct s3c2410_udc *dev) | |
293 | { | |
294 | unsigned i; | |
295 | ||
296 | /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint | |
297 | * fifos, and pending transactions mustn't be continued in any case. | |
298 | */ | |
299 | ||
300 | for (i = 1; i < S3C2410_ENDPOINTS; i++) | |
301 | s3c2410_udc_nuke(dev, &dev->ep[i], -ECONNABORTED); | |
302 | } | |
303 | ||
304 | static inline int s3c2410_udc_fifo_count_out(void) | |
305 | { | |
306 | int tmp; | |
307 | ||
308 | tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8; | |
309 | tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG); | |
310 | return tmp; | |
311 | } | |
312 | ||
313 | /* | |
314 | * s3c2410_udc_write_packet | |
315 | */ | |
316 | static inline int s3c2410_udc_write_packet(int fifo, | |
317 | struct s3c2410_request *req, | |
318 | unsigned max) | |
319 | { | |
320 | unsigned len = min(req->req.length - req->req.actual, max); | |
321 | u8 *buf = req->req.buf + req->req.actual; | |
322 | ||
323 | prefetch(buf); | |
324 | ||
325 | dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__, | |
326 | req->req.actual, req->req.length, len, req->req.actual + len); | |
327 | ||
328 | req->req.actual += len; | |
329 | ||
330 | udelay(5); | |
331 | writesb(base_addr + fifo, buf, len); | |
332 | return len; | |
333 | } | |
334 | ||
335 | /* | |
336 | * s3c2410_udc_write_fifo | |
337 | * | |
338 | * return: 0 = still running, 1 = completed, negative = errno | |
339 | */ | |
340 | static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep, | |
341 | struct s3c2410_request *req) | |
342 | { | |
343 | unsigned count; | |
344 | int is_last; | |
345 | u32 idx; | |
346 | int fifo_reg; | |
347 | u32 ep_csr; | |
348 | ||
349 | idx = ep->bEndpointAddress & 0x7F; | |
350 | switch (idx) { | |
351 | default: | |
352 | idx = 0; | |
353 | case 0: | |
354 | fifo_reg = S3C2410_UDC_EP0_FIFO_REG; | |
355 | break; | |
356 | case 1: | |
357 | fifo_reg = S3C2410_UDC_EP1_FIFO_REG; | |
358 | break; | |
359 | case 2: | |
360 | fifo_reg = S3C2410_UDC_EP2_FIFO_REG; | |
361 | break; | |
362 | case 3: | |
363 | fifo_reg = S3C2410_UDC_EP3_FIFO_REG; | |
364 | break; | |
365 | case 4: | |
366 | fifo_reg = S3C2410_UDC_EP4_FIFO_REG; | |
367 | break; | |
368 | } | |
369 | ||
370 | count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket); | |
371 | ||
372 | /* last packet is often short (sometimes a zlp) */ | |
373 | if (count != ep->ep.maxpacket) | |
374 | is_last = 1; | |
375 | else if (req->req.length != req->req.actual || req->req.zero) | |
376 | is_last = 0; | |
377 | else | |
378 | is_last = 2; | |
379 | ||
380 | /* Only ep0 debug messages are interesting */ | |
381 | if (idx == 0) | |
382 | dprintk(DEBUG_NORMAL, | |
383 | "Written ep%d %d.%d of %d b [last %d,z %d]\n", | |
384 | idx, count, req->req.actual, req->req.length, | |
385 | is_last, req->req.zero); | |
386 | ||
387 | if (is_last) { | |
388 | /* The order is important. It prevents sending 2 packets | |
389 | * at the same time */ | |
390 | ||
391 | if (idx == 0) { | |
392 | /* Reset signal => no need to say 'data sent' */ | |
393 | if (! (udc_read(S3C2410_UDC_USB_INT_REG) | |
394 | & S3C2410_UDC_USBINT_RESET)) | |
395 | s3c2410_udc_set_ep0_de_in(base_addr); | |
396 | ep->dev->ep0state=EP0_IDLE; | |
397 | } else { | |
398 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
399 | ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
400 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
401 | udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY, | |
402 | S3C2410_UDC_IN_CSR1_REG); | |
403 | } | |
404 | ||
405 | s3c2410_udc_done(ep, req, 0); | |
406 | is_last = 1; | |
407 | } else { | |
408 | if (idx == 0) { | |
409 | /* Reset signal => no need to say 'data sent' */ | |
410 | if (! (udc_read(S3C2410_UDC_USB_INT_REG) | |
411 | & S3C2410_UDC_USBINT_RESET)) | |
412 | s3c2410_udc_set_ep0_ipr(base_addr); | |
413 | } else { | |
414 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
415 | ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
416 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
417 | udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY, | |
418 | S3C2410_UDC_IN_CSR1_REG); | |
419 | } | |
420 | } | |
421 | ||
422 | return is_last; | |
423 | } | |
424 | ||
425 | static inline int s3c2410_udc_read_packet(int fifo, u8 *buf, | |
426 | struct s3c2410_request *req, unsigned avail) | |
427 | { | |
428 | unsigned len; | |
429 | ||
430 | len = min(req->req.length - req->req.actual, avail); | |
431 | req->req.actual += len; | |
432 | ||
433 | readsb(fifo + base_addr, buf, len); | |
434 | return len; | |
435 | } | |
436 | ||
437 | /* | |
438 | * return: 0 = still running, 1 = queue empty, negative = errno | |
439 | */ | |
440 | static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep, | |
441 | struct s3c2410_request *req) | |
442 | { | |
443 | u8 *buf; | |
444 | u32 ep_csr; | |
445 | unsigned bufferspace; | |
446 | int is_last=1; | |
447 | unsigned avail; | |
448 | int fifo_count = 0; | |
449 | u32 idx; | |
450 | int fifo_reg; | |
451 | ||
452 | idx = ep->bEndpointAddress & 0x7F; | |
453 | ||
454 | switch (idx) { | |
455 | default: | |
456 | idx = 0; | |
457 | case 0: | |
458 | fifo_reg = S3C2410_UDC_EP0_FIFO_REG; | |
459 | break; | |
460 | case 1: | |
461 | fifo_reg = S3C2410_UDC_EP1_FIFO_REG; | |
462 | break; | |
463 | case 2: | |
464 | fifo_reg = S3C2410_UDC_EP2_FIFO_REG; | |
465 | break; | |
466 | case 3: | |
467 | fifo_reg = S3C2410_UDC_EP3_FIFO_REG; | |
468 | break; | |
469 | case 4: | |
470 | fifo_reg = S3C2410_UDC_EP4_FIFO_REG; | |
471 | break; | |
472 | } | |
473 | ||
474 | if (!req->req.length) | |
475 | return 1; | |
476 | ||
477 | buf = req->req.buf + req->req.actual; | |
478 | bufferspace = req->req.length - req->req.actual; | |
479 | if (!bufferspace) { | |
480 | dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__); | |
481 | return -1; | |
482 | } | |
483 | ||
484 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
485 | ||
486 | fifo_count = s3c2410_udc_fifo_count_out(); | |
487 | dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count); | |
488 | ||
489 | if (fifo_count > ep->ep.maxpacket) | |
490 | avail = ep->ep.maxpacket; | |
491 | else | |
492 | avail = fifo_count; | |
493 | ||
494 | fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail); | |
495 | ||
496 | /* checking this with ep0 is not accurate as we already | |
497 | * read a control request | |
498 | **/ | |
499 | if (idx != 0 && fifo_count < ep->ep.maxpacket) { | |
500 | is_last = 1; | |
501 | /* overflowed this request? flush extra data */ | |
502 | if (fifo_count != avail) | |
503 | req->req.status = -EOVERFLOW; | |
504 | } else { | |
505 | is_last = (req->req.length <= req->req.actual) ? 1 : 0; | |
506 | } | |
507 | ||
508 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
509 | fifo_count = s3c2410_udc_fifo_count_out(); | |
510 | ||
511 | /* Only ep0 debug messages are interesting */ | |
512 | if (idx == 0) | |
513 | dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n", | |
514 | __func__, fifo_count,is_last); | |
515 | ||
516 | if (is_last) { | |
517 | if (idx == 0) { | |
518 | s3c2410_udc_set_ep0_de_out(base_addr); | |
519 | ep->dev->ep0state = EP0_IDLE; | |
520 | } else { | |
521 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
522 | ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG); | |
523 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
524 | udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY, | |
525 | S3C2410_UDC_OUT_CSR1_REG); | |
526 | } | |
527 | ||
528 | s3c2410_udc_done(ep, req, 0); | |
529 | } else { | |
530 | if (idx == 0) { | |
531 | s3c2410_udc_clear_ep0_opr(base_addr); | |
532 | } else { | |
533 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
534 | ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG); | |
535 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
536 | udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY, | |
537 | S3C2410_UDC_OUT_CSR1_REG); | |
538 | } | |
539 | } | |
540 | ||
541 | return is_last; | |
542 | } | |
543 | ||
544 | static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq) | |
545 | { | |
546 | unsigned char *outbuf = (unsigned char*)crq; | |
547 | int bytes_read = 0; | |
548 | ||
549 | udc_write(0, S3C2410_UDC_INDEX_REG); | |
550 | ||
551 | bytes_read = s3c2410_udc_fifo_count_out(); | |
552 | ||
553 | dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read); | |
554 | ||
555 | if (bytes_read > sizeof(struct usb_ctrlrequest)) | |
556 | bytes_read = sizeof(struct usb_ctrlrequest); | |
557 | ||
558 | readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read); | |
559 | ||
560 | dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__, | |
561 | bytes_read, crq->bRequest, crq->bRequestType, | |
562 | crq->wValue, crq->wIndex, crq->wLength); | |
563 | ||
564 | return bytes_read; | |
565 | } | |
566 | ||
567 | static int s3c2410_udc_get_status(struct s3c2410_udc *dev, | |
568 | struct usb_ctrlrequest *crq) | |
569 | { | |
570 | u16 status = 0; | |
571 | u8 ep_num = crq->wIndex & 0x7F; | |
572 | u8 is_in = crq->wIndex & USB_DIR_IN; | |
573 | ||
574 | switch (crq->bRequestType & USB_RECIP_MASK) { | |
575 | case USB_RECIP_INTERFACE: | |
576 | break; | |
577 | ||
578 | case USB_RECIP_DEVICE: | |
579 | status = dev->devstatus; | |
580 | break; | |
581 | ||
582 | case USB_RECIP_ENDPOINT: | |
583 | if (ep_num > 4 || crq->wLength > 2) | |
584 | return 1; | |
585 | ||
586 | if (ep_num == 0) { | |
587 | udc_write(0, S3C2410_UDC_INDEX_REG); | |
588 | status = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
589 | status = status & S3C2410_UDC_EP0_CSR_SENDSTL; | |
590 | } else { | |
591 | udc_write(ep_num, S3C2410_UDC_INDEX_REG); | |
592 | if (is_in) { | |
593 | status = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
594 | status = status & S3C2410_UDC_ICSR1_SENDSTL; | |
595 | } else { | |
596 | status = udc_read(S3C2410_UDC_OUT_CSR1_REG); | |
597 | status = status & S3C2410_UDC_OCSR1_SENDSTL; | |
598 | } | |
599 | } | |
600 | ||
601 | status = status ? 1 : 0; | |
602 | break; | |
603 | ||
604 | default: | |
605 | return 1; | |
606 | } | |
607 | ||
608 | /* Seems to be needed to get it working. ouch :( */ | |
609 | udelay(5); | |
610 | udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG); | |
611 | udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG); | |
612 | s3c2410_udc_set_ep0_de_in(base_addr); | |
613 | ||
614 | return 0; | |
615 | } | |
616 | /*------------------------- usb state machine -------------------------------*/ | |
617 | static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value); | |
618 | ||
619 | static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev, | |
620 | struct s3c2410_ep *ep, | |
621 | struct usb_ctrlrequest *crq, | |
622 | u32 ep0csr) | |
623 | { | |
624 | int len, ret, tmp; | |
625 | ||
626 | /* start control request? */ | |
627 | if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY)) | |
628 | return; | |
629 | ||
630 | s3c2410_udc_nuke(dev, ep, -EPROTO); | |
631 | ||
632 | len = s3c2410_udc_read_fifo_crq(crq); | |
633 | if (len != sizeof(*crq)) { | |
634 | dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR" | |
635 | " wanted %d bytes got %d. Stalling out...\n", | |
636 | sizeof(*crq), len); | |
637 | s3c2410_udc_set_ep0_ss(base_addr); | |
638 | return; | |
639 | } | |
640 | ||
641 | dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n", | |
642 | crq->bRequest, crq->bRequestType, crq->wLength); | |
643 | ||
644 | /* cope with automagic for some standard requests. */ | |
645 | dev->req_std = (crq->bRequestType & USB_TYPE_MASK) | |
646 | == USB_TYPE_STANDARD; | |
647 | dev->req_config = 0; | |
648 | dev->req_pending = 1; | |
649 | ||
650 | switch (crq->bRequest) { | |
651 | case USB_REQ_SET_CONFIGURATION: | |
652 | dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ... \n"); | |
653 | ||
654 | if (crq->bRequestType == USB_RECIP_DEVICE) { | |
655 | dev->req_config = 1; | |
656 | s3c2410_udc_set_ep0_de_out(base_addr); | |
657 | } | |
658 | break; | |
659 | ||
660 | case USB_REQ_SET_INTERFACE: | |
661 | dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ... \n"); | |
662 | ||
663 | if (crq->bRequestType == USB_RECIP_INTERFACE) { | |
664 | dev->req_config = 1; | |
665 | s3c2410_udc_set_ep0_de_out(base_addr); | |
666 | } | |
667 | break; | |
668 | ||
669 | case USB_REQ_SET_ADDRESS: | |
670 | dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ... \n"); | |
671 | ||
672 | if (crq->bRequestType == USB_RECIP_DEVICE) { | |
673 | tmp = crq->wValue & 0x7F; | |
674 | dev->address = tmp; | |
675 | udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE), | |
676 | S3C2410_UDC_FUNC_ADDR_REG); | |
677 | s3c2410_udc_set_ep0_de_out(base_addr); | |
678 | return; | |
679 | } | |
680 | break; | |
681 | ||
682 | case USB_REQ_GET_STATUS: | |
683 | dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ... \n"); | |
684 | s3c2410_udc_clear_ep0_opr(base_addr); | |
685 | ||
686 | if (dev->req_std) { | |
687 | if (!s3c2410_udc_get_status(dev, crq)) { | |
688 | return; | |
689 | } | |
690 | } | |
691 | break; | |
692 | ||
693 | case USB_REQ_CLEAR_FEATURE: | |
694 | s3c2410_udc_clear_ep0_opr(base_addr); | |
695 | ||
696 | if (crq->bRequestType != USB_RECIP_ENDPOINT) | |
697 | break; | |
698 | ||
699 | if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0) | |
700 | break; | |
701 | ||
702 | s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0); | |
703 | s3c2410_udc_set_ep0_de_out(base_addr); | |
704 | return; | |
705 | ||
706 | case USB_REQ_SET_FEATURE: | |
707 | s3c2410_udc_clear_ep0_opr(base_addr); | |
708 | ||
709 | if (crq->bRequestType != USB_RECIP_ENDPOINT) | |
710 | break; | |
711 | ||
712 | if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0) | |
713 | break; | |
714 | ||
715 | s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1); | |
716 | s3c2410_udc_set_ep0_de_out(base_addr); | |
717 | return; | |
718 | ||
719 | default: | |
720 | s3c2410_udc_clear_ep0_opr(base_addr); | |
721 | break; | |
722 | } | |
723 | ||
724 | if (crq->bRequestType & USB_DIR_IN) | |
725 | dev->ep0state = EP0_IN_DATA_PHASE; | |
726 | else | |
727 | dev->ep0state = EP0_OUT_DATA_PHASE; | |
728 | ||
00c05aab VZ |
729 | if (!dev->driver) |
730 | return; | |
731 | ||
732 | /* deliver the request to the gadget driver */ | |
3fc154b6 AP |
733 | ret = dev->driver->setup(&dev->gadget, crq); |
734 | if (ret < 0) { | |
735 | if (dev->req_config) { | |
736 | dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n", | |
737 | crq->bRequest, ret); | |
738 | return; | |
739 | } | |
740 | ||
741 | if (ret == -EOPNOTSUPP) | |
742 | dprintk(DEBUG_NORMAL, "Operation not supported\n"); | |
743 | else | |
744 | dprintk(DEBUG_NORMAL, | |
745 | "dev->driver->setup failed. (%d)\n", ret); | |
746 | ||
747 | udelay(5); | |
748 | s3c2410_udc_set_ep0_ss(base_addr); | |
749 | s3c2410_udc_set_ep0_de_out(base_addr); | |
750 | dev->ep0state = EP0_IDLE; | |
751 | /* deferred i/o == no response yet */ | |
752 | } else if (dev->req_pending) { | |
753 | dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n"); | |
754 | dev->req_pending=0; | |
755 | } | |
756 | ||
757 | dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]); | |
758 | } | |
759 | ||
760 | static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev) | |
761 | { | |
762 | u32 ep0csr; | |
763 | struct s3c2410_ep *ep = &dev->ep[0]; | |
764 | struct s3c2410_request *req; | |
765 | struct usb_ctrlrequest crq; | |
766 | ||
767 | if (list_empty(&ep->queue)) | |
768 | req = NULL; | |
769 | else | |
770 | req = list_entry(ep->queue.next, struct s3c2410_request, queue); | |
771 | ||
772 | /* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to | |
773 | * S3C2410_UDC_EP0_CSR_REG when index is zero */ | |
774 | ||
775 | udc_write(0, S3C2410_UDC_INDEX_REG); | |
776 | ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
777 | ||
778 | dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n", | |
779 | ep0csr, ep0states[dev->ep0state]); | |
780 | ||
781 | /* clear stall status */ | |
782 | if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) { | |
783 | s3c2410_udc_nuke(dev, ep, -EPIPE); | |
784 | dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n"); | |
785 | s3c2410_udc_clear_ep0_sst(base_addr); | |
786 | dev->ep0state = EP0_IDLE; | |
787 | return; | |
788 | } | |
789 | ||
790 | /* clear setup end */ | |
791 | if (ep0csr & S3C2410_UDC_EP0_CSR_SE) { | |
792 | dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n"); | |
793 | s3c2410_udc_nuke(dev, ep, 0); | |
794 | s3c2410_udc_clear_ep0_se(base_addr); | |
795 | dev->ep0state = EP0_IDLE; | |
796 | } | |
797 | ||
798 | switch (dev->ep0state) { | |
799 | case EP0_IDLE: | |
800 | s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr); | |
801 | break; | |
802 | ||
803 | case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */ | |
804 | dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n"); | |
805 | if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req) { | |
806 | s3c2410_udc_write_fifo(ep, req); | |
807 | } | |
808 | break; | |
809 | ||
810 | case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */ | |
811 | dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n"); | |
812 | if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req ) { | |
813 | s3c2410_udc_read_fifo(ep,req); | |
814 | } | |
815 | break; | |
816 | ||
817 | case EP0_END_XFER: | |
818 | dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n"); | |
819 | dev->ep0state = EP0_IDLE; | |
820 | break; | |
821 | ||
822 | case EP0_STALL: | |
823 | dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n"); | |
824 | dev->ep0state = EP0_IDLE; | |
825 | break; | |
826 | } | |
827 | } | |
828 | ||
829 | /* | |
830 | * handle_ep - Manage I/O endpoints | |
831 | */ | |
832 | ||
833 | static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep) | |
834 | { | |
835 | struct s3c2410_request *req; | |
836 | int is_in = ep->bEndpointAddress & USB_DIR_IN; | |
837 | u32 ep_csr1; | |
838 | u32 idx; | |
839 | ||
840 | if (likely (!list_empty(&ep->queue))) | |
841 | req = list_entry(ep->queue.next, | |
842 | struct s3c2410_request, queue); | |
843 | else | |
844 | req = NULL; | |
845 | ||
846 | idx = ep->bEndpointAddress & 0x7F; | |
847 | ||
848 | if (is_in) { | |
849 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
850 | ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
851 | dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n", | |
852 | idx, ep_csr1, req ? 1 : 0); | |
853 | ||
854 | if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) { | |
855 | dprintk(DEBUG_VERBOSE, "st\n"); | |
856 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
857 | udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL, | |
858 | S3C2410_UDC_IN_CSR1_REG); | |
859 | return; | |
860 | } | |
861 | ||
862 | if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req) { | |
863 | s3c2410_udc_write_fifo(ep,req); | |
864 | } | |
865 | } else { | |
866 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
867 | ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG); | |
868 | dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1); | |
869 | ||
870 | if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) { | |
871 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
872 | udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL, | |
873 | S3C2410_UDC_OUT_CSR1_REG); | |
874 | return; | |
875 | } | |
876 | ||
877 | if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req) { | |
878 | s3c2410_udc_read_fifo(ep,req); | |
879 | } | |
880 | } | |
881 | } | |
882 | ||
a09e64fb | 883 | #include <mach/regs-irq.h> |
3fc154b6 AP |
884 | |
885 | /* | |
886 | * s3c2410_udc_irq - interrupt handler | |
887 | */ | |
d8d42233 | 888 | static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev) |
3fc154b6 AP |
889 | { |
890 | struct s3c2410_udc *dev = _dev; | |
891 | int usb_status; | |
892 | int usbd_status; | |
893 | int pwr_reg; | |
894 | int ep0csr; | |
895 | int i; | |
16f08a08 | 896 | u32 idx, idx2; |
3fc154b6 AP |
897 | unsigned long flags; |
898 | ||
899 | spin_lock_irqsave(&dev->lock, flags); | |
900 | ||
901 | /* Driver connected ? */ | |
902 | if (!dev->driver) { | |
903 | /* Clear interrupts */ | |
904 | udc_write(udc_read(S3C2410_UDC_USB_INT_REG), | |
905 | S3C2410_UDC_USB_INT_REG); | |
906 | udc_write(udc_read(S3C2410_UDC_EP_INT_REG), | |
907 | S3C2410_UDC_EP_INT_REG); | |
908 | } | |
909 | ||
910 | /* Save index */ | |
911 | idx = udc_read(S3C2410_UDC_INDEX_REG); | |
912 | ||
913 | /* Read status registers */ | |
914 | usb_status = udc_read(S3C2410_UDC_USB_INT_REG); | |
915 | usbd_status = udc_read(S3C2410_UDC_EP_INT_REG); | |
916 | pwr_reg = udc_read(S3C2410_UDC_PWR_REG); | |
917 | ||
918 | udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); | |
919 | ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
920 | ||
921 | dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n", | |
922 | usb_status, usbd_status, pwr_reg, ep0csr); | |
923 | ||
924 | /* | |
925 | * Now, handle interrupts. There's two types : | |
926 | * - Reset, Resume, Suspend coming -> usb_int_reg | |
927 | * - EP -> ep_int_reg | |
928 | */ | |
929 | ||
930 | /* RESET */ | |
931 | if (usb_status & S3C2410_UDC_USBINT_RESET) { | |
932 | /* two kind of reset : | |
933 | * - reset start -> pwr reg = 8 | |
934 | * - reset end -> pwr reg = 0 | |
935 | **/ | |
936 | dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n", | |
937 | ep0csr, pwr_reg); | |
938 | ||
939 | dev->gadget.speed = USB_SPEED_UNKNOWN; | |
940 | udc_write(0x00, S3C2410_UDC_INDEX_REG); | |
941 | udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3, | |
942 | S3C2410_UDC_MAXP_REG); | |
943 | dev->address = 0; | |
944 | ||
945 | dev->ep0state = EP0_IDLE; | |
946 | dev->gadget.speed = USB_SPEED_FULL; | |
947 | ||
948 | /* clear interrupt */ | |
949 | udc_write(S3C2410_UDC_USBINT_RESET, | |
950 | S3C2410_UDC_USB_INT_REG); | |
951 | ||
952 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
953 | spin_unlock_irqrestore(&dev->lock, flags); | |
954 | return IRQ_HANDLED; | |
955 | } | |
956 | ||
957 | /* RESUME */ | |
958 | if (usb_status & S3C2410_UDC_USBINT_RESUME) { | |
959 | dprintk(DEBUG_NORMAL, "USB resume\n"); | |
960 | ||
961 | /* clear interrupt */ | |
962 | udc_write(S3C2410_UDC_USBINT_RESUME, | |
963 | S3C2410_UDC_USB_INT_REG); | |
964 | ||
965 | if (dev->gadget.speed != USB_SPEED_UNKNOWN | |
966 | && dev->driver | |
967 | && dev->driver->resume) | |
968 | dev->driver->resume(&dev->gadget); | |
969 | } | |
970 | ||
971 | /* SUSPEND */ | |
972 | if (usb_status & S3C2410_UDC_USBINT_SUSPEND) { | |
973 | dprintk(DEBUG_NORMAL, "USB suspend\n"); | |
974 | ||
975 | /* clear interrupt */ | |
976 | udc_write(S3C2410_UDC_USBINT_SUSPEND, | |
977 | S3C2410_UDC_USB_INT_REG); | |
978 | ||
979 | if (dev->gadget.speed != USB_SPEED_UNKNOWN | |
980 | && dev->driver | |
981 | && dev->driver->suspend) | |
982 | dev->driver->suspend(&dev->gadget); | |
983 | ||
984 | dev->ep0state = EP0_IDLE; | |
985 | } | |
986 | ||
987 | /* EP */ | |
988 | /* control traffic */ | |
989 | /* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready | |
990 | * generate an interrupt | |
991 | */ | |
992 | if (usbd_status & S3C2410_UDC_INT_EP0) { | |
993 | dprintk(DEBUG_VERBOSE, "USB ep0 irq\n"); | |
994 | /* Clear the interrupt bit by setting it to 1 */ | |
995 | udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG); | |
996 | s3c2410_udc_handle_ep0(dev); | |
997 | } | |
998 | ||
999 | /* endpoint data transfers */ | |
1000 | for (i = 1; i < S3C2410_ENDPOINTS; i++) { | |
1001 | u32 tmp = 1 << i; | |
1002 | if (usbd_status & tmp) { | |
1003 | dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i); | |
1004 | ||
1005 | /* Clear the interrupt bit by setting it to 1 */ | |
1006 | udc_write(tmp, S3C2410_UDC_EP_INT_REG); | |
1007 | s3c2410_udc_handle_ep(&dev->ep[i]); | |
1008 | } | |
1009 | } | |
1010 | ||
16f08a08 FG |
1011 | /* what else causes this interrupt? a receive! who is it? */ |
1012 | if (!usb_status && !usbd_status && !pwr_reg && !ep0csr) { | |
1013 | for (i = 1; i < S3C2410_ENDPOINTS; i++) { | |
1014 | idx2 = udc_read(S3C2410_UDC_INDEX_REG); | |
1015 | udc_write(i, S3C2410_UDC_INDEX_REG); | |
1016 | ||
1017 | if (udc_read(S3C2410_UDC_OUT_CSR1_REG) & 0x1) | |
1018 | s3c2410_udc_handle_ep(&dev->ep[i]); | |
1019 | ||
1020 | /* restore index */ | |
1021 | udc_write(idx2, S3C2410_UDC_INDEX_REG); | |
1022 | } | |
1023 | } | |
1024 | ||
d8d42233 | 1025 | dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", IRQ_USBD); |
3fc154b6 AP |
1026 | |
1027 | /* Restore old index */ | |
1028 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
1029 | ||
1030 | spin_unlock_irqrestore(&dev->lock, flags); | |
1031 | ||
1032 | return IRQ_HANDLED; | |
1033 | } | |
1034 | /*------------------------- s3c2410_ep_ops ----------------------------------*/ | |
1035 | ||
1036 | static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep) | |
1037 | { | |
1038 | return container_of(ep, struct s3c2410_ep, ep); | |
1039 | } | |
1040 | ||
1041 | static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget) | |
1042 | { | |
1043 | return container_of(gadget, struct s3c2410_udc, gadget); | |
1044 | } | |
1045 | ||
1046 | static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req) | |
1047 | { | |
1048 | return container_of(req, struct s3c2410_request, req); | |
1049 | } | |
1050 | ||
1051 | /* | |
1052 | * s3c2410_udc_ep_enable | |
1053 | */ | |
1054 | static int s3c2410_udc_ep_enable(struct usb_ep *_ep, | |
1055 | const struct usb_endpoint_descriptor *desc) | |
1056 | { | |
1057 | struct s3c2410_udc *dev; | |
1058 | struct s3c2410_ep *ep; | |
1059 | u32 max, tmp; | |
1060 | unsigned long flags; | |
1061 | u32 csr1,csr2; | |
1062 | u32 int_en_reg; | |
1063 | ||
1064 | ep = to_s3c2410_ep(_ep); | |
1065 | ||
1066 | if (!_ep || !desc || ep->desc | |
1067 | || _ep->name == ep0name | |
1068 | || desc->bDescriptorType != USB_DT_ENDPOINT) | |
1069 | return -EINVAL; | |
1070 | ||
1071 | dev = ep->dev; | |
1072 | if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) | |
1073 | return -ESHUTDOWN; | |
1074 | ||
29cc8897 | 1075 | max = usb_endpoint_maxp(desc) & 0x1fff; |
3fc154b6 AP |
1076 | |
1077 | local_irq_save (flags); | |
1078 | _ep->maxpacket = max & 0x7ff; | |
1079 | ep->desc = desc; | |
1080 | ep->halted = 0; | |
1081 | ep->bEndpointAddress = desc->bEndpointAddress; | |
1082 | ||
1083 | /* set max packet */ | |
1084 | udc_write(ep->num, S3C2410_UDC_INDEX_REG); | |
1085 | udc_write(max >> 3, S3C2410_UDC_MAXP_REG); | |
1086 | ||
1087 | /* set type, direction, address; reset fifo counters */ | |
1088 | if (desc->bEndpointAddress & USB_DIR_IN) { | |
1089 | csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT; | |
1090 | csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN; | |
1091 | ||
1092 | udc_write(ep->num, S3C2410_UDC_INDEX_REG); | |
1093 | udc_write(csr1, S3C2410_UDC_IN_CSR1_REG); | |
1094 | udc_write(ep->num, S3C2410_UDC_INDEX_REG); | |
1095 | udc_write(csr2, S3C2410_UDC_IN_CSR2_REG); | |
1096 | } else { | |
1097 | /* don't flush in fifo or it will cause endpoint interrupt */ | |
1098 | csr1 = S3C2410_UDC_ICSR1_CLRDT; | |
1099 | csr2 = S3C2410_UDC_ICSR2_DMAIEN; | |
1100 | ||
1101 | udc_write(ep->num, S3C2410_UDC_INDEX_REG); | |
1102 | udc_write(csr1, S3C2410_UDC_IN_CSR1_REG); | |
1103 | udc_write(ep->num, S3C2410_UDC_INDEX_REG); | |
1104 | udc_write(csr2, S3C2410_UDC_IN_CSR2_REG); | |
1105 | ||
1106 | csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT; | |
1107 | csr2 = S3C2410_UDC_OCSR2_DMAIEN; | |
1108 | ||
1109 | udc_write(ep->num, S3C2410_UDC_INDEX_REG); | |
1110 | udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG); | |
1111 | udc_write(ep->num, S3C2410_UDC_INDEX_REG); | |
1112 | udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG); | |
1113 | } | |
1114 | ||
1115 | /* enable irqs */ | |
1116 | int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG); | |
1117 | udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG); | |
1118 | ||
1119 | /* print some debug message */ | |
1120 | tmp = desc->bEndpointAddress; | |
1121 | dprintk (DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n", | |
1122 | _ep->name,ep->num, tmp, | |
1123 | desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max); | |
1124 | ||
1125 | local_irq_restore (flags); | |
1126 | s3c2410_udc_set_halt(_ep, 0); | |
1127 | ||
1128 | return 0; | |
1129 | } | |
1130 | ||
1131 | /* | |
1132 | * s3c2410_udc_ep_disable | |
1133 | */ | |
1134 | static int s3c2410_udc_ep_disable(struct usb_ep *_ep) | |
1135 | { | |
1136 | struct s3c2410_ep *ep = to_s3c2410_ep(_ep); | |
1137 | unsigned long flags; | |
1138 | u32 int_en_reg; | |
1139 | ||
1140 | if (!_ep || !ep->desc) { | |
1141 | dprintk(DEBUG_NORMAL, "%s not enabled\n", | |
1142 | _ep ? ep->ep.name : NULL); | |
1143 | return -EINVAL; | |
1144 | } | |
1145 | ||
1146 | local_irq_save(flags); | |
1147 | ||
1148 | dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name); | |
1149 | ||
1150 | ep->desc = NULL; | |
f9c56cdd | 1151 | ep->ep.desc = NULL; |
3fc154b6 AP |
1152 | ep->halted = 1; |
1153 | ||
1154 | s3c2410_udc_nuke (ep->dev, ep, -ESHUTDOWN); | |
1155 | ||
1156 | /* disable irqs */ | |
1157 | int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG); | |
1158 | udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG); | |
1159 | ||
1160 | local_irq_restore(flags); | |
1161 | ||
1162 | dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name); | |
1163 | ||
1164 | return 0; | |
1165 | } | |
1166 | ||
1167 | /* | |
1168 | * s3c2410_udc_alloc_request | |
1169 | */ | |
1170 | static struct usb_request * | |
1171 | s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags) | |
1172 | { | |
1173 | struct s3c2410_request *req; | |
1174 | ||
1175 | dprintk(DEBUG_VERBOSE,"%s(%p,%d)\n", __func__, _ep, mem_flags); | |
1176 | ||
1177 | if (!_ep) | |
1178 | return NULL; | |
1179 | ||
1180 | req = kzalloc (sizeof(struct s3c2410_request), mem_flags); | |
1181 | if (!req) | |
1182 | return NULL; | |
1183 | ||
1184 | INIT_LIST_HEAD (&req->queue); | |
1185 | return &req->req; | |
1186 | } | |
1187 | ||
1188 | /* | |
1189 | * s3c2410_udc_free_request | |
1190 | */ | |
1191 | static void | |
1192 | s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req) | |
1193 | { | |
1194 | struct s3c2410_ep *ep = to_s3c2410_ep(_ep); | |
1195 | struct s3c2410_request *req = to_s3c2410_req(_req); | |
1196 | ||
1197 | dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req); | |
1198 | ||
1199 | if (!ep || !_req || (!ep->desc && _ep->name != ep0name)) | |
1200 | return; | |
1201 | ||
1202 | WARN_ON (!list_empty (&req->queue)); | |
1203 | kfree(req); | |
1204 | } | |
1205 | ||
3fc154b6 AP |
1206 | /* |
1207 | * s3c2410_udc_queue | |
1208 | */ | |
1209 | static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req, | |
1210 | gfp_t gfp_flags) | |
1211 | { | |
1212 | struct s3c2410_request *req = to_s3c2410_req(_req); | |
1213 | struct s3c2410_ep *ep = to_s3c2410_ep(_ep); | |
1214 | struct s3c2410_udc *dev; | |
1215 | u32 ep_csr = 0; | |
1216 | int fifo_count = 0; | |
1217 | unsigned long flags; | |
1218 | ||
1219 | if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) { | |
1220 | dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__); | |
1221 | return -EINVAL; | |
1222 | } | |
1223 | ||
1224 | dev = ep->dev; | |
1225 | if (unlikely (!dev->driver | |
1226 | || dev->gadget.speed == USB_SPEED_UNKNOWN)) { | |
1227 | return -ESHUTDOWN; | |
1228 | } | |
1229 | ||
1230 | local_irq_save (flags); | |
1231 | ||
1232 | if (unlikely(!_req || !_req->complete | |
1233 | || !_req->buf || !list_empty(&req->queue))) { | |
1234 | if (!_req) | |
1235 | dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__); | |
1236 | else { | |
1237 | dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n", | |
1238 | __func__, !_req->complete,!_req->buf, | |
1239 | !list_empty(&req->queue)); | |
1240 | } | |
1241 | ||
1242 | local_irq_restore(flags); | |
1243 | return -EINVAL; | |
1244 | } | |
1245 | ||
1246 | _req->status = -EINPROGRESS; | |
1247 | _req->actual = 0; | |
1248 | ||
1249 | dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n", | |
1250 | __func__, ep->bEndpointAddress, _req->length); | |
1251 | ||
1252 | if (ep->bEndpointAddress) { | |
1253 | udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG); | |
1254 | ||
1255 | ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN) | |
1256 | ? S3C2410_UDC_IN_CSR1_REG | |
1257 | : S3C2410_UDC_OUT_CSR1_REG); | |
1258 | fifo_count = s3c2410_udc_fifo_count_out(); | |
1259 | } else { | |
1260 | udc_write(0, S3C2410_UDC_INDEX_REG); | |
1261 | ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG); | |
1262 | fifo_count = s3c2410_udc_fifo_count_out(); | |
1263 | } | |
1264 | ||
1265 | /* kickstart this i/o queue? */ | |
1266 | if (list_empty(&ep->queue) && !ep->halted) { | |
1267 | if (ep->bEndpointAddress == 0 /* ep0 */) { | |
1268 | switch (dev->ep0state) { | |
1269 | case EP0_IN_DATA_PHASE: | |
1270 | if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY) | |
1271 | && s3c2410_udc_write_fifo(ep, | |
1272 | req)) { | |
1273 | dev->ep0state = EP0_IDLE; | |
1274 | req = NULL; | |
1275 | } | |
1276 | break; | |
1277 | ||
1278 | case EP0_OUT_DATA_PHASE: | |
1279 | if ((!_req->length) | |
1280 | || ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY) | |
1281 | && s3c2410_udc_read_fifo(ep, | |
1282 | req))) { | |
1283 | dev->ep0state = EP0_IDLE; | |
1284 | req = NULL; | |
1285 | } | |
1286 | break; | |
1287 | ||
1288 | default: | |
1289 | local_irq_restore(flags); | |
1290 | return -EL2HLT; | |
1291 | } | |
1292 | } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0 | |
1293 | && (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY)) | |
1294 | && s3c2410_udc_write_fifo(ep, req)) { | |
1295 | req = NULL; | |
1296 | } else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY) | |
1297 | && fifo_count | |
1298 | && s3c2410_udc_read_fifo(ep, req)) { | |
1299 | req = NULL; | |
1300 | } | |
1301 | } | |
1302 | ||
1303 | /* pio or dma irq handler advances the queue. */ | |
1304 | if (likely (req != 0)) | |
1305 | list_add_tail(&req->queue, &ep->queue); | |
1306 | ||
1307 | local_irq_restore(flags); | |
1308 | ||
1309 | dprintk(DEBUG_VERBOSE, "%s ok\n", __func__); | |
1310 | return 0; | |
1311 | } | |
1312 | ||
1313 | /* | |
1314 | * s3c2410_udc_dequeue | |
1315 | */ | |
1316 | static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req) | |
1317 | { | |
1318 | struct s3c2410_ep *ep = to_s3c2410_ep(_ep); | |
1319 | struct s3c2410_udc *udc; | |
1320 | int retval = -EINVAL; | |
1321 | unsigned long flags; | |
1322 | struct s3c2410_request *req = NULL; | |
1323 | ||
1324 | dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req); | |
1325 | ||
1326 | if (!the_controller->driver) | |
1327 | return -ESHUTDOWN; | |
1328 | ||
1329 | if (!_ep || !_req) | |
1330 | return retval; | |
1331 | ||
1332 | udc = to_s3c2410_udc(ep->gadget); | |
1333 | ||
1334 | local_irq_save (flags); | |
1335 | ||
1336 | list_for_each_entry (req, &ep->queue, queue) { | |
1337 | if (&req->req == _req) { | |
1338 | list_del_init (&req->queue); | |
1339 | _req->status = -ECONNRESET; | |
1340 | retval = 0; | |
1341 | break; | |
1342 | } | |
1343 | } | |
1344 | ||
1345 | if (retval == 0) { | |
1346 | dprintk(DEBUG_VERBOSE, | |
1347 | "dequeued req %p from %s, len %d buf %p\n", | |
1348 | req, _ep->name, _req->length, _req->buf); | |
1349 | ||
1350 | s3c2410_udc_done(ep, req, -ECONNRESET); | |
1351 | } | |
1352 | ||
1353 | local_irq_restore (flags); | |
1354 | return retval; | |
1355 | } | |
1356 | ||
1357 | /* | |
1358 | * s3c2410_udc_set_halt | |
1359 | */ | |
1360 | static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value) | |
1361 | { | |
1362 | struct s3c2410_ep *ep = to_s3c2410_ep(_ep); | |
1363 | u32 ep_csr = 0; | |
1364 | unsigned long flags; | |
1365 | u32 idx; | |
1366 | ||
1367 | if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) { | |
1368 | dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__); | |
1369 | return -EINVAL; | |
1370 | } | |
1371 | ||
1372 | local_irq_save (flags); | |
1373 | ||
1374 | idx = ep->bEndpointAddress & 0x7F; | |
1375 | ||
1376 | if (idx == 0) { | |
1377 | s3c2410_udc_set_ep0_ss(base_addr); | |
1378 | s3c2410_udc_set_ep0_de_out(base_addr); | |
1379 | } else { | |
1380 | udc_write(idx, S3C2410_UDC_INDEX_REG); | |
1381 | ep_csr = udc_read((ep->bEndpointAddress &USB_DIR_IN) | |
1382 | ? S3C2410_UDC_IN_CSR1_REG | |
1383 | : S3C2410_UDC_OUT_CSR1_REG); | |
1384 | ||
1385 | if ((ep->bEndpointAddress & USB_DIR_IN) != 0) { | |
1386 | if (value) | |
1387 | udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL, | |
1388 | S3C2410_UDC_IN_CSR1_REG); | |
1389 | else { | |
1390 | ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL; | |
1391 | udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG); | |
1392 | ep_csr |= S3C2410_UDC_ICSR1_CLRDT; | |
1393 | udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG); | |
1394 | } | |
1395 | } else { | |
1396 | if (value) | |
1397 | udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL, | |
1398 | S3C2410_UDC_OUT_CSR1_REG); | |
1399 | else { | |
1400 | ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL; | |
1401 | udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG); | |
1402 | ep_csr |= S3C2410_UDC_OCSR1_CLRDT; | |
1403 | udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG); | |
1404 | } | |
1405 | } | |
1406 | } | |
1407 | ||
1408 | ep->halted = value ? 1 : 0; | |
1409 | local_irq_restore (flags); | |
1410 | ||
1411 | return 0; | |
1412 | } | |
1413 | ||
1414 | static const struct usb_ep_ops s3c2410_ep_ops = { | |
1415 | .enable = s3c2410_udc_ep_enable, | |
1416 | .disable = s3c2410_udc_ep_disable, | |
1417 | ||
1418 | .alloc_request = s3c2410_udc_alloc_request, | |
1419 | .free_request = s3c2410_udc_free_request, | |
1420 | ||
3fc154b6 AP |
1421 | .queue = s3c2410_udc_queue, |
1422 | .dequeue = s3c2410_udc_dequeue, | |
1423 | ||
1424 | .set_halt = s3c2410_udc_set_halt, | |
1425 | }; | |
1426 | ||
1427 | /*------------------------- usb_gadget_ops ----------------------------------*/ | |
1428 | ||
1429 | /* | |
1430 | * s3c2410_udc_get_frame | |
1431 | */ | |
1432 | static int s3c2410_udc_get_frame(struct usb_gadget *_gadget) | |
1433 | { | |
1434 | int tmp; | |
1435 | ||
1436 | dprintk(DEBUG_VERBOSE, "%s()\n", __func__); | |
1437 | ||
1438 | tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8; | |
1439 | tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG); | |
1440 | return tmp; | |
1441 | } | |
1442 | ||
1443 | /* | |
1444 | * s3c2410_udc_wakeup | |
1445 | */ | |
1446 | static int s3c2410_udc_wakeup(struct usb_gadget *_gadget) | |
1447 | { | |
1448 | dprintk(DEBUG_NORMAL, "%s()\n", __func__); | |
1449 | return 0; | |
1450 | } | |
1451 | ||
1452 | /* | |
1453 | * s3c2410_udc_set_selfpowered | |
1454 | */ | |
1455 | static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value) | |
1456 | { | |
1457 | struct s3c2410_udc *udc = to_s3c2410_udc(gadget); | |
1458 | ||
1459 | dprintk(DEBUG_NORMAL, "%s()\n", __func__); | |
1460 | ||
1461 | if (value) | |
1462 | udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED); | |
1463 | else | |
1464 | udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED); | |
1465 | ||
1466 | return 0; | |
1467 | } | |
1468 | ||
1469 | static void s3c2410_udc_disable(struct s3c2410_udc *dev); | |
1470 | static void s3c2410_udc_enable(struct s3c2410_udc *dev); | |
1471 | ||
1472 | static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on) | |
1473 | { | |
1474 | dprintk(DEBUG_NORMAL, "%s()\n", __func__); | |
1475 | ||
a74022a5 LPC |
1476 | if (udc_info && (udc_info->udc_command || |
1477 | gpio_is_valid(udc_info->pullup_pin))) { | |
1478 | ||
3fc154b6 AP |
1479 | if (is_on) |
1480 | s3c2410_udc_enable(udc); | |
1481 | else { | |
1482 | if (udc->gadget.speed != USB_SPEED_UNKNOWN) { | |
1483 | if (udc->driver && udc->driver->disconnect) | |
1484 | udc->driver->disconnect(&udc->gadget); | |
1485 | ||
1486 | } | |
1487 | s3c2410_udc_disable(udc); | |
1488 | } | |
1489 | } | |
1490 | else | |
1491 | return -EOPNOTSUPP; | |
1492 | ||
1493 | return 0; | |
1494 | } | |
1495 | ||
1496 | static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active) | |
1497 | { | |
1498 | struct s3c2410_udc *udc = to_s3c2410_udc(gadget); | |
1499 | ||
1500 | dprintk(DEBUG_NORMAL, "%s()\n", __func__); | |
1501 | ||
1502 | udc->vbus = (is_active != 0); | |
1503 | s3c2410_udc_set_pullup(udc, is_active); | |
1504 | return 0; | |
1505 | } | |
1506 | ||
1507 | static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on) | |
1508 | { | |
1509 | struct s3c2410_udc *udc = to_s3c2410_udc(gadget); | |
1510 | ||
1511 | dprintk(DEBUG_NORMAL, "%s()\n", __func__); | |
1512 | ||
1513 | s3c2410_udc_set_pullup(udc, is_on ? 0 : 1); | |
1514 | return 0; | |
1515 | } | |
1516 | ||
1517 | static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev) | |
1518 | { | |
1519 | struct s3c2410_udc *dev = _dev; | |
1520 | unsigned int value; | |
1521 | ||
1522 | dprintk(DEBUG_NORMAL, "%s()\n", __func__); | |
5f629ad7 | 1523 | |
ea99ecfd | 1524 | value = gpio_get_value(udc_info->vbus_pin) ? 1 : 0; |
3fc154b6 AP |
1525 | if (udc_info->vbus_pin_inverted) |
1526 | value = !value; | |
1527 | ||
1528 | if (value != dev->vbus) | |
1529 | s3c2410_udc_vbus_session(&dev->gadget, value); | |
1530 | ||
1531 | return IRQ_HANDLED; | |
1532 | } | |
1533 | ||
1534 | static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma) | |
1535 | { | |
1536 | dprintk(DEBUG_NORMAL, "%s()\n", __func__); | |
1537 | ||
1538 | if (udc_info && udc_info->vbus_draw) { | |
1539 | udc_info->vbus_draw(ma); | |
1540 | return 0; | |
1541 | } | |
1542 | ||
1543 | return -ENOTSUPP; | |
1544 | } | |
1545 | ||
0f91349b SAS |
1546 | static int s3c2410_udc_start(struct usb_gadget_driver *driver, |
1547 | int (*bind)(struct usb_gadget *)); | |
1548 | static int s3c2410_udc_stop(struct usb_gadget_driver *driver); | |
1549 | ||
3fc154b6 AP |
1550 | static const struct usb_gadget_ops s3c2410_ops = { |
1551 | .get_frame = s3c2410_udc_get_frame, | |
1552 | .wakeup = s3c2410_udc_wakeup, | |
1553 | .set_selfpowered = s3c2410_udc_set_selfpowered, | |
1554 | .pullup = s3c2410_udc_pullup, | |
1555 | .vbus_session = s3c2410_udc_vbus_session, | |
1556 | .vbus_draw = s3c2410_vbus_draw, | |
0f91349b SAS |
1557 | .start = s3c2410_udc_start, |
1558 | .stop = s3c2410_udc_stop, | |
3fc154b6 AP |
1559 | }; |
1560 | ||
a74022a5 LPC |
1561 | static void s3c2410_udc_command(enum s3c2410_udc_cmd_e cmd) |
1562 | { | |
1563 | if (!udc_info) | |
1564 | return; | |
1565 | ||
1566 | if (udc_info->udc_command) { | |
5b826138 | 1567 | udc_info->udc_command(cmd); |
a74022a5 LPC |
1568 | } else if (gpio_is_valid(udc_info->pullup_pin)) { |
1569 | int value; | |
1570 | ||
1571 | switch (cmd) { | |
1572 | case S3C2410_UDC_P_ENABLE: | |
1573 | value = 1; | |
1574 | break; | |
1575 | case S3C2410_UDC_P_DISABLE: | |
1576 | value = 0; | |
1577 | break; | |
1578 | default: | |
1579 | return; | |
1580 | } | |
1581 | value ^= udc_info->pullup_pin_inverted; | |
1582 | ||
1583 | gpio_set_value(udc_info->pullup_pin, value); | |
1584 | } | |
1585 | } | |
1586 | ||
3fc154b6 AP |
1587 | /*------------------------- gadget driver handling---------------------------*/ |
1588 | /* | |
1589 | * s3c2410_udc_disable | |
1590 | */ | |
1591 | static void s3c2410_udc_disable(struct s3c2410_udc *dev) | |
1592 | { | |
1593 | dprintk(DEBUG_NORMAL, "%s()\n", __func__); | |
1594 | ||
1595 | /* Disable all interrupts */ | |
1596 | udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG); | |
1597 | udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG); | |
1598 | ||
1599 | /* Clear the interrupt registers */ | |
1600 | udc_write(S3C2410_UDC_USBINT_RESET | |
1601 | | S3C2410_UDC_USBINT_RESUME | |
1602 | | S3C2410_UDC_USBINT_SUSPEND, | |
1603 | S3C2410_UDC_USB_INT_REG); | |
1604 | ||
1605 | udc_write(0x1F, S3C2410_UDC_EP_INT_REG); | |
1606 | ||
1607 | /* Good bye, cruel world */ | |
a74022a5 | 1608 | s3c2410_udc_command(S3C2410_UDC_P_DISABLE); |
3fc154b6 AP |
1609 | |
1610 | /* Set speed to unknown */ | |
1611 | dev->gadget.speed = USB_SPEED_UNKNOWN; | |
1612 | } | |
1613 | ||
1614 | /* | |
1615 | * s3c2410_udc_reinit | |
1616 | */ | |
1617 | static void s3c2410_udc_reinit(struct s3c2410_udc *dev) | |
1618 | { | |
1619 | u32 i; | |
1620 | ||
1621 | /* device/ep0 records init */ | |
1622 | INIT_LIST_HEAD (&dev->gadget.ep_list); | |
1623 | INIT_LIST_HEAD (&dev->gadget.ep0->ep_list); | |
1624 | dev->ep0state = EP0_IDLE; | |
1625 | ||
1626 | for (i = 0; i < S3C2410_ENDPOINTS; i++) { | |
1627 | struct s3c2410_ep *ep = &dev->ep[i]; | |
1628 | ||
1629 | if (i != 0) | |
1630 | list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list); | |
1631 | ||
1632 | ep->dev = dev; | |
1633 | ep->desc = NULL; | |
f9c56cdd | 1634 | ep->ep.desc = NULL; |
3fc154b6 AP |
1635 | ep->halted = 0; |
1636 | INIT_LIST_HEAD (&ep->queue); | |
1637 | } | |
1638 | } | |
1639 | ||
1640 | /* | |
1641 | * s3c2410_udc_enable | |
1642 | */ | |
1643 | static void s3c2410_udc_enable(struct s3c2410_udc *dev) | |
1644 | { | |
1645 | int i; | |
1646 | ||
1647 | dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n"); | |
1648 | ||
1649 | /* dev->gadget.speed = USB_SPEED_UNKNOWN; */ | |
1650 | dev->gadget.speed = USB_SPEED_FULL; | |
1651 | ||
1652 | /* Set MAXP for all endpoints */ | |
1653 | for (i = 0; i < S3C2410_ENDPOINTS; i++) { | |
1654 | udc_write(i, S3C2410_UDC_INDEX_REG); | |
1655 | udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3, | |
1656 | S3C2410_UDC_MAXP_REG); | |
1657 | } | |
1658 | ||
1659 | /* Set default power state */ | |
1660 | udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG); | |
1661 | ||
1662 | /* Enable reset and suspend interrupt interrupts */ | |
1663 | udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND, | |
1664 | S3C2410_UDC_USB_INT_EN_REG); | |
1665 | ||
1666 | /* Enable ep0 interrupt */ | |
1667 | udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG); | |
1668 | ||
1669 | /* time to say "hello, world" */ | |
a74022a5 | 1670 | s3c2410_udc_command(S3C2410_UDC_P_ENABLE); |
3fc154b6 AP |
1671 | } |
1672 | ||
0f91349b | 1673 | static int s3c2410_udc_start(struct usb_gadget_driver *driver, |
b0fca50f | 1674 | int (*bind)(struct usb_gadget *)) |
3fc154b6 AP |
1675 | { |
1676 | struct s3c2410_udc *udc = the_controller; | |
1677 | int retval; | |
1678 | ||
b0fca50f | 1679 | dprintk(DEBUG_NORMAL, "%s() '%s'\n", __func__, driver->driver.name); |
3fc154b6 AP |
1680 | |
1681 | /* Sanity checks */ | |
1682 | if (!udc) | |
1683 | return -ENODEV; | |
1684 | ||
1685 | if (udc->driver) | |
1686 | return -EBUSY; | |
1687 | ||
7177aed4 | 1688 | if (!bind || !driver->setup || driver->max_speed < USB_SPEED_FULL) { |
3fc154b6 | 1689 | printk(KERN_ERR "Invalid driver: bind %p setup %p speed %d\n", |
7177aed4 | 1690 | bind, driver->setup, driver->max_speed); |
3fc154b6 AP |
1691 | return -EINVAL; |
1692 | } | |
1693 | #if defined(MODULE) | |
1694 | if (!driver->unbind) { | |
1695 | printk(KERN_ERR "Invalid driver: no unbind method\n"); | |
1696 | return -EINVAL; | |
1697 | } | |
1698 | #endif | |
1699 | ||
1700 | /* Hook the driver */ | |
1701 | udc->driver = driver; | |
1702 | udc->gadget.dev.driver = &driver->driver; | |
1703 | ||
1704 | /* Bind the driver */ | |
1705 | if ((retval = device_add(&udc->gadget.dev)) != 0) { | |
1706 | printk(KERN_ERR "Error in device_add() : %d\n",retval); | |
1707 | goto register_error; | |
1708 | } | |
1709 | ||
1710 | dprintk(DEBUG_NORMAL, "binding gadget driver '%s'\n", | |
1711 | driver->driver.name); | |
1712 | ||
b0fca50f | 1713 | if ((retval = bind(&udc->gadget)) != 0) { |
3fc154b6 AP |
1714 | device_del(&udc->gadget.dev); |
1715 | goto register_error; | |
1716 | } | |
1717 | ||
1718 | /* Enable udc */ | |
1719 | s3c2410_udc_enable(udc); | |
1720 | ||
1721 | return 0; | |
1722 | ||
1723 | register_error: | |
1724 | udc->driver = NULL; | |
1725 | udc->gadget.dev.driver = NULL; | |
1726 | return retval; | |
1727 | } | |
1728 | ||
0f91349b | 1729 | static int s3c2410_udc_stop(struct usb_gadget_driver *driver) |
3fc154b6 AP |
1730 | { |
1731 | struct s3c2410_udc *udc = the_controller; | |
1732 | ||
1733 | if (!udc) | |
1734 | return -ENODEV; | |
1735 | ||
1736 | if (!driver || driver != udc->driver || !driver->unbind) | |
1737 | return -EINVAL; | |
1738 | ||
3b49d231 | 1739 | dprintk(DEBUG_NORMAL, "usb_gadget_unregister_driver() '%s'\n", |
3fc154b6 AP |
1740 | driver->driver.name); |
1741 | ||
3b49d231 VZ |
1742 | /* report disconnect */ |
1743 | if (driver->disconnect) | |
1744 | driver->disconnect(&udc->gadget); | |
1745 | ||
823c3fd9 | 1746 | driver->unbind(&udc->gadget); |
3fc154b6 AP |
1747 | |
1748 | device_del(&udc->gadget.dev); | |
1749 | udc->driver = NULL; | |
1750 | ||
1751 | /* Disable udc */ | |
1752 | s3c2410_udc_disable(udc); | |
1753 | ||
1754 | return 0; | |
1755 | } | |
1756 | ||
1757 | /*---------------------------------------------------------------------------*/ | |
1758 | static struct s3c2410_udc memory = { | |
1759 | .gadget = { | |
1760 | .ops = &s3c2410_ops, | |
1761 | .ep0 = &memory.ep[0].ep, | |
1762 | .name = gadget_name, | |
1763 | .dev = { | |
c682b170 | 1764 | .init_name = "gadget", |
3fc154b6 AP |
1765 | }, |
1766 | }, | |
1767 | ||
1768 | /* control endpoint */ | |
1769 | .ep[0] = { | |
1770 | .num = 0, | |
1771 | .ep = { | |
1772 | .name = ep0name, | |
1773 | .ops = &s3c2410_ep_ops, | |
1774 | .maxpacket = EP0_FIFO_SIZE, | |
1775 | }, | |
1776 | .dev = &memory, | |
1777 | }, | |
1778 | ||
1779 | /* first group of endpoints */ | |
1780 | .ep[1] = { | |
1781 | .num = 1, | |
1782 | .ep = { | |
1783 | .name = "ep1-bulk", | |
1784 | .ops = &s3c2410_ep_ops, | |
1785 | .maxpacket = EP_FIFO_SIZE, | |
1786 | }, | |
1787 | .dev = &memory, | |
1788 | .fifo_size = EP_FIFO_SIZE, | |
1789 | .bEndpointAddress = 1, | |
1790 | .bmAttributes = USB_ENDPOINT_XFER_BULK, | |
1791 | }, | |
1792 | .ep[2] = { | |
1793 | .num = 2, | |
1794 | .ep = { | |
1795 | .name = "ep2-bulk", | |
1796 | .ops = &s3c2410_ep_ops, | |
1797 | .maxpacket = EP_FIFO_SIZE, | |
1798 | }, | |
1799 | .dev = &memory, | |
1800 | .fifo_size = EP_FIFO_SIZE, | |
1801 | .bEndpointAddress = 2, | |
1802 | .bmAttributes = USB_ENDPOINT_XFER_BULK, | |
1803 | }, | |
1804 | .ep[3] = { | |
1805 | .num = 3, | |
1806 | .ep = { | |
1807 | .name = "ep3-bulk", | |
1808 | .ops = &s3c2410_ep_ops, | |
1809 | .maxpacket = EP_FIFO_SIZE, | |
1810 | }, | |
1811 | .dev = &memory, | |
1812 | .fifo_size = EP_FIFO_SIZE, | |
1813 | .bEndpointAddress = 3, | |
1814 | .bmAttributes = USB_ENDPOINT_XFER_BULK, | |
1815 | }, | |
1816 | .ep[4] = { | |
1817 | .num = 4, | |
1818 | .ep = { | |
1819 | .name = "ep4-bulk", | |
1820 | .ops = &s3c2410_ep_ops, | |
1821 | .maxpacket = EP_FIFO_SIZE, | |
1822 | }, | |
1823 | .dev = &memory, | |
1824 | .fifo_size = EP_FIFO_SIZE, | |
1825 | .bEndpointAddress = 4, | |
1826 | .bmAttributes = USB_ENDPOINT_XFER_BULK, | |
1827 | } | |
1828 | ||
1829 | }; | |
1830 | ||
1831 | /* | |
1832 | * probe - binds to the platform device | |
1833 | */ | |
1834 | static int s3c2410_udc_probe(struct platform_device *pdev) | |
1835 | { | |
1836 | struct s3c2410_udc *udc = &memory; | |
1837 | struct device *dev = &pdev->dev; | |
1838 | int retval; | |
ea99ecfd | 1839 | int irq; |
3fc154b6 AP |
1840 | |
1841 | dev_dbg(dev, "%s()\n", __func__); | |
1842 | ||
1843 | usb_bus_clock = clk_get(NULL, "usb-bus-gadget"); | |
1844 | if (IS_ERR(usb_bus_clock)) { | |
1845 | dev_err(dev, "failed to get usb bus clock source\n"); | |
1846 | return PTR_ERR(usb_bus_clock); | |
1847 | } | |
1848 | ||
1849 | clk_enable(usb_bus_clock); | |
1850 | ||
1851 | udc_clock = clk_get(NULL, "usb-device"); | |
1852 | if (IS_ERR(udc_clock)) { | |
1853 | dev_err(dev, "failed to get udc clock source\n"); | |
1854 | return PTR_ERR(udc_clock); | |
1855 | } | |
1856 | ||
1857 | clk_enable(udc_clock); | |
1858 | ||
1859 | mdelay(10); | |
1860 | ||
1861 | dev_dbg(dev, "got and enabled clocks\n"); | |
1862 | ||
1863 | if (strncmp(pdev->name, "s3c2440", 7) == 0) { | |
1864 | dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n"); | |
1865 | memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE; | |
1866 | memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE; | |
1867 | memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE; | |
1868 | memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE; | |
1869 | } | |
1870 | ||
1871 | spin_lock_init (&udc->lock); | |
1872 | udc_info = pdev->dev.platform_data; | |
1873 | ||
1874 | rsrc_start = S3C2410_PA_USBDEV; | |
1875 | rsrc_len = S3C24XX_SZ_USBDEV; | |
1876 | ||
1877 | if (!request_mem_region(rsrc_start, rsrc_len, gadget_name)) | |
1878 | return -EBUSY; | |
1879 | ||
1880 | base_addr = ioremap(rsrc_start, rsrc_len); | |
1881 | if (!base_addr) { | |
1882 | retval = -ENOMEM; | |
1883 | goto err_mem; | |
1884 | } | |
1885 | ||
1886 | device_initialize(&udc->gadget.dev); | |
1887 | udc->gadget.dev.parent = &pdev->dev; | |
1888 | udc->gadget.dev.dma_mask = pdev->dev.dma_mask; | |
1889 | ||
1890 | the_controller = udc; | |
1891 | platform_set_drvdata(pdev, udc); | |
1892 | ||
1893 | s3c2410_udc_disable(udc); | |
1894 | s3c2410_udc_reinit(udc); | |
1895 | ||
1896 | /* irq setup after old hardware state is cleaned up */ | |
1897 | retval = request_irq(IRQ_USBD, s3c2410_udc_irq, | |
b5dd18d8 | 1898 | 0, gadget_name, udc); |
3fc154b6 AP |
1899 | |
1900 | if (retval != 0) { | |
1901 | dev_err(dev, "cannot get irq %i, err %d\n", IRQ_USBD, retval); | |
1902 | retval = -EBUSY; | |
1903 | goto err_map; | |
1904 | } | |
1905 | ||
1906 | dev_dbg(dev, "got irq %i\n", IRQ_USBD); | |
1907 | ||
1908 | if (udc_info && udc_info->vbus_pin > 0) { | |
ea99ecfd BD |
1909 | retval = gpio_request(udc_info->vbus_pin, "udc vbus"); |
1910 | if (retval < 0) { | |
1911 | dev_err(dev, "cannot claim vbus pin\n"); | |
1912 | goto err_int; | |
1913 | } | |
1914 | ||
1915 | irq = gpio_to_irq(udc_info->vbus_pin); | |
1916 | if (irq < 0) { | |
1917 | dev_err(dev, "no irq for gpio vbus pin\n"); | |
1918 | goto err_gpio_claim; | |
1919 | } | |
1920 | ||
3fc154b6 | 1921 | retval = request_irq(irq, s3c2410_udc_vbus_irq, |
b5dd18d8 | 1922 | IRQF_TRIGGER_RISING |
8802bca4 BD |
1923 | | IRQF_TRIGGER_FALLING | IRQF_SHARED, |
1924 | gadget_name, udc); | |
3fc154b6 AP |
1925 | |
1926 | if (retval != 0) { | |
ea99ecfd | 1927 | dev_err(dev, "can't get vbus irq %d, err %d\n", |
3fc154b6 AP |
1928 | irq, retval); |
1929 | retval = -EBUSY; | |
ea99ecfd | 1930 | goto err_gpio_claim; |
3fc154b6 AP |
1931 | } |
1932 | ||
1933 | dev_dbg(dev, "got irq %i\n", irq); | |
1934 | } else { | |
1935 | udc->vbus = 1; | |
1936 | } | |
1937 | ||
a74022a5 LPC |
1938 | if (udc_info && !udc_info->udc_command && |
1939 | gpio_is_valid(udc_info->pullup_pin)) { | |
1940 | ||
1941 | retval = gpio_request_one(udc_info->pullup_pin, | |
1942 | udc_info->vbus_pin_inverted ? | |
1943 | GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW, | |
1944 | "udc pullup"); | |
1945 | if (retval) | |
1946 | goto err_vbus_irq; | |
1947 | } | |
1948 | ||
0f91349b SAS |
1949 | retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget); |
1950 | if (retval) | |
1951 | goto err_add_udc; | |
1952 | ||
3fc154b6 AP |
1953 | if (s3c2410_udc_debugfs_root) { |
1954 | udc->regs_info = debugfs_create_file("registers", S_IRUGO, | |
1955 | s3c2410_udc_debugfs_root, | |
1956 | udc, &s3c2410_udc_debugfs_fops); | |
d66937d7 Z |
1957 | if (!udc->regs_info) |
1958 | dev_warn(dev, "debugfs file creation failed\n"); | |
3fc154b6 AP |
1959 | } |
1960 | ||
1961 | dev_dbg(dev, "probe ok\n"); | |
1962 | ||
1963 | return 0; | |
1964 | ||
0f91349b SAS |
1965 | err_add_udc: |
1966 | if (udc_info && !udc_info->udc_command && | |
1967 | gpio_is_valid(udc_info->pullup_pin)) | |
1968 | gpio_free(udc_info->pullup_pin); | |
a74022a5 LPC |
1969 | err_vbus_irq: |
1970 | if (udc_info && udc_info->vbus_pin > 0) | |
1971 | free_irq(gpio_to_irq(udc_info->vbus_pin), udc); | |
ea99ecfd BD |
1972 | err_gpio_claim: |
1973 | if (udc_info && udc_info->vbus_pin > 0) | |
1974 | gpio_free(udc_info->vbus_pin); | |
3fc154b6 AP |
1975 | err_int: |
1976 | free_irq(IRQ_USBD, udc); | |
1977 | err_map: | |
1978 | iounmap(base_addr); | |
1979 | err_mem: | |
1980 | release_mem_region(rsrc_start, rsrc_len); | |
1981 | ||
1982 | return retval; | |
1983 | } | |
1984 | ||
1985 | /* | |
1986 | * s3c2410_udc_remove | |
1987 | */ | |
1988 | static int s3c2410_udc_remove(struct platform_device *pdev) | |
1989 | { | |
1990 | struct s3c2410_udc *udc = platform_get_drvdata(pdev); | |
1991 | unsigned int irq; | |
1992 | ||
1993 | dev_dbg(&pdev->dev, "%s()\n", __func__); | |
0f91349b SAS |
1994 | |
1995 | usb_del_gadget_udc(&udc->gadget); | |
3fc154b6 AP |
1996 | if (udc->driver) |
1997 | return -EBUSY; | |
1998 | ||
1999 | debugfs_remove(udc->regs_info); | |
2000 | ||
a74022a5 LPC |
2001 | if (udc_info && !udc_info->udc_command && |
2002 | gpio_is_valid(udc_info->pullup_pin)) | |
2003 | gpio_free(udc_info->pullup_pin); | |
2004 | ||
3fc154b6 | 2005 | if (udc_info && udc_info->vbus_pin > 0) { |
ea99ecfd | 2006 | irq = gpio_to_irq(udc_info->vbus_pin); |
3fc154b6 AP |
2007 | free_irq(irq, udc); |
2008 | } | |
2009 | ||
2010 | free_irq(IRQ_USBD, udc); | |
2011 | ||
2012 | iounmap(base_addr); | |
2013 | release_mem_region(rsrc_start, rsrc_len); | |
2014 | ||
2015 | platform_set_drvdata(pdev, NULL); | |
2016 | ||
2017 | if (!IS_ERR(udc_clock) && udc_clock != NULL) { | |
2018 | clk_disable(udc_clock); | |
2019 | clk_put(udc_clock); | |
2020 | udc_clock = NULL; | |
2021 | } | |
2022 | ||
2023 | if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) { | |
2024 | clk_disable(usb_bus_clock); | |
2025 | clk_put(usb_bus_clock); | |
2026 | usb_bus_clock = NULL; | |
2027 | } | |
2028 | ||
2029 | dev_dbg(&pdev->dev, "%s: remove ok\n", __func__); | |
2030 | return 0; | |
2031 | } | |
2032 | ||
2033 | #ifdef CONFIG_PM | |
2034 | static int s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message) | |
2035 | { | |
a74022a5 | 2036 | s3c2410_udc_command(S3C2410_UDC_P_DISABLE); |
3fc154b6 AP |
2037 | |
2038 | return 0; | |
2039 | } | |
2040 | ||
2041 | static int s3c2410_udc_resume(struct platform_device *pdev) | |
2042 | { | |
a74022a5 | 2043 | s3c2410_udc_command(S3C2410_UDC_P_ENABLE); |
3fc154b6 AP |
2044 | |
2045 | return 0; | |
2046 | } | |
2047 | #else | |
2048 | #define s3c2410_udc_suspend NULL | |
2049 | #define s3c2410_udc_resume NULL | |
2050 | #endif | |
2051 | ||
513385a3 SAS |
2052 | static const struct platform_device_id s3c_udc_ids[] = { |
2053 | { "s3c2410-usbgadget", }, | |
2054 | { "s3c2440-usbgadget", }, | |
7e9d40f3 | 2055 | { } |
3fc154b6 | 2056 | }; |
513385a3 | 2057 | MODULE_DEVICE_TABLE(platform, s3c_udc_ids); |
3fc154b6 | 2058 | |
513385a3 | 2059 | static struct platform_driver udc_driver_24x0 = { |
3fc154b6 | 2060 | .driver = { |
513385a3 | 2061 | .name = "s3c24x0-usbgadget", |
3fc154b6 AP |
2062 | .owner = THIS_MODULE, |
2063 | }, | |
2064 | .probe = s3c2410_udc_probe, | |
2065 | .remove = s3c2410_udc_remove, | |
2066 | .suspend = s3c2410_udc_suspend, | |
2067 | .resume = s3c2410_udc_resume, | |
513385a3 | 2068 | .id_table = s3c_udc_ids, |
3fc154b6 AP |
2069 | }; |
2070 | ||
2071 | static int __init udc_init(void) | |
2072 | { | |
2073 | int retval; | |
2074 | ||
2075 | dprintk(DEBUG_NORMAL, "%s: version %s\n", gadget_name, DRIVER_VERSION); | |
2076 | ||
2077 | s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name, NULL); | |
2078 | if (IS_ERR(s3c2410_udc_debugfs_root)) { | |
2079 | printk(KERN_ERR "%s: debugfs dir creation failed %ld\n", | |
2080 | gadget_name, PTR_ERR(s3c2410_udc_debugfs_root)); | |
2081 | s3c2410_udc_debugfs_root = NULL; | |
2082 | } | |
2083 | ||
513385a3 | 2084 | retval = platform_driver_register(&udc_driver_24x0); |
3fc154b6 AP |
2085 | if (retval) |
2086 | goto err; | |
2087 | ||
2088 | return 0; | |
2089 | ||
2090 | err: | |
2091 | debugfs_remove(s3c2410_udc_debugfs_root); | |
2092 | return retval; | |
2093 | } | |
2094 | ||
2095 | static void __exit udc_exit(void) | |
2096 | { | |
513385a3 | 2097 | platform_driver_unregister(&udc_driver_24x0); |
3fc154b6 AP |
2098 | debugfs_remove(s3c2410_udc_debugfs_root); |
2099 | } | |
2100 | ||
3fc154b6 AP |
2101 | module_init(udc_init); |
2102 | module_exit(udc_exit); | |
2103 | ||
2104 | MODULE_AUTHOR(DRIVER_AUTHOR); | |
2105 | MODULE_DESCRIPTION(DRIVER_DESC); | |
2106 | MODULE_VERSION(DRIVER_VERSION); | |
2107 | MODULE_LICENSE("GPL"); |