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c4144247 YS |
1 | /* |
2 | * R8A66597 UDC (USB gadget) | |
3 | * | |
4 | * Copyright (C) 2006-2009 Renesas Solutions Corp. | |
5 | * | |
6 | * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; version 2 of the License. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
20 | * | |
21 | */ | |
22 | ||
23 | #include <linux/module.h> | |
24 | #include <linux/interrupt.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/io.h> | |
27 | #include <linux/platform_device.h> | |
d2e27bdf | 28 | #include <linux/clk.h> |
ae3a0792 | 29 | #include <linux/err.h> |
c4144247 YS |
30 | |
31 | #include <linux/usb/ch9.h> | |
32 | #include <linux/usb/gadget.h> | |
33 | ||
34 | #include "r8a66597-udc.h" | |
35 | ||
36 | #define DRIVER_VERSION "2009-08-18" | |
37 | ||
38 | static const char udc_name[] = "r8a66597_udc"; | |
39 | static const char *r8a66597_ep_name[] = { | |
40 | "ep0", "ep1", "ep2", "ep3", "ep4", "ep5", "ep6", "ep7", | |
41 | "ep8", "ep9", | |
42 | }; | |
43 | ||
44 | static void disable_controller(struct r8a66597 *r8a66597); | |
45 | static void irq_ep0_write(struct r8a66597_ep *ep, struct r8a66597_request *req); | |
46 | static void irq_packet_write(struct r8a66597_ep *ep, | |
47 | struct r8a66597_request *req); | |
48 | static int r8a66597_queue(struct usb_ep *_ep, struct usb_request *_req, | |
49 | gfp_t gfp_flags); | |
50 | ||
51 | static void transfer_complete(struct r8a66597_ep *ep, | |
52 | struct r8a66597_request *req, int status); | |
53 | ||
54 | /*-------------------------------------------------------------------------*/ | |
55 | static inline u16 get_usb_speed(struct r8a66597 *r8a66597) | |
56 | { | |
57 | return r8a66597_read(r8a66597, DVSTCTR0) & RHST; | |
58 | } | |
59 | ||
60 | static void enable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum, | |
61 | unsigned long reg) | |
62 | { | |
63 | u16 tmp; | |
64 | ||
65 | tmp = r8a66597_read(r8a66597, INTENB0); | |
66 | r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE, | |
67 | INTENB0); | |
68 | r8a66597_bset(r8a66597, (1 << pipenum), reg); | |
69 | r8a66597_write(r8a66597, tmp, INTENB0); | |
70 | } | |
71 | ||
72 | static void disable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum, | |
73 | unsigned long reg) | |
74 | { | |
75 | u16 tmp; | |
76 | ||
77 | tmp = r8a66597_read(r8a66597, INTENB0); | |
78 | r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE, | |
79 | INTENB0); | |
80 | r8a66597_bclr(r8a66597, (1 << pipenum), reg); | |
81 | r8a66597_write(r8a66597, tmp, INTENB0); | |
82 | } | |
83 | ||
84 | static void r8a66597_usb_connect(struct r8a66597 *r8a66597) | |
85 | { | |
86 | r8a66597_bset(r8a66597, CTRE, INTENB0); | |
87 | r8a66597_bset(r8a66597, BEMPE | BRDYE, INTENB0); | |
88 | ||
89 | r8a66597_bset(r8a66597, DPRPU, SYSCFG0); | |
90 | } | |
91 | ||
92 | static void r8a66597_usb_disconnect(struct r8a66597 *r8a66597) | |
93 | __releases(r8a66597->lock) | |
94 | __acquires(r8a66597->lock) | |
95 | { | |
96 | r8a66597_bclr(r8a66597, CTRE, INTENB0); | |
97 | r8a66597_bclr(r8a66597, BEMPE | BRDYE, INTENB0); | |
98 | r8a66597_bclr(r8a66597, DPRPU, SYSCFG0); | |
99 | ||
100 | r8a66597->gadget.speed = USB_SPEED_UNKNOWN; | |
101 | spin_unlock(&r8a66597->lock); | |
102 | r8a66597->driver->disconnect(&r8a66597->gadget); | |
103 | spin_lock(&r8a66597->lock); | |
104 | ||
105 | disable_controller(r8a66597); | |
106 | INIT_LIST_HEAD(&r8a66597->ep[0].queue); | |
107 | } | |
108 | ||
109 | static inline u16 control_reg_get_pid(struct r8a66597 *r8a66597, u16 pipenum) | |
110 | { | |
111 | u16 pid = 0; | |
112 | unsigned long offset; | |
113 | ||
114 | if (pipenum == 0) | |
115 | pid = r8a66597_read(r8a66597, DCPCTR) & PID; | |
116 | else if (pipenum < R8A66597_MAX_NUM_PIPE) { | |
117 | offset = get_pipectr_addr(pipenum); | |
118 | pid = r8a66597_read(r8a66597, offset) & PID; | |
119 | } else | |
120 | printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); | |
121 | ||
122 | return pid; | |
123 | } | |
124 | ||
125 | static inline void control_reg_set_pid(struct r8a66597 *r8a66597, u16 pipenum, | |
126 | u16 pid) | |
127 | { | |
128 | unsigned long offset; | |
129 | ||
130 | if (pipenum == 0) | |
131 | r8a66597_mdfy(r8a66597, pid, PID, DCPCTR); | |
132 | else if (pipenum < R8A66597_MAX_NUM_PIPE) { | |
133 | offset = get_pipectr_addr(pipenum); | |
134 | r8a66597_mdfy(r8a66597, pid, PID, offset); | |
135 | } else | |
136 | printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); | |
137 | } | |
138 | ||
139 | static inline void pipe_start(struct r8a66597 *r8a66597, u16 pipenum) | |
140 | { | |
141 | control_reg_set_pid(r8a66597, pipenum, PID_BUF); | |
142 | } | |
143 | ||
144 | static inline void pipe_stop(struct r8a66597 *r8a66597, u16 pipenum) | |
145 | { | |
146 | control_reg_set_pid(r8a66597, pipenum, PID_NAK); | |
147 | } | |
148 | ||
149 | static inline void pipe_stall(struct r8a66597 *r8a66597, u16 pipenum) | |
150 | { | |
151 | control_reg_set_pid(r8a66597, pipenum, PID_STALL); | |
152 | } | |
153 | ||
154 | static inline u16 control_reg_get(struct r8a66597 *r8a66597, u16 pipenum) | |
155 | { | |
156 | u16 ret = 0; | |
157 | unsigned long offset; | |
158 | ||
159 | if (pipenum == 0) | |
160 | ret = r8a66597_read(r8a66597, DCPCTR); | |
161 | else if (pipenum < R8A66597_MAX_NUM_PIPE) { | |
162 | offset = get_pipectr_addr(pipenum); | |
163 | ret = r8a66597_read(r8a66597, offset); | |
164 | } else | |
165 | printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); | |
166 | ||
167 | return ret; | |
168 | } | |
169 | ||
170 | static inline void control_reg_sqclr(struct r8a66597 *r8a66597, u16 pipenum) | |
171 | { | |
172 | unsigned long offset; | |
173 | ||
174 | pipe_stop(r8a66597, pipenum); | |
175 | ||
176 | if (pipenum == 0) | |
177 | r8a66597_bset(r8a66597, SQCLR, DCPCTR); | |
178 | else if (pipenum < R8A66597_MAX_NUM_PIPE) { | |
179 | offset = get_pipectr_addr(pipenum); | |
180 | r8a66597_bset(r8a66597, SQCLR, offset); | |
181 | } else | |
182 | printk(KERN_ERR "unexpect pipe num(%d)\n", pipenum); | |
183 | } | |
184 | ||
185 | static inline int get_buffer_size(struct r8a66597 *r8a66597, u16 pipenum) | |
186 | { | |
187 | u16 tmp; | |
188 | int size; | |
189 | ||
190 | if (pipenum == 0) { | |
191 | tmp = r8a66597_read(r8a66597, DCPCFG); | |
192 | if ((tmp & R8A66597_CNTMD) != 0) | |
193 | size = 256; | |
194 | else { | |
195 | tmp = r8a66597_read(r8a66597, DCPMAXP); | |
196 | size = tmp & MAXP; | |
197 | } | |
198 | } else { | |
199 | r8a66597_write(r8a66597, pipenum, PIPESEL); | |
200 | tmp = r8a66597_read(r8a66597, PIPECFG); | |
201 | if ((tmp & R8A66597_CNTMD) != 0) { | |
202 | tmp = r8a66597_read(r8a66597, PIPEBUF); | |
203 | size = ((tmp >> 10) + 1) * 64; | |
204 | } else { | |
205 | tmp = r8a66597_read(r8a66597, PIPEMAXP); | |
206 | size = tmp & MXPS; | |
207 | } | |
208 | } | |
209 | ||
210 | return size; | |
211 | } | |
212 | ||
213 | static inline unsigned short mbw_value(struct r8a66597 *r8a66597) | |
214 | { | |
215 | if (r8a66597->pdata->on_chip) | |
216 | return MBW_32; | |
217 | else | |
218 | return MBW_16; | |
219 | } | |
220 | ||
221 | static inline void pipe_change(struct r8a66597 *r8a66597, u16 pipenum) | |
222 | { | |
223 | struct r8a66597_ep *ep = r8a66597->pipenum2ep[pipenum]; | |
224 | ||
225 | if (ep->use_dma) | |
226 | return; | |
227 | ||
228 | r8a66597_mdfy(r8a66597, pipenum, CURPIPE, ep->fifosel); | |
229 | ||
230 | ndelay(450); | |
231 | ||
232 | r8a66597_bset(r8a66597, mbw_value(r8a66597), ep->fifosel); | |
233 | } | |
234 | ||
235 | static int pipe_buffer_setting(struct r8a66597 *r8a66597, | |
236 | struct r8a66597_pipe_info *info) | |
237 | { | |
238 | u16 bufnum = 0, buf_bsize = 0; | |
239 | u16 pipecfg = 0; | |
240 | ||
241 | if (info->pipe == 0) | |
242 | return -EINVAL; | |
243 | ||
244 | r8a66597_write(r8a66597, info->pipe, PIPESEL); | |
245 | ||
246 | if (info->dir_in) | |
247 | pipecfg |= R8A66597_DIR; | |
248 | pipecfg |= info->type; | |
249 | pipecfg |= info->epnum; | |
250 | switch (info->type) { | |
251 | case R8A66597_INT: | |
252 | bufnum = 4 + (info->pipe - R8A66597_BASE_PIPENUM_INT); | |
253 | buf_bsize = 0; | |
254 | break; | |
255 | case R8A66597_BULK: | |
ef5ce3b6 MD |
256 | /* isochronous pipes may be used as bulk pipes */ |
257 | if (info->pipe > R8A66597_BASE_PIPENUM_BULK) | |
258 | bufnum = info->pipe - R8A66597_BASE_PIPENUM_BULK; | |
259 | else | |
260 | bufnum = info->pipe - R8A66597_BASE_PIPENUM_ISOC; | |
261 | ||
262 | bufnum = R8A66597_BASE_BUFNUM + (bufnum * 16); | |
c4144247 YS |
263 | buf_bsize = 7; |
264 | pipecfg |= R8A66597_DBLB; | |
265 | if (!info->dir_in) | |
266 | pipecfg |= R8A66597_SHTNAK; | |
267 | break; | |
268 | case R8A66597_ISO: | |
ef5ce3b6 | 269 | bufnum = R8A66597_BASE_BUFNUM + |
c4144247 | 270 | (info->pipe - R8A66597_BASE_PIPENUM_ISOC) * 16; |
c4144247 YS |
271 | buf_bsize = 7; |
272 | break; | |
273 | } | |
ef5ce3b6 MD |
274 | |
275 | if (buf_bsize && ((bufnum + 16) >= R8A66597_MAX_BUFNUM)) { | |
276 | pr_err(KERN_ERR "r8a66597 pipe memory is insufficient\n"); | |
c4144247 YS |
277 | return -ENOMEM; |
278 | } | |
279 | ||
280 | r8a66597_write(r8a66597, pipecfg, PIPECFG); | |
281 | r8a66597_write(r8a66597, (buf_bsize << 10) | (bufnum), PIPEBUF); | |
282 | r8a66597_write(r8a66597, info->maxpacket, PIPEMAXP); | |
283 | if (info->interval) | |
284 | info->interval--; | |
285 | r8a66597_write(r8a66597, info->interval, PIPEPERI); | |
286 | ||
287 | return 0; | |
288 | } | |
289 | ||
290 | static void pipe_buffer_release(struct r8a66597 *r8a66597, | |
291 | struct r8a66597_pipe_info *info) | |
292 | { | |
293 | if (info->pipe == 0) | |
294 | return; | |
295 | ||
c4144247 YS |
296 | if (is_bulk_pipe(info->pipe)) |
297 | r8a66597->bulk--; | |
298 | else if (is_interrupt_pipe(info->pipe)) | |
299 | r8a66597->interrupt--; | |
300 | else if (is_isoc_pipe(info->pipe)) { | |
301 | r8a66597->isochronous--; | |
302 | if (info->type == R8A66597_BULK) | |
303 | r8a66597->bulk--; | |
304 | } else | |
305 | printk(KERN_ERR "ep_release: unexpect pipenum (%d)\n", | |
306 | info->pipe); | |
307 | } | |
308 | ||
309 | static void pipe_initialize(struct r8a66597_ep *ep) | |
310 | { | |
311 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
312 | ||
313 | r8a66597_mdfy(r8a66597, 0, CURPIPE, ep->fifosel); | |
314 | ||
315 | r8a66597_write(r8a66597, ACLRM, ep->pipectr); | |
316 | r8a66597_write(r8a66597, 0, ep->pipectr); | |
317 | r8a66597_write(r8a66597, SQCLR, ep->pipectr); | |
318 | if (ep->use_dma) { | |
319 | r8a66597_mdfy(r8a66597, ep->pipenum, CURPIPE, ep->fifosel); | |
320 | ||
321 | ndelay(450); | |
322 | ||
323 | r8a66597_bset(r8a66597, mbw_value(r8a66597), ep->fifosel); | |
324 | } | |
325 | } | |
326 | ||
327 | static void r8a66597_ep_setting(struct r8a66597 *r8a66597, | |
328 | struct r8a66597_ep *ep, | |
329 | const struct usb_endpoint_descriptor *desc, | |
330 | u16 pipenum, int dma) | |
331 | { | |
332 | ep->use_dma = 0; | |
333 | ep->fifoaddr = CFIFO; | |
334 | ep->fifosel = CFIFOSEL; | |
335 | ep->fifoctr = CFIFOCTR; | |
336 | ep->fifotrn = 0; | |
337 | ||
338 | ep->pipectr = get_pipectr_addr(pipenum); | |
339 | ep->pipenum = pipenum; | |
340 | ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize); | |
341 | r8a66597->pipenum2ep[pipenum] = ep; | |
342 | r8a66597->epaddr2ep[desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK] | |
343 | = ep; | |
344 | INIT_LIST_HEAD(&ep->queue); | |
345 | } | |
346 | ||
347 | static void r8a66597_ep_release(struct r8a66597_ep *ep) | |
348 | { | |
349 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
350 | u16 pipenum = ep->pipenum; | |
351 | ||
352 | if (pipenum == 0) | |
353 | return; | |
354 | ||
355 | if (ep->use_dma) | |
356 | r8a66597->num_dma--; | |
357 | ep->pipenum = 0; | |
358 | ep->busy = 0; | |
359 | ep->use_dma = 0; | |
360 | } | |
361 | ||
362 | static int alloc_pipe_config(struct r8a66597_ep *ep, | |
363 | const struct usb_endpoint_descriptor *desc) | |
364 | { | |
365 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
366 | struct r8a66597_pipe_info info; | |
367 | int dma = 0; | |
368 | unsigned char *counter; | |
369 | int ret; | |
370 | ||
371 | ep->desc = desc; | |
372 | ||
373 | if (ep->pipenum) /* already allocated pipe */ | |
374 | return 0; | |
375 | ||
376 | switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { | |
377 | case USB_ENDPOINT_XFER_BULK: | |
378 | if (r8a66597->bulk >= R8A66597_MAX_NUM_BULK) { | |
379 | if (r8a66597->isochronous >= R8A66597_MAX_NUM_ISOC) { | |
380 | printk(KERN_ERR "bulk pipe is insufficient\n"); | |
381 | return -ENODEV; | |
382 | } else { | |
383 | info.pipe = R8A66597_BASE_PIPENUM_ISOC | |
384 | + r8a66597->isochronous; | |
385 | counter = &r8a66597->isochronous; | |
386 | } | |
387 | } else { | |
388 | info.pipe = R8A66597_BASE_PIPENUM_BULK + r8a66597->bulk; | |
389 | counter = &r8a66597->bulk; | |
390 | } | |
391 | info.type = R8A66597_BULK; | |
392 | dma = 1; | |
393 | break; | |
394 | case USB_ENDPOINT_XFER_INT: | |
395 | if (r8a66597->interrupt >= R8A66597_MAX_NUM_INT) { | |
396 | printk(KERN_ERR "interrupt pipe is insufficient\n"); | |
397 | return -ENODEV; | |
398 | } | |
399 | info.pipe = R8A66597_BASE_PIPENUM_INT + r8a66597->interrupt; | |
400 | info.type = R8A66597_INT; | |
401 | counter = &r8a66597->interrupt; | |
402 | break; | |
403 | case USB_ENDPOINT_XFER_ISOC: | |
404 | if (r8a66597->isochronous >= R8A66597_MAX_NUM_ISOC) { | |
405 | printk(KERN_ERR "isochronous pipe is insufficient\n"); | |
406 | return -ENODEV; | |
407 | } | |
408 | info.pipe = R8A66597_BASE_PIPENUM_ISOC + r8a66597->isochronous; | |
409 | info.type = R8A66597_ISO; | |
410 | counter = &r8a66597->isochronous; | |
411 | break; | |
412 | default: | |
413 | printk(KERN_ERR "unexpect xfer type\n"); | |
414 | return -EINVAL; | |
415 | } | |
416 | ep->type = info.type; | |
417 | ||
418 | info.epnum = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; | |
419 | info.maxpacket = le16_to_cpu(desc->wMaxPacketSize); | |
420 | info.interval = desc->bInterval; | |
421 | if (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) | |
422 | info.dir_in = 1; | |
423 | else | |
424 | info.dir_in = 0; | |
425 | ||
426 | ret = pipe_buffer_setting(r8a66597, &info); | |
427 | if (ret < 0) { | |
428 | printk(KERN_ERR "pipe_buffer_setting fail\n"); | |
429 | return ret; | |
430 | } | |
431 | ||
432 | (*counter)++; | |
433 | if ((counter == &r8a66597->isochronous) && info.type == R8A66597_BULK) | |
434 | r8a66597->bulk++; | |
435 | ||
436 | r8a66597_ep_setting(r8a66597, ep, desc, info.pipe, dma); | |
437 | pipe_initialize(ep); | |
438 | ||
439 | return 0; | |
440 | } | |
441 | ||
442 | static int free_pipe_config(struct r8a66597_ep *ep) | |
443 | { | |
444 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
445 | struct r8a66597_pipe_info info; | |
446 | ||
447 | info.pipe = ep->pipenum; | |
448 | info.type = ep->type; | |
449 | pipe_buffer_release(r8a66597, &info); | |
450 | r8a66597_ep_release(ep); | |
451 | ||
452 | return 0; | |
453 | } | |
454 | ||
455 | /*-------------------------------------------------------------------------*/ | |
456 | static void pipe_irq_enable(struct r8a66597 *r8a66597, u16 pipenum) | |
457 | { | |
458 | enable_irq_ready(r8a66597, pipenum); | |
459 | enable_irq_nrdy(r8a66597, pipenum); | |
460 | } | |
461 | ||
462 | static void pipe_irq_disable(struct r8a66597 *r8a66597, u16 pipenum) | |
463 | { | |
464 | disable_irq_ready(r8a66597, pipenum); | |
465 | disable_irq_nrdy(r8a66597, pipenum); | |
466 | } | |
467 | ||
468 | /* if complete is true, gadget driver complete function is not call */ | |
469 | static void control_end(struct r8a66597 *r8a66597, unsigned ccpl) | |
470 | { | |
471 | r8a66597->ep[0].internal_ccpl = ccpl; | |
472 | pipe_start(r8a66597, 0); | |
473 | r8a66597_bset(r8a66597, CCPL, DCPCTR); | |
474 | } | |
475 | ||
476 | static void start_ep0_write(struct r8a66597_ep *ep, | |
477 | struct r8a66597_request *req) | |
478 | { | |
479 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
480 | ||
481 | pipe_change(r8a66597, ep->pipenum); | |
482 | r8a66597_mdfy(r8a66597, ISEL, (ISEL | CURPIPE), CFIFOSEL); | |
483 | r8a66597_write(r8a66597, BCLR, ep->fifoctr); | |
484 | if (req->req.length == 0) { | |
485 | r8a66597_bset(r8a66597, BVAL, ep->fifoctr); | |
486 | pipe_start(r8a66597, 0); | |
487 | transfer_complete(ep, req, 0); | |
488 | } else { | |
489 | r8a66597_write(r8a66597, ~BEMP0, BEMPSTS); | |
490 | irq_ep0_write(ep, req); | |
491 | } | |
492 | } | |
493 | ||
494 | static void start_packet_write(struct r8a66597_ep *ep, | |
495 | struct r8a66597_request *req) | |
496 | { | |
497 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
498 | u16 tmp; | |
499 | ||
500 | pipe_change(r8a66597, ep->pipenum); | |
501 | disable_irq_empty(r8a66597, ep->pipenum); | |
502 | pipe_start(r8a66597, ep->pipenum); | |
503 | ||
504 | tmp = r8a66597_read(r8a66597, ep->fifoctr); | |
505 | if (unlikely((tmp & FRDY) == 0)) | |
506 | pipe_irq_enable(r8a66597, ep->pipenum); | |
507 | else | |
508 | irq_packet_write(ep, req); | |
509 | } | |
510 | ||
511 | static void start_packet_read(struct r8a66597_ep *ep, | |
512 | struct r8a66597_request *req) | |
513 | { | |
514 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
515 | u16 pipenum = ep->pipenum; | |
516 | ||
517 | if (ep->pipenum == 0) { | |
518 | r8a66597_mdfy(r8a66597, 0, (ISEL | CURPIPE), CFIFOSEL); | |
519 | r8a66597_write(r8a66597, BCLR, ep->fifoctr); | |
520 | pipe_start(r8a66597, pipenum); | |
521 | pipe_irq_enable(r8a66597, pipenum); | |
522 | } else { | |
523 | if (ep->use_dma) { | |
524 | r8a66597_bset(r8a66597, TRCLR, ep->fifosel); | |
525 | pipe_change(r8a66597, pipenum); | |
526 | r8a66597_bset(r8a66597, TRENB, ep->fifosel); | |
527 | r8a66597_write(r8a66597, | |
528 | (req->req.length + ep->ep.maxpacket - 1) | |
529 | / ep->ep.maxpacket, | |
530 | ep->fifotrn); | |
531 | } | |
532 | pipe_start(r8a66597, pipenum); /* trigger once */ | |
533 | pipe_irq_enable(r8a66597, pipenum); | |
534 | } | |
535 | } | |
536 | ||
537 | static void start_packet(struct r8a66597_ep *ep, struct r8a66597_request *req) | |
538 | { | |
539 | if (ep->desc->bEndpointAddress & USB_DIR_IN) | |
540 | start_packet_write(ep, req); | |
541 | else | |
542 | start_packet_read(ep, req); | |
543 | } | |
544 | ||
545 | static void start_ep0(struct r8a66597_ep *ep, struct r8a66597_request *req) | |
546 | { | |
547 | u16 ctsq; | |
548 | ||
549 | ctsq = r8a66597_read(ep->r8a66597, INTSTS0) & CTSQ; | |
550 | ||
551 | switch (ctsq) { | |
552 | case CS_RDDS: | |
553 | start_ep0_write(ep, req); | |
554 | break; | |
555 | case CS_WRDS: | |
556 | start_packet_read(ep, req); | |
557 | break; | |
558 | ||
559 | case CS_WRND: | |
560 | control_end(ep->r8a66597, 0); | |
561 | break; | |
562 | default: | |
563 | printk(KERN_ERR "start_ep0: unexpect ctsq(%x)\n", ctsq); | |
564 | break; | |
565 | } | |
566 | } | |
567 | ||
568 | static void init_controller(struct r8a66597 *r8a66597) | |
569 | { | |
570 | u16 vif = r8a66597->pdata->vif ? LDRV : 0; | |
571 | u16 irq_sense = r8a66597->irq_sense_low ? INTL : 0; | |
572 | u16 endian = r8a66597->pdata->endian ? BIGEND : 0; | |
573 | ||
574 | if (r8a66597->pdata->on_chip) { | |
575 | r8a66597_bset(r8a66597, 0x04, SYSCFG1); | |
576 | r8a66597_bset(r8a66597, HSE, SYSCFG0); | |
577 | ||
578 | r8a66597_bclr(r8a66597, USBE, SYSCFG0); | |
579 | r8a66597_bclr(r8a66597, DPRPU, SYSCFG0); | |
580 | r8a66597_bset(r8a66597, USBE, SYSCFG0); | |
581 | ||
582 | r8a66597_bset(r8a66597, SCKE, SYSCFG0); | |
583 | ||
584 | r8a66597_bset(r8a66597, irq_sense, INTENB1); | |
585 | r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, | |
586 | DMA0CFG); | |
587 | } else { | |
588 | r8a66597_bset(r8a66597, vif | endian, PINCFG); | |
589 | r8a66597_bset(r8a66597, HSE, SYSCFG0); /* High spd */ | |
590 | r8a66597_mdfy(r8a66597, get_xtal_from_pdata(r8a66597->pdata), | |
591 | XTAL, SYSCFG0); | |
592 | ||
593 | r8a66597_bclr(r8a66597, USBE, SYSCFG0); | |
594 | r8a66597_bclr(r8a66597, DPRPU, SYSCFG0); | |
595 | r8a66597_bset(r8a66597, USBE, SYSCFG0); | |
596 | ||
597 | r8a66597_bset(r8a66597, XCKE, SYSCFG0); | |
598 | ||
599 | msleep(3); | |
600 | ||
601 | r8a66597_bset(r8a66597, PLLC, SYSCFG0); | |
602 | ||
603 | msleep(1); | |
604 | ||
605 | r8a66597_bset(r8a66597, SCKE, SYSCFG0); | |
606 | ||
607 | r8a66597_bset(r8a66597, irq_sense, INTENB1); | |
608 | r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, | |
609 | DMA0CFG); | |
610 | } | |
611 | } | |
612 | ||
613 | static void disable_controller(struct r8a66597 *r8a66597) | |
614 | { | |
615 | if (r8a66597->pdata->on_chip) { | |
616 | r8a66597_bset(r8a66597, SCKE, SYSCFG0); | |
617 | ||
0bb886d2 | 618 | /* disable interrupts */ |
c4144247 YS |
619 | r8a66597_write(r8a66597, 0, INTENB0); |
620 | r8a66597_write(r8a66597, 0, INTENB1); | |
0bb886d2 MD |
621 | r8a66597_write(r8a66597, 0, BRDYENB); |
622 | r8a66597_write(r8a66597, 0, BEMPENB); | |
623 | r8a66597_write(r8a66597, 0, NRDYENB); | |
624 | ||
625 | /* clear status */ | |
626 | r8a66597_write(r8a66597, 0, BRDYSTS); | |
627 | r8a66597_write(r8a66597, 0, NRDYSTS); | |
628 | r8a66597_write(r8a66597, 0, BEMPSTS); | |
c4144247 YS |
629 | |
630 | r8a66597_bclr(r8a66597, USBE, SYSCFG0); | |
631 | r8a66597_bclr(r8a66597, SCKE, SYSCFG0); | |
632 | ||
633 | } else { | |
634 | r8a66597_bclr(r8a66597, SCKE, SYSCFG0); | |
635 | udelay(1); | |
636 | r8a66597_bclr(r8a66597, PLLC, SYSCFG0); | |
637 | udelay(1); | |
638 | udelay(1); | |
639 | r8a66597_bclr(r8a66597, XCKE, SYSCFG0); | |
640 | } | |
641 | } | |
642 | ||
643 | static void r8a66597_start_xclock(struct r8a66597 *r8a66597) | |
644 | { | |
645 | u16 tmp; | |
646 | ||
647 | if (!r8a66597->pdata->on_chip) { | |
648 | tmp = r8a66597_read(r8a66597, SYSCFG0); | |
649 | if (!(tmp & XCKE)) | |
650 | r8a66597_bset(r8a66597, XCKE, SYSCFG0); | |
651 | } | |
652 | } | |
653 | ||
654 | static struct r8a66597_request *get_request_from_ep(struct r8a66597_ep *ep) | |
655 | { | |
656 | return list_entry(ep->queue.next, struct r8a66597_request, queue); | |
657 | } | |
658 | ||
659 | /*-------------------------------------------------------------------------*/ | |
660 | static void transfer_complete(struct r8a66597_ep *ep, | |
661 | struct r8a66597_request *req, int status) | |
662 | __releases(r8a66597->lock) | |
663 | __acquires(r8a66597->lock) | |
664 | { | |
665 | int restart = 0; | |
666 | ||
667 | if (unlikely(ep->pipenum == 0)) { | |
668 | if (ep->internal_ccpl) { | |
669 | ep->internal_ccpl = 0; | |
670 | return; | |
671 | } | |
672 | } | |
673 | ||
674 | list_del_init(&req->queue); | |
675 | if (ep->r8a66597->gadget.speed == USB_SPEED_UNKNOWN) | |
676 | req->req.status = -ESHUTDOWN; | |
677 | else | |
678 | req->req.status = status; | |
679 | ||
680 | if (!list_empty(&ep->queue)) | |
681 | restart = 1; | |
682 | ||
683 | spin_unlock(&ep->r8a66597->lock); | |
684 | req->req.complete(&ep->ep, &req->req); | |
685 | spin_lock(&ep->r8a66597->lock); | |
686 | ||
687 | if (restart) { | |
688 | req = get_request_from_ep(ep); | |
689 | if (ep->desc) | |
690 | start_packet(ep, req); | |
691 | } | |
692 | } | |
693 | ||
694 | static void irq_ep0_write(struct r8a66597_ep *ep, struct r8a66597_request *req) | |
695 | { | |
696 | int i; | |
697 | u16 tmp; | |
698 | unsigned bufsize; | |
699 | size_t size; | |
700 | void *buf; | |
701 | u16 pipenum = ep->pipenum; | |
702 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
703 | ||
704 | pipe_change(r8a66597, pipenum); | |
705 | r8a66597_bset(r8a66597, ISEL, ep->fifosel); | |
706 | ||
707 | i = 0; | |
708 | do { | |
709 | tmp = r8a66597_read(r8a66597, ep->fifoctr); | |
710 | if (i++ > 100000) { | |
711 | printk(KERN_ERR "pipe0 is busy. maybe cpu i/o bus" | |
712 | "conflict. please power off this controller."); | |
713 | return; | |
714 | } | |
715 | ndelay(1); | |
716 | } while ((tmp & FRDY) == 0); | |
717 | ||
718 | /* prepare parameters */ | |
719 | bufsize = get_buffer_size(r8a66597, pipenum); | |
720 | buf = req->req.buf + req->req.actual; | |
721 | size = min(bufsize, req->req.length - req->req.actual); | |
722 | ||
723 | /* write fifo */ | |
724 | if (req->req.buf) { | |
725 | if (size > 0) | |
726 | r8a66597_write_fifo(r8a66597, ep->fifoaddr, buf, size); | |
727 | if ((size == 0) || ((size % ep->ep.maxpacket) != 0)) | |
728 | r8a66597_bset(r8a66597, BVAL, ep->fifoctr); | |
729 | } | |
730 | ||
731 | /* update parameters */ | |
732 | req->req.actual += size; | |
733 | ||
734 | /* check transfer finish */ | |
735 | if ((!req->req.zero && (req->req.actual == req->req.length)) | |
736 | || (size % ep->ep.maxpacket) | |
737 | || (size == 0)) { | |
738 | disable_irq_ready(r8a66597, pipenum); | |
739 | disable_irq_empty(r8a66597, pipenum); | |
740 | } else { | |
741 | disable_irq_ready(r8a66597, pipenum); | |
742 | enable_irq_empty(r8a66597, pipenum); | |
743 | } | |
744 | pipe_start(r8a66597, pipenum); | |
745 | } | |
746 | ||
747 | static void irq_packet_write(struct r8a66597_ep *ep, | |
748 | struct r8a66597_request *req) | |
749 | { | |
750 | u16 tmp; | |
751 | unsigned bufsize; | |
752 | size_t size; | |
753 | void *buf; | |
754 | u16 pipenum = ep->pipenum; | |
755 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
756 | ||
757 | pipe_change(r8a66597, pipenum); | |
758 | tmp = r8a66597_read(r8a66597, ep->fifoctr); | |
759 | if (unlikely((tmp & FRDY) == 0)) { | |
760 | pipe_stop(r8a66597, pipenum); | |
761 | pipe_irq_disable(r8a66597, pipenum); | |
762 | printk(KERN_ERR "write fifo not ready. pipnum=%d\n", pipenum); | |
763 | return; | |
764 | } | |
765 | ||
766 | /* prepare parameters */ | |
767 | bufsize = get_buffer_size(r8a66597, pipenum); | |
768 | buf = req->req.buf + req->req.actual; | |
769 | size = min(bufsize, req->req.length - req->req.actual); | |
770 | ||
771 | /* write fifo */ | |
772 | if (req->req.buf) { | |
773 | r8a66597_write_fifo(r8a66597, ep->fifoaddr, buf, size); | |
774 | if ((size == 0) | |
775 | || ((size % ep->ep.maxpacket) != 0) | |
776 | || ((bufsize != ep->ep.maxpacket) | |
777 | && (bufsize > size))) | |
778 | r8a66597_bset(r8a66597, BVAL, ep->fifoctr); | |
779 | } | |
780 | ||
781 | /* update parameters */ | |
782 | req->req.actual += size; | |
783 | /* check transfer finish */ | |
784 | if ((!req->req.zero && (req->req.actual == req->req.length)) | |
785 | || (size % ep->ep.maxpacket) | |
786 | || (size == 0)) { | |
787 | disable_irq_ready(r8a66597, pipenum); | |
788 | enable_irq_empty(r8a66597, pipenum); | |
789 | } else { | |
790 | disable_irq_empty(r8a66597, pipenum); | |
791 | pipe_irq_enable(r8a66597, pipenum); | |
792 | } | |
793 | } | |
794 | ||
795 | static void irq_packet_read(struct r8a66597_ep *ep, | |
796 | struct r8a66597_request *req) | |
797 | { | |
798 | u16 tmp; | |
799 | int rcv_len, bufsize, req_len; | |
800 | int size; | |
801 | void *buf; | |
802 | u16 pipenum = ep->pipenum; | |
803 | struct r8a66597 *r8a66597 = ep->r8a66597; | |
804 | int finish = 0; | |
805 | ||
806 | pipe_change(r8a66597, pipenum); | |
807 | tmp = r8a66597_read(r8a66597, ep->fifoctr); | |
808 | if (unlikely((tmp & FRDY) == 0)) { | |
809 | req->req.status = -EPIPE; | |
810 | pipe_stop(r8a66597, pipenum); | |
811 | pipe_irq_disable(r8a66597, pipenum); | |
812 | printk(KERN_ERR "read fifo not ready"); | |
813 | return; | |
814 | } | |
815 | ||
816 | /* prepare parameters */ | |
817 | rcv_len = tmp & DTLN; | |
818 | bufsize = get_buffer_size(r8a66597, pipenum); | |
819 | ||
820 | buf = req->req.buf + req->req.actual; | |
821 | req_len = req->req.length - req->req.actual; | |
822 | if (rcv_len < bufsize) | |
823 | size = min(rcv_len, req_len); | |
824 | else | |
825 | size = min(bufsize, req_len); | |
826 | ||
827 | /* update parameters */ | |
828 | req->req.actual += size; | |
829 | ||
830 | /* check transfer finish */ | |
831 | if ((!req->req.zero && (req->req.actual == req->req.length)) | |
832 | || (size % ep->ep.maxpacket) | |
833 | || (size == 0)) { | |
834 | pipe_stop(r8a66597, pipenum); | |
835 | pipe_irq_disable(r8a66597, pipenum); | |
836 | finish = 1; | |
837 | } | |
838 | ||
839 | /* read fifo */ | |
840 | if (req->req.buf) { | |
841 | if (size == 0) | |
842 | r8a66597_write(r8a66597, BCLR, ep->fifoctr); | |
843 | else | |
844 | r8a66597_read_fifo(r8a66597, ep->fifoaddr, buf, size); | |
845 | ||
846 | } | |
847 | ||
848 | if ((ep->pipenum != 0) && finish) | |
849 | transfer_complete(ep, req, 0); | |
850 | } | |
851 | ||
852 | static void irq_pipe_ready(struct r8a66597 *r8a66597, u16 status, u16 enb) | |
853 | { | |
854 | u16 check; | |
855 | u16 pipenum; | |
856 | struct r8a66597_ep *ep; | |
857 | struct r8a66597_request *req; | |
858 | ||
859 | if ((status & BRDY0) && (enb & BRDY0)) { | |
860 | r8a66597_write(r8a66597, ~BRDY0, BRDYSTS); | |
861 | r8a66597_mdfy(r8a66597, 0, CURPIPE, CFIFOSEL); | |
862 | ||
863 | ep = &r8a66597->ep[0]; | |
864 | req = get_request_from_ep(ep); | |
865 | irq_packet_read(ep, req); | |
866 | } else { | |
867 | for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) { | |
868 | check = 1 << pipenum; | |
869 | if ((status & check) && (enb & check)) { | |
870 | r8a66597_write(r8a66597, ~check, BRDYSTS); | |
871 | ep = r8a66597->pipenum2ep[pipenum]; | |
872 | req = get_request_from_ep(ep); | |
873 | if (ep->desc->bEndpointAddress & USB_DIR_IN) | |
874 | irq_packet_write(ep, req); | |
875 | else | |
876 | irq_packet_read(ep, req); | |
877 | } | |
878 | } | |
879 | } | |
880 | } | |
881 | ||
882 | static void irq_pipe_empty(struct r8a66597 *r8a66597, u16 status, u16 enb) | |
883 | { | |
884 | u16 tmp; | |
885 | u16 check; | |
886 | u16 pipenum; | |
887 | struct r8a66597_ep *ep; | |
888 | struct r8a66597_request *req; | |
889 | ||
890 | if ((status & BEMP0) && (enb & BEMP0)) { | |
891 | r8a66597_write(r8a66597, ~BEMP0, BEMPSTS); | |
892 | ||
893 | ep = &r8a66597->ep[0]; | |
894 | req = get_request_from_ep(ep); | |
895 | irq_ep0_write(ep, req); | |
896 | } else { | |
897 | for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) { | |
898 | check = 1 << pipenum; | |
899 | if ((status & check) && (enb & check)) { | |
900 | r8a66597_write(r8a66597, ~check, BEMPSTS); | |
901 | tmp = control_reg_get(r8a66597, pipenum); | |
902 | if ((tmp & INBUFM) == 0) { | |
903 | disable_irq_empty(r8a66597, pipenum); | |
904 | pipe_irq_disable(r8a66597, pipenum); | |
905 | pipe_stop(r8a66597, pipenum); | |
906 | ep = r8a66597->pipenum2ep[pipenum]; | |
907 | req = get_request_from_ep(ep); | |
908 | if (!list_empty(&ep->queue)) | |
909 | transfer_complete(ep, req, 0); | |
910 | } | |
911 | } | |
912 | } | |
913 | } | |
914 | } | |
915 | ||
916 | static void get_status(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl) | |
917 | __releases(r8a66597->lock) | |
918 | __acquires(r8a66597->lock) | |
919 | { | |
920 | struct r8a66597_ep *ep; | |
921 | u16 pid; | |
922 | u16 status = 0; | |
923 | u16 w_index = le16_to_cpu(ctrl->wIndex); | |
924 | ||
925 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | |
926 | case USB_RECIP_DEVICE: | |
927 | status = 1 << USB_DEVICE_SELF_POWERED; | |
928 | break; | |
929 | case USB_RECIP_INTERFACE: | |
930 | status = 0; | |
931 | break; | |
932 | case USB_RECIP_ENDPOINT: | |
933 | ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK]; | |
934 | pid = control_reg_get_pid(r8a66597, ep->pipenum); | |
935 | if (pid == PID_STALL) | |
936 | status = 1 << USB_ENDPOINT_HALT; | |
937 | else | |
938 | status = 0; | |
939 | break; | |
940 | default: | |
941 | pipe_stall(r8a66597, 0); | |
942 | return; /* exit */ | |
943 | } | |
944 | ||
945 | r8a66597->ep0_data = cpu_to_le16(status); | |
946 | r8a66597->ep0_req->buf = &r8a66597->ep0_data; | |
947 | r8a66597->ep0_req->length = 2; | |
948 | /* AV: what happens if we get called again before that gets through? */ | |
949 | spin_unlock(&r8a66597->lock); | |
950 | r8a66597_queue(r8a66597->gadget.ep0, r8a66597->ep0_req, GFP_KERNEL); | |
951 | spin_lock(&r8a66597->lock); | |
952 | } | |
953 | ||
954 | static void clear_feature(struct r8a66597 *r8a66597, | |
955 | struct usb_ctrlrequest *ctrl) | |
956 | { | |
957 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | |
958 | case USB_RECIP_DEVICE: | |
959 | control_end(r8a66597, 1); | |
960 | break; | |
961 | case USB_RECIP_INTERFACE: | |
962 | control_end(r8a66597, 1); | |
963 | break; | |
964 | case USB_RECIP_ENDPOINT: { | |
965 | struct r8a66597_ep *ep; | |
966 | struct r8a66597_request *req; | |
967 | u16 w_index = le16_to_cpu(ctrl->wIndex); | |
968 | ||
969 | ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK]; | |
9e7291c1 YS |
970 | if (!ep->wedge) { |
971 | pipe_stop(r8a66597, ep->pipenum); | |
972 | control_reg_sqclr(r8a66597, ep->pipenum); | |
973 | spin_unlock(&r8a66597->lock); | |
974 | usb_ep_clear_halt(&ep->ep); | |
975 | spin_lock(&r8a66597->lock); | |
976 | } | |
c4144247 YS |
977 | |
978 | control_end(r8a66597, 1); | |
979 | ||
980 | req = get_request_from_ep(ep); | |
981 | if (ep->busy) { | |
982 | ep->busy = 0; | |
983 | if (list_empty(&ep->queue)) | |
984 | break; | |
985 | start_packet(ep, req); | |
986 | } else if (!list_empty(&ep->queue)) | |
987 | pipe_start(r8a66597, ep->pipenum); | |
988 | } | |
989 | break; | |
990 | default: | |
991 | pipe_stall(r8a66597, 0); | |
992 | break; | |
993 | } | |
994 | } | |
995 | ||
996 | static void set_feature(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl) | |
997 | { | |
998 | ||
999 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | |
1000 | case USB_RECIP_DEVICE: | |
1001 | control_end(r8a66597, 1); | |
1002 | break; | |
1003 | case USB_RECIP_INTERFACE: | |
1004 | control_end(r8a66597, 1); | |
1005 | break; | |
1006 | case USB_RECIP_ENDPOINT: { | |
1007 | struct r8a66597_ep *ep; | |
1008 | u16 w_index = le16_to_cpu(ctrl->wIndex); | |
1009 | ||
1010 | ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK]; | |
1011 | pipe_stall(r8a66597, ep->pipenum); | |
1012 | ||
1013 | control_end(r8a66597, 1); | |
1014 | } | |
1015 | break; | |
1016 | default: | |
1017 | pipe_stall(r8a66597, 0); | |
1018 | break; | |
1019 | } | |
1020 | } | |
1021 | ||
1022 | /* if return value is true, call class driver's setup() */ | |
1023 | static int setup_packet(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl) | |
1024 | { | |
1025 | u16 *p = (u16 *)ctrl; | |
1026 | unsigned long offset = USBREQ; | |
1027 | int i, ret = 0; | |
1028 | ||
1029 | /* read fifo */ | |
1030 | r8a66597_write(r8a66597, ~VALID, INTSTS0); | |
1031 | ||
1032 | for (i = 0; i < 4; i++) | |
1033 | p[i] = r8a66597_read(r8a66597, offset + i*2); | |
1034 | ||
1035 | /* check request */ | |
1036 | if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) { | |
1037 | switch (ctrl->bRequest) { | |
1038 | case USB_REQ_GET_STATUS: | |
1039 | get_status(r8a66597, ctrl); | |
1040 | break; | |
1041 | case USB_REQ_CLEAR_FEATURE: | |
1042 | clear_feature(r8a66597, ctrl); | |
1043 | break; | |
1044 | case USB_REQ_SET_FEATURE: | |
1045 | set_feature(r8a66597, ctrl); | |
1046 | break; | |
1047 | default: | |
1048 | ret = 1; | |
1049 | break; | |
1050 | } | |
1051 | } else | |
1052 | ret = 1; | |
1053 | return ret; | |
1054 | } | |
1055 | ||
1056 | static void r8a66597_update_usb_speed(struct r8a66597 *r8a66597) | |
1057 | { | |
1058 | u16 speed = get_usb_speed(r8a66597); | |
1059 | ||
1060 | switch (speed) { | |
1061 | case HSMODE: | |
1062 | r8a66597->gadget.speed = USB_SPEED_HIGH; | |
1063 | break; | |
1064 | case FSMODE: | |
1065 | r8a66597->gadget.speed = USB_SPEED_FULL; | |
1066 | break; | |
1067 | default: | |
1068 | r8a66597->gadget.speed = USB_SPEED_UNKNOWN; | |
1069 | printk(KERN_ERR "USB speed unknown\n"); | |
1070 | } | |
1071 | } | |
1072 | ||
1073 | static void irq_device_state(struct r8a66597 *r8a66597) | |
1074 | { | |
1075 | u16 dvsq; | |
1076 | ||
1077 | dvsq = r8a66597_read(r8a66597, INTSTS0) & DVSQ; | |
1078 | r8a66597_write(r8a66597, ~DVST, INTSTS0); | |
1079 | ||
1080 | if (dvsq == DS_DFLT) { | |
1081 | /* bus reset */ | |
1082 | r8a66597->driver->disconnect(&r8a66597->gadget); | |
1083 | r8a66597_update_usb_speed(r8a66597); | |
1084 | } | |
1085 | if (r8a66597->old_dvsq == DS_CNFG && dvsq != DS_CNFG) | |
1086 | r8a66597_update_usb_speed(r8a66597); | |
1087 | if ((dvsq == DS_CNFG || dvsq == DS_ADDS) | |
1088 | && r8a66597->gadget.speed == USB_SPEED_UNKNOWN) | |
1089 | r8a66597_update_usb_speed(r8a66597); | |
1090 | ||
1091 | r8a66597->old_dvsq = dvsq; | |
1092 | } | |
1093 | ||
1094 | static void irq_control_stage(struct r8a66597 *r8a66597) | |
1095 | __releases(r8a66597->lock) | |
1096 | __acquires(r8a66597->lock) | |
1097 | { | |
1098 | struct usb_ctrlrequest ctrl; | |
1099 | u16 ctsq; | |
1100 | ||
1101 | ctsq = r8a66597_read(r8a66597, INTSTS0) & CTSQ; | |
1102 | r8a66597_write(r8a66597, ~CTRT, INTSTS0); | |
1103 | ||
1104 | switch (ctsq) { | |
1105 | case CS_IDST: { | |
1106 | struct r8a66597_ep *ep; | |
1107 | struct r8a66597_request *req; | |
1108 | ep = &r8a66597->ep[0]; | |
1109 | req = get_request_from_ep(ep); | |
1110 | transfer_complete(ep, req, 0); | |
1111 | } | |
1112 | break; | |
1113 | ||
1114 | case CS_RDDS: | |
1115 | case CS_WRDS: | |
1116 | case CS_WRND: | |
1117 | if (setup_packet(r8a66597, &ctrl)) { | |
1118 | spin_unlock(&r8a66597->lock); | |
1119 | if (r8a66597->driver->setup(&r8a66597->gadget, &ctrl) | |
1120 | < 0) | |
1121 | pipe_stall(r8a66597, 0); | |
1122 | spin_lock(&r8a66597->lock); | |
1123 | } | |
1124 | break; | |
1125 | case CS_RDSS: | |
1126 | case CS_WRSS: | |
1127 | control_end(r8a66597, 0); | |
1128 | break; | |
1129 | default: | |
1130 | printk(KERN_ERR "ctrl_stage: unexpect ctsq(%x)\n", ctsq); | |
1131 | break; | |
1132 | } | |
1133 | } | |
1134 | ||
1135 | static irqreturn_t r8a66597_irq(int irq, void *_r8a66597) | |
1136 | { | |
1137 | struct r8a66597 *r8a66597 = _r8a66597; | |
1138 | u16 intsts0; | |
1139 | u16 intenb0; | |
1140 | u16 brdysts, nrdysts, bempsts; | |
1141 | u16 brdyenb, nrdyenb, bempenb; | |
1142 | u16 savepipe; | |
1143 | u16 mask0; | |
1144 | ||
1145 | spin_lock(&r8a66597->lock); | |
1146 | ||
1147 | intsts0 = r8a66597_read(r8a66597, INTSTS0); | |
1148 | intenb0 = r8a66597_read(r8a66597, INTENB0); | |
1149 | ||
1150 | savepipe = r8a66597_read(r8a66597, CFIFOSEL); | |
1151 | ||
1152 | mask0 = intsts0 & intenb0; | |
1153 | if (mask0) { | |
1154 | brdysts = r8a66597_read(r8a66597, BRDYSTS); | |
1155 | nrdysts = r8a66597_read(r8a66597, NRDYSTS); | |
1156 | bempsts = r8a66597_read(r8a66597, BEMPSTS); | |
1157 | brdyenb = r8a66597_read(r8a66597, BRDYENB); | |
1158 | nrdyenb = r8a66597_read(r8a66597, NRDYENB); | |
1159 | bempenb = r8a66597_read(r8a66597, BEMPENB); | |
1160 | ||
1161 | if (mask0 & VBINT) { | |
1162 | r8a66597_write(r8a66597, 0xffff & ~VBINT, | |
1163 | INTSTS0); | |
1164 | r8a66597_start_xclock(r8a66597); | |
1165 | ||
1166 | /* start vbus sampling */ | |
1167 | r8a66597->old_vbus = r8a66597_read(r8a66597, INTSTS0) | |
1168 | & VBSTS; | |
1169 | r8a66597->scount = R8A66597_MAX_SAMPLING; | |
1170 | ||
1171 | mod_timer(&r8a66597->timer, | |
1172 | jiffies + msecs_to_jiffies(50)); | |
1173 | } | |
1174 | if (intsts0 & DVSQ) | |
1175 | irq_device_state(r8a66597); | |
1176 | ||
1177 | if ((intsts0 & BRDY) && (intenb0 & BRDYE) | |
1178 | && (brdysts & brdyenb)) | |
1179 | irq_pipe_ready(r8a66597, brdysts, brdyenb); | |
1180 | if ((intsts0 & BEMP) && (intenb0 & BEMPE) | |
1181 | && (bempsts & bempenb)) | |
1182 | irq_pipe_empty(r8a66597, bempsts, bempenb); | |
1183 | ||
1184 | if (intsts0 & CTRT) | |
1185 | irq_control_stage(r8a66597); | |
1186 | } | |
1187 | ||
1188 | r8a66597_write(r8a66597, savepipe, CFIFOSEL); | |
1189 | ||
1190 | spin_unlock(&r8a66597->lock); | |
1191 | return IRQ_HANDLED; | |
1192 | } | |
1193 | ||
1194 | static void r8a66597_timer(unsigned long _r8a66597) | |
1195 | { | |
1196 | struct r8a66597 *r8a66597 = (struct r8a66597 *)_r8a66597; | |
1197 | unsigned long flags; | |
1198 | u16 tmp; | |
1199 | ||
1200 | spin_lock_irqsave(&r8a66597->lock, flags); | |
1201 | tmp = r8a66597_read(r8a66597, SYSCFG0); | |
1202 | if (r8a66597->scount > 0) { | |
1203 | tmp = r8a66597_read(r8a66597, INTSTS0) & VBSTS; | |
1204 | if (tmp == r8a66597->old_vbus) { | |
1205 | r8a66597->scount--; | |
1206 | if (r8a66597->scount == 0) { | |
1207 | if (tmp == VBSTS) | |
1208 | r8a66597_usb_connect(r8a66597); | |
1209 | else | |
1210 | r8a66597_usb_disconnect(r8a66597); | |
1211 | } else { | |
1212 | mod_timer(&r8a66597->timer, | |
1213 | jiffies + msecs_to_jiffies(50)); | |
1214 | } | |
1215 | } else { | |
1216 | r8a66597->scount = R8A66597_MAX_SAMPLING; | |
1217 | r8a66597->old_vbus = tmp; | |
1218 | mod_timer(&r8a66597->timer, | |
1219 | jiffies + msecs_to_jiffies(50)); | |
1220 | } | |
1221 | } | |
1222 | spin_unlock_irqrestore(&r8a66597->lock, flags); | |
1223 | } | |
1224 | ||
1225 | /*-------------------------------------------------------------------------*/ | |
1226 | static int r8a66597_enable(struct usb_ep *_ep, | |
1227 | const struct usb_endpoint_descriptor *desc) | |
1228 | { | |
1229 | struct r8a66597_ep *ep; | |
1230 | ||
1231 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1232 | return alloc_pipe_config(ep, desc); | |
1233 | } | |
1234 | ||
1235 | static int r8a66597_disable(struct usb_ep *_ep) | |
1236 | { | |
1237 | struct r8a66597_ep *ep; | |
1238 | struct r8a66597_request *req; | |
1239 | unsigned long flags; | |
1240 | ||
1241 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1242 | BUG_ON(!ep); | |
1243 | ||
1244 | while (!list_empty(&ep->queue)) { | |
1245 | req = get_request_from_ep(ep); | |
1246 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | |
1247 | transfer_complete(ep, req, -ECONNRESET); | |
1248 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | |
1249 | } | |
1250 | ||
1251 | pipe_irq_disable(ep->r8a66597, ep->pipenum); | |
1252 | return free_pipe_config(ep); | |
1253 | } | |
1254 | ||
1255 | static struct usb_request *r8a66597_alloc_request(struct usb_ep *_ep, | |
1256 | gfp_t gfp_flags) | |
1257 | { | |
1258 | struct r8a66597_request *req; | |
1259 | ||
1260 | req = kzalloc(sizeof(struct r8a66597_request), gfp_flags); | |
1261 | if (!req) | |
1262 | return NULL; | |
1263 | ||
1264 | INIT_LIST_HEAD(&req->queue); | |
1265 | ||
1266 | return &req->req; | |
1267 | } | |
1268 | ||
1269 | static void r8a66597_free_request(struct usb_ep *_ep, struct usb_request *_req) | |
1270 | { | |
1271 | struct r8a66597_request *req; | |
1272 | ||
1273 | req = container_of(_req, struct r8a66597_request, req); | |
1274 | kfree(req); | |
1275 | } | |
1276 | ||
1277 | static int r8a66597_queue(struct usb_ep *_ep, struct usb_request *_req, | |
1278 | gfp_t gfp_flags) | |
1279 | { | |
1280 | struct r8a66597_ep *ep; | |
1281 | struct r8a66597_request *req; | |
1282 | unsigned long flags; | |
1283 | int request = 0; | |
1284 | ||
1285 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1286 | req = container_of(_req, struct r8a66597_request, req); | |
1287 | ||
1288 | if (ep->r8a66597->gadget.speed == USB_SPEED_UNKNOWN) | |
1289 | return -ESHUTDOWN; | |
1290 | ||
1291 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | |
1292 | ||
1293 | if (list_empty(&ep->queue)) | |
1294 | request = 1; | |
1295 | ||
1296 | list_add_tail(&req->queue, &ep->queue); | |
1297 | req->req.actual = 0; | |
1298 | req->req.status = -EINPROGRESS; | |
1299 | ||
1300 | if (ep->desc == NULL) /* control */ | |
1301 | start_ep0(ep, req); | |
1302 | else { | |
1303 | if (request && !ep->busy) | |
1304 | start_packet(ep, req); | |
1305 | } | |
1306 | ||
1307 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | |
1308 | ||
1309 | return 0; | |
1310 | } | |
1311 | ||
1312 | static int r8a66597_dequeue(struct usb_ep *_ep, struct usb_request *_req) | |
1313 | { | |
1314 | struct r8a66597_ep *ep; | |
1315 | struct r8a66597_request *req; | |
1316 | unsigned long flags; | |
1317 | ||
1318 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1319 | req = container_of(_req, struct r8a66597_request, req); | |
1320 | ||
1321 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | |
1322 | if (!list_empty(&ep->queue)) | |
1323 | transfer_complete(ep, req, -ECONNRESET); | |
1324 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | |
1325 | ||
1326 | return 0; | |
1327 | } | |
1328 | ||
1329 | static int r8a66597_set_halt(struct usb_ep *_ep, int value) | |
1330 | { | |
1331 | struct r8a66597_ep *ep; | |
1332 | struct r8a66597_request *req; | |
1333 | unsigned long flags; | |
1334 | int ret = 0; | |
1335 | ||
1336 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1337 | req = get_request_from_ep(ep); | |
1338 | ||
1339 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | |
1340 | if (!list_empty(&ep->queue)) { | |
1341 | ret = -EAGAIN; | |
1342 | goto out; | |
1343 | } | |
1344 | if (value) { | |
1345 | ep->busy = 1; | |
1346 | pipe_stall(ep->r8a66597, ep->pipenum); | |
1347 | } else { | |
1348 | ep->busy = 0; | |
9e7291c1 | 1349 | ep->wedge = 0; |
c4144247 YS |
1350 | pipe_stop(ep->r8a66597, ep->pipenum); |
1351 | } | |
1352 | ||
1353 | out: | |
1354 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | |
1355 | return ret; | |
1356 | } | |
1357 | ||
9e7291c1 YS |
1358 | static int r8a66597_set_wedge(struct usb_ep *_ep) |
1359 | { | |
1360 | struct r8a66597_ep *ep; | |
1361 | unsigned long flags; | |
1362 | ||
1363 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1364 | ||
1365 | if (!ep || !ep->desc) | |
1366 | return -EINVAL; | |
1367 | ||
1368 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | |
1369 | ep->wedge = 1; | |
1370 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | |
1371 | ||
1372 | return usb_ep_set_halt(_ep); | |
1373 | } | |
1374 | ||
c4144247 YS |
1375 | static void r8a66597_fifo_flush(struct usb_ep *_ep) |
1376 | { | |
1377 | struct r8a66597_ep *ep; | |
1378 | unsigned long flags; | |
1379 | ||
1380 | ep = container_of(_ep, struct r8a66597_ep, ep); | |
1381 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | |
1382 | if (list_empty(&ep->queue) && !ep->busy) { | |
1383 | pipe_stop(ep->r8a66597, ep->pipenum); | |
1384 | r8a66597_bclr(ep->r8a66597, BCLR, ep->fifoctr); | |
1385 | } | |
1386 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | |
1387 | } | |
1388 | ||
1389 | static struct usb_ep_ops r8a66597_ep_ops = { | |
1390 | .enable = r8a66597_enable, | |
1391 | .disable = r8a66597_disable, | |
1392 | ||
1393 | .alloc_request = r8a66597_alloc_request, | |
1394 | .free_request = r8a66597_free_request, | |
1395 | ||
1396 | .queue = r8a66597_queue, | |
1397 | .dequeue = r8a66597_dequeue, | |
1398 | ||
1399 | .set_halt = r8a66597_set_halt, | |
9e7291c1 | 1400 | .set_wedge = r8a66597_set_wedge, |
c4144247 YS |
1401 | .fifo_flush = r8a66597_fifo_flush, |
1402 | }; | |
1403 | ||
1404 | /*-------------------------------------------------------------------------*/ | |
1405 | static struct r8a66597 *the_controller; | |
1406 | ||
1407 | int usb_gadget_register_driver(struct usb_gadget_driver *driver) | |
1408 | { | |
1409 | struct r8a66597 *r8a66597 = the_controller; | |
1410 | int retval; | |
1411 | ||
1412 | if (!driver | |
1413 | || driver->speed != USB_SPEED_HIGH | |
1414 | || !driver->bind | |
1415 | || !driver->setup) | |
1416 | return -EINVAL; | |
1417 | if (!r8a66597) | |
1418 | return -ENODEV; | |
1419 | if (r8a66597->driver) | |
1420 | return -EBUSY; | |
1421 | ||
1422 | /* hook up the driver */ | |
1423 | driver->driver.bus = NULL; | |
1424 | r8a66597->driver = driver; | |
1425 | r8a66597->gadget.dev.driver = &driver->driver; | |
1426 | ||
1427 | retval = device_add(&r8a66597->gadget.dev); | |
1428 | if (retval) { | |
1429 | printk(KERN_ERR "device_add error (%d)\n", retval); | |
1430 | goto error; | |
1431 | } | |
1432 | ||
1433 | retval = driver->bind(&r8a66597->gadget); | |
1434 | if (retval) { | |
1435 | printk(KERN_ERR "bind to driver error (%d)\n", retval); | |
1436 | device_del(&r8a66597->gadget.dev); | |
1437 | goto error; | |
1438 | } | |
1439 | ||
1440 | r8a66597_bset(r8a66597, VBSE, INTENB0); | |
1441 | if (r8a66597_read(r8a66597, INTSTS0) & VBSTS) { | |
1442 | r8a66597_start_xclock(r8a66597); | |
1443 | /* start vbus sampling */ | |
1444 | r8a66597->old_vbus = r8a66597_read(r8a66597, | |
1445 | INTSTS0) & VBSTS; | |
1446 | r8a66597->scount = R8A66597_MAX_SAMPLING; | |
1447 | mod_timer(&r8a66597->timer, jiffies + msecs_to_jiffies(50)); | |
1448 | } | |
1449 | ||
1450 | return 0; | |
1451 | ||
1452 | error: | |
1453 | r8a66597->driver = NULL; | |
1454 | r8a66597->gadget.dev.driver = NULL; | |
1455 | ||
1456 | return retval; | |
1457 | } | |
1458 | EXPORT_SYMBOL(usb_gadget_register_driver); | |
1459 | ||
1460 | int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) | |
1461 | { | |
1462 | struct r8a66597 *r8a66597 = the_controller; | |
1463 | unsigned long flags; | |
1464 | ||
1465 | if (driver != r8a66597->driver || !driver->unbind) | |
1466 | return -EINVAL; | |
1467 | ||
1468 | spin_lock_irqsave(&r8a66597->lock, flags); | |
1469 | if (r8a66597->gadget.speed != USB_SPEED_UNKNOWN) | |
1470 | r8a66597_usb_disconnect(r8a66597); | |
1471 | spin_unlock_irqrestore(&r8a66597->lock, flags); | |
1472 | ||
1473 | r8a66597_bclr(r8a66597, VBSE, INTENB0); | |
1474 | ||
1475 | driver->unbind(&r8a66597->gadget); | |
1476 | ||
1477 | init_controller(r8a66597); | |
1478 | disable_controller(r8a66597); | |
1479 | ||
1480 | device_del(&r8a66597->gadget.dev); | |
1481 | r8a66597->driver = NULL; | |
1482 | return 0; | |
1483 | } | |
1484 | EXPORT_SYMBOL(usb_gadget_unregister_driver); | |
1485 | ||
1486 | /*-------------------------------------------------------------------------*/ | |
1487 | static int r8a66597_get_frame(struct usb_gadget *_gadget) | |
1488 | { | |
1489 | struct r8a66597 *r8a66597 = gadget_to_r8a66597(_gadget); | |
1490 | return r8a66597_read(r8a66597, FRMNUM) & 0x03FF; | |
1491 | } | |
1492 | ||
1493 | static struct usb_gadget_ops r8a66597_gadget_ops = { | |
1494 | .get_frame = r8a66597_get_frame, | |
1495 | }; | |
1496 | ||
1497 | static int __exit r8a66597_remove(struct platform_device *pdev) | |
1498 | { | |
1499 | struct r8a66597 *r8a66597 = dev_get_drvdata(&pdev->dev); | |
1500 | ||
1501 | del_timer_sync(&r8a66597->timer); | |
1502 | iounmap((void *)r8a66597->reg); | |
1503 | free_irq(platform_get_irq(pdev, 0), r8a66597); | |
1504 | r8a66597_free_request(&r8a66597->ep[0].ep, r8a66597->ep0_req); | |
d2e27bdf MD |
1505 | #ifdef CONFIG_HAVE_CLK |
1506 | if (r8a66597->pdata->on_chip) { | |
1507 | clk_disable(r8a66597->clk); | |
1508 | clk_put(r8a66597->clk); | |
1509 | } | |
1510 | #endif | |
c4144247 YS |
1511 | kfree(r8a66597); |
1512 | return 0; | |
1513 | } | |
1514 | ||
1515 | static void nop_completion(struct usb_ep *ep, struct usb_request *r) | |
1516 | { | |
1517 | } | |
1518 | ||
1519 | static int __init r8a66597_probe(struct platform_device *pdev) | |
1520 | { | |
d2e27bdf MD |
1521 | #ifdef CONFIG_HAVE_CLK |
1522 | char clk_name[8]; | |
1523 | #endif | |
c4144247 YS |
1524 | struct resource *res, *ires; |
1525 | int irq; | |
1526 | void __iomem *reg = NULL; | |
1527 | struct r8a66597 *r8a66597 = NULL; | |
1528 | int ret = 0; | |
1529 | int i; | |
1530 | unsigned long irq_trigger; | |
1531 | ||
1532 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1533 | if (!res) { | |
1534 | ret = -ENODEV; | |
1535 | printk(KERN_ERR "platform_get_resource error.\n"); | |
1536 | goto clean_up; | |
1537 | } | |
1538 | ||
1539 | ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
1540 | irq = ires->start; | |
1541 | irq_trigger = ires->flags & IRQF_TRIGGER_MASK; | |
1542 | ||
1543 | if (irq < 0) { | |
1544 | ret = -ENODEV; | |
1545 | printk(KERN_ERR "platform_get_irq error.\n"); | |
1546 | goto clean_up; | |
1547 | } | |
1548 | ||
1549 | reg = ioremap(res->start, resource_size(res)); | |
1550 | if (reg == NULL) { | |
1551 | ret = -ENOMEM; | |
1552 | printk(KERN_ERR "ioremap error.\n"); | |
1553 | goto clean_up; | |
1554 | } | |
1555 | ||
1556 | /* initialize ucd */ | |
1557 | r8a66597 = kzalloc(sizeof(struct r8a66597), GFP_KERNEL); | |
1558 | if (r8a66597 == NULL) { | |
1559 | printk(KERN_ERR "kzalloc error\n"); | |
1560 | goto clean_up; | |
1561 | } | |
1562 | ||
1563 | spin_lock_init(&r8a66597->lock); | |
1564 | dev_set_drvdata(&pdev->dev, r8a66597); | |
1565 | r8a66597->pdata = pdev->dev.platform_data; | |
1566 | r8a66597->irq_sense_low = irq_trigger == IRQF_TRIGGER_LOW; | |
1567 | ||
1568 | r8a66597->gadget.ops = &r8a66597_gadget_ops; | |
1569 | device_initialize(&r8a66597->gadget.dev); | |
1570 | dev_set_name(&r8a66597->gadget.dev, "gadget"); | |
1571 | r8a66597->gadget.is_dualspeed = 1; | |
1572 | r8a66597->gadget.dev.parent = &pdev->dev; | |
1573 | r8a66597->gadget.dev.dma_mask = pdev->dev.dma_mask; | |
1574 | r8a66597->gadget.dev.release = pdev->dev.release; | |
1575 | r8a66597->gadget.name = udc_name; | |
1576 | ||
1577 | init_timer(&r8a66597->timer); | |
1578 | r8a66597->timer.function = r8a66597_timer; | |
1579 | r8a66597->timer.data = (unsigned long)r8a66597; | |
1580 | r8a66597->reg = (unsigned long)reg; | |
1581 | ||
d2e27bdf MD |
1582 | #ifdef CONFIG_HAVE_CLK |
1583 | if (r8a66597->pdata->on_chip) { | |
1584 | snprintf(clk_name, sizeof(clk_name), "usb%d", pdev->id); | |
1585 | r8a66597->clk = clk_get(&pdev->dev, clk_name); | |
1586 | if (IS_ERR(r8a66597->clk)) { | |
1587 | dev_err(&pdev->dev, "cannot get clock \"%s\"\n", | |
1588 | clk_name); | |
1589 | ret = PTR_ERR(r8a66597->clk); | |
1590 | goto clean_up; | |
1591 | } | |
1592 | clk_enable(r8a66597->clk); | |
1593 | } | |
1594 | #endif | |
1595 | ||
c4144247 YS |
1596 | disable_controller(r8a66597); /* make sure controller is disabled */ |
1597 | ||
1598 | ret = request_irq(irq, r8a66597_irq, IRQF_DISABLED | IRQF_SHARED, | |
1599 | udc_name, r8a66597); | |
1600 | if (ret < 0) { | |
1601 | printk(KERN_ERR "request_irq error (%d)\n", ret); | |
d2e27bdf | 1602 | goto clean_up2; |
c4144247 YS |
1603 | } |
1604 | ||
1605 | INIT_LIST_HEAD(&r8a66597->gadget.ep_list); | |
1606 | r8a66597->gadget.ep0 = &r8a66597->ep[0].ep; | |
1607 | INIT_LIST_HEAD(&r8a66597->gadget.ep0->ep_list); | |
1608 | for (i = 0; i < R8A66597_MAX_NUM_PIPE; i++) { | |
1609 | struct r8a66597_ep *ep = &r8a66597->ep[i]; | |
1610 | ||
1611 | if (i != 0) { | |
1612 | INIT_LIST_HEAD(&r8a66597->ep[i].ep.ep_list); | |
1613 | list_add_tail(&r8a66597->ep[i].ep.ep_list, | |
1614 | &r8a66597->gadget.ep_list); | |
1615 | } | |
1616 | ep->r8a66597 = r8a66597; | |
1617 | INIT_LIST_HEAD(&ep->queue); | |
1618 | ep->ep.name = r8a66597_ep_name[i]; | |
1619 | ep->ep.ops = &r8a66597_ep_ops; | |
1620 | ep->ep.maxpacket = 512; | |
1621 | } | |
1622 | r8a66597->ep[0].ep.maxpacket = 64; | |
1623 | r8a66597->ep[0].pipenum = 0; | |
1624 | r8a66597->ep[0].fifoaddr = CFIFO; | |
1625 | r8a66597->ep[0].fifosel = CFIFOSEL; | |
1626 | r8a66597->ep[0].fifoctr = CFIFOCTR; | |
1627 | r8a66597->ep[0].fifotrn = 0; | |
1628 | r8a66597->ep[0].pipectr = get_pipectr_addr(0); | |
1629 | r8a66597->pipenum2ep[0] = &r8a66597->ep[0]; | |
1630 | r8a66597->epaddr2ep[0] = &r8a66597->ep[0]; | |
1631 | ||
1632 | the_controller = r8a66597; | |
1633 | ||
1634 | r8a66597->ep0_req = r8a66597_alloc_request(&r8a66597->ep[0].ep, | |
1635 | GFP_KERNEL); | |
1636 | if (r8a66597->ep0_req == NULL) | |
d2e27bdf | 1637 | goto clean_up3; |
c4144247 YS |
1638 | r8a66597->ep0_req->complete = nop_completion; |
1639 | ||
1640 | init_controller(r8a66597); | |
1641 | ||
1642 | dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION); | |
1643 | return 0; | |
1644 | ||
d2e27bdf | 1645 | clean_up3: |
c4144247 | 1646 | free_irq(irq, r8a66597); |
d2e27bdf MD |
1647 | clean_up2: |
1648 | #ifdef CONFIG_HAVE_CLK | |
1649 | if (r8a66597->pdata->on_chip) { | |
1650 | clk_disable(r8a66597->clk); | |
1651 | clk_put(r8a66597->clk); | |
1652 | } | |
1653 | #endif | |
c4144247 YS |
1654 | clean_up: |
1655 | if (r8a66597) { | |
1656 | if (r8a66597->ep0_req) | |
1657 | r8a66597_free_request(&r8a66597->ep[0].ep, | |
1658 | r8a66597->ep0_req); | |
1659 | kfree(r8a66597); | |
1660 | } | |
1661 | if (reg) | |
1662 | iounmap(reg); | |
1663 | ||
1664 | return ret; | |
1665 | } | |
1666 | ||
1667 | /*-------------------------------------------------------------------------*/ | |
1668 | static struct platform_driver r8a66597_driver = { | |
1669 | .remove = __exit_p(r8a66597_remove), | |
1670 | .driver = { | |
1671 | .name = (char *) udc_name, | |
1672 | }, | |
1673 | }; | |
1674 | ||
1675 | static int __init r8a66597_udc_init(void) | |
1676 | { | |
1677 | return platform_driver_probe(&r8a66597_driver, r8a66597_probe); | |
1678 | } | |
1679 | module_init(r8a66597_udc_init); | |
1680 | ||
1681 | static void __exit r8a66597_udc_cleanup(void) | |
1682 | { | |
1683 | platform_driver_unregister(&r8a66597_driver); | |
1684 | } | |
1685 | module_exit(r8a66597_udc_cleanup); | |
1686 | ||
1687 | MODULE_DESCRIPTION("R8A66597 USB gadget driver"); | |
1688 | MODULE_LICENSE("GPL"); | |
1689 | MODULE_AUTHOR("Yoshihiro Shimoda"); | |
1690 |