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fsl_usb2_udc: Rename the arguments of the fsl_writel macro.
[linux-block.git] / drivers / usb / gadget / fsl_usb2_udc.c
CommitLineData
b504882d
LY		 1/*
2 * Copyright (C) 2004-2007 Freescale Semicondutor, Inc. All rights reserved.
3 *
4 * Author: Li Yang <leoli@freescale.com>
5 * Jiang Bo <tanya.jiang@freescale.com>
6 *
7 * Description:
8 * Freescale high-speed USB SOC DR module device controller driver.
9 * This can be found on MPC8349E/MPC8313E cpus.
10 * The driver is previously named as mpc_udc. Based on bare board
11 * code from Dave Liu and Shlomi Gridish.
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
17 */
18
19#undef VERBOSE
20
21#include <linux/module.h>
22#include <linux/kernel.h>
23#include <linux/ioport.h>
24#include <linux/types.h>
25#include <linux/errno.h>
b504882d
LY		 26#include <linux/slab.h>
27#include <linux/init.h>
b504882d
LY		 28#include <linux/list.h>
29#include <linux/interrupt.h>
30#include <linux/proc_fs.h>
31#include <linux/mm.h>
32#include <linux/moduleparam.h>
33#include <linux/device.h>
34#include <linux/usb/ch9.h>
9454a57a 35#include <linux/usb/gadget.h>
b504882d
LY		 36#include <linux/usb/otg.h>
37#include <linux/dma-mapping.h>
38#include <linux/platform_device.h>
39#include <linux/fsl_devices.h>
40#include <linux/dmapool.h>
41
42#include <asm/byteorder.h>
43#include <asm/io.h>
b504882d
LY		 44#include <asm/system.h>
45#include <asm/unaligned.h>
46#include <asm/dma.h>
b504882d
LY		 47
48#include "fsl_usb2_udc.h"
49
50#define DRIVER_DESC "Freescale High-Speed USB SOC Device Controller driver"
51#define DRIVER_AUTHOR "Li Yang/Jiang Bo"
52#define DRIVER_VERSION "Apr 20, 2007"
53
54#define DMA_ADDR_INVALID (~(dma_addr_t)0)
55
56static const char driver_name[] = "fsl-usb2-udc";
57static const char driver_desc[] = DRIVER_DESC;
58
7483cff8
WN		 59static struct usb_dr_device *dr_regs;
60static struct usb_sys_interface *usb_sys_regs;
b504882d
LY		 61
62/* it is initialized in probe() */
63static struct fsl_udc *udc_controller = NULL;
64
65static const struct usb_endpoint_descriptor
66fsl_ep0_desc = {
67 .bLength = USB_DT_ENDPOINT_SIZE,
68 .bDescriptorType = USB_DT_ENDPOINT,
69 .bEndpointAddress = 0,
70 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
71 .wMaxPacketSize = USB_MAX_CTRL_PAYLOAD,
72};
73
b504882d
LY		 74static void fsl_ep_fifo_flush(struct usb_ep *_ep);
75
76#ifdef CONFIG_PPC32
77#define fsl_readl(addr) in_le32(addr)
c93eebbe 78#define fsl_writel(val32, addr) out_le32(addr, val32)
b504882d
LY		 79#else
80#define fsl_readl(addr) readl(addr)
c93eebbe 81#define fsl_writel(val32, addr) writel(val32, addr)
b504882d
LY		 82#endif
83
84/********************************************************************
85 * Internal Used Function
86********************************************************************/
87/*-----------------------------------------------------------------
88 * done() - retire a request; caller blocked irqs
89 * @status : request status to be set, only works when
90 * request is still in progress.
91 *--------------------------------------------------------------*/
92static void done(struct fsl_ep *ep, struct fsl_req *req, int status)
93{
94 struct fsl_udc *udc = NULL;
95 unsigned char stopped = ep->stopped;
96 struct ep_td_struct *curr_td, *next_td;
97 int j;
98
99 udc = (struct fsl_udc *)ep->udc;
100 /* Removed the req from fsl_ep->queue */
101 list_del_init(&req->queue);
102
103 /* req.status should be set as -EINPROGRESS in ep_queue() */
104 if (req->req.status == -EINPROGRESS)
105 req->req.status = status;
106 else
107 status = req->req.status;
108
109 /* Free dtd for the request */
110 next_td = req->head;
111 for (j = 0; j < req->dtd_count; j++) {
112 curr_td = next_td;
113 if (j != req->dtd_count - 1) {
114 next_td = curr_td->next_td_virt;
115 }
116 dma_pool_free(udc->td_pool, curr_td, curr_td->td_dma);
117 }
118
119 if (req->mapped) {
120 dma_unmap_single(ep->udc->gadget.dev.parent,
121 req->req.dma, req->req.length,
122 ep_is_in(ep)
123 ? DMA_TO_DEVICE
124 : DMA_FROM_DEVICE);
125 req->req.dma = DMA_ADDR_INVALID;
126 req->mapped = 0;
127 } else
128 dma_sync_single_for_cpu(ep->udc->gadget.dev.parent,
129 req->req.dma, req->req.length,
130 ep_is_in(ep)
131 ? DMA_TO_DEVICE
132 : DMA_FROM_DEVICE);
133
134 if (status && (status != -ESHUTDOWN))
135 VDBG("complete %s req %p stat %d len %u/%u",
136 ep->ep.name, &req->req, status,
137 req->req.actual, req->req.length);
138
139 ep->stopped = 1;
140
141 spin_unlock(&ep->udc->lock);
142 /* complete() is from gadget layer,
143 * eg fsg->bulk_in_complete() */
144 if (req->req.complete)
145 req->req.complete(&ep->ep, &req->req);
146
147 spin_lock(&ep->udc->lock);
148 ep->stopped = stopped;
149}
150
151/*-----------------------------------------------------------------
152 * nuke(): delete all requests related to this ep
153 * called with spinlock held
154 *--------------------------------------------------------------*/
155static void nuke(struct fsl_ep *ep, int status)
156{
157 ep->stopped = 1;
158
159 /* Flush fifo */
160 fsl_ep_fifo_flush(&ep->ep);
161
162 /* Whether this eq has request linked */
163 while (!list_empty(&ep->queue)) {
164 struct fsl_req *req = NULL;
165
166 req = list_entry(ep->queue.next, struct fsl_req, queue);
167 done(ep, req, status);
168 }
169}
170
171/*------------------------------------------------------------------
172 Internal Hardware related function
173 ------------------------------------------------------------------*/
174
175static int dr_controller_setup(struct fsl_udc *udc)
176{
177 unsigned int tmp = 0, portctrl = 0, ctrl = 0;
178 unsigned long timeout;
179#define FSL_UDC_RESET_TIMEOUT 1000
180
b504882d
LY		 181 /* Stop and reset the usb controller */
182 tmp = fsl_readl(&dr_regs->usbcmd);
183 tmp &= ~USB_CMD_RUN_STOP;
184 fsl_writel(tmp, &dr_regs->usbcmd);
185
186 tmp = fsl_readl(&dr_regs->usbcmd);
187 tmp |= USB_CMD_CTRL_RESET;
188 fsl_writel(tmp, &dr_regs->usbcmd);
189
190 /* Wait for reset to complete */
191 timeout = jiffies + FSL_UDC_RESET_TIMEOUT;
192 while (fsl_readl(&dr_regs->usbcmd) & USB_CMD_CTRL_RESET) {
193 if (time_after(jiffies, timeout)) {
bf7409a2 194 ERR("udc reset timeout!\n");
b504882d
LY		 195 return -ETIMEDOUT;
196 }
197 cpu_relax();
198 }
199
200 /* Set the controller as device mode */
201 tmp = fsl_readl(&dr_regs->usbmode);
202 tmp |= USB_MODE_CTRL_MODE_DEVICE;
203 /* Disable Setup Lockout */
204 tmp |= USB_MODE_SETUP_LOCK_OFF;
205 fsl_writel(tmp, &dr_regs->usbmode);
206
207 /* Clear the setup status */
208 fsl_writel(0, &dr_regs->usbsts);
209
210 tmp = udc->ep_qh_dma;
211 tmp &= USB_EP_LIST_ADDRESS_MASK;
212 fsl_writel(tmp, &dr_regs->endpointlistaddr);
213
214 VDBG("vir[qh_base] is %p phy[qh_base] is 0x%8x reg is 0x%8x",
6ef65a7f 215 udc->ep_qh, (int)tmp,
b504882d
LY		 216 fsl_readl(&dr_regs->endpointlistaddr));
217
218 /* Config PHY interface */
219 portctrl = fsl_readl(&dr_regs->portsc1);
7542548f 220 portctrl &= ~(PORTSCX_PHY_TYPE_SEL | PORTSCX_PORT_WIDTH);
b504882d
LY		 221 switch (udc->phy_mode) {
222 case FSL_USB2_PHY_ULPI:
223 portctrl |= PORTSCX_PTS_ULPI;
224 break;
b504882d 225 case FSL_USB2_PHY_UTMI_WIDE:
fcbd9639
LY		 226 portctrl |= PORTSCX_PTW_16BIT;
227 /* fall through */
228 case FSL_USB2_PHY_UTMI:
b504882d
LY		 229 portctrl |= PORTSCX_PTS_UTMI;
230 break;
231 case FSL_USB2_PHY_SERIAL:
232 portctrl |= PORTSCX_PTS_FSLS;
233 break;
234 default:
235 return -EINVAL;
236 }
237 fsl_writel(portctrl, &dr_regs->portsc1);
238
239 /* Config control enable i/o output, cpu endian register */
240 ctrl = __raw_readl(&usb_sys_regs->control);
241 ctrl |= USB_CTRL_IOENB;
242 __raw_writel(ctrl, &usb_sys_regs->control);
243
244#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
245 /* Turn on cache snooping hardware, since some PowerPC platforms
246 * wholly rely on hardware to deal with cache coherent. */
247
248 /* Setup Snooping for all the 4GB space */
249 tmp = SNOOP_SIZE_2GB; /* starts from 0x0, size 2G */
250 __raw_writel(tmp, &usb_sys_regs->snoop1);
251 tmp |= 0x80000000; /* starts from 0x8000000, size 2G */
252 __raw_writel(tmp, &usb_sys_regs->snoop2);
253#endif
254
255 return 0;
256}
257
258/* Enable DR irq and set controller to run state */
259static void dr_controller_run(struct fsl_udc *udc)
260{
261 u32 temp;
262
263 /* Enable DR irq reg */
264 temp = USB_INTR_INT_EN | USB_INTR_ERR_INT_EN
265 | USB_INTR_PTC_DETECT_EN | USB_INTR_RESET_EN
266 | USB_INTR_DEVICE_SUSPEND | USB_INTR_SYS_ERR_EN;
267
268 fsl_writel(temp, &dr_regs->usbintr);
269
270 /* Clear stopped bit */
271 udc->stopped = 0;
272
273 /* Set the controller as device mode */
274 temp = fsl_readl(&dr_regs->usbmode);
275 temp |= USB_MODE_CTRL_MODE_DEVICE;
276 fsl_writel(temp, &dr_regs->usbmode);
277
278 /* Set controller to Run */
279 temp = fsl_readl(&dr_regs->usbcmd);
280 temp |= USB_CMD_RUN_STOP;
281 fsl_writel(temp, &dr_regs->usbcmd);
282
283 return;
284}
285
286static void dr_controller_stop(struct fsl_udc *udc)
287{
288 unsigned int tmp;
289
290 /* disable all INTR */
291 fsl_writel(0, &dr_regs->usbintr);
292
293 /* Set stopped bit for isr */
294 udc->stopped = 1;
295
296 /* disable IO output */
297/* usb_sys_regs->control = 0; */
298
299 /* set controller to Stop */
300 tmp = fsl_readl(&dr_regs->usbcmd);
301 tmp &= ~USB_CMD_RUN_STOP;
302 fsl_writel(tmp, &dr_regs->usbcmd);
303
304 return;
305}
306
9c94155e
WN		 307static void dr_ep_setup(unsigned char ep_num, unsigned char dir,
308 unsigned char ep_type)
b504882d
LY		 309{
310 unsigned int tmp_epctrl = 0;
311
312 tmp_epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
313 if (dir) {
314 if (ep_num)
315 tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST;
316 tmp_epctrl |= EPCTRL_TX_ENABLE;
317 tmp_epctrl |= ((unsigned int)(ep_type)
318 << EPCTRL_TX_EP_TYPE_SHIFT);
319 } else {
320 if (ep_num)
321 tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST;
322 tmp_epctrl |= EPCTRL_RX_ENABLE;
323 tmp_epctrl |= ((unsigned int)(ep_type)
324 << EPCTRL_RX_EP_TYPE_SHIFT);
325 }
326
327 fsl_writel(tmp_epctrl, &dr_regs->endptctrl[ep_num]);
328}
329
330static void
331dr_ep_change_stall(unsigned char ep_num, unsigned char dir, int value)
332{
333 u32 tmp_epctrl = 0;
334
335 tmp_epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
336
337 if (value) {
338 /* set the stall bit */
339 if (dir)
340 tmp_epctrl |= EPCTRL_TX_EP_STALL;
341 else
342 tmp_epctrl |= EPCTRL_RX_EP_STALL;
343 } else {
344 /* clear the stall bit and reset data toggle */
345 if (dir) {
346 tmp_epctrl &= ~EPCTRL_TX_EP_STALL;
347 tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST;
348 } else {
349 tmp_epctrl &= ~EPCTRL_RX_EP_STALL;
350 tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST;
351 }
352 }
353 fsl_writel(tmp_epctrl, &dr_regs->endptctrl[ep_num]);
354}
355
356/* Get stall status of a specific ep
357 Return: 0: not stalled; 1:stalled */
358static int dr_ep_get_stall(unsigned char ep_num, unsigned char dir)
359{
360 u32 epctrl;
361
362 epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
363 if (dir)
364 return (epctrl & EPCTRL_TX_EP_STALL) ? 1 : 0;
365 else
366 return (epctrl & EPCTRL_RX_EP_STALL) ? 1 : 0;
367}
368
369/********************************************************************
370 Internal Structure Build up functions
371********************************************************************/
372
373/*------------------------------------------------------------------
374* struct_ep_qh_setup(): set the Endpoint Capabilites field of QH
375 * @zlt: Zero Length Termination Select (1: disable; 0: enable)
376 * @mult: Mult field
377 ------------------------------------------------------------------*/
378static void struct_ep_qh_setup(struct fsl_udc *udc, unsigned char ep_num,
379 unsigned char dir, unsigned char ep_type,
380 unsigned int max_pkt_len,
381 unsigned int zlt, unsigned char mult)
382{
383 struct ep_queue_head *p_QH = &udc->ep_qh[2 * ep_num + dir];
384 unsigned int tmp = 0;
385
386 /* set the Endpoint Capabilites in QH */
387 switch (ep_type) {
388 case USB_ENDPOINT_XFER_CONTROL:
389 /* Interrupt On Setup (IOS). for control ep */
390 tmp = (max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS)
391 | EP_QUEUE_HEAD_IOS;
392 break;
393 case USB_ENDPOINT_XFER_ISOC:
394 tmp = (max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS)
395 | (mult << EP_QUEUE_HEAD_MULT_POS);
396 break;
397 case USB_ENDPOINT_XFER_BULK:
398 case USB_ENDPOINT_XFER_INT:
399 tmp = max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS;
400 break;
401 default:
402 VDBG("error ep type is %d", ep_type);
403 return;
404 }
405 if (zlt)
406 tmp |= EP_QUEUE_HEAD_ZLT_SEL;
407 p_QH->max_pkt_length = cpu_to_le32(tmp);
408
409 return;
410}
411
412/* Setup qh structure and ep register for ep0. */
413static void ep0_setup(struct fsl_udc *udc)
414{
415 /* the intialization of an ep includes: fields in QH, Regs,
416 * fsl_ep struct */
417 struct_ep_qh_setup(udc, 0, USB_RECV, USB_ENDPOINT_XFER_CONTROL,
418 USB_MAX_CTRL_PAYLOAD, 0, 0);
419 struct_ep_qh_setup(udc, 0, USB_SEND, USB_ENDPOINT_XFER_CONTROL,
420 USB_MAX_CTRL_PAYLOAD, 0, 0);
421 dr_ep_setup(0, USB_RECV, USB_ENDPOINT_XFER_CONTROL);
422 dr_ep_setup(0, USB_SEND, USB_ENDPOINT_XFER_CONTROL);
423
424 return;
425
426}
427
428/***********************************************************************
429 Endpoint Management Functions
430***********************************************************************/
431
432/*-------------------------------------------------------------------------
433 * when configurations are set, or when interface settings change
434 * for example the do_set_interface() in gadget layer,
435 * the driver will enable or disable the relevant endpoints
436 * ep0 doesn't use this routine. It is always enabled.
437-------------------------------------------------------------------------*/
438static int fsl_ep_enable(struct usb_ep *_ep,
439 const struct usb_endpoint_descriptor *desc)
440{
441 struct fsl_udc *udc = NULL;
442 struct fsl_ep *ep = NULL;
443 unsigned short max = 0;
444 unsigned char mult = 0, zlt;
445 int retval = -EINVAL;
446 unsigned long flags = 0;
447
448 ep = container_of(_ep, struct fsl_ep, ep);
449
450 /* catch various bogus parameters */
451 if (!_ep || !desc || ep->desc
452 || (desc->bDescriptorType != USB_DT_ENDPOINT))
453 return -EINVAL;
454
455 udc = ep->udc;
456
457 if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN))
458 return -ESHUTDOWN;
459
460 max = le16_to_cpu(desc->wMaxPacketSize);
461
462 /* Disable automatic zlp generation. Driver is reponsible to indicate
463 * explicitly through req->req.zero. This is needed to enable multi-td
464 * request. */
465 zlt = 1;
466
467 /* Assume the max packet size from gadget is always correct */
468 switch (desc->bmAttributes & 0x03) {
469 case USB_ENDPOINT_XFER_CONTROL:
470 case USB_ENDPOINT_XFER_BULK:
471 case USB_ENDPOINT_XFER_INT:
472 /* mult = 0. Execute N Transactions as demonstrated by
473 * the USB variable length packet protocol where N is
474 * computed using the Maximum Packet Length (dQH) and
475 * the Total Bytes field (dTD) */
476 mult = 0;
477 break;
478 case USB_ENDPOINT_XFER_ISOC:
479 /* Calculate transactions needed for high bandwidth iso */
480 mult = (unsigned char)(1 + ((max >> 11) & 0x03));
481 max = max & 0x8ff; /* bit 0~10 */
482 /* 3 transactions at most */
483 if (mult > 3)
484 goto en_done;
485 break;
486 default:
487 goto en_done;
488 }
489
490 spin_lock_irqsave(&udc->lock, flags);
491 ep->ep.maxpacket = max;
492 ep->desc = desc;
493 ep->stopped = 0;
494
495 /* Controller related setup */
496 /* Init EPx Queue Head (Ep Capabilites field in QH
497 * according to max, zlt, mult) */
498 struct_ep_qh_setup(udc, (unsigned char) ep_index(ep),
499 (unsigned char) ((desc->bEndpointAddress & USB_DIR_IN)
500 ? USB_SEND : USB_RECV),
501 (unsigned char) (desc->bmAttributes
502 & USB_ENDPOINT_XFERTYPE_MASK),
503 max, zlt, mult);
504
505 /* Init endpoint ctrl register */
506 dr_ep_setup((unsigned char) ep_index(ep),
507 (unsigned char) ((desc->bEndpointAddress & USB_DIR_IN)
508 ? USB_SEND : USB_RECV),
509 (unsigned char) (desc->bmAttributes
510 & USB_ENDPOINT_XFERTYPE_MASK));
511
512 spin_unlock_irqrestore(&udc->lock, flags);
513 retval = 0;
514
515 VDBG("enabled %s (ep%d%s) maxpacket %d",ep->ep.name,
516 ep->desc->bEndpointAddress & 0x0f,
517 (desc->bEndpointAddress & USB_DIR_IN)
518 ? "in" : "out", max);
519en_done:
520 return retval;
521}
522
523/*---------------------------------------------------------------------
524 * @ep : the ep being unconfigured. May not be ep0
525 * Any pending and uncomplete req will complete with status (-ESHUTDOWN)
526*---------------------------------------------------------------------*/
527static int fsl_ep_disable(struct usb_ep *_ep)
528{
529 struct fsl_udc *udc = NULL;
530 struct fsl_ep *ep = NULL;
531 unsigned long flags = 0;
532 u32 epctrl;
533 int ep_num;
534
535 ep = container_of(_ep, struct fsl_ep, ep);
536 if (!_ep || !ep->desc) {
537 VDBG("%s not enabled", _ep ? ep->ep.name : NULL);
538 return -EINVAL;
539 }
540
541 /* disable ep on controller */
542 ep_num = ep_index(ep);
543 epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
544 if (ep_is_in(ep))
545 epctrl &= ~EPCTRL_TX_ENABLE;
546 else
547 epctrl &= ~EPCTRL_RX_ENABLE;
548 fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
549
550 udc = (struct fsl_udc *)ep->udc;
551 spin_lock_irqsave(&udc->lock, flags);
552
553 /* nuke all pending requests (does flush) */
554 nuke(ep, -ESHUTDOWN);
555
7483cff8 556 ep->desc = NULL;
b504882d
LY		 557 ep->stopped = 1;
558 spin_unlock_irqrestore(&udc->lock, flags);
559
560 VDBG("disabled %s OK", _ep->name);
561 return 0;
562}
563
564/*---------------------------------------------------------------------
565 * allocate a request object used by this endpoint
566 * the main operation is to insert the req->queue to the eq->queue
567 * Returns the request, or null if one could not be allocated
568*---------------------------------------------------------------------*/
569static struct usb_request *
570fsl_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
571{
572 struct fsl_req *req = NULL;
573
574 req = kzalloc(sizeof *req, gfp_flags);
575 if (!req)
576 return NULL;
577
578 req->req.dma = DMA_ADDR_INVALID;
579 INIT_LIST_HEAD(&req->queue);
580
581 return &req->req;
582}
583
584static void fsl_free_request(struct usb_ep *_ep, struct usb_request *_req)
585{
586 struct fsl_req *req = NULL;
587
588 req = container_of(_req, struct fsl_req, req);
589
590 if (_req)
591 kfree(req);
592}
593
b504882d
LY		 594/*-------------------------------------------------------------------------*/
595static int fsl_queue_td(struct fsl_ep *ep, struct fsl_req *req)
596{
597 int i = ep_index(ep) * 2 + ep_is_in(ep);
598 u32 temp, bitmask, tmp_stat;
599 struct ep_queue_head *dQH = &ep->udc->ep_qh[i];
600
601 /* VDBG("QH addr Register 0x%8x", dr_regs->endpointlistaddr);
602 VDBG("ep_qh[%d] addr is 0x%8x", i, (u32)&(ep->udc->ep_qh[i])); */
603
604 bitmask = ep_is_in(ep)
605 ? (1 << (ep_index(ep) + 16))
606 : (1 << (ep_index(ep)));
607
608 /* check if the pipe is empty */
609 if (!(list_empty(&ep->queue))) {
610 /* Add td to the end */
611 struct fsl_req *lastreq;
612 lastreq = list_entry(ep->queue.prev, struct fsl_req, queue);
613 lastreq->tail->next_td_ptr =
614 cpu_to_le32(req->head->td_dma & DTD_ADDR_MASK);
615 /* Read prime bit, if 1 goto done */
616 if (fsl_readl(&dr_regs->endpointprime) & bitmask)
617 goto out;
618
619 do {
620 /* Set ATDTW bit in USBCMD */
621 temp = fsl_readl(&dr_regs->usbcmd);
622 fsl_writel(temp | USB_CMD_ATDTW, &dr_regs->usbcmd);
623
624 /* Read correct status bit */
625 tmp_stat = fsl_readl(&dr_regs->endptstatus) & bitmask;
626
627 } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_ATDTW));
628
629 /* Write ATDTW bit to 0 */
630 temp = fsl_readl(&dr_regs->usbcmd);
631 fsl_writel(temp & ~USB_CMD_ATDTW, &dr_regs->usbcmd);
632
633 if (tmp_stat)
634 goto out;
635 }
636
637 /* Write dQH next pointer and terminate bit to 0 */
638 temp = req->head->td_dma & EP_QUEUE_HEAD_NEXT_POINTER_MASK;
639 dQH->next_dtd_ptr = cpu_to_le32(temp);
640
641 /* Clear active and halt bit */
642 temp = cpu_to_le32(~(EP_QUEUE_HEAD_STATUS_ACTIVE
643 | EP_QUEUE_HEAD_STATUS_HALT));
644 dQH->size_ioc_int_sts &= temp;
645
646 /* Prime endpoint by writing 1 to ENDPTPRIME */
647 temp = ep_is_in(ep)
648 ? (1 << (ep_index(ep) + 16))
649 : (1 << (ep_index(ep)));
650 fsl_writel(temp, &dr_regs->endpointprime);
651out:
652 return 0;
653}
654
655/* Fill in the dTD structure
656 * @req: request that the transfer belongs to
657 * @length: return actually data length of the dTD
658 * @dma: return dma address of the dTD
659 * @is_last: return flag if it is the last dTD of the request
660 * return: pointer to the built dTD */
661static struct ep_td_struct *fsl_build_dtd(struct fsl_req *req, unsigned *length,
662 dma_addr_t *dma, int *is_last)
663{
664 u32 swap_temp;
665 struct ep_td_struct *dtd;
666
667 /* how big will this transfer be? */
668 *length = min(req->req.length - req->req.actual,
669 (unsigned)EP_MAX_LENGTH_TRANSFER);
670
671 dtd = dma_pool_alloc(udc_controller->td_pool, GFP_KERNEL, dma);
672 if (dtd == NULL)
673 return dtd;
674
675 dtd->td_dma = *dma;
676 /* Clear reserved field */
677 swap_temp = cpu_to_le32(dtd->size_ioc_sts);
678 swap_temp &= ~DTD_RESERVED_FIELDS;
679 dtd->size_ioc_sts = cpu_to_le32(swap_temp);
680
681 /* Init all of buffer page pointers */
682 swap_temp = (u32) (req->req.dma + req->req.actual);
683 dtd->buff_ptr0 = cpu_to_le32(swap_temp);
684 dtd->buff_ptr1 = cpu_to_le32(swap_temp + 0x1000);
685 dtd->buff_ptr2 = cpu_to_le32(swap_temp + 0x2000);
686 dtd->buff_ptr3 = cpu_to_le32(swap_temp + 0x3000);
687 dtd->buff_ptr4 = cpu_to_le32(swap_temp + 0x4000);
688
689 req->req.actual += *length;
690
691 /* zlp is needed if req->req.zero is set */
692 if (req->req.zero) {
693 if (*length == 0 || (*length % req->ep->ep.maxpacket) != 0)
694 *is_last = 1;
695 else
696 *is_last = 0;
697 } else if (req->req.length == req->req.actual)
698 *is_last = 1;
699 else
700 *is_last = 0;
701
702 if ((*is_last) == 0)
bf7409a2 703 VDBG("multi-dtd request!");
b504882d
LY		 704 /* Fill in the transfer size; set active bit */
705 swap_temp = ((*length << DTD_LENGTH_BIT_POS) | DTD_STATUS_ACTIVE);
706
707 /* Enable interrupt for the last dtd of a request */
708 if (*is_last && !req->req.no_interrupt)
709 swap_temp |= DTD_IOC;
710
711 dtd->size_ioc_sts = cpu_to_le32(swap_temp);
712
713 mb();
714
715 VDBG("length = %d address= 0x%x", *length, (int)*dma);
716
717 return dtd;
718}
719
720/* Generate dtd chain for a request */
721static int fsl_req_to_dtd(struct fsl_req *req)
722{
723 unsigned count;
724 int is_last;
725 int is_first =1;
726 struct ep_td_struct *last_dtd = NULL, *dtd;
727 dma_addr_t dma;
728
729 do {
730 dtd = fsl_build_dtd(req, &count, &dma, &is_last);
731 if (dtd == NULL)
732 return -ENOMEM;
733
734 if (is_first) {
735 is_first = 0;
736 req->head = dtd;
737 } else {
738 last_dtd->next_td_ptr = cpu_to_le32(dma);
739 last_dtd->next_td_virt = dtd;
740 }
741 last_dtd = dtd;
742
743 req->dtd_count++;
744 } while (!is_last);
745
746 dtd->next_td_ptr = cpu_to_le32(DTD_NEXT_TERMINATE);
747
748 req->tail = dtd;
749
750 return 0;
751}
752
753/* queues (submits) an I/O request to an endpoint */
754static int
755fsl_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
756{
757 struct fsl_ep *ep = container_of(_ep, struct fsl_ep, ep);
758 struct fsl_req *req = container_of(_req, struct fsl_req, req);
759 struct fsl_udc *udc;
760 unsigned long flags;
761 int is_iso = 0;
762
763 /* catch various bogus parameters */
764 if (!_req || !req->req.complete || !req->req.buf
765 || !list_empty(&req->queue)) {
bf7409a2 766 VDBG("%s, bad params", __func__);
b504882d
LY		 767 return -EINVAL;
768 }
2336a986 769 if (unlikely(!_ep || !ep->desc)) {
bf7409a2 770 VDBG("%s, bad ep", __func__);
b504882d
LY		 771 return -EINVAL;
772 }
773 if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
774 if (req->req.length > ep->ep.maxpacket)
775 return -EMSGSIZE;
776 is_iso = 1;
777 }
778
779 udc = ep->udc;
780 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
781 return -ESHUTDOWN;
782
783 req->ep = ep;
784
785 /* map virtual address to hardware */
786 if (req->req.dma == DMA_ADDR_INVALID) {
787 req->req.dma = dma_map_single(ep->udc->gadget.dev.parent,
788 req->req.buf,
789 req->req.length, ep_is_in(ep)
790 ? DMA_TO_DEVICE
791 : DMA_FROM_DEVICE);
792 req->mapped = 1;
793 } else {
794 dma_sync_single_for_device(ep->udc->gadget.dev.parent,
795 req->req.dma, req->req.length,
796 ep_is_in(ep)
797 ? DMA_TO_DEVICE
798 : DMA_FROM_DEVICE);
799 req->mapped = 0;
800 }
801
802 req->req.status = -EINPROGRESS;
803 req->req.actual = 0;
804 req->dtd_count = 0;
805
806 spin_lock_irqsave(&udc->lock, flags);
807
808 /* build dtds and push them to device queue */
809 if (!fsl_req_to_dtd(req)) {
810 fsl_queue_td(ep, req);
811 } else {
812 spin_unlock_irqrestore(&udc->lock, flags);
813 return -ENOMEM;
814 }
815
816 /* Update ep0 state */
817 if ((ep_index(ep) == 0))
818 udc->ep0_state = DATA_STATE_XMIT;
819
820 /* irq handler advances the queue */
821 if (req != NULL)
822 list_add_tail(&req->queue, &ep->queue);
823 spin_unlock_irqrestore(&udc->lock, flags);
824
825 return 0;
826}
827
828/* dequeues (cancels, unlinks) an I/O request from an endpoint */
829static int fsl_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
830{
831 struct fsl_ep *ep = container_of(_ep, struct fsl_ep, ep);
832 struct fsl_req *req;
833 unsigned long flags;
834 int ep_num, stopped, ret = 0;
835 u32 epctrl;
836
837 if (!_ep || !_req)
838 return -EINVAL;
839
840 spin_lock_irqsave(&ep->udc->lock, flags);
841 stopped = ep->stopped;
842
843 /* Stop the ep before we deal with the queue */
844 ep->stopped = 1;
845 ep_num = ep_index(ep);
846 epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
847 if (ep_is_in(ep))
848 epctrl &= ~EPCTRL_TX_ENABLE;
849 else
850 epctrl &= ~EPCTRL_RX_ENABLE;
851 fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
852
853 /* make sure it's actually queued on this endpoint */
854 list_for_each_entry(req, &ep->queue, queue) {
855 if (&req->req == _req)
856 break;
857 }
858 if (&req->req != _req) {
859 ret = -EINVAL;
860 goto out;
861 }
862
863 /* The request is in progress, or completed but not dequeued */
864 if (ep->queue.next == &req->queue) {
865 _req->status = -ECONNRESET;
866 fsl_ep_fifo_flush(_ep); /* flush current transfer */
867
868 /* The request isn't the last request in this ep queue */
869 if (req->queue.next != &ep->queue) {
870 struct ep_queue_head *qh;
871 struct fsl_req *next_req;
872
873 qh = ep->qh;
874 next_req = list_entry(req->queue.next, struct fsl_req,
875 queue);
876
877 /* Point the QH to the first TD of next request */
878 fsl_writel((u32) next_req->head, &qh->curr_dtd_ptr);
879 }
880
881 /* The request hasn't been processed, patch up the TD chain */
882 } else {
883 struct fsl_req *prev_req;
884
885 prev_req = list_entry(req->queue.prev, struct fsl_req, queue);
886 fsl_writel(fsl_readl(&req->tail->next_td_ptr),
887 &prev_req->tail->next_td_ptr);
888
889 }
890
891 done(ep, req, -ECONNRESET);
892
893 /* Enable EP */
894out: epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
895 if (ep_is_in(ep))
896 epctrl |= EPCTRL_TX_ENABLE;
897 else
898 epctrl |= EPCTRL_RX_ENABLE;
899 fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
900 ep->stopped = stopped;
901
902 spin_unlock_irqrestore(&ep->udc->lock, flags);
903 return ret;
904}
905
906/*-------------------------------------------------------------------------*/
907
908/*-----------------------------------------------------------------
909 * modify the endpoint halt feature
910 * @ep: the non-isochronous endpoint being stalled
911 * @value: 1--set halt 0--clear halt
912 * Returns zero, or a negative error code.
913*----------------------------------------------------------------*/
914static int fsl_ep_set_halt(struct usb_ep *_ep, int value)
915{
916 struct fsl_ep *ep = NULL;
917 unsigned long flags = 0;
918 int status = -EOPNOTSUPP; /* operation not supported */
919 unsigned char ep_dir = 0, ep_num = 0;
920 struct fsl_udc *udc = NULL;
921
922 ep = container_of(_ep, struct fsl_ep, ep);
923 udc = ep->udc;
924 if (!_ep || !ep->desc) {
925 status = -EINVAL;
926 goto out;
927 }
928
929 if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
930 status = -EOPNOTSUPP;
931 goto out;
932 }
933
934 /* Attempt to halt IN ep will fail if any transfer requests
935 * are still queue */
936 if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
937 status = -EAGAIN;
938 goto out;
939 }
940
941 status = 0;
942 ep_dir = ep_is_in(ep) ? USB_SEND : USB_RECV;
943 ep_num = (unsigned char)(ep_index(ep));
944 spin_lock_irqsave(&ep->udc->lock, flags);
945 dr_ep_change_stall(ep_num, ep_dir, value);
946 spin_unlock_irqrestore(&ep->udc->lock, flags);
947
948 if (ep_index(ep) == 0) {
949 udc->ep0_state = WAIT_FOR_SETUP;
950 udc->ep0_dir = 0;
951 }
952out:
953 VDBG(" %s %s halt stat %d", ep->ep.name,
954 value ? "set" : "clear", status);
955
956 return status;
957}
958
959static void fsl_ep_fifo_flush(struct usb_ep *_ep)
960{
961 struct fsl_ep *ep;
962 int ep_num, ep_dir;
963 u32 bits;
964 unsigned long timeout;
965#define FSL_UDC_FLUSH_TIMEOUT 1000
966
967 if (!_ep) {
968 return;
969 } else {
970 ep = container_of(_ep, struct fsl_ep, ep);
971 if (!ep->desc)
972 return;
973 }
974 ep_num = ep_index(ep);
975 ep_dir = ep_is_in(ep) ? USB_SEND : USB_RECV;
976
977 if (ep_num == 0)
978 bits = (1 << 16) | 1;
979 else if (ep_dir == USB_SEND)
980 bits = 1 << (16 + ep_num);
981 else
982 bits = 1 << ep_num;
983
984 timeout = jiffies + FSL_UDC_FLUSH_TIMEOUT;
985 do {
986 fsl_writel(bits, &dr_regs->endptflush);
987
988 /* Wait until flush complete */
989 while (fsl_readl(&dr_regs->endptflush)) {
990 if (time_after(jiffies, timeout)) {
991 ERR("ep flush timeout\n");
992 return;
993 }
994 cpu_relax();
995 }
996 /* See if we need to flush again */
997 } while (fsl_readl(&dr_regs->endptstatus) & bits);
998}
999
1000static struct usb_ep_ops fsl_ep_ops = {
1001 .enable = fsl_ep_enable,
1002 .disable = fsl_ep_disable,
1003
1004 .alloc_request = fsl_alloc_request,
1005 .free_request = fsl_free_request,
1006
b504882d
LY		 1007 .queue = fsl_ep_queue,
1008 .dequeue = fsl_ep_dequeue,
1009
1010 .set_halt = fsl_ep_set_halt,
1011 .fifo_flush = fsl_ep_fifo_flush, /* flush fifo */
1012};
1013
1014/*-------------------------------------------------------------------------
1015 Gadget Driver Layer Operations
1016-------------------------------------------------------------------------*/
1017
1018/*----------------------------------------------------------------------
1019 * Get the current frame number (from DR frame_index Reg )
1020 *----------------------------------------------------------------------*/
1021static int fsl_get_frame(struct usb_gadget *gadget)
1022{
1023 return (int)(fsl_readl(&dr_regs->frindex) & USB_FRINDEX_MASKS);
1024}
1025
1026/*-----------------------------------------------------------------------
1027 * Tries to wake up the host connected to this gadget
1028 -----------------------------------------------------------------------*/
1029static int fsl_wakeup(struct usb_gadget *gadget)
1030{
1031 struct fsl_udc *udc = container_of(gadget, struct fsl_udc, gadget);
1032 u32 portsc;
1033
1034 /* Remote wakeup feature not enabled by host */
1035 if (!udc->remote_wakeup)
1036 return -ENOTSUPP;
1037
1038 portsc = fsl_readl(&dr_regs->portsc1);
1039 /* not suspended? */
1040 if (!(portsc & PORTSCX_PORT_SUSPEND))
1041 return 0;
1042 /* trigger force resume */
1043 portsc |= PORTSCX_PORT_FORCE_RESUME;
1044 fsl_writel(portsc, &dr_regs->portsc1);
1045 return 0;
1046}
1047
1048static int can_pullup(struct fsl_udc *udc)
1049{
1050 return udc->driver && udc->softconnect && udc->vbus_active;
1051}
1052
1053/* Notify controller that VBUS is powered, Called by whatever
1054 detects VBUS sessions */
1055static int fsl_vbus_session(struct usb_gadget *gadget, int is_active)
1056{
1057 struct fsl_udc *udc;
1058 unsigned long flags;
1059
1060 udc = container_of(gadget, struct fsl_udc, gadget);
1061 spin_lock_irqsave(&udc->lock, flags);
bf7409a2 1062 VDBG("VBUS %s", is_active ? "on" : "off");
b504882d
LY		 1063 udc->vbus_active = (is_active != 0);
1064 if (can_pullup(udc))
1065 fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP),
1066 &dr_regs->usbcmd);
1067 else
1068 fsl_writel((fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP),
1069 &dr_regs->usbcmd);
1070 spin_unlock_irqrestore(&udc->lock, flags);
1071 return 0;
1072}
1073
1074/* constrain controller's VBUS power usage
1075 * This call is used by gadget drivers during SET_CONFIGURATION calls,
1076 * reporting how much power the device may consume. For example, this
1077 * could affect how quickly batteries are recharged.
1078 *
1079 * Returns zero on success, else negative errno.
1080 */
1081static int fsl_vbus_draw(struct usb_gadget *gadget, unsigned mA)
1082{
b504882d
LY		 1083 struct fsl_udc *udc;
1084
1085 udc = container_of(gadget, struct fsl_udc, gadget);
b504882d
LY		 1086 if (udc->transceiver)
1087 return otg_set_power(udc->transceiver, mA);
b504882d
LY		 1088 return -ENOTSUPP;
1089}
1090
1091/* Change Data+ pullup status
1092 * this func is used by usb_gadget_connect/disconnet
1093 */
1094static int fsl_pullup(struct usb_gadget *gadget, int is_on)
1095{
1096 struct fsl_udc *udc;
1097
1098 udc = container_of(gadget, struct fsl_udc, gadget);
1099 udc->softconnect = (is_on != 0);
1100 if (can_pullup(udc))
1101 fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP),
1102 &dr_regs->usbcmd);
1103 else
1104 fsl_writel((fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP),
1105 &dr_regs->usbcmd);
1106
1107 return 0;
1108}
1109
9454a57a 1110/* defined in gadget.h */
b504882d
LY		 1111static struct usb_gadget_ops fsl_gadget_ops = {
1112 .get_frame = fsl_get_frame,
1113 .wakeup = fsl_wakeup,
1114/* .set_selfpowered = fsl_set_selfpowered, */ /* Always selfpowered */
1115 .vbus_session = fsl_vbus_session,
1116 .vbus_draw = fsl_vbus_draw,
1117 .pullup = fsl_pullup,
1118};
1119
1120/* Set protocol stall on ep0, protocol stall will automatically be cleared
1121 on new transaction */
1122static void ep0stall(struct fsl_udc *udc)
1123{
1124 u32 tmp;
1125
1126 /* must set tx and rx to stall at the same time */
1127 tmp = fsl_readl(&dr_regs->endptctrl[0]);
1128 tmp |= EPCTRL_TX_EP_STALL | EPCTRL_RX_EP_STALL;
1129 fsl_writel(tmp, &dr_regs->endptctrl[0]);
1130 udc->ep0_state = WAIT_FOR_SETUP;
1131 udc->ep0_dir = 0;
1132}
1133
1134/* Prime a status phase for ep0 */
1135static int ep0_prime_status(struct fsl_udc *udc, int direction)
1136{
1137 struct fsl_req *req = udc->status_req;
1138 struct fsl_ep *ep;
1139 int status = 0;
1140
1141 if (direction == EP_DIR_IN)
1142 udc->ep0_dir = USB_DIR_IN;
1143 else
1144 udc->ep0_dir = USB_DIR_OUT;
1145
1146 ep = &udc->eps[0];
1147 udc->ep0_state = WAIT_FOR_OUT_STATUS;
1148
1149 req->ep = ep;
1150 req->req.length = 0;
1151 req->req.status = -EINPROGRESS;
1152 req->req.actual = 0;
1153 req->req.complete = NULL;
1154 req->dtd_count = 0;
1155
1156 if (fsl_req_to_dtd(req) == 0)
1157 status = fsl_queue_td(ep, req);
1158 else
1159 return -ENOMEM;
1160
1161 if (status)
bf7409a2 1162 ERR("Can't queue ep0 status request\n");
b504882d
LY		 1163 list_add_tail(&req->queue, &ep->queue);
1164
1165 return status;
1166}
1167
1168static inline int udc_reset_ep_queue(struct fsl_udc *udc, u8 pipe)
1169{
1170 struct fsl_ep *ep = get_ep_by_pipe(udc, pipe);
1171
1172 if (!ep->name)
1173 return 0;
1174
1175 nuke(ep, -ESHUTDOWN);
1176
1177 return 0;
1178}
1179
1180/*
1181 * ch9 Set address
1182 */
1183static void ch9setaddress(struct fsl_udc *udc, u16 value, u16 index, u16 length)
1184{
1185 /* Save the new address to device struct */
1186 udc->device_address = (u8) value;
1187 /* Update usb state */
1188 udc->usb_state = USB_STATE_ADDRESS;
1189 /* Status phase */
1190 if (ep0_prime_status(udc, EP_DIR_IN))
1191 ep0stall(udc);
1192}
1193
1194/*
1195 * ch9 Get status
1196 */
1197static void ch9getstatus(struct fsl_udc *udc, u8 request_type, u16 value,
1198 u16 index, u16 length)
1199{
1200 u16 tmp = 0; /* Status, cpu endian */
1201
1202 struct fsl_req *req;
1203 struct fsl_ep *ep;
1204 int status = 0;
1205
1206 ep = &udc->eps[0];
1207
1208 if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1209 /* Get device status */
1210 tmp = 1 << USB_DEVICE_SELF_POWERED;
1211 tmp |= udc->remote_wakeup << USB_DEVICE_REMOTE_WAKEUP;
1212 } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
1213 /* Get interface status */
1214 /* We don't have interface information in udc driver */
1215 tmp = 0;
1216 } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
1217 /* Get endpoint status */
1218 struct fsl_ep *target_ep;
1219
1220 target_ep = get_ep_by_pipe(udc, get_pipe_by_windex(index));
1221
1222 /* stall if endpoint doesn't exist */
1223 if (!target_ep->desc)
1224 goto stall;
1225 tmp = dr_ep_get_stall(ep_index(target_ep), ep_is_in(target_ep))
1226 << USB_ENDPOINT_HALT;
1227 }
1228
1229 udc->ep0_dir = USB_DIR_IN;
1230 /* Borrow the per device status_req */
1231 req = udc->status_req;
1232 /* Fill in the reqest structure */
1233 *((u16 *) req->req.buf) = cpu_to_le16(tmp);
1234 req->ep = ep;
1235 req->req.length = 2;
1236 req->req.status = -EINPROGRESS;
1237 req->req.actual = 0;
1238 req->req.complete = NULL;
1239 req->dtd_count = 0;
1240
1241 /* prime the data phase */
1242 if ((fsl_req_to_dtd(req) == 0))
1243 status = fsl_queue_td(ep, req);
1244 else /* no mem */
1245 goto stall;
1246
1247 if (status) {
bf7409a2 1248 ERR("Can't respond to getstatus request\n");
b504882d
LY		 1249 goto stall;
1250 }
1251 list_add_tail(&req->queue, &ep->queue);
1252 udc->ep0_state = DATA_STATE_XMIT;
1253 return;
1254stall:
1255 ep0stall(udc);
1256}
1257
1258static void setup_received_irq(struct fsl_udc *udc,
1259 struct usb_ctrlrequest *setup)
1260{
1261 u16 wValue = le16_to_cpu(setup->wValue);
1262 u16 wIndex = le16_to_cpu(setup->wIndex);
1263 u16 wLength = le16_to_cpu(setup->wLength);
1264
1265 udc_reset_ep_queue(udc, 0);
1266
39d1f8c9 1267 /* We process some stardard setup requests here */
b504882d 1268 switch (setup->bRequest) {
b504882d 1269 case USB_REQ_GET_STATUS:
39d1f8c9
LY		 1270 /* Data+Status phase from udc */
1271 if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
b504882d
LY		 1272 != (USB_DIR_IN | USB_TYPE_STANDARD))
1273 break;
1274 ch9getstatus(udc, setup->bRequestType, wValue, wIndex, wLength);
39d1f8c9 1275 return;
b504882d 1276
b504882d 1277 case USB_REQ_SET_ADDRESS:
39d1f8c9 1278 /* Status phase from udc */
b504882d
LY		 1279 if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD
1280 | USB_RECIP_DEVICE))
1281 break;
1282 ch9setaddress(udc, wValue, wIndex, wLength);
39d1f8c9 1283 return;
b504882d 1284
b504882d
LY		 1285 case USB_REQ_CLEAR_FEATURE:
1286 case USB_REQ_SET_FEATURE:
39d1f8c9
LY		 1287 /* Status phase from udc */
1288 {
b504882d
LY		 1289 int rc = -EOPNOTSUPP;
1290
39d1f8c9
LY		 1291 if ((setup->bRequestType & (USB_RECIP_MASK | USB_TYPE_MASK))
1292 == (USB_RECIP_ENDPOINT | USB_TYPE_STANDARD)) {
b504882d
LY		 1293 int pipe = get_pipe_by_windex(wIndex);
1294 struct fsl_ep *ep;
1295
1296 if (wValue != 0 || wLength != 0 || pipe > udc->max_ep)
1297 break;
1298 ep = get_ep_by_pipe(udc, pipe);
1299
1300 spin_unlock(&udc->lock);
1301 rc = fsl_ep_set_halt(&ep->ep,
1302 (setup->bRequest == USB_REQ_SET_FEATURE)
1303 ? 1 : 0);
1304 spin_lock(&udc->lock);
1305
39d1f8c9
LY		 1306 } else if ((setup->bRequestType & (USB_RECIP_MASK
1307 | USB_TYPE_MASK)) == (USB_RECIP_DEVICE
1308 | USB_TYPE_STANDARD)) {
b504882d
LY		 1309 /* Note: The driver has not include OTG support yet.
1310 * This will be set when OTG support is added */
3bf44688 1311 if (!gadget_is_otg(&udc->gadget))
b504882d
LY		 1312 break;
1313 else if (setup->bRequest == USB_DEVICE_B_HNP_ENABLE)
1314 udc->gadget.b_hnp_enable = 1;
1315 else if (setup->bRequest == USB_DEVICE_A_HNP_SUPPORT)
1316 udc->gadget.a_hnp_support = 1;
1317 else if (setup->bRequest ==
1318 USB_DEVICE_A_ALT_HNP_SUPPORT)
1319 udc->gadget.a_alt_hnp_support = 1;
a4e3ef55
DB		 1320 else
1321 break;
b504882d 1322 rc = 0;
39d1f8c9
LY		 1323 } else
1324 break;
1325
b504882d
LY		 1326 if (rc == 0) {
1327 if (ep0_prime_status(udc, EP_DIR_IN))
1328 ep0stall(udc);
1329 }
39d1f8c9 1330 return;
b504882d 1331 }
b504882d 1332
39d1f8c9 1333 default:
b504882d
LY		 1334 break;
1335 }
39d1f8c9
LY		 1336
1337 /* Requests handled by gadget */
1338 if (wLength) {
1339 /* Data phase from gadget, status phase from udc */
1340 udc->ep0_dir = (setup->bRequestType & USB_DIR_IN)
1341 ? USB_DIR_IN : USB_DIR_OUT;
1342 spin_unlock(&udc->lock);
1343 if (udc->driver->setup(&udc->gadget,
1344 &udc->local_setup_buff) < 0)
1345 ep0stall(udc);
1346 spin_lock(&udc->lock);
1347 udc->ep0_state = (setup->bRequestType & USB_DIR_IN)
1348 ? DATA_STATE_XMIT : DATA_STATE_RECV;
1349 } else {
1350 /* No data phase, IN status from gadget */
1351 udc->ep0_dir = USB_DIR_IN;
1352 spin_unlock(&udc->lock);
1353 if (udc->driver->setup(&udc->gadget,
1354 &udc->local_setup_buff) < 0)
1355 ep0stall(udc);
1356 spin_lock(&udc->lock);
1357 udc->ep0_state = WAIT_FOR_OUT_STATUS;
1358 }
b504882d
LY		 1359}
1360
1361/* Process request for Data or Status phase of ep0
1362 * prime status phase if needed */
1363static void ep0_req_complete(struct fsl_udc *udc, struct fsl_ep *ep0,
1364 struct fsl_req *req)
1365{
1366 if (udc->usb_state == USB_STATE_ADDRESS) {
1367 /* Set the new address */
1368 u32 new_address = (u32) udc->device_address;
1369 fsl_writel(new_address << USB_DEVICE_ADDRESS_BIT_POS,
1370 &dr_regs->deviceaddr);
1371 }
1372
1373 done(ep0, req, 0);
1374
1375 switch (udc->ep0_state) {
1376 case DATA_STATE_XMIT:
1377 /* receive status phase */
1378 if (ep0_prime_status(udc, EP_DIR_OUT))
1379 ep0stall(udc);
1380 break;
1381 case DATA_STATE_RECV:
1382 /* send status phase */
1383 if (ep0_prime_status(udc, EP_DIR_IN))
1384 ep0stall(udc);
1385 break;
1386 case WAIT_FOR_OUT_STATUS:
1387 udc->ep0_state = WAIT_FOR_SETUP;
1388 break;
1389 case WAIT_FOR_SETUP:
bf7409a2 1390 ERR("Unexpect ep0 packets\n");
b504882d
LY		 1391 break;
1392 default:
1393 ep0stall(udc);
1394 break;
1395 }
1396}
1397
1398/* Tripwire mechanism to ensure a setup packet payload is extracted without
1399 * being corrupted by another incoming setup packet */
1400static void tripwire_handler(struct fsl_udc *udc, u8 ep_num, u8 *buffer_ptr)
1401{
1402 u32 temp;
1403 struct ep_queue_head *qh;
1404
1405 qh = &udc->ep_qh[ep_num * 2 + EP_DIR_OUT];
1406
1407 /* Clear bit in ENDPTSETUPSTAT */
1408 temp = fsl_readl(&dr_regs->endptsetupstat);
1409 fsl_writel(temp | (1 << ep_num), &dr_regs->endptsetupstat);
1410
1411 /* while a hazard exists when setup package arrives */
1412 do {
1413 /* Set Setup Tripwire */
1414 temp = fsl_readl(&dr_regs->usbcmd);
1415 fsl_writel(temp | USB_CMD_SUTW, &dr_regs->usbcmd);
1416
1417 /* Copy the setup packet to local buffer */
1418 memcpy(buffer_ptr, (u8 *) qh->setup_buffer, 8);
1419 } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_SUTW));
1420
1421 /* Clear Setup Tripwire */
1422 temp = fsl_readl(&dr_regs->usbcmd);
1423 fsl_writel(temp & ~USB_CMD_SUTW, &dr_regs->usbcmd);
1424}
1425
1426/* process-ep_req(): free the completed Tds for this req */
1427static int process_ep_req(struct fsl_udc *udc, int pipe,
1428 struct fsl_req *curr_req)
1429{
1430 struct ep_td_struct *curr_td;
1431 int td_complete, actual, remaining_length, j, tmp;
1432 int status = 0;
1433 int errors = 0;
1434 struct ep_queue_head *curr_qh = &udc->ep_qh[pipe];
1435 int direction = pipe % 2;
1436
1437 curr_td = curr_req->head;
1438 td_complete = 0;
1439 actual = curr_req->req.length;
1440
1441 for (j = 0; j < curr_req->dtd_count; j++) {
1442 remaining_length = (le32_to_cpu(curr_td->size_ioc_sts)
1443 & DTD_PACKET_SIZE)
1444 >> DTD_LENGTH_BIT_POS;
1445 actual -= remaining_length;
1446
1447 if ((errors = le32_to_cpu(curr_td->size_ioc_sts) &
1448 DTD_ERROR_MASK)) {
1449 if (errors & DTD_STATUS_HALTED) {
1450 ERR("dTD error %08x QH=%d\n", errors, pipe);
1451 /* Clear the errors and Halt condition */
1452 tmp = le32_to_cpu(curr_qh->size_ioc_int_sts);
1453 tmp &= ~errors;
1454 curr_qh->size_ioc_int_sts = cpu_to_le32(tmp);
1455 status = -EPIPE;
1456 /* FIXME: continue with next queued TD? */
1457
1458 break;
1459 }
1460 if (errors & DTD_STATUS_DATA_BUFF_ERR) {
1461 VDBG("Transfer overflow");
1462 status = -EPROTO;
1463 break;
1464 } else if (errors & DTD_STATUS_TRANSACTION_ERR) {
1465 VDBG("ISO error");
1466 status = -EILSEQ;
1467 break;
1468 } else
bf7409a2 1469 ERR("Unknown error has occured (0x%x)!\n",
b504882d
LY		 1470 errors);
1471
1472 } else if (le32_to_cpu(curr_td->size_ioc_sts)
1473 & DTD_STATUS_ACTIVE) {
1474 VDBG("Request not complete");
1475 status = REQ_UNCOMPLETE;
1476 return status;
1477 } else if (remaining_length) {
1478 if (direction) {
1479 VDBG("Transmit dTD remaining length not zero");
1480 status = -EPROTO;
1481 break;
1482 } else {
1483 td_complete++;
1484 break;
1485 }
1486 } else {
1487 td_complete++;
bf7409a2 1488 VDBG("dTD transmitted successful");
b504882d
LY		 1489 }
1490
1491 if (j != curr_req->dtd_count - 1)
1492 curr_td = (struct ep_td_struct *)curr_td->next_td_virt;
1493 }
1494
1495 if (status)
1496 return status;
1497
1498 curr_req->req.actual = actual;
1499
1500 return 0;
1501}
1502
1503/* Process a DTD completion interrupt */
1504static void dtd_complete_irq(struct fsl_udc *udc)
1505{
1506 u32 bit_pos;
1507 int i, ep_num, direction, bit_mask, status;
1508 struct fsl_ep *curr_ep;
1509 struct fsl_req *curr_req, *temp_req;
1510
1511 /* Clear the bits in the register */
1512 bit_pos = fsl_readl(&dr_regs->endptcomplete);
1513 fsl_writel(bit_pos, &dr_regs->endptcomplete);
1514
1515 if (!bit_pos)
1516 return;
1517
1518 for (i = 0; i < udc->max_ep * 2; i++) {
1519 ep_num = i >> 1;
1520 direction = i % 2;
1521
1522 bit_mask = 1 << (ep_num + 16 * direction);
1523
1524 if (!(bit_pos & bit_mask))
1525 continue;
1526
1527 curr_ep = get_ep_by_pipe(udc, i);
1528
1529 /* If the ep is configured */
1530 if (curr_ep->name == NULL) {
b6c63937 1531 WARNING("Invalid EP?");
b504882d
LY		 1532 continue;
1533 }
1534
1535 /* process the req queue until an uncomplete request */
1536 list_for_each_entry_safe(curr_req, temp_req, &curr_ep->queue,
1537 queue) {
1538 status = process_ep_req(udc, i, curr_req);
1539
1540 VDBG("status of process_ep_req= %d, ep = %d",
1541 status, ep_num);
1542 if (status == REQ_UNCOMPLETE)
1543 break;
1544 /* write back status to req */
1545 curr_req->req.status = status;
1546
1547 if (ep_num == 0) {
1548 ep0_req_complete(udc, curr_ep, curr_req);
1549 break;
1550 } else
1551 done(curr_ep, curr_req, status);
1552 }
1553 }
1554}
1555
1556/* Process a port change interrupt */
1557static void port_change_irq(struct fsl_udc *udc)
1558{
1559 u32 speed;
1560
b504882d
LY		 1561 /* Bus resetting is finished */
1562 if (!(fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET)) {
1563 /* Get the speed */
1564 speed = (fsl_readl(&dr_regs->portsc1)
1565 & PORTSCX_PORT_SPEED_MASK);
1566 switch (speed) {
1567 case PORTSCX_PORT_SPEED_HIGH:
1568 udc->gadget.speed = USB_SPEED_HIGH;
1569 break;
1570 case PORTSCX_PORT_SPEED_FULL:
1571 udc->gadget.speed = USB_SPEED_FULL;
1572 break;
1573 case PORTSCX_PORT_SPEED_LOW:
1574 udc->gadget.speed = USB_SPEED_LOW;
1575 break;
1576 default:
1577 udc->gadget.speed = USB_SPEED_UNKNOWN;
1578 break;
1579 }
1580 }
1581
1582 /* Update USB state */
1583 if (!udc->resume_state)
1584 udc->usb_state = USB_STATE_DEFAULT;
1585}
1586
1587/* Process suspend interrupt */
1588static void suspend_irq(struct fsl_udc *udc)
1589{
1590 udc->resume_state = udc->usb_state;
1591 udc->usb_state = USB_STATE_SUSPENDED;
1592
1593 /* report suspend to the driver, serial.c does not support this */
1594 if (udc->driver->suspend)
1595 udc->driver->suspend(&udc->gadget);
1596}
1597
1598static void bus_resume(struct fsl_udc *udc)
1599{
1600 udc->usb_state = udc->resume_state;
1601 udc->resume_state = 0;
1602
1603 /* report resume to the driver, serial.c does not support this */
1604 if (udc->driver->resume)
1605 udc->driver->resume(&udc->gadget);
1606}
1607
1608/* Clear up all ep queues */
1609static int reset_queues(struct fsl_udc *udc)
1610{
1611 u8 pipe;
1612
1613 for (pipe = 0; pipe < udc->max_pipes; pipe++)
1614 udc_reset_ep_queue(udc, pipe);
1615
1616 /* report disconnect; the driver is already quiesced */
185e3dea 1617 spin_unlock(&udc->lock);
b504882d 1618 udc->driver->disconnect(&udc->gadget);
185e3dea 1619 spin_lock(&udc->lock);
b504882d
LY		 1620
1621 return 0;
1622}
1623
1624/* Process reset interrupt */
1625static void reset_irq(struct fsl_udc *udc)
1626{
1627 u32 temp;
1628 unsigned long timeout;
1629
1630 /* Clear the device address */
1631 temp = fsl_readl(&dr_regs->deviceaddr);
1632 fsl_writel(temp & ~USB_DEVICE_ADDRESS_MASK, &dr_regs->deviceaddr);
1633
1634 udc->device_address = 0;
1635
1636 /* Clear usb state */
1637 udc->resume_state = 0;
1638 udc->ep0_dir = 0;
1639 udc->ep0_state = WAIT_FOR_SETUP;
1640 udc->remote_wakeup = 0; /* default to 0 on reset */
1641 udc->gadget.b_hnp_enable = 0;
1642 udc->gadget.a_hnp_support = 0;
1643 udc->gadget.a_alt_hnp_support = 0;
1644
1645 /* Clear all the setup token semaphores */
1646 temp = fsl_readl(&dr_regs->endptsetupstat);
1647 fsl_writel(temp, &dr_regs->endptsetupstat);
1648
1649 /* Clear all the endpoint complete status bits */
1650 temp = fsl_readl(&dr_regs->endptcomplete);
1651 fsl_writel(temp, &dr_regs->endptcomplete);
1652
1653 timeout = jiffies + 100;
1654 while (fsl_readl(&dr_regs->endpointprime)) {
1655 /* Wait until all endptprime bits cleared */
1656 if (time_after(jiffies, timeout)) {
1657 ERR("Timeout for reset\n");
1658 break;
1659 }
1660 cpu_relax();
1661 }
1662
1663 /* Write 1s to the flush register */
1664 fsl_writel(0xffffffff, &dr_regs->endptflush);
1665
1666 if (fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET) {
1667 VDBG("Bus reset");
b504882d
LY		 1668 /* Reset all the queues, include XD, dTD, EP queue
1669 * head and TR Queue */
1670 reset_queues(udc);
1671 udc->usb_state = USB_STATE_DEFAULT;
1672 } else {
1673 VDBG("Controller reset");
1674 /* initialize usb hw reg except for regs for EP, not
1675 * touch usbintr reg */
1676 dr_controller_setup(udc);
1677
1678 /* Reset all internal used Queues */
1679 reset_queues(udc);
1680
1681 ep0_setup(udc);
1682
1683 /* Enable DR IRQ reg, Set Run bit, change udc state */
1684 dr_controller_run(udc);
1685 udc->usb_state = USB_STATE_ATTACHED;
1686 }
1687}
1688
1689/*
1690 * USB device controller interrupt handler
1691 */
1692static irqreturn_t fsl_udc_irq(int irq, void *_udc)
1693{
1694 struct fsl_udc *udc = _udc;
1695 u32 irq_src;
1696 irqreturn_t status = IRQ_NONE;
1697 unsigned long flags;
1698
1699 /* Disable ISR for OTG host mode */
1700 if (udc->stopped)
1701 return IRQ_NONE;
1702 spin_lock_irqsave(&udc->lock, flags);
1703 irq_src = fsl_readl(&dr_regs->usbsts) & fsl_readl(&dr_regs->usbintr);
1704 /* Clear notification bits */
1705 fsl_writel(irq_src, &dr_regs->usbsts);
1706
1707 /* VDBG("irq_src [0x%8x]", irq_src); */
1708
1709 /* Need to resume? */
1710 if (udc->usb_state == USB_STATE_SUSPENDED)
1711 if ((fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_SUSPEND) == 0)
1712 bus_resume(udc);
1713
1714 /* USB Interrupt */
1715 if (irq_src & USB_STS_INT) {
1716 VDBG("Packet int");
1717 /* Setup package, we only support ep0 as control ep */
1718 if (fsl_readl(&dr_regs->endptsetupstat) & EP_SETUP_STATUS_EP0) {
1719 tripwire_handler(udc, 0,
1720 (u8 *) (&udc->local_setup_buff));
1721 setup_received_irq(udc, &udc->local_setup_buff);
1722 status = IRQ_HANDLED;
1723 }
1724
1725 /* completion of dtd */
1726 if (fsl_readl(&dr_regs->endptcomplete)) {
1727 dtd_complete_irq(udc);
1728 status = IRQ_HANDLED;
1729 }
1730 }
1731
1732 /* SOF (for ISO transfer) */
1733 if (irq_src & USB_STS_SOF) {
1734 status = IRQ_HANDLED;
1735 }
1736
1737 /* Port Change */
1738 if (irq_src & USB_STS_PORT_CHANGE) {
1739 port_change_irq(udc);
1740 status = IRQ_HANDLED;
1741 }
1742
1743 /* Reset Received */
1744 if (irq_src & USB_STS_RESET) {
1745 reset_irq(udc);
1746 status = IRQ_HANDLED;
1747 }
1748
1749 /* Sleep Enable (Suspend) */
1750 if (irq_src & USB_STS_SUSPEND) {
1751 suspend_irq(udc);
1752 status = IRQ_HANDLED;
1753 }
1754
1755 if (irq_src & (USB_STS_ERR | USB_STS_SYS_ERR)) {
bf7409a2 1756 VDBG("Error IRQ %x", irq_src);
b504882d
LY		 1757 }
1758
1759 spin_unlock_irqrestore(&udc->lock, flags);
1760 return status;
1761}
1762
1763/*----------------------------------------------------------------*
1764 * Hook to gadget drivers
1765 * Called by initialization code of gadget drivers
1766*----------------------------------------------------------------*/
1767int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1768{
1769 int retval = -ENODEV;
1770 unsigned long flags = 0;
1771
1772 if (!udc_controller)
1773 return -ENODEV;
1774
1775 if (!driver || (driver->speed != USB_SPEED_FULL
1776 && driver->speed != USB_SPEED_HIGH)
1777 || !driver->bind || !driver->disconnect
1778 || !driver->setup)
1779 return -EINVAL;
1780
1781 if (udc_controller->driver)
1782 return -EBUSY;
1783
1784 /* lock is needed but whether should use this lock or another */
1785 spin_lock_irqsave(&udc_controller->lock, flags);
1786
7483cff8 1787 driver->driver.bus = NULL;
b504882d
LY		 1788 /* hook up the driver */
1789 udc_controller->driver = driver;
1790 udc_controller->gadget.dev.driver = &driver->driver;
1791 spin_unlock_irqrestore(&udc_controller->lock, flags);
1792
1793 /* bind udc driver to gadget driver */
1794 retval = driver->bind(&udc_controller->gadget);
1795 if (retval) {
1796 VDBG("bind to %s --> %d", driver->driver.name, retval);
7483cff8
WN		 1797 udc_controller->gadget.dev.driver = NULL;
1798 udc_controller->driver = NULL;
b504882d
LY		 1799 goto out;
1800 }
1801
1802 /* Enable DR IRQ reg and Set usbcmd reg Run bit */
1803 dr_controller_run(udc_controller);
1804 udc_controller->usb_state = USB_STATE_ATTACHED;
1805 udc_controller->ep0_state = WAIT_FOR_SETUP;
1806 udc_controller->ep0_dir = 0;
bf7409a2 1807 printk(KERN_INFO "%s: bind to driver %s\n",
b504882d
LY		 1808 udc_controller->gadget.name, driver->driver.name);
1809
1810out:
1811 if (retval)
bf7409a2 1812 printk("gadget driver register failed %d\n", retval);
b504882d
LY		 1813 return retval;
1814}
1815EXPORT_SYMBOL(usb_gadget_register_driver);
1816
1817/* Disconnect from gadget driver */
1818int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1819{
1820 struct fsl_ep *loop_ep;
1821 unsigned long flags;
1822
1823 if (!udc_controller)
1824 return -ENODEV;
1825
1826 if (!driver || driver != udc_controller->driver || !driver->unbind)
1827 return -EINVAL;
1828
b504882d 1829 if (udc_controller->transceiver)
7483cff8 1830 otg_set_peripheral(udc_controller->transceiver, NULL);
b504882d
LY		 1831
1832 /* stop DR, disable intr */
1833 dr_controller_stop(udc_controller);
1834
1835 /* in fact, no needed */
1836 udc_controller->usb_state = USB_STATE_ATTACHED;
1837 udc_controller->ep0_state = WAIT_FOR_SETUP;
1838 udc_controller->ep0_dir = 0;
1839
1840 /* stand operation */
1841 spin_lock_irqsave(&udc_controller->lock, flags);
1842 udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
1843 nuke(&udc_controller->eps[0], -ESHUTDOWN);
1844 list_for_each_entry(loop_ep, &udc_controller->gadget.ep_list,
1845 ep.ep_list)
1846 nuke(loop_ep, -ESHUTDOWN);
1847 spin_unlock_irqrestore(&udc_controller->lock, flags);
1848
1849 /* unbind gadget and unhook driver. */
1850 driver->unbind(&udc_controller->gadget);
7483cff8
WN		 1851 udc_controller->gadget.dev.driver = NULL;
1852 udc_controller->driver = NULL;
b504882d 1853
bf7409a2 1854 printk("unregistered gadget driver '%s'\n", driver->driver.name);
b504882d
LY		 1855 return 0;
1856}
1857EXPORT_SYMBOL(usb_gadget_unregister_driver);
1858
1859/*-------------------------------------------------------------------------
1860 PROC File System Support
1861-------------------------------------------------------------------------*/
1862#ifdef CONFIG_USB_GADGET_DEBUG_FILES
1863
1864#include <linux/seq_file.h>
1865
1866static const char proc_filename[] = "driver/fsl_usb2_udc";
1867
1868static int fsl_proc_read(char *page, char **start, off_t off, int count,
1869 int *eof, void *_dev)
1870{
1871 char *buf = page;
1872 char *next = buf;
1873 unsigned size = count;
1874 unsigned long flags;
1875 int t, i;
1876 u32 tmp_reg;
1877 struct fsl_ep *ep = NULL;
1878 struct fsl_req *req;
1879
1880 struct fsl_udc *udc = udc_controller;
1881 if (off != 0)
1882 return 0;
1883
1884 spin_lock_irqsave(&udc->lock, flags);
1885
dc0d5c1e 1886 /* ------basic driver information ---- */
b504882d
LY		 1887 t = scnprintf(next, size,
1888 DRIVER_DESC "\n"
1889 "%s version: %s\n"
1890 "Gadget driver: %s\n\n",
1891 driver_name, DRIVER_VERSION,
1892 udc->driver ? udc->driver->driver.name : "(none)");
1893 size -= t;
1894 next += t;
1895
1896 /* ------ DR Registers ----- */
1897 tmp_reg = fsl_readl(&dr_regs->usbcmd);
1898 t = scnprintf(next, size,
1899 "USBCMD reg:\n"
1900 "SetupTW: %d\n"
1901 "Run/Stop: %s\n\n",
1902 (tmp_reg & USB_CMD_SUTW) ? 1 : 0,
1903 (tmp_reg & USB_CMD_RUN_STOP) ? "Run" : "Stop");
1904 size -= t;
1905 next += t;
1906
1907 tmp_reg = fsl_readl(&dr_regs->usbsts);
1908 t = scnprintf(next, size,
1909 "USB Status Reg:\n"
9d9d88c8 1910 "Dr Suspend: %d Reset Received: %d System Error: %s "
b504882d
LY		 1911 "USB Error Interrupt: %s\n\n",
1912 (tmp_reg & USB_STS_SUSPEND) ? 1 : 0,
1913 (tmp_reg & USB_STS_RESET) ? 1 : 0,
1914 (tmp_reg & USB_STS_SYS_ERR) ? "Err" : "Normal",
1915 (tmp_reg & USB_STS_ERR) ? "Err detected" : "No err");
1916 size -= t;
1917 next += t;
1918
1919 tmp_reg = fsl_readl(&dr_regs->usbintr);
1920 t = scnprintf(next, size,
1921 "USB Intrrupt Enable Reg:\n"
9d9d88c8 1922 "Sleep Enable: %d SOF Received Enable: %d "
b504882d 1923 "Reset Enable: %d\n"
9d9d88c8 1924 "System Error Enable: %d "
b504882d 1925 "Port Change Dectected Enable: %d\n"
9d9d88c8 1926 "USB Error Intr Enable: %d USB Intr Enable: %d\n\n",
b504882d
LY		 1927 (tmp_reg & USB_INTR_DEVICE_SUSPEND) ? 1 : 0,
1928 (tmp_reg & USB_INTR_SOF_EN) ? 1 : 0,
1929 (tmp_reg & USB_INTR_RESET_EN) ? 1 : 0,
1930 (tmp_reg & USB_INTR_SYS_ERR_EN) ? 1 : 0,
1931 (tmp_reg & USB_INTR_PTC_DETECT_EN) ? 1 : 0,
1932 (tmp_reg & USB_INTR_ERR_INT_EN) ? 1 : 0,
1933 (tmp_reg & USB_INTR_INT_EN) ? 1 : 0);
1934 size -= t;
1935 next += t;
1936
1937 tmp_reg = fsl_readl(&dr_regs->frindex);
1938 t = scnprintf(next, size,
9d9d88c8 1939 "USB Frame Index Reg: Frame Number is 0x%x\n\n",
b504882d
LY		 1940 (tmp_reg & USB_FRINDEX_MASKS));
1941 size -= t;
1942 next += t;
1943
1944 tmp_reg = fsl_readl(&dr_regs->deviceaddr);
1945 t = scnprintf(next, size,
9d9d88c8 1946 "USB Device Address Reg: Device Addr is 0x%x\n\n",
b504882d
LY		 1947 (tmp_reg & USB_DEVICE_ADDRESS_MASK));
1948 size -= t;
1949 next += t;
1950
1951 tmp_reg = fsl_readl(&dr_regs->endpointlistaddr);
1952 t = scnprintf(next, size,
9d9d88c8 1953 "USB Endpoint List Address Reg: "
b504882d
LY		 1954 "Device Addr is 0x%x\n\n",
1955 (tmp_reg & USB_EP_LIST_ADDRESS_MASK));
1956 size -= t;
1957 next += t;
1958
1959 tmp_reg = fsl_readl(&dr_regs->portsc1);
1960 t = scnprintf(next, size,
1961 "USB Port Status&Control Reg:\n"
9d9d88c8
WN		 1962 "Port Transceiver Type : %s Port Speed: %s\n"
1963 "PHY Low Power Suspend: %s Port Reset: %s "
1964 "Port Suspend Mode: %s\n"
1965 "Over-current Change: %s "
b504882d 1966 "Port Enable/Disable Change: %s\n"
9d9d88c8 1967 "Port Enabled/Disabled: %s "
b504882d
LY		 1968 "Current Connect Status: %s\n\n", ( {
1969 char *s;
1970 switch (tmp_reg & PORTSCX_PTS_FSLS) {
1971 case PORTSCX_PTS_UTMI:
1972 s = "UTMI"; break;
1973 case PORTSCX_PTS_ULPI:
1974 s = "ULPI "; break;
1975 case PORTSCX_PTS_FSLS:
1976 s = "FS/LS Serial"; break;
1977 default:
1978 s = "None"; break;
1979 }
1980 s;} ), ( {
1981 char *s;
1982 switch (tmp_reg & PORTSCX_PORT_SPEED_UNDEF) {
1983 case PORTSCX_PORT_SPEED_FULL:
1984 s = "Full Speed"; break;
1985 case PORTSCX_PORT_SPEED_LOW:
1986 s = "Low Speed"; break;
1987 case PORTSCX_PORT_SPEED_HIGH:
1988 s = "High Speed"; break;
1989 default:
1990 s = "Undefined"; break;
1991 }
1992 s;
1993 } ),
1994 (tmp_reg & PORTSCX_PHY_LOW_POWER_SPD) ?
1995 "Normal PHY mode" : "Low power mode",
1996 (tmp_reg & PORTSCX_PORT_RESET) ? "In Reset" :
1997 "Not in Reset",
1998 (tmp_reg & PORTSCX_PORT_SUSPEND) ? "In " : "Not in",
1999 (tmp_reg & PORTSCX_OVER_CURRENT_CHG) ? "Dected" :
2000 "No",
2001 (tmp_reg & PORTSCX_PORT_EN_DIS_CHANGE) ? "Disable" :
2002 "Not change",
2003 (tmp_reg & PORTSCX_PORT_ENABLE) ? "Enable" :
2004 "Not correct",
2005 (tmp_reg & PORTSCX_CURRENT_CONNECT_STATUS) ?
2006 "Attached" : "Not-Att");
2007 size -= t;
2008 next += t;
2009
2010 tmp_reg = fsl_readl(&dr_regs->usbmode);
2011 t = scnprintf(next, size,
9d9d88c8 2012 "USB Mode Reg: Controller Mode is: %s\n\n", ( {
b504882d
LY		 2013 char *s;
2014 switch (tmp_reg & USB_MODE_CTRL_MODE_HOST) {
2015 case USB_MODE_CTRL_MODE_IDLE:
2016 s = "Idle"; break;
2017 case USB_MODE_CTRL_MODE_DEVICE:
2018 s = "Device Controller"; break;
2019 case USB_MODE_CTRL_MODE_HOST:
2020 s = "Host Controller"; break;
2021 default:
2022 s = "None"; break;
2023 }
2024 s;
2025 } ));
2026 size -= t;
2027 next += t;
2028
2029 tmp_reg = fsl_readl(&dr_regs->endptsetupstat);
2030 t = scnprintf(next, size,
9d9d88c8 2031 "Endpoint Setup Status Reg: SETUP on ep 0x%x\n\n",
b504882d
LY		 2032 (tmp_reg & EP_SETUP_STATUS_MASK));
2033 size -= t;
2034 next += t;
2035
2036 for (i = 0; i < udc->max_ep / 2; i++) {
2037 tmp_reg = fsl_readl(&dr_regs->endptctrl[i]);
2038 t = scnprintf(next, size, "EP Ctrl Reg [0x%x]: = [0x%x]\n",
2039 i, tmp_reg);
2040 size -= t;
2041 next += t;
2042 }
2043 tmp_reg = fsl_readl(&dr_regs->endpointprime);
9d9d88c8 2044 t = scnprintf(next, size, "EP Prime Reg = [0x%x]\n\n", tmp_reg);
b504882d
LY		 2045 size -= t;
2046 next += t;
2047
2048 tmp_reg = usb_sys_regs->snoop1;
9d9d88c8 2049 t = scnprintf(next, size, "Snoop1 Reg : = [0x%x]\n\n", tmp_reg);
b504882d
LY		 2050 size -= t;
2051 next += t;
2052
2053 tmp_reg = usb_sys_regs->control;
2054 t = scnprintf(next, size, "General Control Reg : = [0x%x]\n\n",
2055 tmp_reg);
2056 size -= t;
2057 next += t;
2058
2059 /* ------fsl_udc, fsl_ep, fsl_request structure information ----- */
2060 ep = &udc->eps[0];
2061 t = scnprintf(next, size, "For %s Maxpkt is 0x%x index is 0x%x\n",
2062 ep->ep.name, ep_maxpacket(ep), ep_index(ep));
2063 size -= t;
2064 next += t;
2065
2066 if (list_empty(&ep->queue)) {
2067 t = scnprintf(next, size, "its req queue is empty\n\n");
2068 size -= t;
2069 next += t;
2070 } else {
2071 list_for_each_entry(req, &ep->queue, queue) {
2072 t = scnprintf(next, size,
9d9d88c8 2073 "req %p actual 0x%x length 0x%x buf %p\n",
b504882d
LY		 2074 &req->req, req->req.actual,
2075 req->req.length, req->req.buf);
2076 size -= t;
2077 next += t;
2078 }
2079 }
2080 /* other gadget->eplist ep */
2081 list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
2082 if (ep->desc) {
2083 t = scnprintf(next, size,
2084 "\nFor %s Maxpkt is 0x%x "
2085 "index is 0x%x\n",
2086 ep->ep.name, ep_maxpacket(ep),
2087 ep_index(ep));
2088 size -= t;
2089 next += t;
2090
2091 if (list_empty(&ep->queue)) {
2092 t = scnprintf(next, size,
2093 "its req queue is empty\n\n");
2094 size -= t;
2095 next += t;
2096 } else {
2097 list_for_each_entry(req, &ep->queue, queue) {
2098 t = scnprintf(next, size,
9d9d88c8 2099 "req %p actual 0x%x length "
b504882d
LY		 2100 "0x%x buf %p\n",
2101 &req->req, req->req.actual,
2102 req->req.length, req->req.buf);
2103 size -= t;
2104 next += t;
2105 } /* end for each_entry of ep req */
2106 } /* end for else */
2107 } /* end for if(ep->queue) */
2108 } /* end (ep->desc) */
2109
2110 spin_unlock_irqrestore(&udc->lock, flags);
2111
2112 *eof = 1;
2113 return count - size;
2114}
2115
2116#define create_proc_file() create_proc_read_entry(proc_filename, \
2117 0, NULL, fsl_proc_read, NULL)
2118
2119#define remove_proc_file() remove_proc_entry(proc_filename, NULL)
2120
2121#else /* !CONFIG_USB_GADGET_DEBUG_FILES */
2122
2123#define create_proc_file() do {} while (0)
2124#define remove_proc_file() do {} while (0)
2125
2126#endif /* CONFIG_USB_GADGET_DEBUG_FILES */
2127
2128/*-------------------------------------------------------------------------*/
2129
2130/* Release udc structures */
2131static void fsl_udc_release(struct device *dev)
2132{
2133 complete(udc_controller->done);
2134 dma_free_coherent(dev, udc_controller->ep_qh_size,
2135 udc_controller->ep_qh, udc_controller->ep_qh_dma);
2136 kfree(udc_controller);
2137}
2138
2139/******************************************************************
2140 Internal structure setup functions
2141*******************************************************************/
2142/*------------------------------------------------------------------
2143 * init resource for globle controller
2144 * Return the udc handle on success or NULL on failure
2145 ------------------------------------------------------------------*/
4365831d
LY		 2146static int __init struct_udc_setup(struct fsl_udc *udc,
2147 struct platform_device *pdev)
b504882d 2148{
b504882d
LY		 2149 struct fsl_usb2_platform_data *pdata;
2150 size_t size;
2151
b504882d
LY		 2152 pdata = pdev->dev.platform_data;
2153 udc->phy_mode = pdata->phy_mode;
b504882d
LY		 2154
2155 udc->eps = kzalloc(sizeof(struct fsl_ep) * udc->max_ep, GFP_KERNEL);
2156 if (!udc->eps) {
2157 ERR("malloc fsl_ep failed\n");
4365831d 2158 return -1;
b504882d
LY		 2159 }
2160
2161 /* initialized QHs, take care of alignment */
2162 size = udc->max_ep * sizeof(struct ep_queue_head);
2163 if (size < QH_ALIGNMENT)
2164 size = QH_ALIGNMENT;
2165 else if ((size % QH_ALIGNMENT) != 0) {
2166 size += QH_ALIGNMENT + 1;
2167 size &= ~(QH_ALIGNMENT - 1);
2168 }
2169 udc->ep_qh = dma_alloc_coherent(&pdev->dev, size,
2170 &udc->ep_qh_dma, GFP_KERNEL);
2171 if (!udc->ep_qh) {
2172 ERR("malloc QHs for udc failed\n");
2173 kfree(udc->eps);
4365831d 2174 return -1;
b504882d
LY		 2175 }
2176
2177 udc->ep_qh_size = size;
2178
2179 /* Initialize ep0 status request structure */
2180 /* FIXME: fsl_alloc_request() ignores ep argument */
2181 udc->status_req = container_of(fsl_alloc_request(NULL, GFP_KERNEL),
2182 struct fsl_req, req);
2183 /* allocate a small amount of memory to get valid address */
2184 udc->status_req->req.buf = kmalloc(8, GFP_KERNEL);
2185 udc->status_req->req.dma = virt_to_phys(udc->status_req->req.buf);
2186
2187 udc->resume_state = USB_STATE_NOTATTACHED;
2188 udc->usb_state = USB_STATE_POWERED;
2189 udc->ep0_dir = 0;
2190 udc->remote_wakeup = 0; /* default to 0 on reset */
b504882d 2191
4365831d 2192 return 0;
b504882d
LY		 2193}
2194
2195/*----------------------------------------------------------------
2196 * Setup the fsl_ep struct for eps
2197 * Link fsl_ep->ep to gadget->ep_list
2198 * ep0out is not used so do nothing here
2199 * ep0in should be taken care
2200 *--------------------------------------------------------------*/
2201static int __init struct_ep_setup(struct fsl_udc *udc, unsigned char index,
2202 char *name, int link)
2203{
2204 struct fsl_ep *ep = &udc->eps[index];
2205
2206 ep->udc = udc;
2207 strcpy(ep->name, name);
2208 ep->ep.name = ep->name;
2209
2210 ep->ep.ops = &fsl_ep_ops;
2211 ep->stopped = 0;
2212
2213 /* for ep0: maxP defined in desc
2214 * for other eps, maxP is set by epautoconfig() called by gadget layer
2215 */
2216 ep->ep.maxpacket = (unsigned short) ~0;
2217
2218 /* the queue lists any req for this ep */
2219 INIT_LIST_HEAD(&ep->queue);
2220
2221 /* gagdet.ep_list used for ep_autoconfig so no ep0 */
2222 if (link)
2223 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2224 ep->gadget = &udc->gadget;
2225 ep->qh = &udc->ep_qh[index];
2226
2227 return 0;
2228}
2229
2230/* Driver probe function
4365831d
LY		 2231 * all intialization operations implemented here except enabling usb_intr reg
2232 * board setup should have been done in the platform code
b504882d
LY		 2233 */
2234static int __init fsl_udc_probe(struct platform_device *pdev)
2235{
2236 struct resource *res;
2237 int ret = -ENODEV;
2238 unsigned int i;
4365831d 2239 u32 dccparams;
b504882d
LY		 2240
2241 if (strcmp(pdev->name, driver_name)) {
bf7409a2 2242 VDBG("Wrong device");
b504882d
LY		 2243 return -ENODEV;
2244 }
2245
4365831d
LY		 2246 udc_controller = kzalloc(sizeof(struct fsl_udc), GFP_KERNEL);
2247 if (udc_controller == NULL) {
2248 ERR("malloc udc failed\n");
b504882d
LY		 2249 return -ENOMEM;
2250 }
2251
e06da9a8
WN		 2252 spin_lock_init(&udc_controller->lock);
2253 udc_controller->stopped = 1;
2254
b504882d 2255 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
4365831d
LY		 2256 if (!res) {
2257 kfree(udc_controller);
b504882d 2258 return -ENXIO;
4365831d 2259 }
b504882d
LY		 2260
2261 if (!request_mem_region(res->start, res->end - res->start + 1,
2262 driver_name)) {
bf7409a2 2263 ERR("request mem region for %s failed\n", pdev->name);
4365831d 2264 kfree(udc_controller);
b504882d
LY		 2265 return -EBUSY;
2266 }
2267
2268 dr_regs = ioremap(res->start, res->end - res->start + 1);
2269 if (!dr_regs) {
2270 ret = -ENOMEM;
2271 goto err1;
2272 }
2273
2274 usb_sys_regs = (struct usb_sys_interface *)
2275 ((u32)dr_regs + USB_DR_SYS_OFFSET);
2276
4365831d
LY		 2277 /* Read Device Controller Capability Parameters register */
2278 dccparams = fsl_readl(&dr_regs->dccparams);
2279 if (!(dccparams & DCCPARAMS_DC)) {
2280 ERR("This SOC doesn't support device role\n");
2281 ret = -ENODEV;
2282 goto err2;
2283 }
2284 /* Get max device endpoints */
2285 /* DEN is bidirectional ep number, max_ep doubles the number */
2286 udc_controller->max_ep = (dccparams & DCCPARAMS_DEN_MASK) * 2;
2287
b504882d
LY		 2288 udc_controller->irq = platform_get_irq(pdev, 0);
2289 if (!udc_controller->irq) {
2290 ret = -ENODEV;
2291 goto err2;
2292 }
2293
37b5453d 2294 ret = request_irq(udc_controller->irq, fsl_udc_irq, IRQF_SHARED,
b504882d
LY		 2295 driver_name, udc_controller);
2296 if (ret != 0) {
bf7409a2 2297 ERR("cannot request irq %d err %d\n",
b504882d
LY		 2298 udc_controller->irq, ret);
2299 goto err2;
2300 }
2301
4365831d
LY		 2302 /* Initialize the udc structure including QH member and other member */
2303 if (struct_udc_setup(udc_controller, pdev)) {
2304 ERR("Can't initialize udc data structure\n");
2305 ret = -ENOMEM;
2306 goto err3;
2307 }
2308
b504882d
LY		 2309 /* initialize usb hw reg except for regs for EP,
2310 * leave usbintr reg untouched */
2311 dr_controller_setup(udc_controller);
2312
2313 /* Setup gadget structure */
2314 udc_controller->gadget.ops = &fsl_gadget_ops;
2315 udc_controller->gadget.is_dualspeed = 1;
2316 udc_controller->gadget.ep0 = &udc_controller->eps[0].ep;
2317 INIT_LIST_HEAD(&udc_controller->gadget.ep_list);
2318 udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
2319 udc_controller->gadget.name = driver_name;
2320
2321 /* Setup gadget.dev and register with kernel */
0031a06e 2322 dev_set_name(&udc_controller->gadget.dev, "gadget");
b504882d
LY		 2323 udc_controller->gadget.dev.release = fsl_udc_release;
2324 udc_controller->gadget.dev.parent = &pdev->dev;
2325 ret = device_register(&udc_controller->gadget.dev);
2326 if (ret < 0)
2327 goto err3;
2328
2329 /* setup QH and epctrl for ep0 */
2330 ep0_setup(udc_controller);
2331
2332 /* setup udc->eps[] for ep0 */
2333 struct_ep_setup(udc_controller, 0, "ep0", 0);
2334 /* for ep0: the desc defined here;
2335 * for other eps, gadget layer called ep_enable with defined desc
2336 */
2337 udc_controller->eps[0].desc = &fsl_ep0_desc;
2338 udc_controller->eps[0].ep.maxpacket = USB_MAX_CTRL_PAYLOAD;
2339
2340 /* setup the udc->eps[] for non-control endpoints and link
2341 * to gadget.ep_list */
2342 for (i = 1; i < (int)(udc_controller->max_ep / 2); i++) {
2343 char name[14];
2344
2345 sprintf(name, "ep%dout", i);
2346 struct_ep_setup(udc_controller, i * 2, name, 1);
2347 sprintf(name, "ep%din", i);
2348 struct_ep_setup(udc_controller, i * 2 + 1, name, 1);
2349 }
2350
2351 /* use dma_pool for TD management */
2352 udc_controller->td_pool = dma_pool_create("udc_td", &pdev->dev,
2353 sizeof(struct ep_td_struct),
2354 DTD_ALIGNMENT, UDC_DMA_BOUNDARY);
2355 if (udc_controller->td_pool == NULL) {
2356 ret = -ENOMEM;
2357 goto err4;
2358 }
2359 create_proc_file();
2360 return 0;
2361
2362err4:
2363 device_unregister(&udc_controller->gadget.dev);
2364err3:
2365 free_irq(udc_controller->irq, udc_controller);
2366err2:
2367 iounmap(dr_regs);
2368err1:
2369 release_mem_region(res->start, res->end - res->start + 1);
4365831d 2370 kfree(udc_controller);
b504882d
LY		 2371 return ret;
2372}
2373
2374/* Driver removal function
2375 * Free resources and finish pending transactions
2376 */
2377static int __exit fsl_udc_remove(struct platform_device *pdev)
2378{
2379 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2380
2381 DECLARE_COMPLETION(done);
2382
2383 if (!udc_controller)
2384 return -ENODEV;
2385 udc_controller->done = &done;
2386
2387 /* DR has been stopped in usb_gadget_unregister_driver() */
2388 remove_proc_file();
2389
2390 /* Free allocated memory */
2391 kfree(udc_controller->status_req->req.buf);
2392 kfree(udc_controller->status_req);
2393 kfree(udc_controller->eps);
2394
2395 dma_pool_destroy(udc_controller->td_pool);
2396 free_irq(udc_controller->irq, udc_controller);
2397 iounmap(dr_regs);
2398 release_mem_region(res->start, res->end - res->start + 1);
2399
2400 device_unregister(&udc_controller->gadget.dev);
2401 /* free udc --wait for the release() finished */
2402 wait_for_completion(&done);
2403
2404 return 0;
2405}
2406
2407/*-----------------------------------------------------------------
2408 * Modify Power management attributes
2409 * Used by OTG statemachine to disable gadget temporarily
2410 -----------------------------------------------------------------*/
2411static int fsl_udc_suspend(struct platform_device *pdev, pm_message_t state)
2412{
2413 dr_controller_stop(udc_controller);
2414 return 0;
2415}
2416
2417/*-----------------------------------------------------------------
2418 * Invoked on USB resume. May be called in_interrupt.
2419 * Here we start the DR controller and enable the irq
2420 *-----------------------------------------------------------------*/
2421static int fsl_udc_resume(struct platform_device *pdev)
2422{
2423 /* Enable DR irq reg and set controller Run */
2424 if (udc_controller->stopped) {
2425 dr_controller_setup(udc_controller);
2426 dr_controller_run(udc_controller);
2427 }
2428 udc_controller->usb_state = USB_STATE_ATTACHED;
2429 udc_controller->ep0_state = WAIT_FOR_SETUP;
2430 udc_controller->ep0_dir = 0;
2431 return 0;
2432}
2433
2434/*-------------------------------------------------------------------------
2435 Register entry point for the peripheral controller driver
2436--------------------------------------------------------------------------*/
2437
2438static struct platform_driver udc_driver = {
2439 .remove = __exit_p(fsl_udc_remove),
2440 /* these suspend and resume are not usb suspend and resume */
2441 .suspend = fsl_udc_suspend,
2442 .resume = fsl_udc_resume,
2443 .driver = {
2444 .name = (char *)driver_name,
2445 .owner = THIS_MODULE,
2446 },
2447};
2448
2449static int __init udc_init(void)
2450{
2451 printk(KERN_INFO "%s (%s)\n", driver_desc, DRIVER_VERSION);
2452 return platform_driver_probe(&udc_driver, fsl_udc_probe);
2453}
2454
2455module_init(udc_init);
2456
2457static void __exit udc_exit(void)
2458{
2459 platform_driver_unregister(&udc_driver);
bf7409a2 2460 printk("%s unregistered\n", driver_desc);
b504882d
LY		 2461}
2462
2463module_exit(udc_exit);
2464
2465MODULE_DESCRIPTION(DRIVER_DESC);
2466MODULE_AUTHOR(DRIVER_AUTHOR);
2467MODULE_LICENSE("GPL");
f34c32f1 2468MODULE_ALIAS("platform:fsl-usb2-udc");
Linux 6.x block layer and io_uring tree(s)