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USB: fsl_qe_udc: Report disconnect before unbinding
[linux-2.6-block.git] / drivers / usb / gadget / fsl_usb2_udc.c
CommitLineData
b504882d
LY		 1/*
2 * Copyright (C) 2004-2007 Freescale Semicondutor, Inc. All rights reserved.
3 *
4 * Author: Li Yang <leoli@freescale.com>
5 * Jiang Bo <tanya.jiang@freescale.com>
6 *
7 * Description:
8 * Freescale high-speed USB SOC DR module device controller driver.
9 * This can be found on MPC8349E/MPC8313E cpus.
10 * The driver is previously named as mpc_udc. Based on bare board
11 * code from Dave Liu and Shlomi Gridish.
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
17 */
18
19#undef VERBOSE
20
21#include <linux/module.h>
22#include <linux/kernel.h>
23#include <linux/ioport.h>
24#include <linux/types.h>
25#include <linux/errno.h>
b504882d
LY		 26#include <linux/slab.h>
27#include <linux/init.h>
b504882d
LY		 28#include <linux/list.h>
29#include <linux/interrupt.h>
30#include <linux/proc_fs.h>
31#include <linux/mm.h>
32#include <linux/moduleparam.h>
33#include <linux/device.h>
34#include <linux/usb/ch9.h>
9454a57a 35#include <linux/usb/gadget.h>
b504882d
LY		 36#include <linux/usb/otg.h>
37#include <linux/dma-mapping.h>
38#include <linux/platform_device.h>
39#include <linux/fsl_devices.h>
40#include <linux/dmapool.h>
41
42#include <asm/byteorder.h>
43#include <asm/io.h>
b504882d
LY		 44#include <asm/system.h>
45#include <asm/unaligned.h>
46#include <asm/dma.h>
b504882d
LY		 47
48#include "fsl_usb2_udc.h"
49
50#define DRIVER_DESC "Freescale High-Speed USB SOC Device Controller driver"
51#define DRIVER_AUTHOR "Li Yang/Jiang Bo"
52#define DRIVER_VERSION "Apr 20, 2007"
53
54#define DMA_ADDR_INVALID (~(dma_addr_t)0)
55
56static const char driver_name[] = "fsl-usb2-udc";
57static const char driver_desc[] = DRIVER_DESC;
58
7483cff8
WN		 59static struct usb_dr_device *dr_regs;
60static struct usb_sys_interface *usb_sys_regs;
b504882d
LY		 61
62/* it is initialized in probe() */
63static struct fsl_udc *udc_controller = NULL;
64
65static const struct usb_endpoint_descriptor
66fsl_ep0_desc = {
67 .bLength = USB_DT_ENDPOINT_SIZE,
68 .bDescriptorType = USB_DT_ENDPOINT,
69 .bEndpointAddress = 0,
70 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
71 .wMaxPacketSize = USB_MAX_CTRL_PAYLOAD,
72};
73
b504882d
LY		 74static void fsl_ep_fifo_flush(struct usb_ep *_ep);
75
76#ifdef CONFIG_PPC32
77#define fsl_readl(addr) in_le32(addr)
c93eebbe 78#define fsl_writel(val32, addr) out_le32(addr, val32)
b504882d
LY		 79#else
80#define fsl_readl(addr) readl(addr)
c93eebbe 81#define fsl_writel(val32, addr) writel(val32, addr)
b504882d
LY		 82#endif
83
84/********************************************************************
85 * Internal Used Function
86********************************************************************/
87/*-----------------------------------------------------------------
88 * done() - retire a request; caller blocked irqs
89 * @status : request status to be set, only works when
90 * request is still in progress.
91 *--------------------------------------------------------------*/
92static void done(struct fsl_ep *ep, struct fsl_req *req, int status)
93{
94 struct fsl_udc *udc = NULL;
95 unsigned char stopped = ep->stopped;
96 struct ep_td_struct *curr_td, *next_td;
97 int j;
98
99 udc = (struct fsl_udc *)ep->udc;
100 /* Removed the req from fsl_ep->queue */
101 list_del_init(&req->queue);
102
103 /* req.status should be set as -EINPROGRESS in ep_queue() */
104 if (req->req.status == -EINPROGRESS)
105 req->req.status = status;
106 else
107 status = req->req.status;
108
109 /* Free dtd for the request */
110 next_td = req->head;
111 for (j = 0; j < req->dtd_count; j++) {
112 curr_td = next_td;
113 if (j != req->dtd_count - 1) {
114 next_td = curr_td->next_td_virt;
115 }
116 dma_pool_free(udc->td_pool, curr_td, curr_td->td_dma);
117 }
118
119 if (req->mapped) {
120 dma_unmap_single(ep->udc->gadget.dev.parent,
121 req->req.dma, req->req.length,
122 ep_is_in(ep)
123 ? DMA_TO_DEVICE
124 : DMA_FROM_DEVICE);
125 req->req.dma = DMA_ADDR_INVALID;
126 req->mapped = 0;
127 } else
128 dma_sync_single_for_cpu(ep->udc->gadget.dev.parent,
129 req->req.dma, req->req.length,
130 ep_is_in(ep)
131 ? DMA_TO_DEVICE
132 : DMA_FROM_DEVICE);
133
134 if (status && (status != -ESHUTDOWN))
135 VDBG("complete %s req %p stat %d len %u/%u",
136 ep->ep.name, &req->req, status,
137 req->req.actual, req->req.length);
138
139 ep->stopped = 1;
140
141 spin_unlock(&ep->udc->lock);
142 /* complete() is from gadget layer,
143 * eg fsg->bulk_in_complete() */
144 if (req->req.complete)
145 req->req.complete(&ep->ep, &req->req);
146
147 spin_lock(&ep->udc->lock);
148 ep->stopped = stopped;
149}
150
151/*-----------------------------------------------------------------
152 * nuke(): delete all requests related to this ep
153 * called with spinlock held
154 *--------------------------------------------------------------*/
155static void nuke(struct fsl_ep *ep, int status)
156{
157 ep->stopped = 1;
158
159 /* Flush fifo */
160 fsl_ep_fifo_flush(&ep->ep);
161
162 /* Whether this eq has request linked */
163 while (!list_empty(&ep->queue)) {
164 struct fsl_req *req = NULL;
165
166 req = list_entry(ep->queue.next, struct fsl_req, queue);
167 done(ep, req, status);
168 }
169}
170
171/*------------------------------------------------------------------
172 Internal Hardware related function
173 ------------------------------------------------------------------*/
174
175static int dr_controller_setup(struct fsl_udc *udc)
176{
177 unsigned int tmp = 0, portctrl = 0, ctrl = 0;
178 unsigned long timeout;
179#define FSL_UDC_RESET_TIMEOUT 1000
180
b504882d
LY		 181 /* Stop and reset the usb controller */
182 tmp = fsl_readl(&dr_regs->usbcmd);
183 tmp &= ~USB_CMD_RUN_STOP;
184 fsl_writel(tmp, &dr_regs->usbcmd);
185
186 tmp = fsl_readl(&dr_regs->usbcmd);
187 tmp |= USB_CMD_CTRL_RESET;
188 fsl_writel(tmp, &dr_regs->usbcmd);
189
190 /* Wait for reset to complete */
191 timeout = jiffies + FSL_UDC_RESET_TIMEOUT;
192 while (fsl_readl(&dr_regs->usbcmd) & USB_CMD_CTRL_RESET) {
193 if (time_after(jiffies, timeout)) {
bf7409a2 194 ERR("udc reset timeout!\n");
b504882d
LY		 195 return -ETIMEDOUT;
196 }
197 cpu_relax();
198 }
199
200 /* Set the controller as device mode */
201 tmp = fsl_readl(&dr_regs->usbmode);
202 tmp |= USB_MODE_CTRL_MODE_DEVICE;
203 /* Disable Setup Lockout */
204 tmp |= USB_MODE_SETUP_LOCK_OFF;
205 fsl_writel(tmp, &dr_regs->usbmode);
206
207 /* Clear the setup status */
208 fsl_writel(0, &dr_regs->usbsts);
209
210 tmp = udc->ep_qh_dma;
211 tmp &= USB_EP_LIST_ADDRESS_MASK;
212 fsl_writel(tmp, &dr_regs->endpointlistaddr);
213
214 VDBG("vir[qh_base] is %p phy[qh_base] is 0x%8x reg is 0x%8x",
6ef65a7f 215 udc->ep_qh, (int)tmp,
b504882d
LY		 216 fsl_readl(&dr_regs->endpointlistaddr));
217
218 /* Config PHY interface */
219 portctrl = fsl_readl(&dr_regs->portsc1);
7542548f 220 portctrl &= ~(PORTSCX_PHY_TYPE_SEL | PORTSCX_PORT_WIDTH);
b504882d
LY		 221 switch (udc->phy_mode) {
222 case FSL_USB2_PHY_ULPI:
223 portctrl |= PORTSCX_PTS_ULPI;
224 break;
b504882d 225 case FSL_USB2_PHY_UTMI_WIDE:
fcbd9639
LY		 226 portctrl |= PORTSCX_PTW_16BIT;
227 /* fall through */
228 case FSL_USB2_PHY_UTMI:
b504882d
LY		 229 portctrl |= PORTSCX_PTS_UTMI;
230 break;
231 case FSL_USB2_PHY_SERIAL:
232 portctrl |= PORTSCX_PTS_FSLS;
233 break;
234 default:
235 return -EINVAL;
236 }
237 fsl_writel(portctrl, &dr_regs->portsc1);
238
239 /* Config control enable i/o output, cpu endian register */
240 ctrl = __raw_readl(&usb_sys_regs->control);
241 ctrl |= USB_CTRL_IOENB;
242 __raw_writel(ctrl, &usb_sys_regs->control);
243
244#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
245 /* Turn on cache snooping hardware, since some PowerPC platforms
246 * wholly rely on hardware to deal with cache coherent. */
247
248 /* Setup Snooping for all the 4GB space */
249 tmp = SNOOP_SIZE_2GB; /* starts from 0x0, size 2G */
250 __raw_writel(tmp, &usb_sys_regs->snoop1);
251 tmp |= 0x80000000; /* starts from 0x8000000, size 2G */
252 __raw_writel(tmp, &usb_sys_regs->snoop2);
253#endif
254
255 return 0;
256}
257
258/* Enable DR irq and set controller to run state */
259static void dr_controller_run(struct fsl_udc *udc)
260{
261 u32 temp;
262
263 /* Enable DR irq reg */
264 temp = USB_INTR_INT_EN | USB_INTR_ERR_INT_EN
265 | USB_INTR_PTC_DETECT_EN | USB_INTR_RESET_EN
266 | USB_INTR_DEVICE_SUSPEND | USB_INTR_SYS_ERR_EN;
267
268 fsl_writel(temp, &dr_regs->usbintr);
269
270 /* Clear stopped bit */
271 udc->stopped = 0;
272
273 /* Set the controller as device mode */
274 temp = fsl_readl(&dr_regs->usbmode);
275 temp |= USB_MODE_CTRL_MODE_DEVICE;
276 fsl_writel(temp, &dr_regs->usbmode);
277
278 /* Set controller to Run */
279 temp = fsl_readl(&dr_regs->usbcmd);
280 temp |= USB_CMD_RUN_STOP;
281 fsl_writel(temp, &dr_regs->usbcmd);
282
283 return;
284}
285
286static void dr_controller_stop(struct fsl_udc *udc)
287{
288 unsigned int tmp;
289
290 /* disable all INTR */
291 fsl_writel(0, &dr_regs->usbintr);
292
293 /* Set stopped bit for isr */
294 udc->stopped = 1;
295
296 /* disable IO output */
297/* usb_sys_regs->control = 0; */
298
299 /* set controller to Stop */
300 tmp = fsl_readl(&dr_regs->usbcmd);
301 tmp &= ~USB_CMD_RUN_STOP;
302 fsl_writel(tmp, &dr_regs->usbcmd);
303
304 return;
305}
306
9c94155e
WN		 307static void dr_ep_setup(unsigned char ep_num, unsigned char dir,
308 unsigned char ep_type)
b504882d
LY		 309{
310 unsigned int tmp_epctrl = 0;
311
312 tmp_epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
313 if (dir) {
314 if (ep_num)
315 tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST;
316 tmp_epctrl |= EPCTRL_TX_ENABLE;
317 tmp_epctrl |= ((unsigned int)(ep_type)
318 << EPCTRL_TX_EP_TYPE_SHIFT);
319 } else {
320 if (ep_num)
321 tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST;
322 tmp_epctrl |= EPCTRL_RX_ENABLE;
323 tmp_epctrl |= ((unsigned int)(ep_type)
324 << EPCTRL_RX_EP_TYPE_SHIFT);
325 }
326
327 fsl_writel(tmp_epctrl, &dr_regs->endptctrl[ep_num]);
328}
329
330static void
331dr_ep_change_stall(unsigned char ep_num, unsigned char dir, int value)
332{
333 u32 tmp_epctrl = 0;
334
335 tmp_epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
336
337 if (value) {
338 /* set the stall bit */
339 if (dir)
340 tmp_epctrl |= EPCTRL_TX_EP_STALL;
341 else
342 tmp_epctrl |= EPCTRL_RX_EP_STALL;
343 } else {
344 /* clear the stall bit and reset data toggle */
345 if (dir) {
346 tmp_epctrl &= ~EPCTRL_TX_EP_STALL;
347 tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST;
348 } else {
349 tmp_epctrl &= ~EPCTRL_RX_EP_STALL;
350 tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST;
351 }
352 }
353 fsl_writel(tmp_epctrl, &dr_regs->endptctrl[ep_num]);
354}
355
356/* Get stall status of a specific ep
357 Return: 0: not stalled; 1:stalled */
358static int dr_ep_get_stall(unsigned char ep_num, unsigned char dir)
359{
360 u32 epctrl;
361
362 epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
363 if (dir)
364 return (epctrl & EPCTRL_TX_EP_STALL) ? 1 : 0;
365 else
366 return (epctrl & EPCTRL_RX_EP_STALL) ? 1 : 0;
367}
368
369/********************************************************************
370 Internal Structure Build up functions
371********************************************************************/
372
373/*------------------------------------------------------------------
374* struct_ep_qh_setup(): set the Endpoint Capabilites field of QH
375 * @zlt: Zero Length Termination Select (1: disable; 0: enable)
376 * @mult: Mult field
377 ------------------------------------------------------------------*/
378static void struct_ep_qh_setup(struct fsl_udc *udc, unsigned char ep_num,
379 unsigned char dir, unsigned char ep_type,
380 unsigned int max_pkt_len,
381 unsigned int zlt, unsigned char mult)
382{
383 struct ep_queue_head *p_QH = &udc->ep_qh[2 * ep_num + dir];
384 unsigned int tmp = 0;
385
386 /* set the Endpoint Capabilites in QH */
387 switch (ep_type) {
388 case USB_ENDPOINT_XFER_CONTROL:
389 /* Interrupt On Setup (IOS). for control ep */
390 tmp = (max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS)
391 | EP_QUEUE_HEAD_IOS;
392 break;
393 case USB_ENDPOINT_XFER_ISOC:
394 tmp = (max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS)
395 | (mult << EP_QUEUE_HEAD_MULT_POS);
396 break;
397 case USB_ENDPOINT_XFER_BULK:
398 case USB_ENDPOINT_XFER_INT:
399 tmp = max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS;
400 break;
401 default:
402 VDBG("error ep type is %d", ep_type);
403 return;
404 }
405 if (zlt)
406 tmp |= EP_QUEUE_HEAD_ZLT_SEL;
407 p_QH->max_pkt_length = cpu_to_le32(tmp);
408
409 return;
410}
411
412/* Setup qh structure and ep register for ep0. */
413static void ep0_setup(struct fsl_udc *udc)
414{
415 /* the intialization of an ep includes: fields in QH, Regs,
416 * fsl_ep struct */
417 struct_ep_qh_setup(udc, 0, USB_RECV, USB_ENDPOINT_XFER_CONTROL,
418 USB_MAX_CTRL_PAYLOAD, 0, 0);
419 struct_ep_qh_setup(udc, 0, USB_SEND, USB_ENDPOINT_XFER_CONTROL,
420 USB_MAX_CTRL_PAYLOAD, 0, 0);
421 dr_ep_setup(0, USB_RECV, USB_ENDPOINT_XFER_CONTROL);
422 dr_ep_setup(0, USB_SEND, USB_ENDPOINT_XFER_CONTROL);
423
424 return;
425
426}
427
428/***********************************************************************
429 Endpoint Management Functions
430***********************************************************************/
431
432/*-------------------------------------------------------------------------
433 * when configurations are set, or when interface settings change
434 * for example the do_set_interface() in gadget layer,
435 * the driver will enable or disable the relevant endpoints
436 * ep0 doesn't use this routine. It is always enabled.
437-------------------------------------------------------------------------*/
438static int fsl_ep_enable(struct usb_ep *_ep,
439 const struct usb_endpoint_descriptor *desc)
440{
441 struct fsl_udc *udc = NULL;
442 struct fsl_ep *ep = NULL;
443 unsigned short max = 0;
444 unsigned char mult = 0, zlt;
445 int retval = -EINVAL;
446 unsigned long flags = 0;
447
448 ep = container_of(_ep, struct fsl_ep, ep);
449
450 /* catch various bogus parameters */
451 if (!_ep || !desc || ep->desc
452 || (desc->bDescriptorType != USB_DT_ENDPOINT))
453 return -EINVAL;
454
455 udc = ep->udc;
456
457 if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN))
458 return -ESHUTDOWN;
459
460 max = le16_to_cpu(desc->wMaxPacketSize);
461
462 /* Disable automatic zlp generation. Driver is reponsible to indicate
463 * explicitly through req->req.zero. This is needed to enable multi-td
464 * request. */
465 zlt = 1;
466
467 /* Assume the max packet size from gadget is always correct */
468 switch (desc->bmAttributes & 0x03) {
469 case USB_ENDPOINT_XFER_CONTROL:
470 case USB_ENDPOINT_XFER_BULK:
471 case USB_ENDPOINT_XFER_INT:
472 /* mult = 0. Execute N Transactions as demonstrated by
473 * the USB variable length packet protocol where N is
474 * computed using the Maximum Packet Length (dQH) and
475 * the Total Bytes field (dTD) */
476 mult = 0;
477 break;
478 case USB_ENDPOINT_XFER_ISOC:
479 /* Calculate transactions needed for high bandwidth iso */
480 mult = (unsigned char)(1 + ((max >> 11) & 0x03));
481 max = max & 0x8ff; /* bit 0~10 */
482 /* 3 transactions at most */
483 if (mult > 3)
484 goto en_done;
485 break;
486 default:
487 goto en_done;
488 }
489
490 spin_lock_irqsave(&udc->lock, flags);
491 ep->ep.maxpacket = max;
492 ep->desc = desc;
493 ep->stopped = 0;
494
495 /* Controller related setup */
496 /* Init EPx Queue Head (Ep Capabilites field in QH
497 * according to max, zlt, mult) */
498 struct_ep_qh_setup(udc, (unsigned char) ep_index(ep),
499 (unsigned char) ((desc->bEndpointAddress & USB_DIR_IN)
500 ? USB_SEND : USB_RECV),
501 (unsigned char) (desc->bmAttributes
502 & USB_ENDPOINT_XFERTYPE_MASK),
503 max, zlt, mult);
504
505 /* Init endpoint ctrl register */
506 dr_ep_setup((unsigned char) ep_index(ep),
507 (unsigned char) ((desc->bEndpointAddress & USB_DIR_IN)
508 ? USB_SEND : USB_RECV),
509 (unsigned char) (desc->bmAttributes
510 & USB_ENDPOINT_XFERTYPE_MASK));
511
512 spin_unlock_irqrestore(&udc->lock, flags);
513 retval = 0;
514
515 VDBG("enabled %s (ep%d%s) maxpacket %d",ep->ep.name,
516 ep->desc->bEndpointAddress & 0x0f,
517 (desc->bEndpointAddress & USB_DIR_IN)
518 ? "in" : "out", max);
519en_done:
520 return retval;
521}
522
523/*---------------------------------------------------------------------
524 * @ep : the ep being unconfigured. May not be ep0
525 * Any pending and uncomplete req will complete with status (-ESHUTDOWN)
526*---------------------------------------------------------------------*/
527static int fsl_ep_disable(struct usb_ep *_ep)
528{
529 struct fsl_udc *udc = NULL;
530 struct fsl_ep *ep = NULL;
531 unsigned long flags = 0;
532 u32 epctrl;
533 int ep_num;
534
535 ep = container_of(_ep, struct fsl_ep, ep);
536 if (!_ep || !ep->desc) {
537 VDBG("%s not enabled", _ep ? ep->ep.name : NULL);
538 return -EINVAL;
539 }
540
541 /* disable ep on controller */
542 ep_num = ep_index(ep);
543 epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
544 if (ep_is_in(ep))
545 epctrl &= ~EPCTRL_TX_ENABLE;
546 else
547 epctrl &= ~EPCTRL_RX_ENABLE;
548 fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
549
550 udc = (struct fsl_udc *)ep->udc;
551 spin_lock_irqsave(&udc->lock, flags);
552
553 /* nuke all pending requests (does flush) */
554 nuke(ep, -ESHUTDOWN);
555
7483cff8 556 ep->desc = NULL;
b504882d
LY		 557 ep->stopped = 1;
558 spin_unlock_irqrestore(&udc->lock, flags);
559
560 VDBG("disabled %s OK", _ep->name);
561 return 0;
562}
563
564/*---------------------------------------------------------------------
565 * allocate a request object used by this endpoint
566 * the main operation is to insert the req->queue to the eq->queue
567 * Returns the request, or null if one could not be allocated
568*---------------------------------------------------------------------*/
569static struct usb_request *
570fsl_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
571{
572 struct fsl_req *req = NULL;
573
574 req = kzalloc(sizeof *req, gfp_flags);
575 if (!req)
576 return NULL;
577
578 req->req.dma = DMA_ADDR_INVALID;
579 INIT_LIST_HEAD(&req->queue);
580
581 return &req->req;
582}
583
584static void fsl_free_request(struct usb_ep *_ep, struct usb_request *_req)
585{
586 struct fsl_req *req = NULL;
587
588 req = container_of(_req, struct fsl_req, req);
589
590 if (_req)
591 kfree(req);
592}
593
b504882d 594/*-------------------------------------------------------------------------*/
224b5039 595static void fsl_queue_td(struct fsl_ep *ep, struct fsl_req *req)
b504882d
LY		 596{
597 int i = ep_index(ep) * 2 + ep_is_in(ep);
598 u32 temp, bitmask, tmp_stat;
599 struct ep_queue_head *dQH = &ep->udc->ep_qh[i];
600
601 /* VDBG("QH addr Register 0x%8x", dr_regs->endpointlistaddr);
602 VDBG("ep_qh[%d] addr is 0x%8x", i, (u32)&(ep->udc->ep_qh[i])); */
603
604 bitmask = ep_is_in(ep)
605 ? (1 << (ep_index(ep) + 16))
606 : (1 << (ep_index(ep)));
607
608 /* check if the pipe is empty */
609 if (!(list_empty(&ep->queue))) {
610 /* Add td to the end */
611 struct fsl_req *lastreq;
612 lastreq = list_entry(ep->queue.prev, struct fsl_req, queue);
613 lastreq->tail->next_td_ptr =
614 cpu_to_le32(req->head->td_dma & DTD_ADDR_MASK);
615 /* Read prime bit, if 1 goto done */
616 if (fsl_readl(&dr_regs->endpointprime) & bitmask)
617 goto out;
618
619 do {
620 /* Set ATDTW bit in USBCMD */
621 temp = fsl_readl(&dr_regs->usbcmd);
622 fsl_writel(temp | USB_CMD_ATDTW, &dr_regs->usbcmd);
623
624 /* Read correct status bit */
625 tmp_stat = fsl_readl(&dr_regs->endptstatus) & bitmask;
626
627 } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_ATDTW));
628
629 /* Write ATDTW bit to 0 */
630 temp = fsl_readl(&dr_regs->usbcmd);
631 fsl_writel(temp & ~USB_CMD_ATDTW, &dr_regs->usbcmd);
632
633 if (tmp_stat)
634 goto out;
635 }
636
637 /* Write dQH next pointer and terminate bit to 0 */
638 temp = req->head->td_dma & EP_QUEUE_HEAD_NEXT_POINTER_MASK;
639 dQH->next_dtd_ptr = cpu_to_le32(temp);
640
641 /* Clear active and halt bit */
642 temp = cpu_to_le32(~(EP_QUEUE_HEAD_STATUS_ACTIVE
643 | EP_QUEUE_HEAD_STATUS_HALT));
644 dQH->size_ioc_int_sts &= temp;
645
59097fb7
WN		 646 /* Ensure that updates to the QH will occure before priming. */
647 wmb();
648
b504882d
LY		 649 /* Prime endpoint by writing 1 to ENDPTPRIME */
650 temp = ep_is_in(ep)
651 ? (1 << (ep_index(ep) + 16))
652 : (1 << (ep_index(ep)));
653 fsl_writel(temp, &dr_regs->endpointprime);
654out:
224b5039 655 return;
b504882d
LY		 656}
657
658/* Fill in the dTD structure
659 * @req: request that the transfer belongs to
660 * @length: return actually data length of the dTD
661 * @dma: return dma address of the dTD
662 * @is_last: return flag if it is the last dTD of the request
663 * return: pointer to the built dTD */
664static struct ep_td_struct *fsl_build_dtd(struct fsl_req *req, unsigned *length,
665 dma_addr_t *dma, int *is_last)
666{
667 u32 swap_temp;
668 struct ep_td_struct *dtd;
669
670 /* how big will this transfer be? */
671 *length = min(req->req.length - req->req.actual,
672 (unsigned)EP_MAX_LENGTH_TRANSFER);
673
674 dtd = dma_pool_alloc(udc_controller->td_pool, GFP_KERNEL, dma);
675 if (dtd == NULL)
676 return dtd;
677
678 dtd->td_dma = *dma;
679 /* Clear reserved field */
680 swap_temp = cpu_to_le32(dtd->size_ioc_sts);
681 swap_temp &= ~DTD_RESERVED_FIELDS;
682 dtd->size_ioc_sts = cpu_to_le32(swap_temp);
683
684 /* Init all of buffer page pointers */
685 swap_temp = (u32) (req->req.dma + req->req.actual);
686 dtd->buff_ptr0 = cpu_to_le32(swap_temp);
687 dtd->buff_ptr1 = cpu_to_le32(swap_temp + 0x1000);
688 dtd->buff_ptr2 = cpu_to_le32(swap_temp + 0x2000);
689 dtd->buff_ptr3 = cpu_to_le32(swap_temp + 0x3000);
690 dtd->buff_ptr4 = cpu_to_le32(swap_temp + 0x4000);
691
692 req->req.actual += *length;
693
694 /* zlp is needed if req->req.zero is set */
695 if (req->req.zero) {
696 if (*length == 0 || (*length % req->ep->ep.maxpacket) != 0)
697 *is_last = 1;
698 else
699 *is_last = 0;
700 } else if (req->req.length == req->req.actual)
701 *is_last = 1;
702 else
703 *is_last = 0;
704
705 if ((*is_last) == 0)
bf7409a2 706 VDBG("multi-dtd request!");
b504882d
LY		 707 /* Fill in the transfer size; set active bit */
708 swap_temp = ((*length << DTD_LENGTH_BIT_POS) | DTD_STATUS_ACTIVE);
709
710 /* Enable interrupt for the last dtd of a request */
711 if (*is_last && !req->req.no_interrupt)
712 swap_temp |= DTD_IOC;
713
714 dtd->size_ioc_sts = cpu_to_le32(swap_temp);
715
716 mb();
717
718 VDBG("length = %d address= 0x%x", *length, (int)*dma);
719
720 return dtd;
721}
722
723/* Generate dtd chain for a request */
724static int fsl_req_to_dtd(struct fsl_req *req)
725{
726 unsigned count;
727 int is_last;
728 int is_first =1;
729 struct ep_td_struct *last_dtd = NULL, *dtd;
730 dma_addr_t dma;
731
732 do {
733 dtd = fsl_build_dtd(req, &count, &dma, &is_last);
734 if (dtd == NULL)
735 return -ENOMEM;
736
737 if (is_first) {
738 is_first = 0;
739 req->head = dtd;
740 } else {
741 last_dtd->next_td_ptr = cpu_to_le32(dma);
742 last_dtd->next_td_virt = dtd;
743 }
744 last_dtd = dtd;
745
746 req->dtd_count++;
747 } while (!is_last);
748
749 dtd->next_td_ptr = cpu_to_le32(DTD_NEXT_TERMINATE);
750
751 req->tail = dtd;
752
753 return 0;
754}
755
756/* queues (submits) an I/O request to an endpoint */
757static int
758fsl_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
759{
760 struct fsl_ep *ep = container_of(_ep, struct fsl_ep, ep);
761 struct fsl_req *req = container_of(_req, struct fsl_req, req);
762 struct fsl_udc *udc;
763 unsigned long flags;
764 int is_iso = 0;
765
766 /* catch various bogus parameters */
767 if (!_req || !req->req.complete || !req->req.buf
768 || !list_empty(&req->queue)) {
bf7409a2 769 VDBG("%s, bad params", __func__);
b504882d
LY		 770 return -EINVAL;
771 }
2336a986 772 if (unlikely(!_ep || !ep->desc)) {
bf7409a2 773 VDBG("%s, bad ep", __func__);
b504882d
LY		 774 return -EINVAL;
775 }
776 if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
777 if (req->req.length > ep->ep.maxpacket)
778 return -EMSGSIZE;
779 is_iso = 1;
780 }
781
782 udc = ep->udc;
783 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
784 return -ESHUTDOWN;
785
786 req->ep = ep;
787
788 /* map virtual address to hardware */
789 if (req->req.dma == DMA_ADDR_INVALID) {
790 req->req.dma = dma_map_single(ep->udc->gadget.dev.parent,
791 req->req.buf,
792 req->req.length, ep_is_in(ep)
793 ? DMA_TO_DEVICE
794 : DMA_FROM_DEVICE);
795 req->mapped = 1;
796 } else {
797 dma_sync_single_for_device(ep->udc->gadget.dev.parent,
798 req->req.dma, req->req.length,
799 ep_is_in(ep)
800 ? DMA_TO_DEVICE
801 : DMA_FROM_DEVICE);
802 req->mapped = 0;
803 }
804
805 req->req.status = -EINPROGRESS;
806 req->req.actual = 0;
807 req->dtd_count = 0;
808
809 spin_lock_irqsave(&udc->lock, flags);
810
811 /* build dtds and push them to device queue */
812 if (!fsl_req_to_dtd(req)) {
813 fsl_queue_td(ep, req);
814 } else {
815 spin_unlock_irqrestore(&udc->lock, flags);
816 return -ENOMEM;
817 }
818
819 /* Update ep0 state */
820 if ((ep_index(ep) == 0))
821 udc->ep0_state = DATA_STATE_XMIT;
822
823 /* irq handler advances the queue */
824 if (req != NULL)
825 list_add_tail(&req->queue, &ep->queue);
826 spin_unlock_irqrestore(&udc->lock, flags);
827
828 return 0;
829}
830
831/* dequeues (cancels, unlinks) an I/O request from an endpoint */
832static int fsl_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
833{
834 struct fsl_ep *ep = container_of(_ep, struct fsl_ep, ep);
835 struct fsl_req *req;
836 unsigned long flags;
837 int ep_num, stopped, ret = 0;
838 u32 epctrl;
839
840 if (!_ep || !_req)
841 return -EINVAL;
842
843 spin_lock_irqsave(&ep->udc->lock, flags);
844 stopped = ep->stopped;
845
846 /* Stop the ep before we deal with the queue */
847 ep->stopped = 1;
848 ep_num = ep_index(ep);
849 epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
850 if (ep_is_in(ep))
851 epctrl &= ~EPCTRL_TX_ENABLE;
852 else
853 epctrl &= ~EPCTRL_RX_ENABLE;
854 fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
855
856 /* make sure it's actually queued on this endpoint */
857 list_for_each_entry(req, &ep->queue, queue) {
858 if (&req->req == _req)
859 break;
860 }
861 if (&req->req != _req) {
862 ret = -EINVAL;
863 goto out;
864 }
865
866 /* The request is in progress, or completed but not dequeued */
867 if (ep->queue.next == &req->queue) {
868 _req->status = -ECONNRESET;
869 fsl_ep_fifo_flush(_ep); /* flush current transfer */
870
871 /* The request isn't the last request in this ep queue */
872 if (req->queue.next != &ep->queue) {
873 struct ep_queue_head *qh;
874 struct fsl_req *next_req;
875
876 qh = ep->qh;
877 next_req = list_entry(req->queue.next, struct fsl_req,
878 queue);
879
880 /* Point the QH to the first TD of next request */
881 fsl_writel((u32) next_req->head, &qh->curr_dtd_ptr);
882 }
883
884 /* The request hasn't been processed, patch up the TD chain */
885 } else {
886 struct fsl_req *prev_req;
887
888 prev_req = list_entry(req->queue.prev, struct fsl_req, queue);
889 fsl_writel(fsl_readl(&req->tail->next_td_ptr),
890 &prev_req->tail->next_td_ptr);
891
892 }
893
894 done(ep, req, -ECONNRESET);
895
896 /* Enable EP */
897out: epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
898 if (ep_is_in(ep))
899 epctrl |= EPCTRL_TX_ENABLE;
900 else
901 epctrl |= EPCTRL_RX_ENABLE;
902 fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
903 ep->stopped = stopped;
904
905 spin_unlock_irqrestore(&ep->udc->lock, flags);
906 return ret;
907}
908
909/*-------------------------------------------------------------------------*/
910
911/*-----------------------------------------------------------------
912 * modify the endpoint halt feature
913 * @ep: the non-isochronous endpoint being stalled
914 * @value: 1--set halt 0--clear halt
915 * Returns zero, or a negative error code.
916*----------------------------------------------------------------*/
917static int fsl_ep_set_halt(struct usb_ep *_ep, int value)
918{
919 struct fsl_ep *ep = NULL;
920 unsigned long flags = 0;
921 int status = -EOPNOTSUPP; /* operation not supported */
922 unsigned char ep_dir = 0, ep_num = 0;
923 struct fsl_udc *udc = NULL;
924
925 ep = container_of(_ep, struct fsl_ep, ep);
926 udc = ep->udc;
927 if (!_ep || !ep->desc) {
928 status = -EINVAL;
929 goto out;
930 }
931
932 if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
933 status = -EOPNOTSUPP;
934 goto out;
935 }
936
937 /* Attempt to halt IN ep will fail if any transfer requests
938 * are still queue */
939 if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
940 status = -EAGAIN;
941 goto out;
942 }
943
944 status = 0;
945 ep_dir = ep_is_in(ep) ? USB_SEND : USB_RECV;
946 ep_num = (unsigned char)(ep_index(ep));
947 spin_lock_irqsave(&ep->udc->lock, flags);
948 dr_ep_change_stall(ep_num, ep_dir, value);
949 spin_unlock_irqrestore(&ep->udc->lock, flags);
950
951 if (ep_index(ep) == 0) {
952 udc->ep0_state = WAIT_FOR_SETUP;
953 udc->ep0_dir = 0;
954 }
955out:
956 VDBG(" %s %s halt stat %d", ep->ep.name,
957 value ? "set" : "clear", status);
958
959 return status;
960}
961
962static void fsl_ep_fifo_flush(struct usb_ep *_ep)
963{
964 struct fsl_ep *ep;
965 int ep_num, ep_dir;
966 u32 bits;
967 unsigned long timeout;
968#define FSL_UDC_FLUSH_TIMEOUT 1000
969
970 if (!_ep) {
971 return;
972 } else {
973 ep = container_of(_ep, struct fsl_ep, ep);
974 if (!ep->desc)
975 return;
976 }
977 ep_num = ep_index(ep);
978 ep_dir = ep_is_in(ep) ? USB_SEND : USB_RECV;
979
980 if (ep_num == 0)
981 bits = (1 << 16) | 1;
982 else if (ep_dir == USB_SEND)
983 bits = 1 << (16 + ep_num);
984 else
985 bits = 1 << ep_num;
986
987 timeout = jiffies + FSL_UDC_FLUSH_TIMEOUT;
988 do {
989 fsl_writel(bits, &dr_regs->endptflush);
990
991 /* Wait until flush complete */
992 while (fsl_readl(&dr_regs->endptflush)) {
993 if (time_after(jiffies, timeout)) {
994 ERR("ep flush timeout\n");
995 return;
996 }
997 cpu_relax();
998 }
999 /* See if we need to flush again */
1000 } while (fsl_readl(&dr_regs->endptstatus) & bits);
1001}
1002
1003static struct usb_ep_ops fsl_ep_ops = {
1004 .enable = fsl_ep_enable,
1005 .disable = fsl_ep_disable,
1006
1007 .alloc_request = fsl_alloc_request,
1008 .free_request = fsl_free_request,
1009
b504882d
LY		 1010 .queue = fsl_ep_queue,
1011 .dequeue = fsl_ep_dequeue,
1012
1013 .set_halt = fsl_ep_set_halt,
1014 .fifo_flush = fsl_ep_fifo_flush, /* flush fifo */
1015};
1016
1017/*-------------------------------------------------------------------------
1018 Gadget Driver Layer Operations
1019-------------------------------------------------------------------------*/
1020
1021/*----------------------------------------------------------------------
1022 * Get the current frame number (from DR frame_index Reg )
1023 *----------------------------------------------------------------------*/
1024static int fsl_get_frame(struct usb_gadget *gadget)
1025{
1026 return (int)(fsl_readl(&dr_regs->frindex) & USB_FRINDEX_MASKS);
1027}
1028
1029/*-----------------------------------------------------------------------
1030 * Tries to wake up the host connected to this gadget
1031 -----------------------------------------------------------------------*/
1032static int fsl_wakeup(struct usb_gadget *gadget)
1033{
1034 struct fsl_udc *udc = container_of(gadget, struct fsl_udc, gadget);
1035 u32 portsc;
1036
1037 /* Remote wakeup feature not enabled by host */
1038 if (!udc->remote_wakeup)
1039 return -ENOTSUPP;
1040
1041 portsc = fsl_readl(&dr_regs->portsc1);
1042 /* not suspended? */
1043 if (!(portsc & PORTSCX_PORT_SUSPEND))
1044 return 0;
1045 /* trigger force resume */
1046 portsc |= PORTSCX_PORT_FORCE_RESUME;
1047 fsl_writel(portsc, &dr_regs->portsc1);
1048 return 0;
1049}
1050
1051static int can_pullup(struct fsl_udc *udc)
1052{
1053 return udc->driver && udc->softconnect && udc->vbus_active;
1054}
1055
1056/* Notify controller that VBUS is powered, Called by whatever
1057 detects VBUS sessions */
1058static int fsl_vbus_session(struct usb_gadget *gadget, int is_active)
1059{
1060 struct fsl_udc *udc;
1061 unsigned long flags;
1062
1063 udc = container_of(gadget, struct fsl_udc, gadget);
1064 spin_lock_irqsave(&udc->lock, flags);
bf7409a2 1065 VDBG("VBUS %s", is_active ? "on" : "off");
b504882d
LY		 1066 udc->vbus_active = (is_active != 0);
1067 if (can_pullup(udc))
1068 fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP),
1069 &dr_regs->usbcmd);
1070 else
1071 fsl_writel((fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP),
1072 &dr_regs->usbcmd);
1073 spin_unlock_irqrestore(&udc->lock, flags);
1074 return 0;
1075}
1076
1077/* constrain controller's VBUS power usage
1078 * This call is used by gadget drivers during SET_CONFIGURATION calls,
1079 * reporting how much power the device may consume. For example, this
1080 * could affect how quickly batteries are recharged.
1081 *
1082 * Returns zero on success, else negative errno.
1083 */
1084static int fsl_vbus_draw(struct usb_gadget *gadget, unsigned mA)
1085{
b504882d
LY		 1086 struct fsl_udc *udc;
1087
1088 udc = container_of(gadget, struct fsl_udc, gadget);
b504882d
LY		 1089 if (udc->transceiver)
1090 return otg_set_power(udc->transceiver, mA);
b504882d
LY		 1091 return -ENOTSUPP;
1092}
1093
1094/* Change Data+ pullup status
1095 * this func is used by usb_gadget_connect/disconnet
1096 */
1097static int fsl_pullup(struct usb_gadget *gadget, int is_on)
1098{
1099 struct fsl_udc *udc;
1100
1101 udc = container_of(gadget, struct fsl_udc, gadget);
1102 udc->softconnect = (is_on != 0);
1103 if (can_pullup(udc))
1104 fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP),
1105 &dr_regs->usbcmd);
1106 else
1107 fsl_writel((fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP),
1108 &dr_regs->usbcmd);
1109
1110 return 0;
1111}
1112
9454a57a 1113/* defined in gadget.h */
b504882d
LY		 1114static struct usb_gadget_ops fsl_gadget_ops = {
1115 .get_frame = fsl_get_frame,
1116 .wakeup = fsl_wakeup,
1117/* .set_selfpowered = fsl_set_selfpowered, */ /* Always selfpowered */
1118 .vbus_session = fsl_vbus_session,
1119 .vbus_draw = fsl_vbus_draw,
1120 .pullup = fsl_pullup,
1121};
1122
1123/* Set protocol stall on ep0, protocol stall will automatically be cleared
1124 on new transaction */
1125static void ep0stall(struct fsl_udc *udc)
1126{
1127 u32 tmp;
1128
1129 /* must set tx and rx to stall at the same time */
1130 tmp = fsl_readl(&dr_regs->endptctrl[0]);
1131 tmp |= EPCTRL_TX_EP_STALL | EPCTRL_RX_EP_STALL;
1132 fsl_writel(tmp, &dr_regs->endptctrl[0]);
1133 udc->ep0_state = WAIT_FOR_SETUP;
1134 udc->ep0_dir = 0;
1135}
1136
1137/* Prime a status phase for ep0 */
1138static int ep0_prime_status(struct fsl_udc *udc, int direction)
1139{
1140 struct fsl_req *req = udc->status_req;
1141 struct fsl_ep *ep;
b504882d
LY		 1142
1143 if (direction == EP_DIR_IN)
1144 udc->ep0_dir = USB_DIR_IN;
1145 else
1146 udc->ep0_dir = USB_DIR_OUT;
1147
1148 ep = &udc->eps[0];
1149 udc->ep0_state = WAIT_FOR_OUT_STATUS;
1150
1151 req->ep = ep;
1152 req->req.length = 0;
1153 req->req.status = -EINPROGRESS;
1154 req->req.actual = 0;
1155 req->req.complete = NULL;
1156 req->dtd_count = 0;
1157
1158 if (fsl_req_to_dtd(req) == 0)
224b5039 1159 fsl_queue_td(ep, req);
b504882d
LY		 1160 else
1161 return -ENOMEM;
1162
b504882d
LY		 1163 list_add_tail(&req->queue, &ep->queue);
1164
224b5039 1165 return 0;
b504882d
LY		 1166}
1167
825bee3a 1168static void udc_reset_ep_queue(struct fsl_udc *udc, u8 pipe)
b504882d
LY		 1169{
1170 struct fsl_ep *ep = get_ep_by_pipe(udc, pipe);
1171
825bee3a
WN		 1172 if (ep->name)
1173 nuke(ep, -ESHUTDOWN);
b504882d
LY		 1174}
1175
1176/*
1177 * ch9 Set address
1178 */
1179static void ch9setaddress(struct fsl_udc *udc, u16 value, u16 index, u16 length)
1180{
1181 /* Save the new address to device struct */
1182 udc->device_address = (u8) value;
1183 /* Update usb state */
1184 udc->usb_state = USB_STATE_ADDRESS;
1185 /* Status phase */
1186 if (ep0_prime_status(udc, EP_DIR_IN))
1187 ep0stall(udc);
1188}
1189
1190/*
1191 * ch9 Get status
1192 */
1193static void ch9getstatus(struct fsl_udc *udc, u8 request_type, u16 value,
1194 u16 index, u16 length)
1195{
1196 u16 tmp = 0; /* Status, cpu endian */
b504882d
LY		 1197 struct fsl_req *req;
1198 struct fsl_ep *ep;
b504882d
LY		 1199
1200 ep = &udc->eps[0];
1201
1202 if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1203 /* Get device status */
1204 tmp = 1 << USB_DEVICE_SELF_POWERED;
1205 tmp |= udc->remote_wakeup << USB_DEVICE_REMOTE_WAKEUP;
1206 } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
1207 /* Get interface status */
1208 /* We don't have interface information in udc driver */
1209 tmp = 0;
1210 } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
1211 /* Get endpoint status */
1212 struct fsl_ep *target_ep;
1213
1214 target_ep = get_ep_by_pipe(udc, get_pipe_by_windex(index));
1215
1216 /* stall if endpoint doesn't exist */
1217 if (!target_ep->desc)
1218 goto stall;
1219 tmp = dr_ep_get_stall(ep_index(target_ep), ep_is_in(target_ep))
1220 << USB_ENDPOINT_HALT;
1221 }
1222
1223 udc->ep0_dir = USB_DIR_IN;
1224 /* Borrow the per device status_req */
1225 req = udc->status_req;
1226 /* Fill in the reqest structure */
1227 *((u16 *) req->req.buf) = cpu_to_le16(tmp);
1228 req->ep = ep;
1229 req->req.length = 2;
1230 req->req.status = -EINPROGRESS;
1231 req->req.actual = 0;
1232 req->req.complete = NULL;
1233 req->dtd_count = 0;
1234
1235 /* prime the data phase */
1236 if ((fsl_req_to_dtd(req) == 0))
224b5039 1237 fsl_queue_td(ep, req);
b504882d
LY		 1238 else /* no mem */
1239 goto stall;
1240
b504882d
LY		 1241 list_add_tail(&req->queue, &ep->queue);
1242 udc->ep0_state = DATA_STATE_XMIT;
1243 return;
1244stall:
1245 ep0stall(udc);
1246}
1247
1248static void setup_received_irq(struct fsl_udc *udc,
1249 struct usb_ctrlrequest *setup)
1250{
1251 u16 wValue = le16_to_cpu(setup->wValue);
1252 u16 wIndex = le16_to_cpu(setup->wIndex);
1253 u16 wLength = le16_to_cpu(setup->wLength);
1254
1255 udc_reset_ep_queue(udc, 0);
1256
39d1f8c9 1257 /* We process some stardard setup requests here */
b504882d 1258 switch (setup->bRequest) {
b504882d 1259 case USB_REQ_GET_STATUS:
39d1f8c9
LY		 1260 /* Data+Status phase from udc */
1261 if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
b504882d
LY		 1262 != (USB_DIR_IN | USB_TYPE_STANDARD))
1263 break;
1264 ch9getstatus(udc, setup->bRequestType, wValue, wIndex, wLength);
39d1f8c9 1265 return;
b504882d 1266
b504882d 1267 case USB_REQ_SET_ADDRESS:
39d1f8c9 1268 /* Status phase from udc */
b504882d
LY		 1269 if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD
1270 | USB_RECIP_DEVICE))
1271 break;
1272 ch9setaddress(udc, wValue, wIndex, wLength);
39d1f8c9 1273 return;
b504882d 1274
b504882d
LY		 1275 case USB_REQ_CLEAR_FEATURE:
1276 case USB_REQ_SET_FEATURE:
39d1f8c9
LY		 1277 /* Status phase from udc */
1278 {
b504882d
LY		 1279 int rc = -EOPNOTSUPP;
1280
39d1f8c9
LY		 1281 if ((setup->bRequestType & (USB_RECIP_MASK | USB_TYPE_MASK))
1282 == (USB_RECIP_ENDPOINT | USB_TYPE_STANDARD)) {
b504882d
LY		 1283 int pipe = get_pipe_by_windex(wIndex);
1284 struct fsl_ep *ep;
1285
1286 if (wValue != 0 || wLength != 0 || pipe > udc->max_ep)
1287 break;
1288 ep = get_ep_by_pipe(udc, pipe);
1289
1290 spin_unlock(&udc->lock);
1291 rc = fsl_ep_set_halt(&ep->ep,
1292 (setup->bRequest == USB_REQ_SET_FEATURE)
1293 ? 1 : 0);
1294 spin_lock(&udc->lock);
1295
39d1f8c9
LY		 1296 } else if ((setup->bRequestType & (USB_RECIP_MASK
1297 | USB_TYPE_MASK)) == (USB_RECIP_DEVICE
1298 | USB_TYPE_STANDARD)) {
b504882d
LY		 1299 /* Note: The driver has not include OTG support yet.
1300 * This will be set when OTG support is added */
3bf44688 1301 if (!gadget_is_otg(&udc->gadget))
b504882d
LY		 1302 break;
1303 else if (setup->bRequest == USB_DEVICE_B_HNP_ENABLE)
1304 udc->gadget.b_hnp_enable = 1;
1305 else if (setup->bRequest == USB_DEVICE_A_HNP_SUPPORT)
1306 udc->gadget.a_hnp_support = 1;
1307 else if (setup->bRequest ==
1308 USB_DEVICE_A_ALT_HNP_SUPPORT)
1309 udc->gadget.a_alt_hnp_support = 1;
a4e3ef55
DB		 1310 else
1311 break;
b504882d 1312 rc = 0;
39d1f8c9
LY		 1313 } else
1314 break;
1315
b504882d
LY		 1316 if (rc == 0) {
1317 if (ep0_prime_status(udc, EP_DIR_IN))
1318 ep0stall(udc);
1319 }
39d1f8c9 1320 return;
b504882d 1321 }
b504882d 1322
39d1f8c9 1323 default:
b504882d
LY		 1324 break;
1325 }
39d1f8c9
LY		 1326
1327 /* Requests handled by gadget */
1328 if (wLength) {
1329 /* Data phase from gadget, status phase from udc */
1330 udc->ep0_dir = (setup->bRequestType & USB_DIR_IN)
1331 ? USB_DIR_IN : USB_DIR_OUT;
1332 spin_unlock(&udc->lock);
1333 if (udc->driver->setup(&udc->gadget,
1334 &udc->local_setup_buff) < 0)
1335 ep0stall(udc);
1336 spin_lock(&udc->lock);
1337 udc->ep0_state = (setup->bRequestType & USB_DIR_IN)
1338 ? DATA_STATE_XMIT : DATA_STATE_RECV;
1339 } else {
1340 /* No data phase, IN status from gadget */
1341 udc->ep0_dir = USB_DIR_IN;
1342 spin_unlock(&udc->lock);
1343 if (udc->driver->setup(&udc->gadget,
1344 &udc->local_setup_buff) < 0)
1345 ep0stall(udc);
1346 spin_lock(&udc->lock);
1347 udc->ep0_state = WAIT_FOR_OUT_STATUS;
1348 }
b504882d
LY		 1349}
1350
1351/* Process request for Data or Status phase of ep0
1352 * prime status phase if needed */
1353static void ep0_req_complete(struct fsl_udc *udc, struct fsl_ep *ep0,
1354 struct fsl_req *req)
1355{
1356 if (udc->usb_state == USB_STATE_ADDRESS) {
1357 /* Set the new address */
1358 u32 new_address = (u32) udc->device_address;
1359 fsl_writel(new_address << USB_DEVICE_ADDRESS_BIT_POS,
1360 &dr_regs->deviceaddr);
1361 }
1362
1363 done(ep0, req, 0);
1364
1365 switch (udc->ep0_state) {
1366 case DATA_STATE_XMIT:
1367 /* receive status phase */
1368 if (ep0_prime_status(udc, EP_DIR_OUT))
1369 ep0stall(udc);
1370 break;
1371 case DATA_STATE_RECV:
1372 /* send status phase */
1373 if (ep0_prime_status(udc, EP_DIR_IN))
1374 ep0stall(udc);
1375 break;
1376 case WAIT_FOR_OUT_STATUS:
1377 udc->ep0_state = WAIT_FOR_SETUP;
1378 break;
1379 case WAIT_FOR_SETUP:
bf7409a2 1380 ERR("Unexpect ep0 packets\n");
b504882d
LY		 1381 break;
1382 default:
1383 ep0stall(udc);
1384 break;
1385 }
1386}
1387
1388/* Tripwire mechanism to ensure a setup packet payload is extracted without
1389 * being corrupted by another incoming setup packet */
1390static void tripwire_handler(struct fsl_udc *udc, u8 ep_num, u8 *buffer_ptr)
1391{
1392 u32 temp;
1393 struct ep_queue_head *qh;
1394
1395 qh = &udc->ep_qh[ep_num * 2 + EP_DIR_OUT];
1396
1397 /* Clear bit in ENDPTSETUPSTAT */
1398 temp = fsl_readl(&dr_regs->endptsetupstat);
1399 fsl_writel(temp | (1 << ep_num), &dr_regs->endptsetupstat);
1400
1401 /* while a hazard exists when setup package arrives */
1402 do {
1403 /* Set Setup Tripwire */
1404 temp = fsl_readl(&dr_regs->usbcmd);
1405 fsl_writel(temp | USB_CMD_SUTW, &dr_regs->usbcmd);
1406
1407 /* Copy the setup packet to local buffer */
1408 memcpy(buffer_ptr, (u8 *) qh->setup_buffer, 8);
1409 } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_SUTW));
1410
1411 /* Clear Setup Tripwire */
1412 temp = fsl_readl(&dr_regs->usbcmd);
1413 fsl_writel(temp & ~USB_CMD_SUTW, &dr_regs->usbcmd);
1414}
1415
1416/* process-ep_req(): free the completed Tds for this req */
1417static int process_ep_req(struct fsl_udc *udc, int pipe,
1418 struct fsl_req *curr_req)
1419{
1420 struct ep_td_struct *curr_td;
1421 int td_complete, actual, remaining_length, j, tmp;
1422 int status = 0;
1423 int errors = 0;
1424 struct ep_queue_head *curr_qh = &udc->ep_qh[pipe];
1425 int direction = pipe % 2;
1426
1427 curr_td = curr_req->head;
1428 td_complete = 0;
1429 actual = curr_req->req.length;
1430
1431 for (j = 0; j < curr_req->dtd_count; j++) {
1432 remaining_length = (le32_to_cpu(curr_td->size_ioc_sts)
1433 & DTD_PACKET_SIZE)
1434 >> DTD_LENGTH_BIT_POS;
1435 actual -= remaining_length;
1436
1437 if ((errors = le32_to_cpu(curr_td->size_ioc_sts) &
1438 DTD_ERROR_MASK)) {
1439 if (errors & DTD_STATUS_HALTED) {
1440 ERR("dTD error %08x QH=%d\n", errors, pipe);
1441 /* Clear the errors and Halt condition */
1442 tmp = le32_to_cpu(curr_qh->size_ioc_int_sts);
1443 tmp &= ~errors;
1444 curr_qh->size_ioc_int_sts = cpu_to_le32(tmp);
1445 status = -EPIPE;
1446 /* FIXME: continue with next queued TD? */
1447
1448 break;
1449 }
1450 if (errors & DTD_STATUS_DATA_BUFF_ERR) {
1451 VDBG("Transfer overflow");
1452 status = -EPROTO;
1453 break;
1454 } else if (errors & DTD_STATUS_TRANSACTION_ERR) {
1455 VDBG("ISO error");
1456 status = -EILSEQ;
1457 break;
1458 } else
bf7409a2 1459 ERR("Unknown error has occured (0x%x)!\n",
b504882d
LY		 1460 errors);
1461
1462 } else if (le32_to_cpu(curr_td->size_ioc_sts)
1463 & DTD_STATUS_ACTIVE) {
1464 VDBG("Request not complete");
1465 status = REQ_UNCOMPLETE;
1466 return status;
1467 } else if (remaining_length) {
1468 if (direction) {
1469 VDBG("Transmit dTD remaining length not zero");
1470 status = -EPROTO;
1471 break;
1472 } else {
1473 td_complete++;
1474 break;
1475 }
1476 } else {
1477 td_complete++;
bf7409a2 1478 VDBG("dTD transmitted successful");
b504882d
LY		 1479 }
1480
1481 if (j != curr_req->dtd_count - 1)
1482 curr_td = (struct ep_td_struct *)curr_td->next_td_virt;
1483 }
1484
1485 if (status)
1486 return status;
1487
1488 curr_req->req.actual = actual;
1489
1490 return 0;
1491}
1492
1493/* Process a DTD completion interrupt */
1494static void dtd_complete_irq(struct fsl_udc *udc)
1495{
1496 u32 bit_pos;
1497 int i, ep_num, direction, bit_mask, status;
1498 struct fsl_ep *curr_ep;
1499 struct fsl_req *curr_req, *temp_req;
1500
1501 /* Clear the bits in the register */
1502 bit_pos = fsl_readl(&dr_regs->endptcomplete);
1503 fsl_writel(bit_pos, &dr_regs->endptcomplete);
1504
1505 if (!bit_pos)
1506 return;
1507
1508 for (i = 0; i < udc->max_ep * 2; i++) {
1509 ep_num = i >> 1;
1510 direction = i % 2;
1511
1512 bit_mask = 1 << (ep_num + 16 * direction);
1513
1514 if (!(bit_pos & bit_mask))
1515 continue;
1516
1517 curr_ep = get_ep_by_pipe(udc, i);
1518
1519 /* If the ep is configured */
1520 if (curr_ep->name == NULL) {
b6c63937 1521 WARNING("Invalid EP?");
b504882d
LY		 1522 continue;
1523 }
1524
1525 /* process the req queue until an uncomplete request */
1526 list_for_each_entry_safe(curr_req, temp_req, &curr_ep->queue,
1527 queue) {
1528 status = process_ep_req(udc, i, curr_req);
1529
1530 VDBG("status of process_ep_req= %d, ep = %d",
1531 status, ep_num);
1532 if (status == REQ_UNCOMPLETE)
1533 break;
1534 /* write back status to req */
1535 curr_req->req.status = status;
1536
1537 if (ep_num == 0) {
1538 ep0_req_complete(udc, curr_ep, curr_req);
1539 break;
1540 } else
1541 done(curr_ep, curr_req, status);
1542 }
1543 }
1544}
1545
1546/* Process a port change interrupt */
1547static void port_change_irq(struct fsl_udc *udc)
1548{
1549 u32 speed;
1550
b504882d
LY		 1551 /* Bus resetting is finished */
1552 if (!(fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET)) {
1553 /* Get the speed */
1554 speed = (fsl_readl(&dr_regs->portsc1)
1555 & PORTSCX_PORT_SPEED_MASK);
1556 switch (speed) {
1557 case PORTSCX_PORT_SPEED_HIGH:
1558 udc->gadget.speed = USB_SPEED_HIGH;
1559 break;
1560 case PORTSCX_PORT_SPEED_FULL:
1561 udc->gadget.speed = USB_SPEED_FULL;
1562 break;
1563 case PORTSCX_PORT_SPEED_LOW:
1564 udc->gadget.speed = USB_SPEED_LOW;
1565 break;
1566 default:
1567 udc->gadget.speed = USB_SPEED_UNKNOWN;
1568 break;
1569 }
1570 }
1571
1572 /* Update USB state */
1573 if (!udc->resume_state)
1574 udc->usb_state = USB_STATE_DEFAULT;
1575}
1576
1577/* Process suspend interrupt */
1578static void suspend_irq(struct fsl_udc *udc)
1579{
1580 udc->resume_state = udc->usb_state;
1581 udc->usb_state = USB_STATE_SUSPENDED;
1582
1583 /* report suspend to the driver, serial.c does not support this */
1584 if (udc->driver->suspend)
1585 udc->driver->suspend(&udc->gadget);
1586}
1587
1588static void bus_resume(struct fsl_udc *udc)
1589{
1590 udc->usb_state = udc->resume_state;
1591 udc->resume_state = 0;
1592
1593 /* report resume to the driver, serial.c does not support this */
1594 if (udc->driver->resume)
1595 udc->driver->resume(&udc->gadget);
1596}
1597
1598/* Clear up all ep queues */
1599static int reset_queues(struct fsl_udc *udc)
1600{
1601 u8 pipe;
1602
1603 for (pipe = 0; pipe < udc->max_pipes; pipe++)
1604 udc_reset_ep_queue(udc, pipe);
1605
1606 /* report disconnect; the driver is already quiesced */
185e3dea 1607 spin_unlock(&udc->lock);
b504882d 1608 udc->driver->disconnect(&udc->gadget);
185e3dea 1609 spin_lock(&udc->lock);
b504882d
LY		 1610
1611 return 0;
1612}
1613
1614/* Process reset interrupt */
1615static void reset_irq(struct fsl_udc *udc)
1616{
1617 u32 temp;
1618 unsigned long timeout;
1619
1620 /* Clear the device address */
1621 temp = fsl_readl(&dr_regs->deviceaddr);
1622 fsl_writel(temp & ~USB_DEVICE_ADDRESS_MASK, &dr_regs->deviceaddr);
1623
1624 udc->device_address = 0;
1625
1626 /* Clear usb state */
1627 udc->resume_state = 0;
1628 udc->ep0_dir = 0;
1629 udc->ep0_state = WAIT_FOR_SETUP;
1630 udc->remote_wakeup = 0; /* default to 0 on reset */
1631 udc->gadget.b_hnp_enable = 0;
1632 udc->gadget.a_hnp_support = 0;
1633 udc->gadget.a_alt_hnp_support = 0;
1634
1635 /* Clear all the setup token semaphores */
1636 temp = fsl_readl(&dr_regs->endptsetupstat);
1637 fsl_writel(temp, &dr_regs->endptsetupstat);
1638
1639 /* Clear all the endpoint complete status bits */
1640 temp = fsl_readl(&dr_regs->endptcomplete);
1641 fsl_writel(temp, &dr_regs->endptcomplete);
1642
1643 timeout = jiffies + 100;
1644 while (fsl_readl(&dr_regs->endpointprime)) {
1645 /* Wait until all endptprime bits cleared */
1646 if (time_after(jiffies, timeout)) {
1647 ERR("Timeout for reset\n");
1648 break;
1649 }
1650 cpu_relax();
1651 }
1652
1653 /* Write 1s to the flush register */
1654 fsl_writel(0xffffffff, &dr_regs->endptflush);
1655
1656 if (fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET) {
1657 VDBG("Bus reset");
b504882d
LY		 1658 /* Reset all the queues, include XD, dTD, EP queue
1659 * head and TR Queue */
1660 reset_queues(udc);
1661 udc->usb_state = USB_STATE_DEFAULT;
1662 } else {
1663 VDBG("Controller reset");
1664 /* initialize usb hw reg except for regs for EP, not
1665 * touch usbintr reg */
1666 dr_controller_setup(udc);
1667
1668 /* Reset all internal used Queues */
1669 reset_queues(udc);
1670
1671 ep0_setup(udc);
1672
1673 /* Enable DR IRQ reg, Set Run bit, change udc state */
1674 dr_controller_run(udc);
1675 udc->usb_state = USB_STATE_ATTACHED;
1676 }
1677}
1678
1679/*
1680 * USB device controller interrupt handler
1681 */
1682static irqreturn_t fsl_udc_irq(int irq, void *_udc)
1683{
1684 struct fsl_udc *udc = _udc;
1685 u32 irq_src;
1686 irqreturn_t status = IRQ_NONE;
1687 unsigned long flags;
1688
1689 /* Disable ISR for OTG host mode */
1690 if (udc->stopped)
1691 return IRQ_NONE;
1692 spin_lock_irqsave(&udc->lock, flags);
1693 irq_src = fsl_readl(&dr_regs->usbsts) & fsl_readl(&dr_regs->usbintr);
1694 /* Clear notification bits */
1695 fsl_writel(irq_src, &dr_regs->usbsts);
1696
1697 /* VDBG("irq_src [0x%8x]", irq_src); */
1698
1699 /* Need to resume? */
1700 if (udc->usb_state == USB_STATE_SUSPENDED)
1701 if ((fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_SUSPEND) == 0)
1702 bus_resume(udc);
1703
1704 /* USB Interrupt */
1705 if (irq_src & USB_STS_INT) {
1706 VDBG("Packet int");
1707 /* Setup package, we only support ep0 as control ep */
1708 if (fsl_readl(&dr_regs->endptsetupstat) & EP_SETUP_STATUS_EP0) {
1709 tripwire_handler(udc, 0,
1710 (u8 *) (&udc->local_setup_buff));
1711 setup_received_irq(udc, &udc->local_setup_buff);
1712 status = IRQ_HANDLED;
1713 }
1714
1715 /* completion of dtd */
1716 if (fsl_readl(&dr_regs->endptcomplete)) {
1717 dtd_complete_irq(udc);
1718 status = IRQ_HANDLED;
1719 }
1720 }
1721
1722 /* SOF (for ISO transfer) */
1723 if (irq_src & USB_STS_SOF) {
1724 status = IRQ_HANDLED;
1725 }
1726
1727 /* Port Change */
1728 if (irq_src & USB_STS_PORT_CHANGE) {
1729 port_change_irq(udc);
1730 status = IRQ_HANDLED;
1731 }
1732
1733 /* Reset Received */
1734 if (irq_src & USB_STS_RESET) {
1735 reset_irq(udc);
1736 status = IRQ_HANDLED;
1737 }
1738
1739 /* Sleep Enable (Suspend) */
1740 if (irq_src & USB_STS_SUSPEND) {
1741 suspend_irq(udc);
1742 status = IRQ_HANDLED;
1743 }
1744
1745 if (irq_src & (USB_STS_ERR | USB_STS_SYS_ERR)) {
bf7409a2 1746 VDBG("Error IRQ %x", irq_src);
b504882d
LY		 1747 }
1748
1749 spin_unlock_irqrestore(&udc->lock, flags);
1750 return status;
1751}
1752
1753/*----------------------------------------------------------------*
1754 * Hook to gadget drivers
1755 * Called by initialization code of gadget drivers
1756*----------------------------------------------------------------*/
1757int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1758{
1759 int retval = -ENODEV;
1760 unsigned long flags = 0;
1761
1762 if (!udc_controller)
1763 return -ENODEV;
1764
1765 if (!driver || (driver->speed != USB_SPEED_FULL
1766 && driver->speed != USB_SPEED_HIGH)
1767 || !driver->bind || !driver->disconnect
1768 || !driver->setup)
1769 return -EINVAL;
1770
1771 if (udc_controller->driver)
1772 return -EBUSY;
1773
1774 /* lock is needed but whether should use this lock or another */
1775 spin_lock_irqsave(&udc_controller->lock, flags);
1776
7483cff8 1777 driver->driver.bus = NULL;
b504882d
LY		 1778 /* hook up the driver */
1779 udc_controller->driver = driver;
1780 udc_controller->gadget.dev.driver = &driver->driver;
1781 spin_unlock_irqrestore(&udc_controller->lock, flags);
1782
1783 /* bind udc driver to gadget driver */
1784 retval = driver->bind(&udc_controller->gadget);
1785 if (retval) {
1786 VDBG("bind to %s --> %d", driver->driver.name, retval);
7483cff8
WN		 1787 udc_controller->gadget.dev.driver = NULL;
1788 udc_controller->driver = NULL;
b504882d
LY		 1789 goto out;
1790 }
1791
1792 /* Enable DR IRQ reg and Set usbcmd reg Run bit */
1793 dr_controller_run(udc_controller);
1794 udc_controller->usb_state = USB_STATE_ATTACHED;
1795 udc_controller->ep0_state = WAIT_FOR_SETUP;
1796 udc_controller->ep0_dir = 0;
bf7409a2 1797 printk(KERN_INFO "%s: bind to driver %s\n",
b504882d
LY		 1798 udc_controller->gadget.name, driver->driver.name);
1799
1800out:
1801 if (retval)
bf7409a2 1802 printk("gadget driver register failed %d\n", retval);
b504882d
LY		 1803 return retval;
1804}
1805EXPORT_SYMBOL(usb_gadget_register_driver);
1806
1807/* Disconnect from gadget driver */
1808int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1809{
1810 struct fsl_ep *loop_ep;
1811 unsigned long flags;
1812
1813 if (!udc_controller)
1814 return -ENODEV;
1815
1816 if (!driver || driver != udc_controller->driver || !driver->unbind)
1817 return -EINVAL;
1818
b504882d 1819 if (udc_controller->transceiver)
7483cff8 1820 otg_set_peripheral(udc_controller->transceiver, NULL);
b504882d
LY		 1821
1822 /* stop DR, disable intr */
1823 dr_controller_stop(udc_controller);
1824
1825 /* in fact, no needed */
1826 udc_controller->usb_state = USB_STATE_ATTACHED;
1827 udc_controller->ep0_state = WAIT_FOR_SETUP;
1828 udc_controller->ep0_dir = 0;
1829
1830 /* stand operation */
1831 spin_lock_irqsave(&udc_controller->lock, flags);
1832 udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
1833 nuke(&udc_controller->eps[0], -ESHUTDOWN);
1834 list_for_each_entry(loop_ep, &udc_controller->gadget.ep_list,
1835 ep.ep_list)
1836 nuke(loop_ep, -ESHUTDOWN);
1837 spin_unlock_irqrestore(&udc_controller->lock, flags);
1838
1839 /* unbind gadget and unhook driver. */
1840 driver->unbind(&udc_controller->gadget);
7483cff8
WN		 1841 udc_controller->gadget.dev.driver = NULL;
1842 udc_controller->driver = NULL;
b504882d 1843
bf7409a2 1844 printk("unregistered gadget driver '%s'\n", driver->driver.name);
b504882d
LY		 1845 return 0;
1846}
1847EXPORT_SYMBOL(usb_gadget_unregister_driver);
1848
1849/*-------------------------------------------------------------------------
1850 PROC File System Support
1851-------------------------------------------------------------------------*/
1852#ifdef CONFIG_USB_GADGET_DEBUG_FILES
1853
1854#include <linux/seq_file.h>
1855
1856static const char proc_filename[] = "driver/fsl_usb2_udc";
1857
1858static int fsl_proc_read(char *page, char **start, off_t off, int count,
1859 int *eof, void *_dev)
1860{
1861 char *buf = page;
1862 char *next = buf;
1863 unsigned size = count;
1864 unsigned long flags;
1865 int t, i;
1866 u32 tmp_reg;
1867 struct fsl_ep *ep = NULL;
1868 struct fsl_req *req;
1869
1870 struct fsl_udc *udc = udc_controller;
1871 if (off != 0)
1872 return 0;
1873
1874 spin_lock_irqsave(&udc->lock, flags);
1875
dc0d5c1e 1876 /* ------basic driver information ---- */
b504882d
LY		 1877 t = scnprintf(next, size,
1878 DRIVER_DESC "\n"
1879 "%s version: %s\n"
1880 "Gadget driver: %s\n\n",
1881 driver_name, DRIVER_VERSION,
1882 udc->driver ? udc->driver->driver.name : "(none)");
1883 size -= t;
1884 next += t;
1885
1886 /* ------ DR Registers ----- */
1887 tmp_reg = fsl_readl(&dr_regs->usbcmd);
1888 t = scnprintf(next, size,
1889 "USBCMD reg:\n"
1890 "SetupTW: %d\n"
1891 "Run/Stop: %s\n\n",
1892 (tmp_reg & USB_CMD_SUTW) ? 1 : 0,
1893 (tmp_reg & USB_CMD_RUN_STOP) ? "Run" : "Stop");
1894 size -= t;
1895 next += t;
1896
1897 tmp_reg = fsl_readl(&dr_regs->usbsts);
1898 t = scnprintf(next, size,
1899 "USB Status Reg:\n"
9d9d88c8 1900 "Dr Suspend: %d Reset Received: %d System Error: %s "
b504882d
LY		 1901 "USB Error Interrupt: %s\n\n",
1902 (tmp_reg & USB_STS_SUSPEND) ? 1 : 0,
1903 (tmp_reg & USB_STS_RESET) ? 1 : 0,
1904 (tmp_reg & USB_STS_SYS_ERR) ? "Err" : "Normal",
1905 (tmp_reg & USB_STS_ERR) ? "Err detected" : "No err");
1906 size -= t;
1907 next += t;
1908
1909 tmp_reg = fsl_readl(&dr_regs->usbintr);
1910 t = scnprintf(next, size,
1911 "USB Intrrupt Enable Reg:\n"
9d9d88c8 1912 "Sleep Enable: %d SOF Received Enable: %d "
b504882d 1913 "Reset Enable: %d\n"
9d9d88c8 1914 "System Error Enable: %d "
b504882d 1915 "Port Change Dectected Enable: %d\n"
9d9d88c8 1916 "USB Error Intr Enable: %d USB Intr Enable: %d\n\n",
b504882d
LY		 1917 (tmp_reg & USB_INTR_DEVICE_SUSPEND) ? 1 : 0,
1918 (tmp_reg & USB_INTR_SOF_EN) ? 1 : 0,
1919 (tmp_reg & USB_INTR_RESET_EN) ? 1 : 0,
1920 (tmp_reg & USB_INTR_SYS_ERR_EN) ? 1 : 0,
1921 (tmp_reg & USB_INTR_PTC_DETECT_EN) ? 1 : 0,
1922 (tmp_reg & USB_INTR_ERR_INT_EN) ? 1 : 0,
1923 (tmp_reg & USB_INTR_INT_EN) ? 1 : 0);
1924 size -= t;
1925 next += t;
1926
1927 tmp_reg = fsl_readl(&dr_regs->frindex);
1928 t = scnprintf(next, size,
9d9d88c8 1929 "USB Frame Index Reg: Frame Number is 0x%x\n\n",
b504882d
LY		 1930 (tmp_reg & USB_FRINDEX_MASKS));
1931 size -= t;
1932 next += t;
1933
1934 tmp_reg = fsl_readl(&dr_regs->deviceaddr);
1935 t = scnprintf(next, size,
9d9d88c8 1936 "USB Device Address Reg: Device Addr is 0x%x\n\n",
b504882d
LY		 1937 (tmp_reg & USB_DEVICE_ADDRESS_MASK));
1938 size -= t;
1939 next += t;
1940
1941 tmp_reg = fsl_readl(&dr_regs->endpointlistaddr);
1942 t = scnprintf(next, size,
9d9d88c8 1943 "USB Endpoint List Address Reg: "
b504882d
LY		 1944 "Device Addr is 0x%x\n\n",
1945 (tmp_reg & USB_EP_LIST_ADDRESS_MASK));
1946 size -= t;
1947 next += t;
1948
1949 tmp_reg = fsl_readl(&dr_regs->portsc1);
1950 t = scnprintf(next, size,
1951 "USB Port Status&Control Reg:\n"
9d9d88c8
WN		 1952 "Port Transceiver Type : %s Port Speed: %s\n"
1953 "PHY Low Power Suspend: %s Port Reset: %s "
1954 "Port Suspend Mode: %s\n"
1955 "Over-current Change: %s "
b504882d 1956 "Port Enable/Disable Change: %s\n"
9d9d88c8 1957 "Port Enabled/Disabled: %s "
b504882d
LY		 1958 "Current Connect Status: %s\n\n", ( {
1959 char *s;
1960 switch (tmp_reg & PORTSCX_PTS_FSLS) {
1961 case PORTSCX_PTS_UTMI:
1962 s = "UTMI"; break;
1963 case PORTSCX_PTS_ULPI:
1964 s = "ULPI "; break;
1965 case PORTSCX_PTS_FSLS:
1966 s = "FS/LS Serial"; break;
1967 default:
1968 s = "None"; break;
1969 }
1970 s;} ), ( {
1971 char *s;
1972 switch (tmp_reg & PORTSCX_PORT_SPEED_UNDEF) {
1973 case PORTSCX_PORT_SPEED_FULL:
1974 s = "Full Speed"; break;
1975 case PORTSCX_PORT_SPEED_LOW:
1976 s = "Low Speed"; break;
1977 case PORTSCX_PORT_SPEED_HIGH:
1978 s = "High Speed"; break;
1979 default:
1980 s = "Undefined"; break;
1981 }
1982 s;
1983 } ),
1984 (tmp_reg & PORTSCX_PHY_LOW_POWER_SPD) ?
1985 "Normal PHY mode" : "Low power mode",
1986 (tmp_reg & PORTSCX_PORT_RESET) ? "In Reset" :
1987 "Not in Reset",
1988 (tmp_reg & PORTSCX_PORT_SUSPEND) ? "In " : "Not in",
1989 (tmp_reg & PORTSCX_OVER_CURRENT_CHG) ? "Dected" :
1990 "No",
1991 (tmp_reg & PORTSCX_PORT_EN_DIS_CHANGE) ? "Disable" :
1992 "Not change",
1993 (tmp_reg & PORTSCX_PORT_ENABLE) ? "Enable" :
1994 "Not correct",
1995 (tmp_reg & PORTSCX_CURRENT_CONNECT_STATUS) ?
1996 "Attached" : "Not-Att");
1997 size -= t;
1998 next += t;
1999
2000 tmp_reg = fsl_readl(&dr_regs->usbmode);
2001 t = scnprintf(next, size,
9d9d88c8 2002 "USB Mode Reg: Controller Mode is: %s\n\n", ( {
b504882d
LY		 2003 char *s;
2004 switch (tmp_reg & USB_MODE_CTRL_MODE_HOST) {
2005 case USB_MODE_CTRL_MODE_IDLE:
2006 s = "Idle"; break;
2007 case USB_MODE_CTRL_MODE_DEVICE:
2008 s = "Device Controller"; break;
2009 case USB_MODE_CTRL_MODE_HOST:
2010 s = "Host Controller"; break;
2011 default:
2012 s = "None"; break;
2013 }
2014 s;
2015 } ));
2016 size -= t;
2017 next += t;
2018
2019 tmp_reg = fsl_readl(&dr_regs->endptsetupstat);
2020 t = scnprintf(next, size,
9d9d88c8 2021 "Endpoint Setup Status Reg: SETUP on ep 0x%x\n\n",
b504882d
LY		 2022 (tmp_reg & EP_SETUP_STATUS_MASK));
2023 size -= t;
2024 next += t;
2025
2026 for (i = 0; i < udc->max_ep / 2; i++) {
2027 tmp_reg = fsl_readl(&dr_regs->endptctrl[i]);
2028 t = scnprintf(next, size, "EP Ctrl Reg [0x%x]: = [0x%x]\n",
2029 i, tmp_reg);
2030 size -= t;
2031 next += t;
2032 }
2033 tmp_reg = fsl_readl(&dr_regs->endpointprime);
9d9d88c8 2034 t = scnprintf(next, size, "EP Prime Reg = [0x%x]\n\n", tmp_reg);
b504882d
LY		 2035 size -= t;
2036 next += t;
2037
2038 tmp_reg = usb_sys_regs->snoop1;
9d9d88c8 2039 t = scnprintf(next, size, "Snoop1 Reg : = [0x%x]\n\n", tmp_reg);
b504882d
LY		 2040 size -= t;
2041 next += t;
2042
2043 tmp_reg = usb_sys_regs->control;
2044 t = scnprintf(next, size, "General Control Reg : = [0x%x]\n\n",
2045 tmp_reg);
2046 size -= t;
2047 next += t;
2048
2049 /* ------fsl_udc, fsl_ep, fsl_request structure information ----- */
2050 ep = &udc->eps[0];
2051 t = scnprintf(next, size, "For %s Maxpkt is 0x%x index is 0x%x\n",
2052 ep->ep.name, ep_maxpacket(ep), ep_index(ep));
2053 size -= t;
2054 next += t;
2055
2056 if (list_empty(&ep->queue)) {
2057 t = scnprintf(next, size, "its req queue is empty\n\n");
2058 size -= t;
2059 next += t;
2060 } else {
2061 list_for_each_entry(req, &ep->queue, queue) {
2062 t = scnprintf(next, size,
9d9d88c8 2063 "req %p actual 0x%x length 0x%x buf %p\n",
b504882d
LY		 2064 &req->req, req->req.actual,
2065 req->req.length, req->req.buf);
2066 size -= t;
2067 next += t;
2068 }
2069 }
2070 /* other gadget->eplist ep */
2071 list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
2072 if (ep->desc) {
2073 t = scnprintf(next, size,
2074 "\nFor %s Maxpkt is 0x%x "
2075 "index is 0x%x\n",
2076 ep->ep.name, ep_maxpacket(ep),
2077 ep_index(ep));
2078 size -= t;
2079 next += t;
2080
2081 if (list_empty(&ep->queue)) {
2082 t = scnprintf(next, size,
2083 "its req queue is empty\n\n");
2084 size -= t;
2085 next += t;
2086 } else {
2087 list_for_each_entry(req, &ep->queue, queue) {
2088 t = scnprintf(next, size,
9d9d88c8 2089 "req %p actual 0x%x length "
b504882d
LY		 2090 "0x%x buf %p\n",
2091 &req->req, req->req.actual,
2092 req->req.length, req->req.buf);
2093 size -= t;
2094 next += t;
2095 } /* end for each_entry of ep req */
2096 } /* end for else */
2097 } /* end for if(ep->queue) */
2098 } /* end (ep->desc) */
2099
2100 spin_unlock_irqrestore(&udc->lock, flags);
2101
2102 *eof = 1;
2103 return count - size;
2104}
2105
2106#define create_proc_file() create_proc_read_entry(proc_filename, \
2107 0, NULL, fsl_proc_read, NULL)
2108
2109#define remove_proc_file() remove_proc_entry(proc_filename, NULL)
2110
2111#else /* !CONFIG_USB_GADGET_DEBUG_FILES */
2112
2113#define create_proc_file() do {} while (0)
2114#define remove_proc_file() do {} while (0)
2115
2116#endif /* CONFIG_USB_GADGET_DEBUG_FILES */
2117
2118/*-------------------------------------------------------------------------*/
2119
2120/* Release udc structures */
2121static void fsl_udc_release(struct device *dev)
2122{
2123 complete(udc_controller->done);
2124 dma_free_coherent(dev, udc_controller->ep_qh_size,
2125 udc_controller->ep_qh, udc_controller->ep_qh_dma);
2126 kfree(udc_controller);
2127}
2128
2129/******************************************************************
2130 Internal structure setup functions
2131*******************************************************************/
2132/*------------------------------------------------------------------
2133 * init resource for globle controller
2134 * Return the udc handle on success or NULL on failure
2135 ------------------------------------------------------------------*/
4365831d
LY		 2136static int __init struct_udc_setup(struct fsl_udc *udc,
2137 struct platform_device *pdev)
b504882d 2138{
b504882d
LY		 2139 struct fsl_usb2_platform_data *pdata;
2140 size_t size;
2141
b504882d
LY		 2142 pdata = pdev->dev.platform_data;
2143 udc->phy_mode = pdata->phy_mode;
b504882d
LY		 2144
2145 udc->eps = kzalloc(sizeof(struct fsl_ep) * udc->max_ep, GFP_KERNEL);
2146 if (!udc->eps) {
2147 ERR("malloc fsl_ep failed\n");
4365831d 2148 return -1;
b504882d
LY		 2149 }
2150
2151 /* initialized QHs, take care of alignment */
2152 size = udc->max_ep * sizeof(struct ep_queue_head);
2153 if (size < QH_ALIGNMENT)
2154 size = QH_ALIGNMENT;
2155 else if ((size % QH_ALIGNMENT) != 0) {
2156 size += QH_ALIGNMENT + 1;
2157 size &= ~(QH_ALIGNMENT - 1);
2158 }
2159 udc->ep_qh = dma_alloc_coherent(&pdev->dev, size,
2160 &udc->ep_qh_dma, GFP_KERNEL);
2161 if (!udc->ep_qh) {
2162 ERR("malloc QHs for udc failed\n");
2163 kfree(udc->eps);
4365831d 2164 return -1;
b504882d
LY		 2165 }
2166
2167 udc->ep_qh_size = size;
2168
2169 /* Initialize ep0 status request structure */
2170 /* FIXME: fsl_alloc_request() ignores ep argument */
2171 udc->status_req = container_of(fsl_alloc_request(NULL, GFP_KERNEL),
2172 struct fsl_req, req);
2173 /* allocate a small amount of memory to get valid address */
2174 udc->status_req->req.buf = kmalloc(8, GFP_KERNEL);
2175 udc->status_req->req.dma = virt_to_phys(udc->status_req->req.buf);
2176
2177 udc->resume_state = USB_STATE_NOTATTACHED;
2178 udc->usb_state = USB_STATE_POWERED;
2179 udc->ep0_dir = 0;
2180 udc->remote_wakeup = 0; /* default to 0 on reset */
b504882d 2181
4365831d 2182 return 0;
b504882d
LY		 2183}
2184
2185/*----------------------------------------------------------------
2186 * Setup the fsl_ep struct for eps
2187 * Link fsl_ep->ep to gadget->ep_list
2188 * ep0out is not used so do nothing here
2189 * ep0in should be taken care
2190 *--------------------------------------------------------------*/
2191static int __init struct_ep_setup(struct fsl_udc *udc, unsigned char index,
2192 char *name, int link)
2193{
2194 struct fsl_ep *ep = &udc->eps[index];
2195
2196 ep->udc = udc;
2197 strcpy(ep->name, name);
2198 ep->ep.name = ep->name;
2199
2200 ep->ep.ops = &fsl_ep_ops;
2201 ep->stopped = 0;
2202
2203 /* for ep0: maxP defined in desc
2204 * for other eps, maxP is set by epautoconfig() called by gadget layer
2205 */
2206 ep->ep.maxpacket = (unsigned short) ~0;
2207
2208 /* the queue lists any req for this ep */
2209 INIT_LIST_HEAD(&ep->queue);
2210
2211 /* gagdet.ep_list used for ep_autoconfig so no ep0 */
2212 if (link)
2213 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2214 ep->gadget = &udc->gadget;
2215 ep->qh = &udc->ep_qh[index];
2216
2217 return 0;
2218}
2219
2220/* Driver probe function
4365831d
LY		 2221 * all intialization operations implemented here except enabling usb_intr reg
2222 * board setup should have been done in the platform code
b504882d
LY		 2223 */
2224static int __init fsl_udc_probe(struct platform_device *pdev)
2225{
2226 struct resource *res;
2227 int ret = -ENODEV;
2228 unsigned int i;
4365831d 2229 u32 dccparams;
b504882d
LY		 2230
2231 if (strcmp(pdev->name, driver_name)) {
bf7409a2 2232 VDBG("Wrong device");
b504882d
LY		 2233 return -ENODEV;
2234 }
2235
4365831d
LY		 2236 udc_controller = kzalloc(sizeof(struct fsl_udc), GFP_KERNEL);
2237 if (udc_controller == NULL) {
2238 ERR("malloc udc failed\n");
b504882d
LY		 2239 return -ENOMEM;
2240 }
2241
e06da9a8
WN		 2242 spin_lock_init(&udc_controller->lock);
2243 udc_controller->stopped = 1;
2244
b504882d 2245 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
4365831d 2246 if (!res) {
23d7cd04
WN		 2247 ret = -ENXIO;
2248 goto err_kfree;
4365831d 2249 }
b504882d
LY		 2250
2251 if (!request_mem_region(res->start, res->end - res->start + 1,
2252 driver_name)) {
bf7409a2 2253 ERR("request mem region for %s failed\n", pdev->name);
23d7cd04
WN		 2254 ret = -EBUSY;
2255 goto err_kfree;
b504882d
LY		 2256 }
2257
2258 dr_regs = ioremap(res->start, res->end - res->start + 1);
2259 if (!dr_regs) {
2260 ret = -ENOMEM;
23d7cd04 2261 goto err_release_mem_region;
b504882d
LY		 2262 }
2263
2264 usb_sys_regs = (struct usb_sys_interface *)
2265 ((u32)dr_regs + USB_DR_SYS_OFFSET);
2266
4365831d
LY		 2267 /* Read Device Controller Capability Parameters register */
2268 dccparams = fsl_readl(&dr_regs->dccparams);
2269 if (!(dccparams & DCCPARAMS_DC)) {
2270 ERR("This SOC doesn't support device role\n");
2271 ret = -ENODEV;
23d7cd04 2272 goto err_iounmap;
4365831d
LY		 2273 }
2274 /* Get max device endpoints */
2275 /* DEN is bidirectional ep number, max_ep doubles the number */
2276 udc_controller->max_ep = (dccparams & DCCPARAMS_DEN_MASK) * 2;
2277
b504882d
LY		 2278 udc_controller->irq = platform_get_irq(pdev, 0);
2279 if (!udc_controller->irq) {
2280 ret = -ENODEV;
23d7cd04 2281 goto err_iounmap;
b504882d
LY		 2282 }
2283
37b5453d 2284 ret = request_irq(udc_controller->irq, fsl_udc_irq, IRQF_SHARED,
b504882d
LY		 2285 driver_name, udc_controller);
2286 if (ret != 0) {
bf7409a2 2287 ERR("cannot request irq %d err %d\n",
b504882d 2288 udc_controller->irq, ret);
23d7cd04 2289 goto err_iounmap;
b504882d
LY		 2290 }
2291
4365831d
LY		 2292 /* Initialize the udc structure including QH member and other member */
2293 if (struct_udc_setup(udc_controller, pdev)) {
2294 ERR("Can't initialize udc data structure\n");
2295 ret = -ENOMEM;
23d7cd04 2296 goto err_free_irq;
4365831d
LY		 2297 }
2298
b504882d
LY		 2299 /* initialize usb hw reg except for regs for EP,
2300 * leave usbintr reg untouched */
2301 dr_controller_setup(udc_controller);
2302
2303 /* Setup gadget structure */
2304 udc_controller->gadget.ops = &fsl_gadget_ops;
2305 udc_controller->gadget.is_dualspeed = 1;
2306 udc_controller->gadget.ep0 = &udc_controller->eps[0].ep;
2307 INIT_LIST_HEAD(&udc_controller->gadget.ep_list);
2308 udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
2309 udc_controller->gadget.name = driver_name;
2310
2311 /* Setup gadget.dev and register with kernel */
0031a06e 2312 dev_set_name(&udc_controller->gadget.dev, "gadget");
b504882d
LY		 2313 udc_controller->gadget.dev.release = fsl_udc_release;
2314 udc_controller->gadget.dev.parent = &pdev->dev;
2315 ret = device_register(&udc_controller->gadget.dev);
2316 if (ret < 0)
23d7cd04 2317 goto err_free_irq;
b504882d
LY		 2318
2319 /* setup QH and epctrl for ep0 */
2320 ep0_setup(udc_controller);
2321
2322 /* setup udc->eps[] for ep0 */
2323 struct_ep_setup(udc_controller, 0, "ep0", 0);
2324 /* for ep0: the desc defined here;
2325 * for other eps, gadget layer called ep_enable with defined desc
2326 */
2327 udc_controller->eps[0].desc = &fsl_ep0_desc;
2328 udc_controller->eps[0].ep.maxpacket = USB_MAX_CTRL_PAYLOAD;
2329
2330 /* setup the udc->eps[] for non-control endpoints and link
2331 * to gadget.ep_list */
2332 for (i = 1; i < (int)(udc_controller->max_ep / 2); i++) {
2333 char name[14];
2334
2335 sprintf(name, "ep%dout", i);
2336 struct_ep_setup(udc_controller, i * 2, name, 1);
2337 sprintf(name, "ep%din", i);
2338 struct_ep_setup(udc_controller, i * 2 + 1, name, 1);
2339 }
2340
2341 /* use dma_pool for TD management */
2342 udc_controller->td_pool = dma_pool_create("udc_td", &pdev->dev,
2343 sizeof(struct ep_td_struct),
2344 DTD_ALIGNMENT, UDC_DMA_BOUNDARY);
2345 if (udc_controller->td_pool == NULL) {
2346 ret = -ENOMEM;
23d7cd04 2347 goto err_unregister;
b504882d
LY		 2348 }
2349 create_proc_file();
2350 return 0;
2351
23d7cd04 2352err_unregister:
b504882d 2353 device_unregister(&udc_controller->gadget.dev);
23d7cd04 2354err_free_irq:
b504882d 2355 free_irq(udc_controller->irq, udc_controller);
23d7cd04 2356err_iounmap:
b504882d 2357 iounmap(dr_regs);
23d7cd04 2358err_release_mem_region:
b504882d 2359 release_mem_region(res->start, res->end - res->start + 1);
23d7cd04 2360err_kfree:
4365831d 2361 kfree(udc_controller);
23d7cd04 2362 udc_controller = NULL;
b504882d
LY		 2363 return ret;
2364}
2365
2366/* Driver removal function
2367 * Free resources and finish pending transactions
2368 */
2369static int __exit fsl_udc_remove(struct platform_device *pdev)
2370{
2371 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2372
2373 DECLARE_COMPLETION(done);
2374
2375 if (!udc_controller)
2376 return -ENODEV;
2377 udc_controller->done = &done;
2378
2379 /* DR has been stopped in usb_gadget_unregister_driver() */
2380 remove_proc_file();
2381
2382 /* Free allocated memory */
2383 kfree(udc_controller->status_req->req.buf);
2384 kfree(udc_controller->status_req);
2385 kfree(udc_controller->eps);
2386
2387 dma_pool_destroy(udc_controller->td_pool);
2388 free_irq(udc_controller->irq, udc_controller);
2389 iounmap(dr_regs);
2390 release_mem_region(res->start, res->end - res->start + 1);
2391
2392 device_unregister(&udc_controller->gadget.dev);
2393 /* free udc --wait for the release() finished */
2394 wait_for_completion(&done);
2395
2396 return 0;
2397}
2398
2399/*-----------------------------------------------------------------
2400 * Modify Power management attributes
2401 * Used by OTG statemachine to disable gadget temporarily
2402 -----------------------------------------------------------------*/
2403static int fsl_udc_suspend(struct platform_device *pdev, pm_message_t state)
2404{
2405 dr_controller_stop(udc_controller);
2406 return 0;
2407}
2408
2409/*-----------------------------------------------------------------
2410 * Invoked on USB resume. May be called in_interrupt.
2411 * Here we start the DR controller and enable the irq
2412 *-----------------------------------------------------------------*/
2413static int fsl_udc_resume(struct platform_device *pdev)
2414{
2415 /* Enable DR irq reg and set controller Run */
2416 if (udc_controller->stopped) {
2417 dr_controller_setup(udc_controller);
2418 dr_controller_run(udc_controller);
2419 }
2420 udc_controller->usb_state = USB_STATE_ATTACHED;
2421 udc_controller->ep0_state = WAIT_FOR_SETUP;
2422 udc_controller->ep0_dir = 0;
2423 return 0;
2424}
2425
2426/*-------------------------------------------------------------------------
2427 Register entry point for the peripheral controller driver
2428--------------------------------------------------------------------------*/
2429
2430static struct platform_driver udc_driver = {
2431 .remove = __exit_p(fsl_udc_remove),
2432 /* these suspend and resume are not usb suspend and resume */
2433 .suspend = fsl_udc_suspend,
2434 .resume = fsl_udc_resume,
2435 .driver = {
2436 .name = (char *)driver_name,
2437 .owner = THIS_MODULE,
2438 },
2439};
2440
2441static int __init udc_init(void)
2442{
2443 printk(KERN_INFO "%s (%s)\n", driver_desc, DRIVER_VERSION);
2444 return platform_driver_probe(&udc_driver, fsl_udc_probe);
2445}
2446
2447module_init(udc_init);
2448
2449static void __exit udc_exit(void)
2450{
2451 platform_driver_unregister(&udc_driver);
bf7409a2 2452 printk("%s unregistered\n", driver_desc);
b504882d
LY		 2453}
2454
2455module_exit(udc_exit);
2456
2457MODULE_DESCRIPTION(DRIVER_DESC);
2458MODULE_AUTHOR(DRIVER_AUTHOR);
2459MODULE_LICENSE("GPL");
f34c32f1 2460MODULE_ALIAS("platform:fsl-usb2-udc");
Linux 6.x block layer and io_uring tree(s)