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bae4bd84 DB |
1 | /* |
2 | * at91_udc -- driver for at91-series USB peripheral controller | |
3 | * | |
4 | * Copyright (C) 2004 by Thomas Rathbone | |
5 | * Copyright (C) 2005 by HP Labs | |
6 | * Copyright (C) 2005 by David Brownell | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the | |
20 | * Free Software Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | * Boston, MA 02111-1307, USA. | |
22 | */ | |
23 | ||
f3db6e82 | 24 | #undef VERBOSE_DEBUG |
bae4bd84 DB |
25 | #undef PACKET_TRACE |
26 | ||
bae4bd84 DB |
27 | #include <linux/kernel.h> |
28 | #include <linux/module.h> | |
29 | #include <linux/platform_device.h> | |
30 | #include <linux/delay.h> | |
31 | #include <linux/ioport.h> | |
bae4bd84 | 32 | #include <linux/slab.h> |
bae4bd84 DB |
33 | #include <linux/errno.h> |
34 | #include <linux/init.h> | |
35 | #include <linux/list.h> | |
36 | #include <linux/interrupt.h> | |
37 | #include <linux/proc_fs.h> | |
eed39366 | 38 | #include <linux/prefetch.h> |
bae4bd84 | 39 | #include <linux/clk.h> |
5f848137 | 40 | #include <linux/usb/ch9.h> |
9454a57a | 41 | #include <linux/usb/gadget.h> |
b38b03b3 | 42 | #include <linux/prefetch.h> |
bae4bd84 DB |
43 | |
44 | #include <asm/byteorder.h> | |
a09e64fb | 45 | #include <mach/hardware.h> |
bae4bd84 DB |
46 | #include <asm/io.h> |
47 | #include <asm/irq.h> | |
48 | #include <asm/system.h> | |
f3db6e82 | 49 | #include <asm/gpio.h> |
bae4bd84 | 50 | |
a09e64fb RK |
51 | #include <mach/board.h> |
52 | #include <mach/cpu.h> | |
53 | #include <mach/at91sam9261_matrix.h> | |
bae4bd84 DB |
54 | |
55 | #include "at91_udc.h" | |
56 | ||
57 | ||
58 | /* | |
59 | * This controller is simple and PIO-only. It's used in many AT91-series | |
8b2e7668 DB |
60 | * full speed USB controllers, including the at91rm9200 (arm920T, with MMU), |
61 | * at91sam926x (arm926ejs, with MMU), and several no-mmu versions. | |
bae4bd84 DB |
62 | * |
63 | * This driver expects the board has been wired with two GPIOs suppporting | |
64 | * a VBUS sensing IRQ, and a D+ pullup. (They may be omitted, but the | |
8b2e7668 DB |
65 | * testing hasn't covered such cases.) |
66 | * | |
67 | * The pullup is most important (so it's integrated on sam926x parts). It | |
bae4bd84 | 68 | * provides software control over whether the host enumerates the device. |
8b2e7668 | 69 | * |
bae4bd84 DB |
70 | * The VBUS sensing helps during enumeration, and allows both USB clocks |
71 | * (and the transceiver) to stay gated off until they're necessary, saving | |
8b2e7668 DB |
72 | * power. During USB suspend, the 48 MHz clock is gated off in hardware; |
73 | * it may also be gated off by software during some Linux sleep states. | |
bae4bd84 DB |
74 | */ |
75 | ||
8b2e7668 | 76 | #define DRIVER_VERSION "3 May 2006" |
bae4bd84 DB |
77 | |
78 | static const char driver_name [] = "at91_udc"; | |
79 | static const char ep0name[] = "ep0"; | |
80 | ||
4037242c | 81 | #define VBUS_POLL_TIMEOUT msecs_to_jiffies(1000) |
bae4bd84 | 82 | |
4f4c5e36 HH |
83 | #define at91_udp_read(udc, reg) \ |
84 | __raw_readl((udc)->udp_baseaddr + (reg)) | |
85 | #define at91_udp_write(udc, reg, val) \ | |
86 | __raw_writel((val), (udc)->udp_baseaddr + (reg)) | |
bae4bd84 DB |
87 | |
88 | /*-------------------------------------------------------------------------*/ | |
89 | ||
90 | #ifdef CONFIG_USB_GADGET_DEBUG_FILES | |
91 | ||
92 | #include <linux/seq_file.h> | |
93 | ||
94 | static const char debug_filename[] = "driver/udc"; | |
95 | ||
96 | #define FOURBITS "%s%s%s%s" | |
97 | #define EIGHTBITS FOURBITS FOURBITS | |
98 | ||
99 | static void proc_ep_show(struct seq_file *s, struct at91_ep *ep) | |
100 | { | |
101 | static char *types[] = { | |
102 | "control", "out-iso", "out-bulk", "out-int", | |
103 | "BOGUS", "in-iso", "in-bulk", "in-int"}; | |
104 | ||
105 | u32 csr; | |
106 | struct at91_request *req; | |
107 | unsigned long flags; | |
4f4c5e36 | 108 | struct at91_udc *udc = ep->udc; |
bae4bd84 | 109 | |
4f4c5e36 | 110 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
111 | |
112 | csr = __raw_readl(ep->creg); | |
113 | ||
114 | /* NOTE: not collecting per-endpoint irq statistics... */ | |
115 | ||
116 | seq_printf(s, "\n"); | |
117 | seq_printf(s, "%s, maxpacket %d %s%s %s%s\n", | |
118 | ep->ep.name, ep->ep.maxpacket, | |
119 | ep->is_in ? "in" : "out", | |
120 | ep->is_iso ? " iso" : "", | |
121 | ep->is_pingpong | |
122 | ? (ep->fifo_bank ? "pong" : "ping") | |
123 | : "", | |
124 | ep->stopped ? " stopped" : ""); | |
125 | seq_printf(s, "csr %08x rxbytes=%d %s %s %s" EIGHTBITS "\n", | |
126 | csr, | |
127 | (csr & 0x07ff0000) >> 16, | |
128 | (csr & (1 << 15)) ? "enabled" : "disabled", | |
129 | (csr & (1 << 11)) ? "DATA1" : "DATA0", | |
130 | types[(csr & 0x700) >> 8], | |
131 | ||
132 | /* iff type is control then print current direction */ | |
133 | (!(csr & 0x700)) | |
134 | ? ((csr & (1 << 7)) ? " IN" : " OUT") | |
135 | : "", | |
136 | (csr & (1 << 6)) ? " rxdatabk1" : "", | |
137 | (csr & (1 << 5)) ? " forcestall" : "", | |
138 | (csr & (1 << 4)) ? " txpktrdy" : "", | |
139 | ||
140 | (csr & (1 << 3)) ? " stallsent" : "", | |
141 | (csr & (1 << 2)) ? " rxsetup" : "", | |
142 | (csr & (1 << 1)) ? " rxdatabk0" : "", | |
143 | (csr & (1 << 0)) ? " txcomp" : ""); | |
144 | if (list_empty (&ep->queue)) | |
145 | seq_printf(s, "\t(queue empty)\n"); | |
146 | ||
147 | else list_for_each_entry (req, &ep->queue, queue) { | |
148 | unsigned length = req->req.actual; | |
149 | ||
150 | seq_printf(s, "\treq %p len %d/%d buf %p\n", | |
151 | &req->req, length, | |
152 | req->req.length, req->req.buf); | |
153 | } | |
4f4c5e36 | 154 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
155 | } |
156 | ||
157 | static void proc_irq_show(struct seq_file *s, const char *label, u32 mask) | |
158 | { | |
159 | int i; | |
160 | ||
161 | seq_printf(s, "%s %04x:%s%s" FOURBITS, label, mask, | |
162 | (mask & (1 << 13)) ? " wakeup" : "", | |
163 | (mask & (1 << 12)) ? " endbusres" : "", | |
164 | ||
165 | (mask & (1 << 11)) ? " sofint" : "", | |
166 | (mask & (1 << 10)) ? " extrsm" : "", | |
167 | (mask & (1 << 9)) ? " rxrsm" : "", | |
168 | (mask & (1 << 8)) ? " rxsusp" : ""); | |
169 | for (i = 0; i < 8; i++) { | |
170 | if (mask & (1 << i)) | |
171 | seq_printf(s, " ep%d", i); | |
172 | } | |
173 | seq_printf(s, "\n"); | |
174 | } | |
175 | ||
176 | static int proc_udc_show(struct seq_file *s, void *unused) | |
177 | { | |
178 | struct at91_udc *udc = s->private; | |
179 | struct at91_ep *ep; | |
180 | u32 tmp; | |
181 | ||
182 | seq_printf(s, "%s: version %s\n", driver_name, DRIVER_VERSION); | |
183 | ||
184 | seq_printf(s, "vbus %s, pullup %s, %s powered%s, gadget %s\n\n", | |
185 | udc->vbus ? "present" : "off", | |
186 | udc->enabled | |
187 | ? (udc->vbus ? "active" : "enabled") | |
188 | : "disabled", | |
189 | udc->selfpowered ? "self" : "VBUS", | |
190 | udc->suspended ? ", suspended" : "", | |
191 | udc->driver ? udc->driver->driver.name : "(none)"); | |
192 | ||
193 | /* don't access registers when interface isn't clocked */ | |
194 | if (!udc->clocked) { | |
195 | seq_printf(s, "(not clocked)\n"); | |
196 | return 0; | |
197 | } | |
198 | ||
ffd3326b | 199 | tmp = at91_udp_read(udc, AT91_UDP_FRM_NUM); |
bae4bd84 DB |
200 | seq_printf(s, "frame %05x:%s%s frame=%d\n", tmp, |
201 | (tmp & AT91_UDP_FRM_OK) ? " ok" : "", | |
202 | (tmp & AT91_UDP_FRM_ERR) ? " err" : "", | |
203 | (tmp & AT91_UDP_NUM)); | |
204 | ||
ffd3326b | 205 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
bae4bd84 DB |
206 | seq_printf(s, "glbstate %02x:%s" FOURBITS "\n", tmp, |
207 | (tmp & AT91_UDP_RMWUPE) ? " rmwupe" : "", | |
208 | (tmp & AT91_UDP_RSMINPR) ? " rsminpr" : "", | |
209 | (tmp & AT91_UDP_ESR) ? " esr" : "", | |
210 | (tmp & AT91_UDP_CONFG) ? " confg" : "", | |
211 | (tmp & AT91_UDP_FADDEN) ? " fadden" : ""); | |
212 | ||
ffd3326b | 213 | tmp = at91_udp_read(udc, AT91_UDP_FADDR); |
bae4bd84 DB |
214 | seq_printf(s, "faddr %03x:%s fadd=%d\n", tmp, |
215 | (tmp & AT91_UDP_FEN) ? " fen" : "", | |
216 | (tmp & AT91_UDP_FADD)); | |
217 | ||
ffd3326b AV |
218 | proc_irq_show(s, "imr ", at91_udp_read(udc, AT91_UDP_IMR)); |
219 | proc_irq_show(s, "isr ", at91_udp_read(udc, AT91_UDP_ISR)); | |
bae4bd84 DB |
220 | |
221 | if (udc->enabled && udc->vbus) { | |
222 | proc_ep_show(s, &udc->ep[0]); | |
223 | list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) { | |
224 | if (ep->desc) | |
225 | proc_ep_show(s, ep); | |
226 | } | |
227 | } | |
228 | return 0; | |
229 | } | |
230 | ||
231 | static int proc_udc_open(struct inode *inode, struct file *file) | |
232 | { | |
233 | return single_open(file, proc_udc_show, PDE(inode)->data); | |
234 | } | |
235 | ||
066202dd | 236 | static const struct file_operations proc_ops = { |
cdefa185 | 237 | .owner = THIS_MODULE, |
bae4bd84 DB |
238 | .open = proc_udc_open, |
239 | .read = seq_read, | |
240 | .llseek = seq_lseek, | |
241 | .release = single_release, | |
242 | }; | |
243 | ||
244 | static void create_debug_file(struct at91_udc *udc) | |
245 | { | |
cdefa185 | 246 | udc->pde = proc_create_data(debug_filename, 0, NULL, &proc_ops, udc); |
bae4bd84 DB |
247 | } |
248 | ||
249 | static void remove_debug_file(struct at91_udc *udc) | |
250 | { | |
251 | if (udc->pde) | |
252 | remove_proc_entry(debug_filename, NULL); | |
253 | } | |
254 | ||
255 | #else | |
256 | ||
257 | static inline void create_debug_file(struct at91_udc *udc) {} | |
258 | static inline void remove_debug_file(struct at91_udc *udc) {} | |
259 | ||
260 | #endif | |
261 | ||
262 | ||
263 | /*-------------------------------------------------------------------------*/ | |
264 | ||
265 | static void done(struct at91_ep *ep, struct at91_request *req, int status) | |
266 | { | |
267 | unsigned stopped = ep->stopped; | |
ffd3326b | 268 | struct at91_udc *udc = ep->udc; |
bae4bd84 DB |
269 | |
270 | list_del_init(&req->queue); | |
271 | if (req->req.status == -EINPROGRESS) | |
272 | req->req.status = status; | |
273 | else | |
274 | status = req->req.status; | |
275 | if (status && status != -ESHUTDOWN) | |
276 | VDBG("%s done %p, status %d\n", ep->ep.name, req, status); | |
277 | ||
278 | ep->stopped = 1; | |
4f4c5e36 | 279 | spin_unlock(&udc->lock); |
bae4bd84 | 280 | req->req.complete(&ep->ep, &req->req); |
4f4c5e36 | 281 | spin_lock(&udc->lock); |
bae4bd84 DB |
282 | ep->stopped = stopped; |
283 | ||
284 | /* ep0 is always ready; other endpoints need a non-empty queue */ | |
285 | if (list_empty(&ep->queue) && ep->int_mask != (1 << 0)) | |
ffd3326b | 286 | at91_udp_write(udc, AT91_UDP_IDR, ep->int_mask); |
bae4bd84 DB |
287 | } |
288 | ||
289 | /*-------------------------------------------------------------------------*/ | |
290 | ||
291 | /* bits indicating OUT fifo has data ready */ | |
292 | #define RX_DATA_READY (AT91_UDP_RX_DATA_BK0 | AT91_UDP_RX_DATA_BK1) | |
293 | ||
294 | /* | |
295 | * Endpoint FIFO CSR bits have a mix of bits, making it unsafe to just write | |
296 | * back most of the value you just read (because of side effects, including | |
297 | * bits that may change after reading and before writing). | |
298 | * | |
299 | * Except when changing a specific bit, always write values which: | |
300 | * - clear SET_FX bits (setting them could change something) | |
301 | * - set CLR_FX bits (clearing them could change something) | |
302 | * | |
303 | * There are also state bits like FORCESTALL, EPEDS, DIR, and EPTYPE | |
304 | * that shouldn't normally be changed. | |
8b2e7668 DB |
305 | * |
306 | * NOTE at91sam9260 docs mention synch between UDPCK and MCK clock domains, | |
307 | * implying a need to wait for one write to complete (test relevant bits) | |
308 | * before starting the next write. This shouldn't be an issue given how | |
309 | * infrequently we write, except maybe for write-then-read idioms. | |
bae4bd84 DB |
310 | */ |
311 | #define SET_FX (AT91_UDP_TXPKTRDY) | |
8b2e7668 DB |
312 | #define CLR_FX (RX_DATA_READY | AT91_UDP_RXSETUP \ |
313 | | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP) | |
bae4bd84 DB |
314 | |
315 | /* pull OUT packet data from the endpoint's fifo */ | |
316 | static int read_fifo (struct at91_ep *ep, struct at91_request *req) | |
317 | { | |
318 | u32 __iomem *creg = ep->creg; | |
319 | u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); | |
320 | u32 csr; | |
321 | u8 *buf; | |
322 | unsigned int count, bufferspace, is_done; | |
323 | ||
324 | buf = req->req.buf + req->req.actual; | |
325 | bufferspace = req->req.length - req->req.actual; | |
326 | ||
327 | /* | |
328 | * there might be nothing to read if ep_queue() calls us, | |
329 | * or if we already emptied both pingpong buffers | |
330 | */ | |
331 | rescan: | |
332 | csr = __raw_readl(creg); | |
333 | if ((csr & RX_DATA_READY) == 0) | |
334 | return 0; | |
335 | ||
336 | count = (csr & AT91_UDP_RXBYTECNT) >> 16; | |
337 | if (count > ep->ep.maxpacket) | |
338 | count = ep->ep.maxpacket; | |
339 | if (count > bufferspace) { | |
340 | DBG("%s buffer overflow\n", ep->ep.name); | |
341 | req->req.status = -EOVERFLOW; | |
342 | count = bufferspace; | |
343 | } | |
344 | __raw_readsb(dreg, buf, count); | |
345 | ||
346 | /* release and swap pingpong mem bank */ | |
347 | csr |= CLR_FX; | |
348 | if (ep->is_pingpong) { | |
349 | if (ep->fifo_bank == 0) { | |
350 | csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); | |
351 | ep->fifo_bank = 1; | |
352 | } else { | |
353 | csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK1); | |
354 | ep->fifo_bank = 0; | |
355 | } | |
356 | } else | |
357 | csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); | |
358 | __raw_writel(csr, creg); | |
359 | ||
360 | req->req.actual += count; | |
361 | is_done = (count < ep->ep.maxpacket); | |
362 | if (count == bufferspace) | |
363 | is_done = 1; | |
364 | ||
365 | PACKET("%s %p out/%d%s\n", ep->ep.name, &req->req, count, | |
366 | is_done ? " (done)" : ""); | |
367 | ||
368 | /* | |
369 | * avoid extra trips through IRQ logic for packets already in | |
370 | * the fifo ... maybe preventing an extra (expensive) OUT-NAK | |
371 | */ | |
372 | if (is_done) | |
373 | done(ep, req, 0); | |
374 | else if (ep->is_pingpong) { | |
76225374 HH |
375 | /* |
376 | * One dummy read to delay the code because of a HW glitch: | |
377 | * CSR returns bad RXCOUNT when read too soon after updating | |
378 | * RX_DATA_BK flags. | |
379 | */ | |
380 | csr = __raw_readl(creg); | |
381 | ||
bae4bd84 DB |
382 | bufferspace -= count; |
383 | buf += count; | |
384 | goto rescan; | |
385 | } | |
386 | ||
387 | return is_done; | |
388 | } | |
389 | ||
390 | /* load fifo for an IN packet */ | |
391 | static int write_fifo(struct at91_ep *ep, struct at91_request *req) | |
392 | { | |
393 | u32 __iomem *creg = ep->creg; | |
394 | u32 csr = __raw_readl(creg); | |
395 | u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); | |
396 | unsigned total, count, is_last; | |
3cf27234 | 397 | u8 *buf; |
bae4bd84 DB |
398 | |
399 | /* | |
400 | * TODO: allow for writing two packets to the fifo ... that'll | |
401 | * reduce the amount of IN-NAKing, but probably won't affect | |
402 | * throughput much. (Unlike preventing OUT-NAKing!) | |
403 | */ | |
404 | ||
405 | /* | |
406 | * If ep_queue() calls us, the queue is empty and possibly in | |
407 | * odd states like TXCOMP not yet cleared (we do it, saving at | |
408 | * least one IRQ) or the fifo not yet being free. Those aren't | |
409 | * issues normally (IRQ handler fast path). | |
410 | */ | |
411 | if (unlikely(csr & (AT91_UDP_TXCOMP | AT91_UDP_TXPKTRDY))) { | |
412 | if (csr & AT91_UDP_TXCOMP) { | |
413 | csr |= CLR_FX; | |
414 | csr &= ~(SET_FX | AT91_UDP_TXCOMP); | |
415 | __raw_writel(csr, creg); | |
416 | csr = __raw_readl(creg); | |
417 | } | |
418 | if (csr & AT91_UDP_TXPKTRDY) | |
419 | return 0; | |
420 | } | |
421 | ||
3cf27234 DB |
422 | buf = req->req.buf + req->req.actual; |
423 | prefetch(buf); | |
bae4bd84 DB |
424 | total = req->req.length - req->req.actual; |
425 | if (ep->ep.maxpacket < total) { | |
426 | count = ep->ep.maxpacket; | |
427 | is_last = 0; | |
428 | } else { | |
429 | count = total; | |
430 | is_last = (count < ep->ep.maxpacket) || !req->req.zero; | |
431 | } | |
432 | ||
433 | /* | |
434 | * Write the packet, maybe it's a ZLP. | |
435 | * | |
436 | * NOTE: incrementing req->actual before we receive the ACK means | |
437 | * gadget driver IN bytecounts can be wrong in fault cases. That's | |
438 | * fixable with PIO drivers like this one (save "count" here, and | |
439 | * do the increment later on TX irq), but not for most DMA hardware. | |
440 | * | |
441 | * So all gadget drivers must accept that potential error. Some | |
442 | * hardware supports precise fifo status reporting, letting them | |
443 | * recover when the actual bytecount matters (e.g. for USB Test | |
444 | * and Measurement Class devices). | |
445 | */ | |
3cf27234 | 446 | __raw_writesb(dreg, buf, count); |
bae4bd84 DB |
447 | csr &= ~SET_FX; |
448 | csr |= CLR_FX | AT91_UDP_TXPKTRDY; | |
449 | __raw_writel(csr, creg); | |
450 | req->req.actual += count; | |
451 | ||
452 | PACKET("%s %p in/%d%s\n", ep->ep.name, &req->req, count, | |
453 | is_last ? " (done)" : ""); | |
454 | if (is_last) | |
455 | done(ep, req, 0); | |
456 | return is_last; | |
457 | } | |
458 | ||
459 | static void nuke(struct at91_ep *ep, int status) | |
460 | { | |
461 | struct at91_request *req; | |
462 | ||
463 | // terminer chaque requete dans la queue | |
464 | ep->stopped = 1; | |
465 | if (list_empty(&ep->queue)) | |
466 | return; | |
467 | ||
441b62c1 | 468 | VDBG("%s %s\n", __func__, ep->ep.name); |
bae4bd84 DB |
469 | while (!list_empty(&ep->queue)) { |
470 | req = list_entry(ep->queue.next, struct at91_request, queue); | |
471 | done(ep, req, status); | |
472 | } | |
473 | } | |
474 | ||
475 | /*-------------------------------------------------------------------------*/ | |
476 | ||
8b2e7668 DB |
477 | static int at91_ep_enable(struct usb_ep *_ep, |
478 | const struct usb_endpoint_descriptor *desc) | |
bae4bd84 DB |
479 | { |
480 | struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); | |
4f4c5e36 | 481 | struct at91_udc *udc = ep->udc; |
bae4bd84 DB |
482 | u16 maxpacket; |
483 | u32 tmp; | |
484 | unsigned long flags; | |
485 | ||
486 | if (!_ep || !ep | |
487 | || !desc || ep->desc | |
488 | || _ep->name == ep0name | |
489 | || desc->bDescriptorType != USB_DT_ENDPOINT | |
29cc8897 | 490 | || (maxpacket = usb_endpoint_maxp(desc)) == 0 |
bae4bd84 DB |
491 | || maxpacket > ep->maxpacket) { |
492 | DBG("bad ep or descriptor\n"); | |
493 | return -EINVAL; | |
494 | } | |
495 | ||
4f4c5e36 | 496 | if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) { |
bae4bd84 DB |
497 | DBG("bogus device state\n"); |
498 | return -ESHUTDOWN; | |
499 | } | |
500 | ||
81c8d8d2 | 501 | tmp = usb_endpoint_type(desc); |
bae4bd84 DB |
502 | switch (tmp) { |
503 | case USB_ENDPOINT_XFER_CONTROL: | |
504 | DBG("only one control endpoint\n"); | |
505 | return -EINVAL; | |
506 | case USB_ENDPOINT_XFER_INT: | |
507 | if (maxpacket > 64) | |
508 | goto bogus_max; | |
509 | break; | |
510 | case USB_ENDPOINT_XFER_BULK: | |
511 | switch (maxpacket) { | |
512 | case 8: | |
513 | case 16: | |
514 | case 32: | |
515 | case 64: | |
516 | goto ok; | |
517 | } | |
518 | bogus_max: | |
519 | DBG("bogus maxpacket %d\n", maxpacket); | |
520 | return -EINVAL; | |
521 | case USB_ENDPOINT_XFER_ISOC: | |
522 | if (!ep->is_pingpong) { | |
523 | DBG("iso requires double buffering\n"); | |
524 | return -EINVAL; | |
525 | } | |
526 | break; | |
527 | } | |
528 | ||
529 | ok: | |
4f4c5e36 | 530 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
531 | |
532 | /* initialize endpoint to match this descriptor */ | |
81c8d8d2 | 533 | ep->is_in = usb_endpoint_dir_in(desc); |
bae4bd84 DB |
534 | ep->is_iso = (tmp == USB_ENDPOINT_XFER_ISOC); |
535 | ep->stopped = 0; | |
536 | if (ep->is_in) | |
537 | tmp |= 0x04; | |
538 | tmp <<= 8; | |
539 | tmp |= AT91_UDP_EPEDS; | |
540 | __raw_writel(tmp, ep->creg); | |
541 | ||
542 | ep->desc = desc; | |
543 | ep->ep.maxpacket = maxpacket; | |
544 | ||
545 | /* | |
546 | * reset/init endpoint fifo. NOTE: leaves fifo_bank alone, | |
547 | * since endpoint resets don't reset hw pingpong state. | |
548 | */ | |
4f4c5e36 HH |
549 | at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); |
550 | at91_udp_write(udc, AT91_UDP_RST_EP, 0); | |
bae4bd84 | 551 | |
4f4c5e36 | 552 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
553 | return 0; |
554 | } | |
555 | ||
556 | static int at91_ep_disable (struct usb_ep * _ep) | |
557 | { | |
558 | struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); | |
ffd3326b | 559 | struct at91_udc *udc = ep->udc; |
bae4bd84 DB |
560 | unsigned long flags; |
561 | ||
562 | if (ep == &ep->udc->ep[0]) | |
563 | return -EINVAL; | |
564 | ||
4f4c5e36 | 565 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
566 | |
567 | nuke(ep, -ESHUTDOWN); | |
568 | ||
569 | /* restore the endpoint's pristine config */ | |
570 | ep->desc = NULL; | |
571 | ep->ep.maxpacket = ep->maxpacket; | |
572 | ||
573 | /* reset fifos and endpoint */ | |
574 | if (ep->udc->clocked) { | |
ffd3326b AV |
575 | at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); |
576 | at91_udp_write(udc, AT91_UDP_RST_EP, 0); | |
bae4bd84 DB |
577 | __raw_writel(0, ep->creg); |
578 | } | |
579 | ||
4f4c5e36 | 580 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
581 | return 0; |
582 | } | |
583 | ||
584 | /* | |
585 | * this is a PIO-only driver, so there's nothing | |
586 | * interesting for request or buffer allocation. | |
587 | */ | |
588 | ||
8b2e7668 | 589 | static struct usb_request * |
f3db6e82 | 590 | at91_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) |
bae4bd84 DB |
591 | { |
592 | struct at91_request *req; | |
593 | ||
cd861280 | 594 | req = kzalloc(sizeof (struct at91_request), gfp_flags); |
bae4bd84 DB |
595 | if (!req) |
596 | return NULL; | |
597 | ||
598 | INIT_LIST_HEAD(&req->queue); | |
599 | return &req->req; | |
600 | } | |
601 | ||
602 | static void at91_ep_free_request(struct usb_ep *_ep, struct usb_request *_req) | |
603 | { | |
604 | struct at91_request *req; | |
605 | ||
606 | req = container_of(_req, struct at91_request, req); | |
607 | BUG_ON(!list_empty(&req->queue)); | |
608 | kfree(req); | |
609 | } | |
610 | ||
bae4bd84 DB |
611 | static int at91_ep_queue(struct usb_ep *_ep, |
612 | struct usb_request *_req, gfp_t gfp_flags) | |
613 | { | |
614 | struct at91_request *req; | |
615 | struct at91_ep *ep; | |
4f4c5e36 | 616 | struct at91_udc *udc; |
bae4bd84 DB |
617 | int status; |
618 | unsigned long flags; | |
619 | ||
620 | req = container_of(_req, struct at91_request, req); | |
621 | ep = container_of(_ep, struct at91_ep, ep); | |
622 | ||
623 | if (!_req || !_req->complete | |
624 | || !_req->buf || !list_empty(&req->queue)) { | |
625 | DBG("invalid request\n"); | |
626 | return -EINVAL; | |
627 | } | |
628 | ||
629 | if (!_ep || (!ep->desc && ep->ep.name != ep0name)) { | |
630 | DBG("invalid ep\n"); | |
631 | return -EINVAL; | |
632 | } | |
633 | ||
4f4c5e36 | 634 | udc = ep->udc; |
bae4bd84 | 635 | |
4f4c5e36 | 636 | if (!udc || !udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) { |
bae4bd84 DB |
637 | DBG("invalid device\n"); |
638 | return -EINVAL; | |
639 | } | |
640 | ||
641 | _req->status = -EINPROGRESS; | |
642 | _req->actual = 0; | |
643 | ||
4f4c5e36 | 644 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
645 | |
646 | /* try to kickstart any empty and idle queue */ | |
647 | if (list_empty(&ep->queue) && !ep->stopped) { | |
648 | int is_ep0; | |
649 | ||
650 | /* | |
651 | * If this control request has a non-empty DATA stage, this | |
652 | * will start that stage. It works just like a non-control | |
653 | * request (until the status stage starts, maybe early). | |
654 | * | |
655 | * If the data stage is empty, then this starts a successful | |
656 | * IN/STATUS stage. (Unsuccessful ones use set_halt.) | |
657 | */ | |
658 | is_ep0 = (ep->ep.name == ep0name); | |
659 | if (is_ep0) { | |
660 | u32 tmp; | |
661 | ||
4f4c5e36 | 662 | if (!udc->req_pending) { |
bae4bd84 DB |
663 | status = -EINVAL; |
664 | goto done; | |
665 | } | |
666 | ||
667 | /* | |
668 | * defer changing CONFG until after the gadget driver | |
669 | * reconfigures the endpoints. | |
670 | */ | |
4f4c5e36 HH |
671 | if (udc->wait_for_config_ack) { |
672 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); | |
bae4bd84 DB |
673 | tmp ^= AT91_UDP_CONFG; |
674 | VDBG("toggle config\n"); | |
4f4c5e36 | 675 | at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); |
bae4bd84 DB |
676 | } |
677 | if (req->req.length == 0) { | |
678 | ep0_in_status: | |
679 | PACKET("ep0 in/status\n"); | |
680 | status = 0; | |
681 | tmp = __raw_readl(ep->creg); | |
682 | tmp &= ~SET_FX; | |
683 | tmp |= CLR_FX | AT91_UDP_TXPKTRDY; | |
684 | __raw_writel(tmp, ep->creg); | |
4f4c5e36 | 685 | udc->req_pending = 0; |
bae4bd84 DB |
686 | goto done; |
687 | } | |
688 | } | |
689 | ||
690 | if (ep->is_in) | |
691 | status = write_fifo(ep, req); | |
692 | else { | |
693 | status = read_fifo(ep, req); | |
694 | ||
695 | /* IN/STATUS stage is otherwise triggered by irq */ | |
696 | if (status && is_ep0) | |
697 | goto ep0_in_status; | |
698 | } | |
699 | } else | |
700 | status = 0; | |
701 | ||
702 | if (req && !status) { | |
703 | list_add_tail (&req->queue, &ep->queue); | |
4f4c5e36 | 704 | at91_udp_write(udc, AT91_UDP_IER, ep->int_mask); |
bae4bd84 DB |
705 | } |
706 | done: | |
4f4c5e36 | 707 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
708 | return (status < 0) ? status : 0; |
709 | } | |
710 | ||
711 | static int at91_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) | |
712 | { | |
4f4c5e36 | 713 | struct at91_ep *ep; |
bae4bd84 | 714 | struct at91_request *req; |
4f4c5e36 HH |
715 | unsigned long flags; |
716 | struct at91_udc *udc; | |
bae4bd84 DB |
717 | |
718 | ep = container_of(_ep, struct at91_ep, ep); | |
719 | if (!_ep || ep->ep.name == ep0name) | |
720 | return -EINVAL; | |
721 | ||
4f4c5e36 HH |
722 | udc = ep->udc; |
723 | ||
724 | spin_lock_irqsave(&udc->lock, flags); | |
725 | ||
bae4bd84 DB |
726 | /* make sure it's actually queued on this endpoint */ |
727 | list_for_each_entry (req, &ep->queue, queue) { | |
728 | if (&req->req == _req) | |
729 | break; | |
730 | } | |
4f4c5e36 HH |
731 | if (&req->req != _req) { |
732 | spin_unlock_irqrestore(&udc->lock, flags); | |
bae4bd84 | 733 | return -EINVAL; |
4f4c5e36 | 734 | } |
bae4bd84 DB |
735 | |
736 | done(ep, req, -ECONNRESET); | |
4f4c5e36 | 737 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
738 | return 0; |
739 | } | |
740 | ||
741 | static int at91_ep_set_halt(struct usb_ep *_ep, int value) | |
742 | { | |
743 | struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); | |
ffd3326b | 744 | struct at91_udc *udc = ep->udc; |
bae4bd84 DB |
745 | u32 __iomem *creg; |
746 | u32 csr; | |
747 | unsigned long flags; | |
748 | int status = 0; | |
749 | ||
750 | if (!_ep || ep->is_iso || !ep->udc->clocked) | |
751 | return -EINVAL; | |
752 | ||
753 | creg = ep->creg; | |
4f4c5e36 | 754 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
755 | |
756 | csr = __raw_readl(creg); | |
757 | ||
758 | /* | |
759 | * fail with still-busy IN endpoints, ensuring correct sequencing | |
760 | * of data tx then stall. note that the fifo rx bytecount isn't | |
761 | * completely accurate as a tx bytecount. | |
762 | */ | |
763 | if (ep->is_in && (!list_empty(&ep->queue) || (csr >> 16) != 0)) | |
764 | status = -EAGAIN; | |
765 | else { | |
766 | csr |= CLR_FX; | |
767 | csr &= ~SET_FX; | |
768 | if (value) { | |
769 | csr |= AT91_UDP_FORCESTALL; | |
770 | VDBG("halt %s\n", ep->ep.name); | |
771 | } else { | |
ffd3326b AV |
772 | at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); |
773 | at91_udp_write(udc, AT91_UDP_RST_EP, 0); | |
bae4bd84 DB |
774 | csr &= ~AT91_UDP_FORCESTALL; |
775 | } | |
776 | __raw_writel(csr, creg); | |
777 | } | |
778 | ||
4f4c5e36 | 779 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
780 | return status; |
781 | } | |
782 | ||
398acce7 | 783 | static const struct usb_ep_ops at91_ep_ops = { |
bae4bd84 DB |
784 | .enable = at91_ep_enable, |
785 | .disable = at91_ep_disable, | |
786 | .alloc_request = at91_ep_alloc_request, | |
787 | .free_request = at91_ep_free_request, | |
bae4bd84 DB |
788 | .queue = at91_ep_queue, |
789 | .dequeue = at91_ep_dequeue, | |
790 | .set_halt = at91_ep_set_halt, | |
791 | // there's only imprecise fifo status reporting | |
792 | }; | |
793 | ||
794 | /*-------------------------------------------------------------------------*/ | |
795 | ||
796 | static int at91_get_frame(struct usb_gadget *gadget) | |
797 | { | |
ffd3326b AV |
798 | struct at91_udc *udc = to_udc(gadget); |
799 | ||
bae4bd84 DB |
800 | if (!to_udc(gadget)->clocked) |
801 | return -EINVAL; | |
ffd3326b | 802 | return at91_udp_read(udc, AT91_UDP_FRM_NUM) & AT91_UDP_NUM; |
bae4bd84 DB |
803 | } |
804 | ||
805 | static int at91_wakeup(struct usb_gadget *gadget) | |
806 | { | |
807 | struct at91_udc *udc = to_udc(gadget); | |
808 | u32 glbstate; | |
809 | int status = -EINVAL; | |
810 | unsigned long flags; | |
811 | ||
441b62c1 | 812 | DBG("%s\n", __func__ ); |
4f4c5e36 | 813 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
814 | |
815 | if (!udc->clocked || !udc->suspended) | |
816 | goto done; | |
817 | ||
818 | /* NOTE: some "early versions" handle ESR differently ... */ | |
819 | ||
ffd3326b | 820 | glbstate = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
bae4bd84 DB |
821 | if (!(glbstate & AT91_UDP_ESR)) |
822 | goto done; | |
823 | glbstate |= AT91_UDP_ESR; | |
ffd3326b | 824 | at91_udp_write(udc, AT91_UDP_GLB_STAT, glbstate); |
bae4bd84 DB |
825 | |
826 | done: | |
4f4c5e36 | 827 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
828 | return status; |
829 | } | |
830 | ||
25985edc | 831 | /* reinit == restore initial software state */ |
bae4bd84 DB |
832 | static void udc_reinit(struct at91_udc *udc) |
833 | { | |
834 | u32 i; | |
835 | ||
836 | INIT_LIST_HEAD(&udc->gadget.ep_list); | |
837 | INIT_LIST_HEAD(&udc->gadget.ep0->ep_list); | |
838 | ||
839 | for (i = 0; i < NUM_ENDPOINTS; i++) { | |
840 | struct at91_ep *ep = &udc->ep[i]; | |
841 | ||
842 | if (i != 0) | |
843 | list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); | |
844 | ep->desc = NULL; | |
845 | ep->stopped = 0; | |
846 | ep->fifo_bank = 0; | |
847 | ep->ep.maxpacket = ep->maxpacket; | |
ffd3326b | 848 | ep->creg = (void __iomem *) udc->udp_baseaddr + AT91_UDP_CSR(i); |
bae4bd84 DB |
849 | // initialiser une queue par endpoint |
850 | INIT_LIST_HEAD(&ep->queue); | |
851 | } | |
852 | } | |
853 | ||
854 | static void stop_activity(struct at91_udc *udc) | |
855 | { | |
856 | struct usb_gadget_driver *driver = udc->driver; | |
857 | int i; | |
858 | ||
859 | if (udc->gadget.speed == USB_SPEED_UNKNOWN) | |
860 | driver = NULL; | |
861 | udc->gadget.speed = USB_SPEED_UNKNOWN; | |
8b2e7668 | 862 | udc->suspended = 0; |
bae4bd84 DB |
863 | |
864 | for (i = 0; i < NUM_ENDPOINTS; i++) { | |
865 | struct at91_ep *ep = &udc->ep[i]; | |
866 | ep->stopped = 1; | |
867 | nuke(ep, -ESHUTDOWN); | |
868 | } | |
4f4c5e36 HH |
869 | if (driver) { |
870 | spin_unlock(&udc->lock); | |
bae4bd84 | 871 | driver->disconnect(&udc->gadget); |
4f4c5e36 HH |
872 | spin_lock(&udc->lock); |
873 | } | |
bae4bd84 DB |
874 | |
875 | udc_reinit(udc); | |
876 | } | |
877 | ||
878 | static void clk_on(struct at91_udc *udc) | |
879 | { | |
880 | if (udc->clocked) | |
881 | return; | |
882 | udc->clocked = 1; | |
883 | clk_enable(udc->iclk); | |
884 | clk_enable(udc->fclk); | |
885 | } | |
886 | ||
887 | static void clk_off(struct at91_udc *udc) | |
888 | { | |
889 | if (!udc->clocked) | |
890 | return; | |
891 | udc->clocked = 0; | |
892 | udc->gadget.speed = USB_SPEED_UNKNOWN; | |
bae4bd84 | 893 | clk_disable(udc->fclk); |
8b2e7668 | 894 | clk_disable(udc->iclk); |
bae4bd84 DB |
895 | } |
896 | ||
897 | /* | |
898 | * activate/deactivate link with host; minimize power usage for | |
899 | * inactive links by cutting clocks and transceiver power. | |
900 | */ | |
901 | static void pullup(struct at91_udc *udc, int is_on) | |
902 | { | |
f3db6e82 DB |
903 | int active = !udc->board.pullup_active_low; |
904 | ||
bae4bd84 DB |
905 | if (!udc->enabled || !udc->vbus) |
906 | is_on = 0; | |
907 | DBG("%sactive\n", is_on ? "" : "in"); | |
ffd3326b | 908 | |
bae4bd84 DB |
909 | if (is_on) { |
910 | clk_on(udc); | |
08cbc706 | 911 | at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM); |
ffd3326b | 912 | at91_udp_write(udc, AT91_UDP_TXVC, 0); |
29ba4b53 | 913 | if (cpu_is_at91rm9200()) |
f3db6e82 | 914 | gpio_set_value(udc->board.pullup_pin, active); |
61352667 | 915 | else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() || cpu_is_at91sam9g20()) { |
29ba4b53 AV |
916 | u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC); |
917 | ||
918 | txvc |= AT91_UDP_TXVC_PUON; | |
919 | at91_udp_write(udc, AT91_UDP_TXVC, txvc); | |
23f6d914 | 920 | } else if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) { |
29ba4b53 AV |
921 | u32 usbpucr; |
922 | ||
923 | usbpucr = at91_sys_read(AT91_MATRIX_USBPUCR); | |
924 | usbpucr |= AT91_MATRIX_USBPUCR_PUON; | |
925 | at91_sys_write(AT91_MATRIX_USBPUCR, usbpucr); | |
926 | } | |
ffd3326b | 927 | } else { |
bae4bd84 | 928 | stop_activity(udc); |
08cbc706 | 929 | at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM); |
ffd3326b | 930 | at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS); |
29ba4b53 | 931 | if (cpu_is_at91rm9200()) |
f3db6e82 | 932 | gpio_set_value(udc->board.pullup_pin, !active); |
61352667 | 933 | else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() || cpu_is_at91sam9g20()) { |
29ba4b53 AV |
934 | u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC); |
935 | ||
936 | txvc &= ~AT91_UDP_TXVC_PUON; | |
937 | at91_udp_write(udc, AT91_UDP_TXVC, txvc); | |
23f6d914 | 938 | } else if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) { |
29ba4b53 AV |
939 | u32 usbpucr; |
940 | ||
941 | usbpucr = at91_sys_read(AT91_MATRIX_USBPUCR); | |
942 | usbpucr &= ~AT91_MATRIX_USBPUCR_PUON; | |
943 | at91_sys_write(AT91_MATRIX_USBPUCR, usbpucr); | |
944 | } | |
bae4bd84 | 945 | clk_off(udc); |
bae4bd84 DB |
946 | } |
947 | } | |
948 | ||
949 | /* vbus is here! turn everything on that's ready */ | |
950 | static int at91_vbus_session(struct usb_gadget *gadget, int is_active) | |
951 | { | |
952 | struct at91_udc *udc = to_udc(gadget); | |
953 | unsigned long flags; | |
954 | ||
955 | // VDBG("vbus %s\n", is_active ? "on" : "off"); | |
4f4c5e36 | 956 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 | 957 | udc->vbus = (is_active != 0); |
bfb7fb79 WK |
958 | if (udc->driver) |
959 | pullup(udc, is_active); | |
960 | else | |
961 | pullup(udc, 0); | |
4f4c5e36 | 962 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
963 | return 0; |
964 | } | |
965 | ||
966 | static int at91_pullup(struct usb_gadget *gadget, int is_on) | |
967 | { | |
968 | struct at91_udc *udc = to_udc(gadget); | |
969 | unsigned long flags; | |
970 | ||
4f4c5e36 | 971 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 DB |
972 | udc->enabled = is_on = !!is_on; |
973 | pullup(udc, is_on); | |
4f4c5e36 | 974 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
975 | return 0; |
976 | } | |
977 | ||
978 | static int at91_set_selfpowered(struct usb_gadget *gadget, int is_on) | |
979 | { | |
980 | struct at91_udc *udc = to_udc(gadget); | |
981 | unsigned long flags; | |
982 | ||
4f4c5e36 | 983 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 | 984 | udc->selfpowered = (is_on != 0); |
4f4c5e36 | 985 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
986 | return 0; |
987 | } | |
988 | ||
0f91349b SAS |
989 | static int at91_start(struct usb_gadget_driver *driver, |
990 | int (*bind)(struct usb_gadget *)); | |
991 | static int at91_stop(struct usb_gadget_driver *driver); | |
992 | ||
bae4bd84 DB |
993 | static const struct usb_gadget_ops at91_udc_ops = { |
994 | .get_frame = at91_get_frame, | |
995 | .wakeup = at91_wakeup, | |
996 | .set_selfpowered = at91_set_selfpowered, | |
997 | .vbus_session = at91_vbus_session, | |
998 | .pullup = at91_pullup, | |
0f91349b SAS |
999 | .start = at91_start, |
1000 | .stop = at91_stop, | |
bae4bd84 DB |
1001 | |
1002 | /* | |
1003 | * VBUS-powered devices may also also want to support bigger | |
1004 | * power budgets after an appropriate SET_CONFIGURATION. | |
1005 | */ | |
1006 | // .vbus_power = at91_vbus_power, | |
1007 | }; | |
1008 | ||
1009 | /*-------------------------------------------------------------------------*/ | |
1010 | ||
1011 | static int handle_ep(struct at91_ep *ep) | |
1012 | { | |
1013 | struct at91_request *req; | |
1014 | u32 __iomem *creg = ep->creg; | |
1015 | u32 csr = __raw_readl(creg); | |
1016 | ||
1017 | if (!list_empty(&ep->queue)) | |
1018 | req = list_entry(ep->queue.next, | |
1019 | struct at91_request, queue); | |
1020 | else | |
1021 | req = NULL; | |
1022 | ||
1023 | if (ep->is_in) { | |
1024 | if (csr & (AT91_UDP_STALLSENT | AT91_UDP_TXCOMP)) { | |
1025 | csr |= CLR_FX; | |
1026 | csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP); | |
1027 | __raw_writel(csr, creg); | |
1028 | } | |
1029 | if (req) | |
1030 | return write_fifo(ep, req); | |
1031 | ||
1032 | } else { | |
1033 | if (csr & AT91_UDP_STALLSENT) { | |
1034 | /* STALLSENT bit == ISOERR */ | |
1035 | if (ep->is_iso && req) | |
1036 | req->req.status = -EILSEQ; | |
1037 | csr |= CLR_FX; | |
1038 | csr &= ~(SET_FX | AT91_UDP_STALLSENT); | |
1039 | __raw_writel(csr, creg); | |
1040 | csr = __raw_readl(creg); | |
1041 | } | |
1042 | if (req && (csr & RX_DATA_READY)) | |
1043 | return read_fifo(ep, req); | |
1044 | } | |
1045 | return 0; | |
1046 | } | |
1047 | ||
1048 | union setup { | |
1049 | u8 raw[8]; | |
1050 | struct usb_ctrlrequest r; | |
1051 | }; | |
1052 | ||
1053 | static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr) | |
1054 | { | |
1055 | u32 __iomem *creg = ep->creg; | |
1056 | u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); | |
1057 | unsigned rxcount, i = 0; | |
1058 | u32 tmp; | |
1059 | union setup pkt; | |
1060 | int status = 0; | |
1061 | ||
1062 | /* read and ack SETUP; hard-fail for bogus packets */ | |
1063 | rxcount = (csr & AT91_UDP_RXBYTECNT) >> 16; | |
1064 | if (likely(rxcount == 8)) { | |
1065 | while (rxcount--) | |
1066 | pkt.raw[i++] = __raw_readb(dreg); | |
1067 | if (pkt.r.bRequestType & USB_DIR_IN) { | |
1068 | csr |= AT91_UDP_DIR; | |
1069 | ep->is_in = 1; | |
1070 | } else { | |
1071 | csr &= ~AT91_UDP_DIR; | |
1072 | ep->is_in = 0; | |
1073 | } | |
1074 | } else { | |
1075 | // REVISIT this happens sometimes under load; why?? | |
1076 | ERR("SETUP len %d, csr %08x\n", rxcount, csr); | |
1077 | status = -EINVAL; | |
1078 | } | |
1079 | csr |= CLR_FX; | |
1080 | csr &= ~(SET_FX | AT91_UDP_RXSETUP); | |
1081 | __raw_writel(csr, creg); | |
1082 | udc->wait_for_addr_ack = 0; | |
1083 | udc->wait_for_config_ack = 0; | |
1084 | ep->stopped = 0; | |
1085 | if (unlikely(status != 0)) | |
1086 | goto stall; | |
1087 | ||
1088 | #define w_index le16_to_cpu(pkt.r.wIndex) | |
1089 | #define w_value le16_to_cpu(pkt.r.wValue) | |
1090 | #define w_length le16_to_cpu(pkt.r.wLength) | |
1091 | ||
1092 | VDBG("SETUP %02x.%02x v%04x i%04x l%04x\n", | |
1093 | pkt.r.bRequestType, pkt.r.bRequest, | |
1094 | w_value, w_index, w_length); | |
1095 | ||
1096 | /* | |
1097 | * A few standard requests get handled here, ones that touch | |
1098 | * hardware ... notably for device and endpoint features. | |
1099 | */ | |
1100 | udc->req_pending = 1; | |
1101 | csr = __raw_readl(creg); | |
1102 | csr |= CLR_FX; | |
1103 | csr &= ~SET_FX; | |
1104 | switch ((pkt.r.bRequestType << 8) | pkt.r.bRequest) { | |
1105 | ||
1106 | case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) | |
1107 | | USB_REQ_SET_ADDRESS: | |
1108 | __raw_writel(csr | AT91_UDP_TXPKTRDY, creg); | |
1109 | udc->addr = w_value; | |
1110 | udc->wait_for_addr_ack = 1; | |
1111 | udc->req_pending = 0; | |
1112 | /* FADDR is set later, when we ack host STATUS */ | |
1113 | return; | |
1114 | ||
1115 | case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) | |
1116 | | USB_REQ_SET_CONFIGURATION: | |
ffd3326b | 1117 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_CONFG; |
bae4bd84 DB |
1118 | if (pkt.r.wValue) |
1119 | udc->wait_for_config_ack = (tmp == 0); | |
1120 | else | |
1121 | udc->wait_for_config_ack = (tmp != 0); | |
1122 | if (udc->wait_for_config_ack) | |
1123 | VDBG("wait for config\n"); | |
1124 | /* CONFG is toggled later, if gadget driver succeeds */ | |
1125 | break; | |
1126 | ||
1127 | /* | |
1128 | * Hosts may set or clear remote wakeup status, and | |
1129 | * devices may report they're VBUS powered. | |
1130 | */ | |
1131 | case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) | |
1132 | | USB_REQ_GET_STATUS: | |
1133 | tmp = (udc->selfpowered << USB_DEVICE_SELF_POWERED); | |
ffd3326b | 1134 | if (at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_ESR) |
bae4bd84 DB |
1135 | tmp |= (1 << USB_DEVICE_REMOTE_WAKEUP); |
1136 | PACKET("get device status\n"); | |
1137 | __raw_writeb(tmp, dreg); | |
1138 | __raw_writeb(0, dreg); | |
1139 | goto write_in; | |
1140 | /* then STATUS starts later, automatically */ | |
1141 | case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) | |
1142 | | USB_REQ_SET_FEATURE: | |
1143 | if (w_value != USB_DEVICE_REMOTE_WAKEUP) | |
1144 | goto stall; | |
ffd3326b | 1145 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
bae4bd84 | 1146 | tmp |= AT91_UDP_ESR; |
ffd3326b | 1147 | at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); |
bae4bd84 DB |
1148 | goto succeed; |
1149 | case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) | |
1150 | | USB_REQ_CLEAR_FEATURE: | |
1151 | if (w_value != USB_DEVICE_REMOTE_WAKEUP) | |
1152 | goto stall; | |
ffd3326b | 1153 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
bae4bd84 | 1154 | tmp &= ~AT91_UDP_ESR; |
ffd3326b | 1155 | at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); |
bae4bd84 DB |
1156 | goto succeed; |
1157 | ||
1158 | /* | |
1159 | * Interfaces have no feature settings; this is pretty useless. | |
1160 | * we won't even insist the interface exists... | |
1161 | */ | |
1162 | case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) | |
1163 | | USB_REQ_GET_STATUS: | |
1164 | PACKET("get interface status\n"); | |
1165 | __raw_writeb(0, dreg); | |
1166 | __raw_writeb(0, dreg); | |
1167 | goto write_in; | |
1168 | /* then STATUS starts later, automatically */ | |
1169 | case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) | |
1170 | | USB_REQ_SET_FEATURE: | |
1171 | case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) | |
1172 | | USB_REQ_CLEAR_FEATURE: | |
1173 | goto stall; | |
1174 | ||
1175 | /* | |
1176 | * Hosts may clear bulk/intr endpoint halt after the gadget | |
1177 | * driver sets it (not widely used); or set it (for testing) | |
1178 | */ | |
1179 | case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) | |
1180 | | USB_REQ_GET_STATUS: | |
1181 | tmp = w_index & USB_ENDPOINT_NUMBER_MASK; | |
1182 | ep = &udc->ep[tmp]; | |
1440e096 | 1183 | if (tmp >= NUM_ENDPOINTS || (tmp && !ep->desc)) |
bae4bd84 DB |
1184 | goto stall; |
1185 | ||
1186 | if (tmp) { | |
1187 | if ((w_index & USB_DIR_IN)) { | |
1188 | if (!ep->is_in) | |
1189 | goto stall; | |
1190 | } else if (ep->is_in) | |
1191 | goto stall; | |
1192 | } | |
1193 | PACKET("get %s status\n", ep->ep.name); | |
1194 | if (__raw_readl(ep->creg) & AT91_UDP_FORCESTALL) | |
1195 | tmp = (1 << USB_ENDPOINT_HALT); | |
1196 | else | |
1197 | tmp = 0; | |
1198 | __raw_writeb(tmp, dreg); | |
1199 | __raw_writeb(0, dreg); | |
1200 | goto write_in; | |
1201 | /* then STATUS starts later, automatically */ | |
1202 | case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) | |
1203 | | USB_REQ_SET_FEATURE: | |
1204 | tmp = w_index & USB_ENDPOINT_NUMBER_MASK; | |
1205 | ep = &udc->ep[tmp]; | |
1440e096 | 1206 | if (w_value != USB_ENDPOINT_HALT || tmp >= NUM_ENDPOINTS) |
bae4bd84 DB |
1207 | goto stall; |
1208 | if (!ep->desc || ep->is_iso) | |
1209 | goto stall; | |
1210 | if ((w_index & USB_DIR_IN)) { | |
1211 | if (!ep->is_in) | |
1212 | goto stall; | |
1213 | } else if (ep->is_in) | |
1214 | goto stall; | |
1215 | ||
1216 | tmp = __raw_readl(ep->creg); | |
1217 | tmp &= ~SET_FX; | |
1218 | tmp |= CLR_FX | AT91_UDP_FORCESTALL; | |
1219 | __raw_writel(tmp, ep->creg); | |
1220 | goto succeed; | |
1221 | case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) | |
1222 | | USB_REQ_CLEAR_FEATURE: | |
1223 | tmp = w_index & USB_ENDPOINT_NUMBER_MASK; | |
1224 | ep = &udc->ep[tmp]; | |
1440e096 | 1225 | if (w_value != USB_ENDPOINT_HALT || tmp >= NUM_ENDPOINTS) |
bae4bd84 DB |
1226 | goto stall; |
1227 | if (tmp == 0) | |
1228 | goto succeed; | |
1229 | if (!ep->desc || ep->is_iso) | |
1230 | goto stall; | |
1231 | if ((w_index & USB_DIR_IN)) { | |
1232 | if (!ep->is_in) | |
1233 | goto stall; | |
1234 | } else if (ep->is_in) | |
1235 | goto stall; | |
1236 | ||
ffd3326b AV |
1237 | at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); |
1238 | at91_udp_write(udc, AT91_UDP_RST_EP, 0); | |
bae4bd84 DB |
1239 | tmp = __raw_readl(ep->creg); |
1240 | tmp |= CLR_FX; | |
1241 | tmp &= ~(SET_FX | AT91_UDP_FORCESTALL); | |
1242 | __raw_writel(tmp, ep->creg); | |
1243 | if (!list_empty(&ep->queue)) | |
1244 | handle_ep(ep); | |
1245 | goto succeed; | |
1246 | } | |
1247 | ||
1248 | #undef w_value | |
1249 | #undef w_index | |
1250 | #undef w_length | |
1251 | ||
1252 | /* pass request up to the gadget driver */ | |
4f4c5e36 HH |
1253 | if (udc->driver) { |
1254 | spin_unlock(&udc->lock); | |
bfb7fb79 | 1255 | status = udc->driver->setup(&udc->gadget, &pkt.r); |
4f4c5e36 HH |
1256 | spin_lock(&udc->lock); |
1257 | } | |
bfb7fb79 WK |
1258 | else |
1259 | status = -ENODEV; | |
bae4bd84 DB |
1260 | if (status < 0) { |
1261 | stall: | |
1262 | VDBG("req %02x.%02x protocol STALL; stat %d\n", | |
1263 | pkt.r.bRequestType, pkt.r.bRequest, status); | |
1264 | csr |= AT91_UDP_FORCESTALL; | |
1265 | __raw_writel(csr, creg); | |
1266 | udc->req_pending = 0; | |
1267 | } | |
1268 | return; | |
1269 | ||
1270 | succeed: | |
1271 | /* immediate successful (IN) STATUS after zero length DATA */ | |
1272 | PACKET("ep0 in/status\n"); | |
1273 | write_in: | |
1274 | csr |= AT91_UDP_TXPKTRDY; | |
1275 | __raw_writel(csr, creg); | |
1276 | udc->req_pending = 0; | |
bae4bd84 DB |
1277 | } |
1278 | ||
1279 | static void handle_ep0(struct at91_udc *udc) | |
1280 | { | |
1281 | struct at91_ep *ep0 = &udc->ep[0]; | |
1282 | u32 __iomem *creg = ep0->creg; | |
1283 | u32 csr = __raw_readl(creg); | |
1284 | struct at91_request *req; | |
1285 | ||
1286 | if (unlikely(csr & AT91_UDP_STALLSENT)) { | |
1287 | nuke(ep0, -EPROTO); | |
1288 | udc->req_pending = 0; | |
1289 | csr |= CLR_FX; | |
1290 | csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_FORCESTALL); | |
1291 | __raw_writel(csr, creg); | |
1292 | VDBG("ep0 stalled\n"); | |
1293 | csr = __raw_readl(creg); | |
1294 | } | |
1295 | if (csr & AT91_UDP_RXSETUP) { | |
1296 | nuke(ep0, 0); | |
1297 | udc->req_pending = 0; | |
1298 | handle_setup(udc, ep0, csr); | |
1299 | return; | |
1300 | } | |
1301 | ||
1302 | if (list_empty(&ep0->queue)) | |
1303 | req = NULL; | |
1304 | else | |
1305 | req = list_entry(ep0->queue.next, struct at91_request, queue); | |
1306 | ||
1307 | /* host ACKed an IN packet that we sent */ | |
1308 | if (csr & AT91_UDP_TXCOMP) { | |
1309 | csr |= CLR_FX; | |
1310 | csr &= ~(SET_FX | AT91_UDP_TXCOMP); | |
1311 | ||
1312 | /* write more IN DATA? */ | |
1313 | if (req && ep0->is_in) { | |
1314 | if (handle_ep(ep0)) | |
1315 | udc->req_pending = 0; | |
1316 | ||
1317 | /* | |
1318 | * Ack after: | |
1319 | * - last IN DATA packet (including GET_STATUS) | |
1320 | * - IN/STATUS for OUT DATA | |
1321 | * - IN/STATUS for any zero-length DATA stage | |
1322 | * except for the IN DATA case, the host should send | |
1323 | * an OUT status later, which we'll ack. | |
1324 | */ | |
1325 | } else { | |
1326 | udc->req_pending = 0; | |
1327 | __raw_writel(csr, creg); | |
1328 | ||
1329 | /* | |
1330 | * SET_ADDRESS takes effect only after the STATUS | |
1331 | * (to the original address) gets acked. | |
1332 | */ | |
1333 | if (udc->wait_for_addr_ack) { | |
1334 | u32 tmp; | |
1335 | ||
ffd3326b | 1336 | at91_udp_write(udc, AT91_UDP_FADDR, |
8b2e7668 | 1337 | AT91_UDP_FEN | udc->addr); |
ffd3326b | 1338 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
bae4bd84 DB |
1339 | tmp &= ~AT91_UDP_FADDEN; |
1340 | if (udc->addr) | |
1341 | tmp |= AT91_UDP_FADDEN; | |
ffd3326b | 1342 | at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); |
bae4bd84 DB |
1343 | |
1344 | udc->wait_for_addr_ack = 0; | |
1345 | VDBG("address %d\n", udc->addr); | |
1346 | } | |
1347 | } | |
1348 | } | |
1349 | ||
1350 | /* OUT packet arrived ... */ | |
1351 | else if (csr & AT91_UDP_RX_DATA_BK0) { | |
1352 | csr |= CLR_FX; | |
1353 | csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); | |
1354 | ||
1355 | /* OUT DATA stage */ | |
1356 | if (!ep0->is_in) { | |
1357 | if (req) { | |
1358 | if (handle_ep(ep0)) { | |
1359 | /* send IN/STATUS */ | |
1360 | PACKET("ep0 in/status\n"); | |
1361 | csr = __raw_readl(creg); | |
1362 | csr &= ~SET_FX; | |
1363 | csr |= CLR_FX | AT91_UDP_TXPKTRDY; | |
1364 | __raw_writel(csr, creg); | |
1365 | udc->req_pending = 0; | |
1366 | } | |
1367 | } else if (udc->req_pending) { | |
1368 | /* | |
1369 | * AT91 hardware has a hard time with this | |
1370 | * "deferred response" mode for control-OUT | |
1371 | * transfers. (For control-IN it's fine.) | |
1372 | * | |
1373 | * The normal solution leaves OUT data in the | |
1374 | * fifo until the gadget driver is ready. | |
1375 | * We couldn't do that here without disabling | |
1376 | * the IRQ that tells about SETUP packets, | |
1377 | * e.g. when the host gets impatient... | |
1378 | * | |
1379 | * Working around it by copying into a buffer | |
1380 | * would almost be a non-deferred response, | |
1381 | * except that it wouldn't permit reliable | |
1382 | * stalling of the request. Instead, demand | |
1383 | * that gadget drivers not use this mode. | |
1384 | */ | |
1385 | DBG("no control-OUT deferred responses!\n"); | |
1386 | __raw_writel(csr | AT91_UDP_FORCESTALL, creg); | |
1387 | udc->req_pending = 0; | |
1388 | } | |
1389 | ||
1390 | /* STATUS stage for control-IN; ack. */ | |
1391 | } else { | |
1392 | PACKET("ep0 out/status ACK\n"); | |
1393 | __raw_writel(csr, creg); | |
1394 | ||
1395 | /* "early" status stage */ | |
1396 | if (req) | |
1397 | done(ep0, req, 0); | |
1398 | } | |
1399 | } | |
1400 | } | |
1401 | ||
7d12e780 | 1402 | static irqreturn_t at91_udc_irq (int irq, void *_udc) |
bae4bd84 DB |
1403 | { |
1404 | struct at91_udc *udc = _udc; | |
1405 | u32 rescans = 5; | |
c6c35237 | 1406 | int disable_clock = 0; |
4f4c5e36 HH |
1407 | unsigned long flags; |
1408 | ||
1409 | spin_lock_irqsave(&udc->lock, flags); | |
c6c35237 HH |
1410 | |
1411 | if (!udc->clocked) { | |
1412 | clk_on(udc); | |
1413 | disable_clock = 1; | |
1414 | } | |
bae4bd84 DB |
1415 | |
1416 | while (rescans--) { | |
8b2e7668 | 1417 | u32 status; |
bae4bd84 | 1418 | |
ffd3326b AV |
1419 | status = at91_udp_read(udc, AT91_UDP_ISR) |
1420 | & at91_udp_read(udc, AT91_UDP_IMR); | |
bae4bd84 DB |
1421 | if (!status) |
1422 | break; | |
1423 | ||
1424 | /* USB reset irq: not maskable */ | |
1425 | if (status & AT91_UDP_ENDBUSRES) { | |
ffd3326b AV |
1426 | at91_udp_write(udc, AT91_UDP_IDR, ~MINIMUS_INTERRUPTUS); |
1427 | at91_udp_write(udc, AT91_UDP_IER, MINIMUS_INTERRUPTUS); | |
bae4bd84 | 1428 | /* Atmel code clears this irq twice */ |
ffd3326b AV |
1429 | at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES); |
1430 | at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES); | |
bae4bd84 DB |
1431 | VDBG("end bus reset\n"); |
1432 | udc->addr = 0; | |
1433 | stop_activity(udc); | |
1434 | ||
1435 | /* enable ep0 */ | |
ffd3326b | 1436 | at91_udp_write(udc, AT91_UDP_CSR(0), |
8b2e7668 | 1437 | AT91_UDP_EPEDS | AT91_UDP_EPTYPE_CTRL); |
bae4bd84 DB |
1438 | udc->gadget.speed = USB_SPEED_FULL; |
1439 | udc->suspended = 0; | |
ffd3326b | 1440 | at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_EP(0)); |
bae4bd84 DB |
1441 | |
1442 | /* | |
1443 | * NOTE: this driver keeps clocks off unless the | |
8b2e7668 DB |
1444 | * USB host is present. That saves power, but for |
1445 | * boards that don't support VBUS detection, both | |
1446 | * clocks need to be active most of the time. | |
bae4bd84 DB |
1447 | */ |
1448 | ||
1449 | /* host initiated suspend (3+ms bus idle) */ | |
1450 | } else if (status & AT91_UDP_RXSUSP) { | |
ffd3326b AV |
1451 | at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXSUSP); |
1452 | at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXRSM); | |
1453 | at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXSUSP); | |
bae4bd84 DB |
1454 | // VDBG("bus suspend\n"); |
1455 | if (udc->suspended) | |
1456 | continue; | |
1457 | udc->suspended = 1; | |
1458 | ||
1459 | /* | |
1460 | * NOTE: when suspending a VBUS-powered device, the | |
1461 | * gadget driver should switch into slow clock mode | |
1462 | * and then into standby to avoid drawing more than | |
1463 | * 500uA power (2500uA for some high-power configs). | |
1464 | */ | |
4f4c5e36 HH |
1465 | if (udc->driver && udc->driver->suspend) { |
1466 | spin_unlock(&udc->lock); | |
bae4bd84 | 1467 | udc->driver->suspend(&udc->gadget); |
4f4c5e36 HH |
1468 | spin_lock(&udc->lock); |
1469 | } | |
bae4bd84 DB |
1470 | |
1471 | /* host initiated resume */ | |
1472 | } else if (status & AT91_UDP_RXRSM) { | |
ffd3326b AV |
1473 | at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM); |
1474 | at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXSUSP); | |
1475 | at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM); | |
bae4bd84 DB |
1476 | // VDBG("bus resume\n"); |
1477 | if (!udc->suspended) | |
1478 | continue; | |
1479 | udc->suspended = 0; | |
1480 | ||
1481 | /* | |
1482 | * NOTE: for a VBUS-powered device, the gadget driver | |
1483 | * would normally want to switch out of slow clock | |
1484 | * mode into normal mode. | |
1485 | */ | |
4f4c5e36 HH |
1486 | if (udc->driver && udc->driver->resume) { |
1487 | spin_unlock(&udc->lock); | |
bae4bd84 | 1488 | udc->driver->resume(&udc->gadget); |
4f4c5e36 HH |
1489 | spin_lock(&udc->lock); |
1490 | } | |
bae4bd84 DB |
1491 | |
1492 | /* endpoint IRQs are cleared by handling them */ | |
1493 | } else { | |
1494 | int i; | |
1495 | unsigned mask = 1; | |
1496 | struct at91_ep *ep = &udc->ep[1]; | |
1497 | ||
1498 | if (status & mask) | |
1499 | handle_ep0(udc); | |
1500 | for (i = 1; i < NUM_ENDPOINTS; i++) { | |
1501 | mask <<= 1; | |
1502 | if (status & mask) | |
1503 | handle_ep(ep); | |
1504 | ep++; | |
1505 | } | |
1506 | } | |
1507 | } | |
1508 | ||
c6c35237 HH |
1509 | if (disable_clock) |
1510 | clk_off(udc); | |
1511 | ||
4f4c5e36 HH |
1512 | spin_unlock_irqrestore(&udc->lock, flags); |
1513 | ||
bae4bd84 DB |
1514 | return IRQ_HANDLED; |
1515 | } | |
1516 | ||
1517 | /*-------------------------------------------------------------------------*/ | |
1518 | ||
8b2e7668 DB |
1519 | static void nop_release(struct device *dev) |
1520 | { | |
1521 | /* nothing to free */ | |
1522 | } | |
1523 | ||
bae4bd84 DB |
1524 | static struct at91_udc controller = { |
1525 | .gadget = { | |
8b2e7668 DB |
1526 | .ops = &at91_udc_ops, |
1527 | .ep0 = &controller.ep[0].ep, | |
1528 | .name = driver_name, | |
1529 | .dev = { | |
c682b170 | 1530 | .init_name = "gadget", |
8b2e7668 | 1531 | .release = nop_release, |
bae4bd84 DB |
1532 | } |
1533 | }, | |
1534 | .ep[0] = { | |
1535 | .ep = { | |
1536 | .name = ep0name, | |
1537 | .ops = &at91_ep_ops, | |
1538 | }, | |
1539 | .udc = &controller, | |
1540 | .maxpacket = 8, | |
bae4bd84 DB |
1541 | .int_mask = 1 << 0, |
1542 | }, | |
1543 | .ep[1] = { | |
1544 | .ep = { | |
1545 | .name = "ep1", | |
1546 | .ops = &at91_ep_ops, | |
1547 | }, | |
1548 | .udc = &controller, | |
1549 | .is_pingpong = 1, | |
1550 | .maxpacket = 64, | |
bae4bd84 DB |
1551 | .int_mask = 1 << 1, |
1552 | }, | |
1553 | .ep[2] = { | |
1554 | .ep = { | |
1555 | .name = "ep2", | |
1556 | .ops = &at91_ep_ops, | |
1557 | }, | |
1558 | .udc = &controller, | |
1559 | .is_pingpong = 1, | |
1560 | .maxpacket = 64, | |
bae4bd84 DB |
1561 | .int_mask = 1 << 2, |
1562 | }, | |
1563 | .ep[3] = { | |
1564 | .ep = { | |
1565 | /* could actually do bulk too */ | |
1566 | .name = "ep3-int", | |
1567 | .ops = &at91_ep_ops, | |
1568 | }, | |
1569 | .udc = &controller, | |
1570 | .maxpacket = 8, | |
bae4bd84 DB |
1571 | .int_mask = 1 << 3, |
1572 | }, | |
1573 | .ep[4] = { | |
1574 | .ep = { | |
1575 | .name = "ep4", | |
1576 | .ops = &at91_ep_ops, | |
1577 | }, | |
1578 | .udc = &controller, | |
1579 | .is_pingpong = 1, | |
1580 | .maxpacket = 256, | |
bae4bd84 DB |
1581 | .int_mask = 1 << 4, |
1582 | }, | |
1583 | .ep[5] = { | |
1584 | .ep = { | |
1585 | .name = "ep5", | |
1586 | .ops = &at91_ep_ops, | |
1587 | }, | |
1588 | .udc = &controller, | |
1589 | .is_pingpong = 1, | |
1590 | .maxpacket = 256, | |
bae4bd84 DB |
1591 | .int_mask = 1 << 5, |
1592 | }, | |
8b2e7668 | 1593 | /* ep6 and ep7 are also reserved (custom silicon might use them) */ |
bae4bd84 DB |
1594 | }; |
1595 | ||
4037242c RM |
1596 | static void at91_vbus_update(struct at91_udc *udc, unsigned value) |
1597 | { | |
1598 | value ^= udc->board.vbus_active_low; | |
1599 | if (value != udc->vbus) | |
1600 | at91_vbus_session(&udc->gadget, value); | |
1601 | } | |
1602 | ||
7d12e780 | 1603 | static irqreturn_t at91_vbus_irq(int irq, void *_udc) |
bae4bd84 DB |
1604 | { |
1605 | struct at91_udc *udc = _udc; | |
bae4bd84 DB |
1606 | |
1607 | /* vbus needs at least brief debouncing */ | |
1608 | udelay(10); | |
4037242c | 1609 | at91_vbus_update(udc, gpio_get_value(udc->board.vbus_pin)); |
bae4bd84 DB |
1610 | |
1611 | return IRQ_HANDLED; | |
1612 | } | |
1613 | ||
4037242c RM |
1614 | static void at91_vbus_timer_work(struct work_struct *work) |
1615 | { | |
1616 | struct at91_udc *udc = container_of(work, struct at91_udc, | |
1617 | vbus_timer_work); | |
1618 | ||
1619 | at91_vbus_update(udc, gpio_get_value_cansleep(udc->board.vbus_pin)); | |
1620 | ||
1621 | if (!timer_pending(&udc->vbus_timer)) | |
1622 | mod_timer(&udc->vbus_timer, jiffies + VBUS_POLL_TIMEOUT); | |
1623 | } | |
1624 | ||
1625 | static void at91_vbus_timer(unsigned long data) | |
1626 | { | |
1627 | struct at91_udc *udc = (struct at91_udc *)data; | |
1628 | ||
1629 | /* | |
1630 | * If we are polling vbus it is likely that the gpio is on an | |
1631 | * bus such as i2c or spi which may sleep, so schedule some work | |
1632 | * to read the vbus gpio | |
1633 | */ | |
1634 | if (!work_pending(&udc->vbus_timer_work)) | |
1635 | schedule_work(&udc->vbus_timer_work); | |
1636 | } | |
1637 | ||
0f91349b | 1638 | static int at91_start(struct usb_gadget_driver *driver, |
b0fca50f | 1639 | int (*bind)(struct usb_gadget *)) |
bae4bd84 DB |
1640 | { |
1641 | struct at91_udc *udc = &controller; | |
1642 | int retval; | |
4f4c5e36 | 1643 | unsigned long flags; |
bae4bd84 DB |
1644 | |
1645 | if (!driver | |
bc92c32a | 1646 | || driver->speed < USB_SPEED_FULL |
b0fca50f | 1647 | || !bind |
bae4bd84 DB |
1648 | || !driver->setup) { |
1649 | DBG("bad parameter.\n"); | |
1650 | return -EINVAL; | |
1651 | } | |
1652 | ||
1653 | if (udc->driver) { | |
1654 | DBG("UDC already has a gadget driver\n"); | |
1655 | return -EBUSY; | |
1656 | } | |
1657 | ||
1658 | udc->driver = driver; | |
1659 | udc->gadget.dev.driver = &driver->driver; | |
839214ae | 1660 | dev_set_drvdata(&udc->gadget.dev, &driver->driver); |
bae4bd84 DB |
1661 | udc->enabled = 1; |
1662 | udc->selfpowered = 1; | |
1663 | ||
b0fca50f | 1664 | retval = bind(&udc->gadget); |
bae4bd84 | 1665 | if (retval) { |
b0fca50f | 1666 | DBG("bind() returned %d\n", retval); |
bae4bd84 | 1667 | udc->driver = NULL; |
943c4419 | 1668 | udc->gadget.dev.driver = NULL; |
839214ae | 1669 | dev_set_drvdata(&udc->gadget.dev, NULL); |
943c4419 WK |
1670 | udc->enabled = 0; |
1671 | udc->selfpowered = 0; | |
bae4bd84 DB |
1672 | return retval; |
1673 | } | |
1674 | ||
4f4c5e36 | 1675 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 | 1676 | pullup(udc, 1); |
4f4c5e36 | 1677 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
1678 | |
1679 | DBG("bound to %s\n", driver->driver.name); | |
1680 | return 0; | |
1681 | } | |
bae4bd84 | 1682 | |
0f91349b | 1683 | static int at91_stop(struct usb_gadget_driver *driver) |
bae4bd84 DB |
1684 | { |
1685 | struct at91_udc *udc = &controller; | |
4f4c5e36 | 1686 | unsigned long flags; |
bae4bd84 | 1687 | |
6bea476c | 1688 | if (!driver || driver != udc->driver || !driver->unbind) |
bae4bd84 DB |
1689 | return -EINVAL; |
1690 | ||
4f4c5e36 | 1691 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 | 1692 | udc->enabled = 0; |
ffd3326b | 1693 | at91_udp_write(udc, AT91_UDP_IDR, ~0); |
bae4bd84 | 1694 | pullup(udc, 0); |
4f4c5e36 | 1695 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
1696 | |
1697 | driver->unbind(&udc->gadget); | |
eb0be47d | 1698 | udc->gadget.dev.driver = NULL; |
839214ae | 1699 | dev_set_drvdata(&udc->gadget.dev, NULL); |
bae4bd84 DB |
1700 | udc->driver = NULL; |
1701 | ||
1702 | DBG("unbound from %s\n", driver->driver.name); | |
1703 | return 0; | |
1704 | } | |
bae4bd84 DB |
1705 | |
1706 | /*-------------------------------------------------------------------------*/ | |
1707 | ||
1708 | static void at91udc_shutdown(struct platform_device *dev) | |
1709 | { | |
4f4c5e36 HH |
1710 | struct at91_udc *udc = platform_get_drvdata(dev); |
1711 | unsigned long flags; | |
1712 | ||
bae4bd84 | 1713 | /* force disconnect on reboot */ |
4f4c5e36 | 1714 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 | 1715 | pullup(platform_get_drvdata(dev), 0); |
4f4c5e36 | 1716 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 DB |
1717 | } |
1718 | ||
398acce7 | 1719 | static int __init at91udc_probe(struct platform_device *pdev) |
bae4bd84 DB |
1720 | { |
1721 | struct device *dev = &pdev->dev; | |
1722 | struct at91_udc *udc; | |
1723 | int retval; | |
ffd3326b | 1724 | struct resource *res; |
bae4bd84 DB |
1725 | |
1726 | if (!dev->platform_data) { | |
1727 | /* small (so we copy it) but critical! */ | |
1728 | DBG("missing platform_data\n"); | |
1729 | return -ENODEV; | |
1730 | } | |
1731 | ||
8b2e7668 | 1732 | if (pdev->num_resources != 2) { |
f3db6e82 | 1733 | DBG("invalid num_resources\n"); |
8b2e7668 DB |
1734 | return -ENODEV; |
1735 | } | |
1736 | if ((pdev->resource[0].flags != IORESOURCE_MEM) | |
1737 | || (pdev->resource[1].flags != IORESOURCE_IRQ)) { | |
f3db6e82 | 1738 | DBG("invalid resource type\n"); |
8b2e7668 DB |
1739 | return -ENODEV; |
1740 | } | |
1741 | ||
ffd3326b AV |
1742 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
1743 | if (!res) | |
1744 | return -ENXIO; | |
1745 | ||
d8bb0fd2 | 1746 | if (!request_mem_region(res->start, resource_size(res), driver_name)) { |
bae4bd84 DB |
1747 | DBG("someone's using UDC memory\n"); |
1748 | return -EBUSY; | |
1749 | } | |
1750 | ||
1751 | /* init software state */ | |
1752 | udc = &controller; | |
1753 | udc->gadget.dev.parent = dev; | |
1754 | udc->board = *(struct at91_udc_data *) dev->platform_data; | |
1755 | udc->pdev = pdev; | |
bae4bd84 | 1756 | udc->enabled = 0; |
4f4c5e36 | 1757 | spin_lock_init(&udc->lock); |
bae4bd84 | 1758 | |
f3db6e82 DB |
1759 | /* rm9200 needs manual D+ pullup; off by default */ |
1760 | if (cpu_is_at91rm9200()) { | |
1761 | if (udc->board.pullup_pin <= 0) { | |
1762 | DBG("no D+ pullup?\n"); | |
1763 | retval = -ENODEV; | |
1764 | goto fail0; | |
1765 | } | |
1766 | retval = gpio_request(udc->board.pullup_pin, "udc_pullup"); | |
1767 | if (retval) { | |
1768 | DBG("D+ pullup is busy\n"); | |
1769 | goto fail0; | |
1770 | } | |
1771 | gpio_direction_output(udc->board.pullup_pin, | |
1772 | udc->board.pullup_active_low); | |
1773 | } | |
1774 | ||
bb24280f | 1775 | /* newer chips have more FIFO memory than rm9200 */ |
bf1f0a05 | 1776 | if (cpu_is_at91sam9260() || cpu_is_at91sam9g20()) { |
bb24280f DB |
1777 | udc->ep[0].maxpacket = 64; |
1778 | udc->ep[3].maxpacket = 64; | |
1779 | udc->ep[4].maxpacket = 512; | |
1780 | udc->ep[5].maxpacket = 512; | |
23f6d914 | 1781 | } else if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) { |
bb24280f DB |
1782 | udc->ep[3].maxpacket = 64; |
1783 | } else if (cpu_is_at91sam9263()) { | |
1784 | udc->ep[0].maxpacket = 64; | |
1785 | udc->ep[3].maxpacket = 64; | |
1786 | } | |
1787 | ||
d8bb0fd2 | 1788 | udc->udp_baseaddr = ioremap(res->start, resource_size(res)); |
ffd3326b | 1789 | if (!udc->udp_baseaddr) { |
f3db6e82 DB |
1790 | retval = -ENOMEM; |
1791 | goto fail0a; | |
ffd3326b AV |
1792 | } |
1793 | ||
1794 | udc_reinit(udc); | |
1795 | ||
bae4bd84 DB |
1796 | /* get interface and function clocks */ |
1797 | udc->iclk = clk_get(dev, "udc_clk"); | |
1798 | udc->fclk = clk_get(dev, "udpck"); | |
1799 | if (IS_ERR(udc->iclk) || IS_ERR(udc->fclk)) { | |
1800 | DBG("clocks missing\n"); | |
29ba4b53 | 1801 | retval = -ENODEV; |
f3db6e82 DB |
1802 | /* NOTE: we "know" here that refcounts on these are NOPs */ |
1803 | goto fail0b; | |
bae4bd84 DB |
1804 | } |
1805 | ||
1806 | retval = device_register(&udc->gadget.dev); | |
8ab10400 RR |
1807 | if (retval < 0) { |
1808 | put_device(&udc->gadget.dev); | |
f3db6e82 | 1809 | goto fail0b; |
8ab10400 | 1810 | } |
bae4bd84 | 1811 | |
8b2e7668 DB |
1812 | /* don't do anything until we have both gadget driver and VBUS */ |
1813 | clk_enable(udc->iclk); | |
ffd3326b AV |
1814 | at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS); |
1815 | at91_udp_write(udc, AT91_UDP_IDR, 0xffffffff); | |
29ba4b53 AV |
1816 | /* Clear all pending interrupts - UDP may be used by bootloader. */ |
1817 | at91_udp_write(udc, AT91_UDP_ICR, 0xffffffff); | |
8b2e7668 | 1818 | clk_disable(udc->iclk); |
bae4bd84 DB |
1819 | |
1820 | /* request UDC and maybe VBUS irqs */ | |
8b2e7668 | 1821 | udc->udp_irq = platform_get_irq(pdev, 0); |
f3db6e82 DB |
1822 | retval = request_irq(udc->udp_irq, at91_udc_irq, |
1823 | IRQF_DISABLED, driver_name, udc); | |
1824 | if (retval < 0) { | |
8b2e7668 | 1825 | DBG("request irq %d failed\n", udc->udp_irq); |
bae4bd84 DB |
1826 | goto fail1; |
1827 | } | |
1828 | if (udc->board.vbus_pin > 0) { | |
f3db6e82 DB |
1829 | retval = gpio_request(udc->board.vbus_pin, "udc_vbus"); |
1830 | if (retval < 0) { | |
1831 | DBG("request vbus pin failed\n"); | |
1832 | goto fail2; | |
1833 | } | |
1834 | gpio_direction_input(udc->board.vbus_pin); | |
1835 | ||
29ba4b53 AV |
1836 | /* |
1837 | * Get the initial state of VBUS - we cannot expect | |
1838 | * a pending interrupt. | |
1839 | */ | |
4037242c RM |
1840 | udc->vbus = gpio_get_value_cansleep(udc->board.vbus_pin) ^ |
1841 | udc->board.vbus_active_low; | |
1842 | ||
1843 | if (udc->board.vbus_polled) { | |
1844 | INIT_WORK(&udc->vbus_timer_work, at91_vbus_timer_work); | |
1845 | setup_timer(&udc->vbus_timer, at91_vbus_timer, | |
1846 | (unsigned long)udc); | |
1847 | mod_timer(&udc->vbus_timer, | |
1848 | jiffies + VBUS_POLL_TIMEOUT); | |
1849 | } else { | |
1850 | if (request_irq(udc->board.vbus_pin, at91_vbus_irq, | |
1851 | IRQF_DISABLED, driver_name, udc)) { | |
1852 | DBG("request vbus irq %d failed\n", | |
1853 | udc->board.vbus_pin); | |
1854 | retval = -EBUSY; | |
1855 | goto fail3; | |
1856 | } | |
bae4bd84 DB |
1857 | } |
1858 | } else { | |
1859 | DBG("no VBUS detection, assuming always-on\n"); | |
1860 | udc->vbus = 1; | |
1861 | } | |
0f91349b SAS |
1862 | retval = usb_add_gadget_udc(dev, &udc->gadget); |
1863 | if (retval) | |
1864 | goto fail4; | |
bae4bd84 | 1865 | dev_set_drvdata(dev, udc); |
8b2e7668 | 1866 | device_init_wakeup(dev, 1); |
bae4bd84 DB |
1867 | create_debug_file(udc); |
1868 | ||
1869 | INFO("%s version %s\n", driver_name, DRIVER_VERSION); | |
1870 | return 0; | |
0f91349b SAS |
1871 | fail4: |
1872 | if (udc->board.vbus_pin > 0 && !udc->board.vbus_polled) | |
1873 | free_irq(udc->board.vbus_pin, udc); | |
f3db6e82 DB |
1874 | fail3: |
1875 | if (udc->board.vbus_pin > 0) | |
1876 | gpio_free(udc->board.vbus_pin); | |
1877 | fail2: | |
1878 | free_irq(udc->udp_irq, udc); | |
bae4bd84 DB |
1879 | fail1: |
1880 | device_unregister(&udc->gadget.dev); | |
f3db6e82 DB |
1881 | fail0b: |
1882 | iounmap(udc->udp_baseaddr); | |
1883 | fail0a: | |
1884 | if (cpu_is_at91rm9200()) | |
1885 | gpio_free(udc->board.pullup_pin); | |
bae4bd84 | 1886 | fail0: |
d8bb0fd2 | 1887 | release_mem_region(res->start, resource_size(res)); |
bae4bd84 DB |
1888 | DBG("%s probe failed, %d\n", driver_name, retval); |
1889 | return retval; | |
1890 | } | |
1891 | ||
398acce7 | 1892 | static int __exit at91udc_remove(struct platform_device *pdev) |
bae4bd84 | 1893 | { |
8b2e7668 | 1894 | struct at91_udc *udc = platform_get_drvdata(pdev); |
ffd3326b | 1895 | struct resource *res; |
4f4c5e36 | 1896 | unsigned long flags; |
bae4bd84 DB |
1897 | |
1898 | DBG("remove\n"); | |
1899 | ||
0f91349b | 1900 | usb_del_gadget_udc(&udc->gadget); |
6bea476c DB |
1901 | if (udc->driver) |
1902 | return -EBUSY; | |
bae4bd84 | 1903 | |
4f4c5e36 | 1904 | spin_lock_irqsave(&udc->lock, flags); |
6bea476c | 1905 | pullup(udc, 0); |
4f4c5e36 | 1906 | spin_unlock_irqrestore(&udc->lock, flags); |
bae4bd84 | 1907 | |
8b2e7668 | 1908 | device_init_wakeup(&pdev->dev, 0); |
bae4bd84 | 1909 | remove_debug_file(udc); |
f3db6e82 | 1910 | if (udc->board.vbus_pin > 0) { |
bae4bd84 | 1911 | free_irq(udc->board.vbus_pin, udc); |
f3db6e82 DB |
1912 | gpio_free(udc->board.vbus_pin); |
1913 | } | |
8b2e7668 | 1914 | free_irq(udc->udp_irq, udc); |
bae4bd84 | 1915 | device_unregister(&udc->gadget.dev); |
ffd3326b AV |
1916 | |
1917 | iounmap(udc->udp_baseaddr); | |
f3db6e82 DB |
1918 | |
1919 | if (cpu_is_at91rm9200()) | |
1920 | gpio_free(udc->board.pullup_pin); | |
1921 | ||
ffd3326b | 1922 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
d8bb0fd2 | 1923 | release_mem_region(res->start, resource_size(res)); |
bae4bd84 DB |
1924 | |
1925 | clk_put(udc->iclk); | |
1926 | clk_put(udc->fclk); | |
1927 | ||
1928 | return 0; | |
1929 | } | |
1930 | ||
1931 | #ifdef CONFIG_PM | |
8b2e7668 | 1932 | static int at91udc_suspend(struct platform_device *pdev, pm_message_t mesg) |
bae4bd84 | 1933 | { |
8b2e7668 DB |
1934 | struct at91_udc *udc = platform_get_drvdata(pdev); |
1935 | int wake = udc->driver && device_may_wakeup(&pdev->dev); | |
4f4c5e36 | 1936 | unsigned long flags; |
bae4bd84 | 1937 | |
8b2e7668 DB |
1938 | /* Unless we can act normally to the host (letting it wake us up |
1939 | * whenever it has work for us) force disconnect. Wakeup requires | |
1940 | * PLLB for USB events (signaling for reset, wakeup, or incoming | |
1941 | * tokens) and VBUS irqs (on systems which support them). | |
bae4bd84 | 1942 | */ |
8b2e7668 DB |
1943 | if ((!udc->suspended && udc->addr) |
1944 | || !wake | |
1945 | || at91_suspend_entering_slow_clock()) { | |
4f4c5e36 | 1946 | spin_lock_irqsave(&udc->lock, flags); |
bae4bd84 | 1947 | pullup(udc, 0); |
66e56ce7 | 1948 | wake = 0; |
4f4c5e36 | 1949 | spin_unlock_irqrestore(&udc->lock, flags); |
8b2e7668 DB |
1950 | } else |
1951 | enable_irq_wake(udc->udp_irq); | |
1952 | ||
66e56ce7 | 1953 | udc->active_suspend = wake; |
4037242c | 1954 | if (udc->board.vbus_pin > 0 && !udc->board.vbus_polled && wake) |
66e56ce7 | 1955 | enable_irq_wake(udc->board.vbus_pin); |
bae4bd84 DB |
1956 | return 0; |
1957 | } | |
1958 | ||
8b2e7668 | 1959 | static int at91udc_resume(struct platform_device *pdev) |
bae4bd84 | 1960 | { |
8b2e7668 | 1961 | struct at91_udc *udc = platform_get_drvdata(pdev); |
4f4c5e36 | 1962 | unsigned long flags; |
bae4bd84 | 1963 | |
4037242c RM |
1964 | if (udc->board.vbus_pin > 0 && !udc->board.vbus_polled && |
1965 | udc->active_suspend) | |
66e56ce7 DB |
1966 | disable_irq_wake(udc->board.vbus_pin); |
1967 | ||
bae4bd84 | 1968 | /* maybe reconnect to host; if so, clocks on */ |
66e56ce7 DB |
1969 | if (udc->active_suspend) |
1970 | disable_irq_wake(udc->udp_irq); | |
4f4c5e36 HH |
1971 | else { |
1972 | spin_lock_irqsave(&udc->lock, flags); | |
66e56ce7 | 1973 | pullup(udc, 1); |
4f4c5e36 HH |
1974 | spin_unlock_irqrestore(&udc->lock, flags); |
1975 | } | |
bae4bd84 DB |
1976 | return 0; |
1977 | } | |
1978 | #else | |
1979 | #define at91udc_suspend NULL | |
1980 | #define at91udc_resume NULL | |
1981 | #endif | |
1982 | ||
dee497df | 1983 | static struct platform_driver at91_udc_driver = { |
398acce7 | 1984 | .remove = __exit_p(at91udc_remove), |
bae4bd84 DB |
1985 | .shutdown = at91udc_shutdown, |
1986 | .suspend = at91udc_suspend, | |
8b2e7668 | 1987 | .resume = at91udc_resume, |
bae4bd84 DB |
1988 | .driver = { |
1989 | .name = (char *) driver_name, | |
1990 | .owner = THIS_MODULE, | |
1991 | }, | |
1992 | }; | |
1993 | ||
398acce7 | 1994 | static int __init udc_init_module(void) |
bae4bd84 | 1995 | { |
dee497df | 1996 | return platform_driver_probe(&at91_udc_driver, at91udc_probe); |
bae4bd84 DB |
1997 | } |
1998 | module_init(udc_init_module); | |
1999 | ||
398acce7 | 2000 | static void __exit udc_exit_module(void) |
bae4bd84 | 2001 | { |
dee497df | 2002 | platform_driver_unregister(&at91_udc_driver); |
bae4bd84 DB |
2003 | } |
2004 | module_exit(udc_exit_module); | |
2005 | ||
8b2e7668 | 2006 | MODULE_DESCRIPTION("AT91 udc driver"); |
bae4bd84 DB |
2007 | MODULE_AUTHOR("Thomas Rathbone, David Brownell"); |
2008 | MODULE_LICENSE("GPL"); | |
f34c32f1 | 2009 | MODULE_ALIAS("platform:at91_udc"); |