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5fd54ace | 1 | // SPDX-License-Identifier: GPL-2.0 |
b84a8dee YHC |
2 | /* |
3 | * FOTG210 UDC Driver supports Bulk transfer so far | |
4 | * | |
5 | * Copyright (C) 2013 Faraday Technology Corporation | |
6 | * | |
7 | * Author : Yuan-Hsin Chen <yhchen@faraday-tech.com> | |
b84a8dee YHC |
8 | */ |
9 | ||
10 | #include <linux/dma-mapping.h> | |
11 | #include <linux/err.h> | |
12 | #include <linux/interrupt.h> | |
13 | #include <linux/io.h> | |
14 | #include <linux/module.h> | |
15 | #include <linux/platform_device.h> | |
16 | #include <linux/usb/ch9.h> | |
17 | #include <linux/usb/gadget.h> | |
18 | ||
aeffd2c3 | 19 | #include "fotg210.h" |
1dd33a9f | 20 | #include "fotg210-udc.h" |
b84a8dee YHC |
21 | |
22 | #define DRIVER_DESC "FOTG210 USB Device Controller Driver" | |
23 | #define DRIVER_VERSION "30-April-2013" | |
24 | ||
25 | static const char udc_name[] = "fotg210_udc"; | |
26 | static const char * const fotg210_ep_name[] = { | |
27 | "ep0", "ep1", "ep2", "ep3", "ep4"}; | |
28 | ||
29 | static void fotg210_disable_fifo_int(struct fotg210_ep *ep) | |
30 | { | |
31 | u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR1); | |
32 | ||
33 | if (ep->dir_in) | |
34 | value |= DMISGR1_MF_IN_INT(ep->epnum - 1); | |
35 | else | |
36 | value |= DMISGR1_MF_OUTSPK_INT(ep->epnum - 1); | |
37 | iowrite32(value, ep->fotg210->reg + FOTG210_DMISGR1); | |
38 | } | |
39 | ||
40 | static void fotg210_enable_fifo_int(struct fotg210_ep *ep) | |
41 | { | |
42 | u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR1); | |
43 | ||
44 | if (ep->dir_in) | |
45 | value &= ~DMISGR1_MF_IN_INT(ep->epnum - 1); | |
46 | else | |
47 | value &= ~DMISGR1_MF_OUTSPK_INT(ep->epnum - 1); | |
48 | iowrite32(value, ep->fotg210->reg + FOTG210_DMISGR1); | |
49 | } | |
50 | ||
51 | static void fotg210_set_cxdone(struct fotg210_udc *fotg210) | |
52 | { | |
53 | u32 value = ioread32(fotg210->reg + FOTG210_DCFESR); | |
54 | ||
55 | value |= DCFESR_CX_DONE; | |
56 | iowrite32(value, fotg210->reg + FOTG210_DCFESR); | |
57 | } | |
58 | ||
59 | static void fotg210_done(struct fotg210_ep *ep, struct fotg210_request *req, | |
60 | int status) | |
61 | { | |
62 | list_del_init(&req->queue); | |
63 | ||
64 | /* don't modify queue heads during completion callback */ | |
65 | if (ep->fotg210->gadget.speed == USB_SPEED_UNKNOWN) | |
66 | req->req.status = -ESHUTDOWN; | |
67 | else | |
68 | req->req.status = status; | |
69 | ||
70 | spin_unlock(&ep->fotg210->lock); | |
304f7e5e | 71 | usb_gadget_giveback_request(&ep->ep, &req->req); |
b84a8dee YHC |
72 | spin_lock(&ep->fotg210->lock); |
73 | ||
74 | if (ep->epnum) { | |
75 | if (list_empty(&ep->queue)) | |
76 | fotg210_disable_fifo_int(ep); | |
77 | } else { | |
78 | fotg210_set_cxdone(ep->fotg210); | |
79 | } | |
80 | } | |
81 | ||
82 | static void fotg210_fifo_ep_mapping(struct fotg210_ep *ep, u32 epnum, | |
83 | u32 dir_in) | |
84 | { | |
85 | struct fotg210_udc *fotg210 = ep->fotg210; | |
86 | u32 val; | |
87 | ||
88 | /* Driver should map an ep to a fifo and then map the fifo | |
89 | * to the ep. What a brain-damaged design! | |
90 | */ | |
91 | ||
92 | /* map a fifo to an ep */ | |
93 | val = ioread32(fotg210->reg + FOTG210_EPMAP); | |
94 | val &= ~EPMAP_FIFONOMSK(epnum, dir_in); | |
95 | val |= EPMAP_FIFONO(epnum, dir_in); | |
96 | iowrite32(val, fotg210->reg + FOTG210_EPMAP); | |
97 | ||
98 | /* map the ep to the fifo */ | |
99 | val = ioread32(fotg210->reg + FOTG210_FIFOMAP); | |
100 | val &= ~FIFOMAP_EPNOMSK(epnum); | |
101 | val |= FIFOMAP_EPNO(epnum); | |
102 | iowrite32(val, fotg210->reg + FOTG210_FIFOMAP); | |
103 | ||
104 | /* enable fifo */ | |
105 | val = ioread32(fotg210->reg + FOTG210_FIFOCF); | |
106 | val |= FIFOCF_FIFO_EN(epnum - 1); | |
107 | iowrite32(val, fotg210->reg + FOTG210_FIFOCF); | |
108 | } | |
109 | ||
110 | static void fotg210_set_fifo_dir(struct fotg210_ep *ep, u32 epnum, u32 dir_in) | |
111 | { | |
112 | struct fotg210_udc *fotg210 = ep->fotg210; | |
113 | u32 val; | |
114 | ||
115 | val = ioread32(fotg210->reg + FOTG210_FIFOMAP); | |
116 | val |= (dir_in ? FIFOMAP_DIRIN(epnum - 1) : FIFOMAP_DIROUT(epnum - 1)); | |
117 | iowrite32(val, fotg210->reg + FOTG210_FIFOMAP); | |
118 | } | |
119 | ||
120 | static void fotg210_set_tfrtype(struct fotg210_ep *ep, u32 epnum, u32 type) | |
121 | { | |
122 | struct fotg210_udc *fotg210 = ep->fotg210; | |
123 | u32 val; | |
124 | ||
125 | val = ioread32(fotg210->reg + FOTG210_FIFOCF); | |
126 | val |= FIFOCF_TYPE(type, epnum - 1); | |
127 | iowrite32(val, fotg210->reg + FOTG210_FIFOCF); | |
128 | } | |
129 | ||
130 | static void fotg210_set_mps(struct fotg210_ep *ep, u32 epnum, u32 mps, | |
131 | u32 dir_in) | |
132 | { | |
133 | struct fotg210_udc *fotg210 = ep->fotg210; | |
134 | u32 val; | |
135 | u32 offset = dir_in ? FOTG210_INEPMPSR(epnum) : | |
136 | FOTG210_OUTEPMPSR(epnum); | |
137 | ||
138 | val = ioread32(fotg210->reg + offset); | |
139 | val |= INOUTEPMPSR_MPS(mps); | |
140 | iowrite32(val, fotg210->reg + offset); | |
141 | } | |
142 | ||
143 | static int fotg210_config_ep(struct fotg210_ep *ep, | |
144 | const struct usb_endpoint_descriptor *desc) | |
145 | { | |
146 | struct fotg210_udc *fotg210 = ep->fotg210; | |
147 | ||
148 | fotg210_set_fifo_dir(ep, ep->epnum, ep->dir_in); | |
149 | fotg210_set_tfrtype(ep, ep->epnum, ep->type); | |
150 | fotg210_set_mps(ep, ep->epnum, ep->ep.maxpacket, ep->dir_in); | |
151 | fotg210_fifo_ep_mapping(ep, ep->epnum, ep->dir_in); | |
152 | ||
153 | fotg210->ep[ep->epnum] = ep; | |
154 | ||
155 | return 0; | |
156 | } | |
157 | ||
158 | static int fotg210_ep_enable(struct usb_ep *_ep, | |
159 | const struct usb_endpoint_descriptor *desc) | |
160 | { | |
161 | struct fotg210_ep *ep; | |
162 | ||
163 | ep = container_of(_ep, struct fotg210_ep, ep); | |
164 | ||
165 | ep->desc = desc; | |
166 | ep->epnum = usb_endpoint_num(desc); | |
167 | ep->type = usb_endpoint_type(desc); | |
168 | ep->dir_in = usb_endpoint_dir_in(desc); | |
169 | ep->ep.maxpacket = usb_endpoint_maxp(desc); | |
170 | ||
171 | return fotg210_config_ep(ep, desc); | |
172 | } | |
173 | ||
174 | static void fotg210_reset_tseq(struct fotg210_udc *fotg210, u8 epnum) | |
175 | { | |
176 | struct fotg210_ep *ep = fotg210->ep[epnum]; | |
177 | u32 value; | |
178 | void __iomem *reg; | |
179 | ||
180 | reg = (ep->dir_in) ? | |
181 | fotg210->reg + FOTG210_INEPMPSR(epnum) : | |
182 | fotg210->reg + FOTG210_OUTEPMPSR(epnum); | |
183 | ||
184 | /* Note: Driver needs to set and clear INOUTEPMPSR_RESET_TSEQ | |
185 | * bit. Controller wouldn't clear this bit. WTF!!! | |
186 | */ | |
187 | ||
188 | value = ioread32(reg); | |
189 | value |= INOUTEPMPSR_RESET_TSEQ; | |
190 | iowrite32(value, reg); | |
191 | ||
192 | value = ioread32(reg); | |
193 | value &= ~INOUTEPMPSR_RESET_TSEQ; | |
194 | iowrite32(value, reg); | |
195 | } | |
196 | ||
197 | static int fotg210_ep_release(struct fotg210_ep *ep) | |
198 | { | |
199 | if (!ep->epnum) | |
200 | return 0; | |
201 | ep->epnum = 0; | |
202 | ep->stall = 0; | |
203 | ep->wedged = 0; | |
204 | ||
205 | fotg210_reset_tseq(ep->fotg210, ep->epnum); | |
206 | ||
207 | return 0; | |
208 | } | |
209 | ||
210 | static int fotg210_ep_disable(struct usb_ep *_ep) | |
211 | { | |
212 | struct fotg210_ep *ep; | |
213 | struct fotg210_request *req; | |
214 | unsigned long flags; | |
215 | ||
216 | BUG_ON(!_ep); | |
217 | ||
218 | ep = container_of(_ep, struct fotg210_ep, ep); | |
219 | ||
220 | while (!list_empty(&ep->queue)) { | |
221 | req = list_entry(ep->queue.next, | |
222 | struct fotg210_request, queue); | |
223 | spin_lock_irqsave(&ep->fotg210->lock, flags); | |
224 | fotg210_done(ep, req, -ECONNRESET); | |
225 | spin_unlock_irqrestore(&ep->fotg210->lock, flags); | |
226 | } | |
227 | ||
228 | return fotg210_ep_release(ep); | |
229 | } | |
230 | ||
231 | static struct usb_request *fotg210_ep_alloc_request(struct usb_ep *_ep, | |
232 | gfp_t gfp_flags) | |
233 | { | |
234 | struct fotg210_request *req; | |
235 | ||
236 | req = kzalloc(sizeof(struct fotg210_request), gfp_flags); | |
237 | if (!req) | |
238 | return NULL; | |
239 | ||
240 | INIT_LIST_HEAD(&req->queue); | |
241 | ||
242 | return &req->req; | |
243 | } | |
244 | ||
245 | static void fotg210_ep_free_request(struct usb_ep *_ep, | |
246 | struct usb_request *_req) | |
247 | { | |
248 | struct fotg210_request *req; | |
249 | ||
250 | req = container_of(_req, struct fotg210_request, req); | |
251 | kfree(req); | |
252 | } | |
253 | ||
254 | static void fotg210_enable_dma(struct fotg210_ep *ep, | |
255 | dma_addr_t d, u32 len) | |
256 | { | |
257 | u32 value; | |
258 | struct fotg210_udc *fotg210 = ep->fotg210; | |
259 | ||
260 | /* set transfer length and direction */ | |
261 | value = ioread32(fotg210->reg + FOTG210_DMACPSR1); | |
262 | value &= ~(DMACPSR1_DMA_LEN(0xFFFF) | DMACPSR1_DMA_TYPE(1)); | |
263 | value |= DMACPSR1_DMA_LEN(len) | DMACPSR1_DMA_TYPE(ep->dir_in); | |
264 | iowrite32(value, fotg210->reg + FOTG210_DMACPSR1); | |
265 | ||
266 | /* set device DMA target FIFO number */ | |
267 | value = ioread32(fotg210->reg + FOTG210_DMATFNR); | |
268 | if (ep->epnum) | |
269 | value |= DMATFNR_ACC_FN(ep->epnum - 1); | |
270 | else | |
271 | value |= DMATFNR_ACC_CXF; | |
272 | iowrite32(value, fotg210->reg + FOTG210_DMATFNR); | |
273 | ||
274 | /* set DMA memory address */ | |
275 | iowrite32(d, fotg210->reg + FOTG210_DMACPSR2); | |
276 | ||
277 | /* enable MDMA_EROR and MDMA_CMPLT interrupt */ | |
278 | value = ioread32(fotg210->reg + FOTG210_DMISGR2); | |
279 | value &= ~(DMISGR2_MDMA_CMPLT | DMISGR2_MDMA_ERROR); | |
280 | iowrite32(value, fotg210->reg + FOTG210_DMISGR2); | |
281 | ||
282 | /* start DMA */ | |
283 | value = ioread32(fotg210->reg + FOTG210_DMACPSR1); | |
284 | value |= DMACPSR1_DMA_START; | |
285 | iowrite32(value, fotg210->reg + FOTG210_DMACPSR1); | |
286 | } | |
287 | ||
288 | static void fotg210_disable_dma(struct fotg210_ep *ep) | |
289 | { | |
290 | iowrite32(DMATFNR_DISDMA, ep->fotg210->reg + FOTG210_DMATFNR); | |
291 | } | |
292 | ||
293 | static void fotg210_wait_dma_done(struct fotg210_ep *ep) | |
294 | { | |
295 | u32 value; | |
296 | ||
297 | do { | |
298 | value = ioread32(ep->fotg210->reg + FOTG210_DISGR2); | |
299 | if ((value & DISGR2_USBRST_INT) || | |
300 | (value & DISGR2_DMA_ERROR)) | |
301 | goto dma_reset; | |
302 | } while (!(value & DISGR2_DMA_CMPLT)); | |
303 | ||
304 | value &= ~DISGR2_DMA_CMPLT; | |
305 | iowrite32(value, ep->fotg210->reg + FOTG210_DISGR2); | |
306 | return; | |
307 | ||
308 | dma_reset: | |
309 | value = ioread32(ep->fotg210->reg + FOTG210_DMACPSR1); | |
310 | value |= DMACPSR1_DMA_ABORT; | |
311 | iowrite32(value, ep->fotg210->reg + FOTG210_DMACPSR1); | |
312 | ||
313 | /* reset fifo */ | |
314 | if (ep->epnum) { | |
315 | value = ioread32(ep->fotg210->reg + | |
316 | FOTG210_FIBCR(ep->epnum - 1)); | |
317 | value |= FIBCR_FFRST; | |
318 | iowrite32(value, ep->fotg210->reg + | |
319 | FOTG210_FIBCR(ep->epnum - 1)); | |
320 | } else { | |
321 | value = ioread32(ep->fotg210->reg + FOTG210_DCFESR); | |
322 | value |= DCFESR_CX_CLR; | |
323 | iowrite32(value, ep->fotg210->reg + FOTG210_DCFESR); | |
324 | } | |
325 | } | |
326 | ||
327 | static void fotg210_start_dma(struct fotg210_ep *ep, | |
328 | struct fotg210_request *req) | |
329 | { | |
e26bdb01 | 330 | struct device *dev = &ep->fotg210->gadget.dev; |
b84a8dee YHC |
331 | dma_addr_t d; |
332 | u8 *buffer; | |
333 | u32 length; | |
334 | ||
335 | if (ep->epnum) { | |
336 | if (ep->dir_in) { | |
337 | buffer = req->req.buf; | |
338 | length = req->req.length; | |
339 | } else { | |
340 | buffer = req->req.buf + req->req.actual; | |
341 | length = ioread32(ep->fotg210->reg + | |
3e7c2510 FV |
342 | FOTG210_FIBCR(ep->epnum - 1)) & FIBCR_BCFX; |
343 | if (length > req->req.length - req->req.actual) | |
344 | length = req->req.length - req->req.actual; | |
b84a8dee YHC |
345 | } |
346 | } else { | |
347 | buffer = req->req.buf + req->req.actual; | |
348 | if (req->req.length - req->req.actual > ep->ep.maxpacket) | |
349 | length = ep->ep.maxpacket; | |
350 | else | |
755915fc | 351 | length = req->req.length - req->req.actual; |
b84a8dee YHC |
352 | } |
353 | ||
e26bdb01 | 354 | d = dma_map_single(dev, buffer, length, |
b84a8dee YHC |
355 | ep->dir_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE); |
356 | ||
e26bdb01 | 357 | if (dma_mapping_error(dev, d)) { |
b84a8dee YHC |
358 | pr_err("dma_mapping_error\n"); |
359 | return; | |
360 | } | |
361 | ||
b84a8dee YHC |
362 | fotg210_enable_dma(ep, d, length); |
363 | ||
364 | /* check if dma is done */ | |
365 | fotg210_wait_dma_done(ep); | |
366 | ||
367 | fotg210_disable_dma(ep); | |
368 | ||
369 | /* update actual transfer length */ | |
370 | req->req.actual += length; | |
371 | ||
e26bdb01 | 372 | dma_unmap_single(dev, d, length, DMA_TO_DEVICE); |
b84a8dee YHC |
373 | } |
374 | ||
375 | static void fotg210_ep0_queue(struct fotg210_ep *ep, | |
376 | struct fotg210_request *req) | |
377 | { | |
378 | if (!req->req.length) { | |
379 | fotg210_done(ep, req, 0); | |
380 | return; | |
381 | } | |
382 | if (ep->dir_in) { /* if IN */ | |
1c99cabf | 383 | fotg210_start_dma(ep, req); |
c7f755b2 | 384 | if (req->req.length == req->req.actual) |
b84a8dee YHC |
385 | fotg210_done(ep, req, 0); |
386 | } else { /* OUT */ | |
1c99cabf | 387 | u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR0); |
b84a8dee | 388 | |
1c99cabf DC |
389 | value &= ~DMISGR0_MCX_OUT_INT; |
390 | iowrite32(value, ep->fotg210->reg + FOTG210_DMISGR0); | |
b84a8dee YHC |
391 | } |
392 | } | |
393 | ||
394 | static int fotg210_ep_queue(struct usb_ep *_ep, struct usb_request *_req, | |
395 | gfp_t gfp_flags) | |
396 | { | |
397 | struct fotg210_ep *ep; | |
398 | struct fotg210_request *req; | |
399 | unsigned long flags; | |
400 | int request = 0; | |
401 | ||
402 | ep = container_of(_ep, struct fotg210_ep, ep); | |
403 | req = container_of(_req, struct fotg210_request, req); | |
404 | ||
405 | if (ep->fotg210->gadget.speed == USB_SPEED_UNKNOWN) | |
406 | return -ESHUTDOWN; | |
407 | ||
408 | spin_lock_irqsave(&ep->fotg210->lock, flags); | |
409 | ||
410 | if (list_empty(&ep->queue)) | |
411 | request = 1; | |
412 | ||
413 | list_add_tail(&req->queue, &ep->queue); | |
414 | ||
415 | req->req.actual = 0; | |
416 | req->req.status = -EINPROGRESS; | |
417 | ||
418 | if (!ep->epnum) /* ep0 */ | |
419 | fotg210_ep0_queue(ep, req); | |
420 | else if (request && !ep->stall) | |
421 | fotg210_enable_fifo_int(ep); | |
422 | ||
423 | spin_unlock_irqrestore(&ep->fotg210->lock, flags); | |
424 | ||
425 | return 0; | |
426 | } | |
427 | ||
428 | static int fotg210_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) | |
429 | { | |
430 | struct fotg210_ep *ep; | |
431 | struct fotg210_request *req; | |
432 | unsigned long flags; | |
433 | ||
434 | ep = container_of(_ep, struct fotg210_ep, ep); | |
435 | req = container_of(_req, struct fotg210_request, req); | |
436 | ||
437 | spin_lock_irqsave(&ep->fotg210->lock, flags); | |
438 | if (!list_empty(&ep->queue)) | |
439 | fotg210_done(ep, req, -ECONNRESET); | |
440 | spin_unlock_irqrestore(&ep->fotg210->lock, flags); | |
441 | ||
442 | return 0; | |
443 | } | |
444 | ||
445 | static void fotg210_set_epnstall(struct fotg210_ep *ep) | |
446 | { | |
447 | struct fotg210_udc *fotg210 = ep->fotg210; | |
448 | u32 value; | |
449 | void __iomem *reg; | |
450 | ||
451 | /* check if IN FIFO is empty before stall */ | |
452 | if (ep->dir_in) { | |
453 | do { | |
454 | value = ioread32(fotg210->reg + FOTG210_DCFESR); | |
455 | } while (!(value & DCFESR_FIFO_EMPTY(ep->epnum - 1))); | |
456 | } | |
457 | ||
458 | reg = (ep->dir_in) ? | |
459 | fotg210->reg + FOTG210_INEPMPSR(ep->epnum) : | |
460 | fotg210->reg + FOTG210_OUTEPMPSR(ep->epnum); | |
461 | value = ioread32(reg); | |
462 | value |= INOUTEPMPSR_STL_EP; | |
463 | iowrite32(value, reg); | |
464 | } | |
465 | ||
466 | static void fotg210_clear_epnstall(struct fotg210_ep *ep) | |
467 | { | |
468 | struct fotg210_udc *fotg210 = ep->fotg210; | |
469 | u32 value; | |
470 | void __iomem *reg; | |
471 | ||
472 | reg = (ep->dir_in) ? | |
473 | fotg210->reg + FOTG210_INEPMPSR(ep->epnum) : | |
474 | fotg210->reg + FOTG210_OUTEPMPSR(ep->epnum); | |
475 | value = ioread32(reg); | |
476 | value &= ~INOUTEPMPSR_STL_EP; | |
477 | iowrite32(value, reg); | |
478 | } | |
479 | ||
480 | static int fotg210_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedge) | |
481 | { | |
482 | struct fotg210_ep *ep; | |
483 | struct fotg210_udc *fotg210; | |
484 | unsigned long flags; | |
b84a8dee YHC |
485 | |
486 | ep = container_of(_ep, struct fotg210_ep, ep); | |
487 | ||
488 | fotg210 = ep->fotg210; | |
489 | ||
490 | spin_lock_irqsave(&ep->fotg210->lock, flags); | |
491 | ||
492 | if (value) { | |
493 | fotg210_set_epnstall(ep); | |
494 | ep->stall = 1; | |
495 | if (wedge) | |
496 | ep->wedged = 1; | |
497 | } else { | |
498 | fotg210_reset_tseq(fotg210, ep->epnum); | |
499 | fotg210_clear_epnstall(ep); | |
500 | ep->stall = 0; | |
501 | ep->wedged = 0; | |
502 | if (!list_empty(&ep->queue)) | |
503 | fotg210_enable_fifo_int(ep); | |
504 | } | |
505 | ||
506 | spin_unlock_irqrestore(&ep->fotg210->lock, flags); | |
811e5c3d | 507 | return 0; |
b84a8dee YHC |
508 | } |
509 | ||
510 | static int fotg210_ep_set_halt(struct usb_ep *_ep, int value) | |
511 | { | |
512 | return fotg210_set_halt_and_wedge(_ep, value, 0); | |
513 | } | |
514 | ||
515 | static int fotg210_ep_set_wedge(struct usb_ep *_ep) | |
516 | { | |
517 | return fotg210_set_halt_and_wedge(_ep, 1, 1); | |
518 | } | |
519 | ||
520 | static void fotg210_ep_fifo_flush(struct usb_ep *_ep) | |
521 | { | |
522 | } | |
523 | ||
977ac789 | 524 | static const struct usb_ep_ops fotg210_ep_ops = { |
b84a8dee YHC |
525 | .enable = fotg210_ep_enable, |
526 | .disable = fotg210_ep_disable, | |
527 | ||
528 | .alloc_request = fotg210_ep_alloc_request, | |
529 | .free_request = fotg210_ep_free_request, | |
530 | ||
531 | .queue = fotg210_ep_queue, | |
532 | .dequeue = fotg210_ep_dequeue, | |
533 | ||
534 | .set_halt = fotg210_ep_set_halt, | |
535 | .fifo_flush = fotg210_ep_fifo_flush, | |
536 | .set_wedge = fotg210_ep_set_wedge, | |
537 | }; | |
538 | ||
539 | static void fotg210_clear_tx0byte(struct fotg210_udc *fotg210) | |
540 | { | |
541 | u32 value = ioread32(fotg210->reg + FOTG210_TX0BYTE); | |
542 | ||
543 | value &= ~(TX0BYTE_EP1 | TX0BYTE_EP2 | TX0BYTE_EP3 | |
544 | | TX0BYTE_EP4); | |
545 | iowrite32(value, fotg210->reg + FOTG210_TX0BYTE); | |
546 | } | |
547 | ||
548 | static void fotg210_clear_rx0byte(struct fotg210_udc *fotg210) | |
549 | { | |
550 | u32 value = ioread32(fotg210->reg + FOTG210_RX0BYTE); | |
551 | ||
552 | value &= ~(RX0BYTE_EP1 | RX0BYTE_EP2 | RX0BYTE_EP3 | |
553 | | RX0BYTE_EP4); | |
554 | iowrite32(value, fotg210->reg + FOTG210_RX0BYTE); | |
555 | } | |
556 | ||
557 | /* read 8-byte setup packet only */ | |
558 | static void fotg210_rdsetupp(struct fotg210_udc *fotg210, | |
559 | u8 *buffer) | |
560 | { | |
561 | int i = 0; | |
562 | u8 *tmp = buffer; | |
563 | u32 data; | |
564 | u32 length = 8; | |
565 | ||
566 | iowrite32(DMATFNR_ACC_CXF, fotg210->reg + FOTG210_DMATFNR); | |
567 | ||
568 | for (i = (length >> 2); i > 0; i--) { | |
569 | data = ioread32(fotg210->reg + FOTG210_CXPORT); | |
570 | *tmp = data & 0xFF; | |
571 | *(tmp + 1) = (data >> 8) & 0xFF; | |
572 | *(tmp + 2) = (data >> 16) & 0xFF; | |
573 | *(tmp + 3) = (data >> 24) & 0xFF; | |
574 | tmp = tmp + 4; | |
575 | } | |
576 | ||
577 | switch (length % 4) { | |
578 | case 1: | |
579 | data = ioread32(fotg210->reg + FOTG210_CXPORT); | |
580 | *tmp = data & 0xFF; | |
581 | break; | |
582 | case 2: | |
583 | data = ioread32(fotg210->reg + FOTG210_CXPORT); | |
584 | *tmp = data & 0xFF; | |
585 | *(tmp + 1) = (data >> 8) & 0xFF; | |
586 | break; | |
587 | case 3: | |
588 | data = ioread32(fotg210->reg + FOTG210_CXPORT); | |
589 | *tmp = data & 0xFF; | |
590 | *(tmp + 1) = (data >> 8) & 0xFF; | |
591 | *(tmp + 2) = (data >> 16) & 0xFF; | |
592 | break; | |
593 | default: | |
594 | break; | |
595 | } | |
596 | ||
597 | iowrite32(DMATFNR_DISDMA, fotg210->reg + FOTG210_DMATFNR); | |
598 | } | |
599 | ||
600 | static void fotg210_set_configuration(struct fotg210_udc *fotg210) | |
601 | { | |
602 | u32 value = ioread32(fotg210->reg + FOTG210_DAR); | |
603 | ||
604 | value |= DAR_AFT_CONF; | |
605 | iowrite32(value, fotg210->reg + FOTG210_DAR); | |
606 | } | |
607 | ||
608 | static void fotg210_set_dev_addr(struct fotg210_udc *fotg210, u32 addr) | |
609 | { | |
610 | u32 value = ioread32(fotg210->reg + FOTG210_DAR); | |
611 | ||
612 | value |= (addr & 0x7F); | |
613 | iowrite32(value, fotg210->reg + FOTG210_DAR); | |
614 | } | |
615 | ||
616 | static void fotg210_set_cxstall(struct fotg210_udc *fotg210) | |
617 | { | |
618 | u32 value = ioread32(fotg210->reg + FOTG210_DCFESR); | |
619 | ||
620 | value |= DCFESR_CX_STL; | |
621 | iowrite32(value, fotg210->reg + FOTG210_DCFESR); | |
622 | } | |
623 | ||
624 | static void fotg210_request_error(struct fotg210_udc *fotg210) | |
625 | { | |
626 | fotg210_set_cxstall(fotg210); | |
627 | pr_err("request error!!\n"); | |
628 | } | |
629 | ||
630 | static void fotg210_set_address(struct fotg210_udc *fotg210, | |
631 | struct usb_ctrlrequest *ctrl) | |
632 | { | |
633 | if (ctrl->wValue >= 0x0100) { | |
634 | fotg210_request_error(fotg210); | |
635 | } else { | |
636 | fotg210_set_dev_addr(fotg210, ctrl->wValue); | |
637 | fotg210_set_cxdone(fotg210); | |
638 | } | |
639 | } | |
640 | ||
641 | static void fotg210_set_feature(struct fotg210_udc *fotg210, | |
642 | struct usb_ctrlrequest *ctrl) | |
643 | { | |
644 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | |
645 | case USB_RECIP_DEVICE: | |
646 | fotg210_set_cxdone(fotg210); | |
647 | break; | |
648 | case USB_RECIP_INTERFACE: | |
649 | fotg210_set_cxdone(fotg210); | |
650 | break; | |
651 | case USB_RECIP_ENDPOINT: { | |
652 | u8 epnum; | |
653 | epnum = le16_to_cpu(ctrl->wIndex) & USB_ENDPOINT_NUMBER_MASK; | |
654 | if (epnum) | |
655 | fotg210_set_epnstall(fotg210->ep[epnum]); | |
656 | else | |
657 | fotg210_set_cxstall(fotg210); | |
658 | fotg210_set_cxdone(fotg210); | |
659 | } | |
660 | break; | |
661 | default: | |
662 | fotg210_request_error(fotg210); | |
663 | break; | |
664 | } | |
665 | } | |
666 | ||
667 | static void fotg210_clear_feature(struct fotg210_udc *fotg210, | |
668 | struct usb_ctrlrequest *ctrl) | |
669 | { | |
670 | struct fotg210_ep *ep = | |
671 | fotg210->ep[ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK]; | |
672 | ||
673 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | |
674 | case USB_RECIP_DEVICE: | |
675 | fotg210_set_cxdone(fotg210); | |
676 | break; | |
677 | case USB_RECIP_INTERFACE: | |
678 | fotg210_set_cxdone(fotg210); | |
679 | break; | |
680 | case USB_RECIP_ENDPOINT: | |
681 | if (ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK) { | |
682 | if (ep->wedged) { | |
683 | fotg210_set_cxdone(fotg210); | |
684 | break; | |
685 | } | |
686 | if (ep->stall) | |
687 | fotg210_set_halt_and_wedge(&ep->ep, 0, 0); | |
688 | } | |
689 | fotg210_set_cxdone(fotg210); | |
690 | break; | |
691 | default: | |
692 | fotg210_request_error(fotg210); | |
693 | break; | |
694 | } | |
695 | } | |
696 | ||
697 | static int fotg210_is_epnstall(struct fotg210_ep *ep) | |
698 | { | |
699 | struct fotg210_udc *fotg210 = ep->fotg210; | |
700 | u32 value; | |
701 | void __iomem *reg; | |
702 | ||
703 | reg = (ep->dir_in) ? | |
704 | fotg210->reg + FOTG210_INEPMPSR(ep->epnum) : | |
705 | fotg210->reg + FOTG210_OUTEPMPSR(ep->epnum); | |
706 | value = ioread32(reg); | |
707 | return value & INOUTEPMPSR_STL_EP ? 1 : 0; | |
708 | } | |
709 | ||
710 | static void fotg210_get_status(struct fotg210_udc *fotg210, | |
711 | struct usb_ctrlrequest *ctrl) | |
712 | { | |
713 | u8 epnum; | |
714 | ||
715 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | |
716 | case USB_RECIP_DEVICE: | |
717 | fotg210->ep0_data = 1 << USB_DEVICE_SELF_POWERED; | |
718 | break; | |
719 | case USB_RECIP_INTERFACE: | |
720 | fotg210->ep0_data = 0; | |
721 | break; | |
722 | case USB_RECIP_ENDPOINT: | |
723 | epnum = ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK; | |
724 | if (epnum) | |
725 | fotg210->ep0_data = | |
726 | fotg210_is_epnstall(fotg210->ep[epnum]) | |
727 | << USB_ENDPOINT_HALT; | |
728 | else | |
729 | fotg210_request_error(fotg210); | |
730 | break; | |
731 | ||
732 | default: | |
733 | fotg210_request_error(fotg210); | |
734 | return; /* exit */ | |
735 | } | |
736 | ||
737 | fotg210->ep0_req->buf = &fotg210->ep0_data; | |
738 | fotg210->ep0_req->length = 2; | |
739 | ||
740 | spin_unlock(&fotg210->lock); | |
2337a77c | 741 | fotg210_ep_queue(fotg210->gadget.ep0, fotg210->ep0_req, GFP_ATOMIC); |
b84a8dee YHC |
742 | spin_lock(&fotg210->lock); |
743 | } | |
744 | ||
745 | static int fotg210_setup_packet(struct fotg210_udc *fotg210, | |
746 | struct usb_ctrlrequest *ctrl) | |
747 | { | |
748 | u8 *p = (u8 *)ctrl; | |
749 | u8 ret = 0; | |
750 | ||
751 | fotg210_rdsetupp(fotg210, p); | |
752 | ||
753 | fotg210->ep[0]->dir_in = ctrl->bRequestType & USB_DIR_IN; | |
754 | ||
755 | if (fotg210->gadget.speed == USB_SPEED_UNKNOWN) { | |
756 | u32 value = ioread32(fotg210->reg + FOTG210_DMCR); | |
757 | fotg210->gadget.speed = value & DMCR_HS_EN ? | |
758 | USB_SPEED_HIGH : USB_SPEED_FULL; | |
759 | } | |
760 | ||
761 | /* check request */ | |
762 | if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) { | |
763 | switch (ctrl->bRequest) { | |
764 | case USB_REQ_GET_STATUS: | |
765 | fotg210_get_status(fotg210, ctrl); | |
766 | break; | |
767 | case USB_REQ_CLEAR_FEATURE: | |
768 | fotg210_clear_feature(fotg210, ctrl); | |
769 | break; | |
770 | case USB_REQ_SET_FEATURE: | |
771 | fotg210_set_feature(fotg210, ctrl); | |
772 | break; | |
773 | case USB_REQ_SET_ADDRESS: | |
774 | fotg210_set_address(fotg210, ctrl); | |
775 | break; | |
776 | case USB_REQ_SET_CONFIGURATION: | |
777 | fotg210_set_configuration(fotg210); | |
778 | ret = 1; | |
779 | break; | |
780 | default: | |
781 | ret = 1; | |
782 | break; | |
783 | } | |
784 | } else { | |
785 | ret = 1; | |
786 | } | |
787 | ||
788 | return ret; | |
789 | } | |
790 | ||
791 | static void fotg210_ep0out(struct fotg210_udc *fotg210) | |
792 | { | |
793 | struct fotg210_ep *ep = fotg210->ep[0]; | |
794 | ||
795 | if (!list_empty(&ep->queue) && !ep->dir_in) { | |
796 | struct fotg210_request *req; | |
797 | ||
798 | req = list_first_entry(&ep->queue, | |
799 | struct fotg210_request, queue); | |
800 | ||
801 | if (req->req.length) | |
802 | fotg210_start_dma(ep, req); | |
803 | ||
804 | if ((req->req.length - req->req.actual) < ep->ep.maxpacket) | |
805 | fotg210_done(ep, req, 0); | |
806 | } else { | |
807 | pr_err("%s : empty queue\n", __func__); | |
808 | } | |
809 | } | |
810 | ||
811 | static void fotg210_ep0in(struct fotg210_udc *fotg210) | |
812 | { | |
813 | struct fotg210_ep *ep = fotg210->ep[0]; | |
814 | ||
815 | if ((!list_empty(&ep->queue)) && (ep->dir_in)) { | |
816 | struct fotg210_request *req; | |
817 | ||
818 | req = list_entry(ep->queue.next, | |
819 | struct fotg210_request, queue); | |
820 | ||
821 | if (req->req.length) | |
822 | fotg210_start_dma(ep, req); | |
823 | ||
078ba935 | 824 | if (req->req.actual == req->req.length) |
b84a8dee YHC |
825 | fotg210_done(ep, req, 0); |
826 | } else { | |
827 | fotg210_set_cxdone(fotg210); | |
828 | } | |
829 | } | |
830 | ||
831 | static void fotg210_clear_comabt_int(struct fotg210_udc *fotg210) | |
832 | { | |
833 | u32 value = ioread32(fotg210->reg + FOTG210_DISGR0); | |
834 | ||
835 | value &= ~DISGR0_CX_COMABT_INT; | |
836 | iowrite32(value, fotg210->reg + FOTG210_DISGR0); | |
837 | } | |
838 | ||
839 | static void fotg210_in_fifo_handler(struct fotg210_ep *ep) | |
840 | { | |
841 | struct fotg210_request *req = list_entry(ep->queue.next, | |
842 | struct fotg210_request, queue); | |
843 | ||
844 | if (req->req.length) | |
845 | fotg210_start_dma(ep, req); | |
846 | fotg210_done(ep, req, 0); | |
847 | } | |
848 | ||
849 | static void fotg210_out_fifo_handler(struct fotg210_ep *ep) | |
850 | { | |
851 | struct fotg210_request *req = list_entry(ep->queue.next, | |
852 | struct fotg210_request, queue); | |
75bb93be | 853 | int disgr1 = ioread32(ep->fotg210->reg + FOTG210_DISGR1); |
b84a8dee YHC |
854 | |
855 | fotg210_start_dma(ep, req); | |
856 | ||
75bb93be FV |
857 | /* Complete the request when it's full or a short packet arrived. |
858 | * Like other drivers, short_not_ok isn't handled. | |
859 | */ | |
860 | ||
b84a8dee | 861 | if (req->req.length == req->req.actual || |
75bb93be | 862 | (disgr1 & DISGR1_SPK_INT(ep->epnum - 1))) |
b84a8dee YHC |
863 | fotg210_done(ep, req, 0); |
864 | } | |
865 | ||
866 | static irqreturn_t fotg210_irq(int irq, void *_fotg210) | |
867 | { | |
868 | struct fotg210_udc *fotg210 = _fotg210; | |
869 | u32 int_grp = ioread32(fotg210->reg + FOTG210_DIGR); | |
870 | u32 int_msk = ioread32(fotg210->reg + FOTG210_DMIGR); | |
871 | ||
872 | int_grp &= ~int_msk; | |
873 | ||
874 | spin_lock(&fotg210->lock); | |
875 | ||
876 | if (int_grp & DIGR_INT_G2) { | |
877 | void __iomem *reg = fotg210->reg + FOTG210_DISGR2; | |
878 | u32 int_grp2 = ioread32(reg); | |
879 | u32 int_msk2 = ioread32(fotg210->reg + FOTG210_DMISGR2); | |
880 | u32 value; | |
881 | ||
882 | int_grp2 &= ~int_msk2; | |
883 | ||
884 | if (int_grp2 & DISGR2_USBRST_INT) { | |
fe8f103a FV |
885 | usb_gadget_udc_reset(&fotg210->gadget, |
886 | fotg210->driver); | |
b84a8dee YHC |
887 | value = ioread32(reg); |
888 | value &= ~DISGR2_USBRST_INT; | |
889 | iowrite32(value, reg); | |
890 | pr_info("fotg210 udc reset\n"); | |
891 | } | |
892 | if (int_grp2 & DISGR2_SUSP_INT) { | |
893 | value = ioread32(reg); | |
894 | value &= ~DISGR2_SUSP_INT; | |
895 | iowrite32(value, reg); | |
896 | pr_info("fotg210 udc suspend\n"); | |
897 | } | |
898 | if (int_grp2 & DISGR2_RESM_INT) { | |
899 | value = ioread32(reg); | |
900 | value &= ~DISGR2_RESM_INT; | |
901 | iowrite32(value, reg); | |
902 | pr_info("fotg210 udc resume\n"); | |
903 | } | |
904 | if (int_grp2 & DISGR2_ISO_SEQ_ERR_INT) { | |
905 | value = ioread32(reg); | |
906 | value &= ~DISGR2_ISO_SEQ_ERR_INT; | |
907 | iowrite32(value, reg); | |
908 | pr_info("fotg210 iso sequence error\n"); | |
909 | } | |
910 | if (int_grp2 & DISGR2_ISO_SEQ_ABORT_INT) { | |
911 | value = ioread32(reg); | |
912 | value &= ~DISGR2_ISO_SEQ_ABORT_INT; | |
913 | iowrite32(value, reg); | |
914 | pr_info("fotg210 iso sequence abort\n"); | |
915 | } | |
916 | if (int_grp2 & DISGR2_TX0BYTE_INT) { | |
917 | fotg210_clear_tx0byte(fotg210); | |
918 | value = ioread32(reg); | |
919 | value &= ~DISGR2_TX0BYTE_INT; | |
920 | iowrite32(value, reg); | |
921 | pr_info("fotg210 transferred 0 byte\n"); | |
922 | } | |
923 | if (int_grp2 & DISGR2_RX0BYTE_INT) { | |
924 | fotg210_clear_rx0byte(fotg210); | |
925 | value = ioread32(reg); | |
926 | value &= ~DISGR2_RX0BYTE_INT; | |
927 | iowrite32(value, reg); | |
928 | pr_info("fotg210 received 0 byte\n"); | |
929 | } | |
930 | if (int_grp2 & DISGR2_DMA_ERROR) { | |
931 | value = ioread32(reg); | |
932 | value &= ~DISGR2_DMA_ERROR; | |
933 | iowrite32(value, reg); | |
934 | } | |
935 | } | |
936 | ||
937 | if (int_grp & DIGR_INT_G0) { | |
938 | void __iomem *reg = fotg210->reg + FOTG210_DISGR0; | |
939 | u32 int_grp0 = ioread32(reg); | |
940 | u32 int_msk0 = ioread32(fotg210->reg + FOTG210_DMISGR0); | |
941 | struct usb_ctrlrequest ctrl; | |
942 | ||
943 | int_grp0 &= ~int_msk0; | |
944 | ||
945 | /* the highest priority in this source register */ | |
946 | if (int_grp0 & DISGR0_CX_COMABT_INT) { | |
947 | fotg210_clear_comabt_int(fotg210); | |
948 | pr_info("fotg210 CX command abort\n"); | |
949 | } | |
950 | ||
951 | if (int_grp0 & DISGR0_CX_SETUP_INT) { | |
952 | if (fotg210_setup_packet(fotg210, &ctrl)) { | |
953 | spin_unlock(&fotg210->lock); | |
954 | if (fotg210->driver->setup(&fotg210->gadget, | |
955 | &ctrl) < 0) | |
956 | fotg210_set_cxstall(fotg210); | |
957 | spin_lock(&fotg210->lock); | |
958 | } | |
959 | } | |
960 | if (int_grp0 & DISGR0_CX_COMEND_INT) | |
961 | pr_info("fotg210 cmd end\n"); | |
962 | ||
963 | if (int_grp0 & DISGR0_CX_IN_INT) | |
964 | fotg210_ep0in(fotg210); | |
965 | ||
966 | if (int_grp0 & DISGR0_CX_OUT_INT) | |
967 | fotg210_ep0out(fotg210); | |
968 | ||
969 | if (int_grp0 & DISGR0_CX_COMFAIL_INT) { | |
970 | fotg210_set_cxstall(fotg210); | |
971 | pr_info("fotg210 ep0 fail\n"); | |
972 | } | |
973 | } | |
974 | ||
975 | if (int_grp & DIGR_INT_G1) { | |
976 | void __iomem *reg = fotg210->reg + FOTG210_DISGR1; | |
977 | u32 int_grp1 = ioread32(reg); | |
978 | u32 int_msk1 = ioread32(fotg210->reg + FOTG210_DMISGR1); | |
979 | int fifo; | |
980 | ||
981 | int_grp1 &= ~int_msk1; | |
982 | ||
983 | for (fifo = 0; fifo < FOTG210_MAX_FIFO_NUM; fifo++) { | |
984 | if (int_grp1 & DISGR1_IN_INT(fifo)) | |
985 | fotg210_in_fifo_handler(fotg210->ep[fifo + 1]); | |
986 | ||
987 | if ((int_grp1 & DISGR1_OUT_INT(fifo)) || | |
988 | (int_grp1 & DISGR1_SPK_INT(fifo))) | |
989 | fotg210_out_fifo_handler(fotg210->ep[fifo + 1]); | |
990 | } | |
991 | } | |
992 | ||
993 | spin_unlock(&fotg210->lock); | |
994 | ||
995 | return IRQ_HANDLED; | |
996 | } | |
997 | ||
998 | static void fotg210_disable_unplug(struct fotg210_udc *fotg210) | |
999 | { | |
1000 | u32 reg = ioread32(fotg210->reg + FOTG210_PHYTMSR); | |
1001 | ||
1002 | reg &= ~PHYTMSR_UNPLUG; | |
1003 | iowrite32(reg, fotg210->reg + FOTG210_PHYTMSR); | |
1004 | } | |
1005 | ||
1006 | static int fotg210_udc_start(struct usb_gadget *g, | |
1007 | struct usb_gadget_driver *driver) | |
1008 | { | |
1009 | struct fotg210_udc *fotg210 = gadget_to_fotg210(g); | |
1010 | u32 value; | |
1011 | ||
1012 | /* hook up the driver */ | |
1013 | driver->driver.bus = NULL; | |
1014 | fotg210->driver = driver; | |
1015 | ||
1016 | /* enable device global interrupt */ | |
1017 | value = ioread32(fotg210->reg + FOTG210_DMCR); | |
1018 | value |= DMCR_GLINT_EN; | |
1019 | iowrite32(value, fotg210->reg + FOTG210_DMCR); | |
1020 | ||
1021 | return 0; | |
1022 | } | |
1023 | ||
1024 | static void fotg210_init(struct fotg210_udc *fotg210) | |
1025 | { | |
1026 | u32 value; | |
1027 | ||
1028 | /* disable global interrupt and set int polarity to active high */ | |
1029 | iowrite32(GMIR_MHC_INT | GMIR_MOTG_INT | GMIR_INT_POLARITY, | |
1030 | fotg210->reg + FOTG210_GMIR); | |
1031 | ||
1032 | /* disable device global interrupt */ | |
1033 | value = ioread32(fotg210->reg + FOTG210_DMCR); | |
1034 | value &= ~DMCR_GLINT_EN; | |
1035 | iowrite32(value, fotg210->reg + FOTG210_DMCR); | |
1036 | ||
9aee3a23 FV |
1037 | /* enable only grp2 irqs we handle */ |
1038 | iowrite32(~(DISGR2_DMA_ERROR | DISGR2_RX0BYTE_INT | DISGR2_TX0BYTE_INT | |
1039 | | DISGR2_ISO_SEQ_ABORT_INT | DISGR2_ISO_SEQ_ERR_INT | |
1040 | | DISGR2_RESM_INT | DISGR2_SUSP_INT | DISGR2_USBRST_INT), | |
1041 | fotg210->reg + FOTG210_DMISGR2); | |
1042 | ||
b84a8dee YHC |
1043 | /* disable all fifo interrupt */ |
1044 | iowrite32(~(u32)0, fotg210->reg + FOTG210_DMISGR1); | |
1045 | ||
1046 | /* disable cmd end */ | |
1047 | value = ioread32(fotg210->reg + FOTG210_DMISGR0); | |
1048 | value |= DMISGR0_MCX_COMEND; | |
1049 | iowrite32(value, fotg210->reg + FOTG210_DMISGR0); | |
1050 | } | |
1051 | ||
22835b80 | 1052 | static int fotg210_udc_stop(struct usb_gadget *g) |
b84a8dee YHC |
1053 | { |
1054 | struct fotg210_udc *fotg210 = gadget_to_fotg210(g); | |
1055 | unsigned long flags; | |
1056 | ||
1057 | spin_lock_irqsave(&fotg210->lock, flags); | |
1058 | ||
1059 | fotg210_init(fotg210); | |
1060 | fotg210->driver = NULL; | |
1061 | ||
1062 | spin_unlock_irqrestore(&fotg210->lock, flags); | |
1063 | ||
1064 | return 0; | |
1065 | } | |
1066 | ||
bee56235 | 1067 | static const struct usb_gadget_ops fotg210_gadget_ops = { |
b84a8dee YHC |
1068 | .udc_start = fotg210_udc_start, |
1069 | .udc_stop = fotg210_udc_stop, | |
1070 | }; | |
1071 | ||
aeffd2c3 | 1072 | int fotg210_udc_remove(struct platform_device *pdev) |
b84a8dee | 1073 | { |
3cb40a59 | 1074 | struct fotg210_udc *fotg210 = platform_get_drvdata(pdev); |
c37bd528 | 1075 | int i; |
b84a8dee YHC |
1076 | |
1077 | usb_del_gadget_udc(&fotg210->gadget); | |
1078 | iounmap(fotg210->reg); | |
1079 | free_irq(platform_get_irq(pdev, 0), fotg210); | |
1080 | ||
1081 | fotg210_ep_free_request(&fotg210->ep[0]->ep, fotg210->ep0_req); | |
c37bd528 AV |
1082 | for (i = 0; i < FOTG210_MAX_NUM_EP; i++) |
1083 | kfree(fotg210->ep[i]); | |
b84a8dee YHC |
1084 | kfree(fotg210); |
1085 | ||
1086 | return 0; | |
1087 | } | |
1088 | ||
aeffd2c3 | 1089 | int fotg210_udc_probe(struct platform_device *pdev) |
b84a8dee YHC |
1090 | { |
1091 | struct resource *res, *ires; | |
1092 | struct fotg210_udc *fotg210 = NULL; | |
1093 | struct fotg210_ep *_ep[FOTG210_MAX_NUM_EP]; | |
1094 | int ret = 0; | |
1095 | int i; | |
1096 | ||
1097 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1098 | if (!res) { | |
1099 | pr_err("platform_get_resource error.\n"); | |
1100 | return -ENODEV; | |
1101 | } | |
1102 | ||
1103 | ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
1104 | if (!ires) { | |
1105 | pr_err("platform_get_resource IORESOURCE_IRQ error.\n"); | |
1106 | return -ENODEV; | |
1107 | } | |
1108 | ||
1109 | ret = -ENOMEM; | |
1110 | ||
1111 | /* initialize udc */ | |
1112 | fotg210 = kzalloc(sizeof(struct fotg210_udc), GFP_KERNEL); | |
0351c329 | 1113 | if (fotg210 == NULL) |
c37bd528 | 1114 | goto err; |
b84a8dee YHC |
1115 | |
1116 | for (i = 0; i < FOTG210_MAX_NUM_EP; i++) { | |
1117 | _ep[i] = kzalloc(sizeof(struct fotg210_ep), GFP_KERNEL); | |
0351c329 | 1118 | if (_ep[i] == NULL) |
b84a8dee | 1119 | goto err_alloc; |
b84a8dee YHC |
1120 | fotg210->ep[i] = _ep[i]; |
1121 | } | |
1122 | ||
1123 | fotg210->reg = ioremap(res->start, resource_size(res)); | |
1124 | if (fotg210->reg == NULL) { | |
1125 | pr_err("ioremap error.\n"); | |
c37bd528 | 1126 | goto err_alloc; |
b84a8dee YHC |
1127 | } |
1128 | ||
1129 | spin_lock_init(&fotg210->lock); | |
1130 | ||
3cb40a59 | 1131 | platform_set_drvdata(pdev, fotg210); |
b84a8dee YHC |
1132 | |
1133 | fotg210->gadget.ops = &fotg210_gadget_ops; | |
1134 | ||
1135 | fotg210->gadget.max_speed = USB_SPEED_HIGH; | |
1136 | fotg210->gadget.dev.parent = &pdev->dev; | |
1137 | fotg210->gadget.dev.dma_mask = pdev->dev.dma_mask; | |
1138 | fotg210->gadget.name = udc_name; | |
1139 | ||
1140 | INIT_LIST_HEAD(&fotg210->gadget.ep_list); | |
1141 | ||
1142 | for (i = 0; i < FOTG210_MAX_NUM_EP; i++) { | |
1143 | struct fotg210_ep *ep = fotg210->ep[i]; | |
1144 | ||
1145 | if (i) { | |
1146 | INIT_LIST_HEAD(&fotg210->ep[i]->ep.ep_list); | |
1147 | list_add_tail(&fotg210->ep[i]->ep.ep_list, | |
1148 | &fotg210->gadget.ep_list); | |
1149 | } | |
1150 | ep->fotg210 = fotg210; | |
1151 | INIT_LIST_HEAD(&ep->queue); | |
1152 | ep->ep.name = fotg210_ep_name[i]; | |
1153 | ep->ep.ops = &fotg210_ep_ops; | |
e117e742 | 1154 | usb_ep_set_maxpacket_limit(&ep->ep, (unsigned short) ~0); |
8d29237a RB |
1155 | |
1156 | if (i == 0) { | |
1157 | ep->ep.caps.type_control = true; | |
1158 | } else { | |
1159 | ep->ep.caps.type_iso = true; | |
1160 | ep->ep.caps.type_bulk = true; | |
1161 | ep->ep.caps.type_int = true; | |
1162 | } | |
1163 | ||
1164 | ep->ep.caps.dir_in = true; | |
1165 | ep->ep.caps.dir_out = true; | |
b84a8dee | 1166 | } |
e117e742 | 1167 | usb_ep_set_maxpacket_limit(&fotg210->ep[0]->ep, 0x40); |
b84a8dee YHC |
1168 | fotg210->gadget.ep0 = &fotg210->ep[0]->ep; |
1169 | INIT_LIST_HEAD(&fotg210->gadget.ep0->ep_list); | |
1170 | ||
1171 | fotg210->ep0_req = fotg210_ep_alloc_request(&fotg210->ep[0]->ep, | |
1172 | GFP_KERNEL); | |
1173 | if (fotg210->ep0_req == NULL) | |
c37bd528 | 1174 | goto err_map; |
b84a8dee YHC |
1175 | |
1176 | fotg210_init(fotg210); | |
1177 | ||
1178 | fotg210_disable_unplug(fotg210); | |
1179 | ||
1180 | ret = request_irq(ires->start, fotg210_irq, IRQF_SHARED, | |
1181 | udc_name, fotg210); | |
1182 | if (ret < 0) { | |
1183 | pr_err("request_irq error (%d)\n", ret); | |
2184fe63 | 1184 | goto err_req; |
b84a8dee YHC |
1185 | } |
1186 | ||
1187 | ret = usb_add_gadget_udc(&pdev->dev, &fotg210->gadget); | |
1188 | if (ret) | |
1189 | goto err_add_udc; | |
1190 | ||
1191 | dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION); | |
1192 | ||
1193 | return 0; | |
1194 | ||
1195 | err_add_udc: | |
b84a8dee YHC |
1196 | free_irq(ires->start, fotg210); |
1197 | ||
1198 | err_req: | |
1199 | fotg210_ep_free_request(&fotg210->ep[0]->ep, fotg210->ep0_req); | |
1200 | ||
1201 | err_map: | |
c37bd528 | 1202 | iounmap(fotg210->reg); |
b84a8dee YHC |
1203 | |
1204 | err_alloc: | |
c37bd528 AV |
1205 | for (i = 0; i < FOTG210_MAX_NUM_EP; i++) |
1206 | kfree(fotg210->ep[i]); | |
b84a8dee YHC |
1207 | kfree(fotg210); |
1208 | ||
c37bd528 | 1209 | err: |
b84a8dee YHC |
1210 | return ret; |
1211 | } |