Commit | Line | Data |
---|---|---|
d28a9689 AT |
1 | /** |
2 | * dwc3-exynos.c - Samsung EXYNOS DWC3 Specific Glue layer | |
3 | * | |
4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com | |
6 | * | |
7 | * Author: Anton Tikhomirov <av.tikhomirov@samsung.com> | |
8 | * | |
5945f789 FB |
9 | * This program is free software: you can redistribute it and/or modify |
10 | * it under the terms of the GNU General Public License version 2 of | |
11 | * the License as published by the Free Software Foundation. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
d28a9689 AT |
17 | */ |
18 | ||
19 | #include <linux/module.h> | |
20 | #include <linux/kernel.h> | |
21 | #include <linux/slab.h> | |
22 | #include <linux/platform_device.h> | |
d28a9689 | 23 | #include <linux/dma-mapping.h> |
d28a9689 | 24 | #include <linux/clk.h> |
d720f057 | 25 | #include <linux/usb/otg.h> |
d7078df6 | 26 | #include <linux/usb/usb_phy_generic.h> |
accefdd4 | 27 | #include <linux/of.h> |
adcf20dc | 28 | #include <linux/of_platform.h> |
bd8ce544 | 29 | #include <linux/regulator/consumer.h> |
d28a9689 | 30 | |
d28a9689 | 31 | struct dwc3_exynos { |
d720f057 FB |
32 | struct platform_device *usb2_phy; |
33 | struct platform_device *usb3_phy; | |
d28a9689 AT |
34 | struct device *dev; |
35 | ||
36 | struct clk *clk; | |
72d996fc | 37 | struct clk *susp_clk; |
ed692a99 | 38 | struct clk *axius_clk; |
72d996fc | 39 | |
bd8ce544 VG |
40 | struct regulator *vdd33; |
41 | struct regulator *vdd10; | |
d28a9689 AT |
42 | }; |
43 | ||
41ac7b3a | 44 | static int dwc3_exynos_register_phys(struct dwc3_exynos *exynos) |
d720f057 | 45 | { |
4525beeb | 46 | struct usb_phy_generic_platform_data pdata; |
d720f057 FB |
47 | struct platform_device *pdev; |
48 | int ret; | |
49 | ||
50 | memset(&pdata, 0x00, sizeof(pdata)); | |
51 | ||
4525beeb | 52 | pdev = platform_device_alloc("usb_phy_generic", PLATFORM_DEVID_AUTO); |
d720f057 FB |
53 | if (!pdev) |
54 | return -ENOMEM; | |
55 | ||
56 | exynos->usb2_phy = pdev; | |
57 | pdata.type = USB_PHY_TYPE_USB2; | |
13518673 | 58 | pdata.gpio_reset = -1; |
d720f057 FB |
59 | |
60 | ret = platform_device_add_data(exynos->usb2_phy, &pdata, sizeof(pdata)); | |
61 | if (ret) | |
62 | goto err1; | |
63 | ||
4525beeb | 64 | pdev = platform_device_alloc("usb_phy_generic", PLATFORM_DEVID_AUTO); |
d720f057 FB |
65 | if (!pdev) { |
66 | ret = -ENOMEM; | |
67 | goto err1; | |
68 | } | |
69 | ||
70 | exynos->usb3_phy = pdev; | |
71 | pdata.type = USB_PHY_TYPE_USB3; | |
72 | ||
73 | ret = platform_device_add_data(exynos->usb3_phy, &pdata, sizeof(pdata)); | |
74 | if (ret) | |
75 | goto err2; | |
76 | ||
77 | ret = platform_device_add(exynos->usb2_phy); | |
78 | if (ret) | |
79 | goto err2; | |
80 | ||
81 | ret = platform_device_add(exynos->usb3_phy); | |
82 | if (ret) | |
83 | goto err3; | |
84 | ||
85 | return 0; | |
86 | ||
87 | err3: | |
88 | platform_device_del(exynos->usb2_phy); | |
89 | ||
90 | err2: | |
91 | platform_device_put(exynos->usb3_phy); | |
92 | ||
93 | err1: | |
94 | platform_device_put(exynos->usb2_phy); | |
95 | ||
96 | return ret; | |
97 | } | |
98 | ||
adcf20dc VG |
99 | static int dwc3_exynos_remove_child(struct device *dev, void *unused) |
100 | { | |
101 | struct platform_device *pdev = to_platform_device(dev); | |
102 | ||
103 | platform_device_unregister(pdev); | |
104 | ||
105 | return 0; | |
106 | } | |
107 | ||
41ac7b3a | 108 | static int dwc3_exynos_probe(struct platform_device *pdev) |
d28a9689 | 109 | { |
d28a9689 | 110 | struct dwc3_exynos *exynos; |
20b97dc1 | 111 | struct device *dev = &pdev->dev; |
adcf20dc | 112 | struct device_node *node = dev->of_node; |
d28a9689 | 113 | |
b09e99ee | 114 | int ret; |
d28a9689 | 115 | |
20b97dc1 | 116 | exynos = devm_kzalloc(dev, sizeof(*exynos), GFP_KERNEL); |
734d5a53 | 117 | if (!exynos) |
b09e99ee | 118 | return -ENOMEM; |
d28a9689 | 119 | |
accefdd4 VG |
120 | /* |
121 | * Right now device-tree probed devices don't get dma_mask set. | |
122 | * Since shared usb code relies on it, set it here for now. | |
123 | * Once we move to full device tree support this will vanish off. | |
124 | */ | |
e1fd7341 | 125 | ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32)); |
22d9d8e8 | 126 | if (ret) |
b09e99ee | 127 | return ret; |
accefdd4 | 128 | |
d28a9689 AT |
129 | platform_set_drvdata(pdev, exynos); |
130 | ||
d720f057 FB |
131 | ret = dwc3_exynos_register_phys(exynos); |
132 | if (ret) { | |
20b97dc1 | 133 | dev_err(dev, "couldn't register PHYs\n"); |
b09e99ee | 134 | return ret; |
d28a9689 AT |
135 | } |
136 | ||
c1a3acaa VG |
137 | exynos->dev = dev; |
138 | ||
139 | exynos->clk = devm_clk_get(dev, "usbdrd30"); | |
140 | if (IS_ERR(exynos->clk)) { | |
20b97dc1 | 141 | dev_err(dev, "couldn't get clock\n"); |
b09e99ee | 142 | return -EINVAL; |
d28a9689 | 143 | } |
ddb5147c | 144 | clk_prepare_enable(exynos->clk); |
d28a9689 | 145 | |
72d996fc VG |
146 | exynos->susp_clk = devm_clk_get(dev, "usbdrd30_susp_clk"); |
147 | if (IS_ERR(exynos->susp_clk)) { | |
42f69a02 | 148 | dev_info(dev, "no suspend clk specified\n"); |
72d996fc VG |
149 | exynos->susp_clk = NULL; |
150 | } | |
151 | clk_prepare_enable(exynos->susp_clk); | |
152 | ||
ed692a99 VG |
153 | if (of_device_is_compatible(node, "samsung,exynos7-dwusb3")) { |
154 | exynos->axius_clk = devm_clk_get(dev, "usbdrd30_axius_clk"); | |
155 | if (IS_ERR(exynos->axius_clk)) { | |
156 | dev_err(dev, "no AXI UpScaler clk specified\n"); | |
157 | return -ENODEV; | |
158 | } | |
159 | clk_prepare_enable(exynos->axius_clk); | |
160 | } else { | |
161 | exynos->axius_clk = NULL; | |
162 | } | |
163 | ||
bd8ce544 VG |
164 | exynos->vdd33 = devm_regulator_get(dev, "vdd33"); |
165 | if (IS_ERR(exynos->vdd33)) { | |
166 | ret = PTR_ERR(exynos->vdd33); | |
167 | goto err2; | |
168 | } | |
169 | ret = regulator_enable(exynos->vdd33); | |
170 | if (ret) { | |
171 | dev_err(dev, "Failed to enable VDD33 supply\n"); | |
172 | goto err2; | |
173 | } | |
174 | ||
175 | exynos->vdd10 = devm_regulator_get(dev, "vdd10"); | |
176 | if (IS_ERR(exynos->vdd10)) { | |
177 | ret = PTR_ERR(exynos->vdd10); | |
178 | goto err3; | |
179 | } | |
180 | ret = regulator_enable(exynos->vdd10); | |
181 | if (ret) { | |
182 | dev_err(dev, "Failed to enable VDD10 supply\n"); | |
183 | goto err3; | |
184 | } | |
185 | ||
adcf20dc VG |
186 | if (node) { |
187 | ret = of_platform_populate(node, NULL, NULL, dev); | |
188 | if (ret) { | |
189 | dev_err(dev, "failed to add dwc3 core\n"); | |
bd8ce544 | 190 | goto err4; |
adcf20dc VG |
191 | } |
192 | } else { | |
193 | dev_err(dev, "no device node, failed to add dwc3 core\n"); | |
194 | ret = -ENODEV; | |
bd8ce544 | 195 | goto err4; |
d28a9689 AT |
196 | } |
197 | ||
198 | return 0; | |
199 | ||
bd8ce544 VG |
200 | err4: |
201 | regulator_disable(exynos->vdd10); | |
202 | err3: | |
203 | regulator_disable(exynos->vdd33); | |
20b97dc1 | 204 | err2: |
ed692a99 | 205 | clk_disable_unprepare(exynos->axius_clk); |
72d996fc | 206 | clk_disable_unprepare(exynos->susp_clk); |
c1a3acaa | 207 | clk_disable_unprepare(exynos->clk); |
d28a9689 AT |
208 | return ret; |
209 | } | |
210 | ||
fb4e98ab | 211 | static int dwc3_exynos_remove(struct platform_device *pdev) |
d28a9689 AT |
212 | { |
213 | struct dwc3_exynos *exynos = platform_get_drvdata(pdev); | |
d28a9689 | 214 | |
022d0547 | 215 | device_for_each_child(&pdev->dev, NULL, dwc3_exynos_remove_child); |
d720f057 FB |
216 | platform_device_unregister(exynos->usb2_phy); |
217 | platform_device_unregister(exynos->usb3_phy); | |
d28a9689 | 218 | |
ed692a99 | 219 | clk_disable_unprepare(exynos->axius_clk); |
72d996fc | 220 | clk_disable_unprepare(exynos->susp_clk); |
ddb5147c | 221 | clk_disable_unprepare(exynos->clk); |
d28a9689 | 222 | |
bd8ce544 VG |
223 | regulator_disable(exynos->vdd33); |
224 | regulator_disable(exynos->vdd10); | |
225 | ||
d28a9689 AT |
226 | return 0; |
227 | } | |
228 | ||
accefdd4 | 229 | static const struct of_device_id exynos_dwc3_match[] = { |
fe29db8f | 230 | { .compatible = "samsung,exynos5250-dwusb3" }, |
ed692a99 | 231 | { .compatible = "samsung,exynos7-dwusb3" }, |
accefdd4 VG |
232 | {}, |
233 | }; | |
234 | MODULE_DEVICE_TABLE(of, exynos_dwc3_match); | |
accefdd4 | 235 | |
19fda7cd | 236 | #ifdef CONFIG_PM_SLEEP |
0646caf7 VS |
237 | static int dwc3_exynos_suspend(struct device *dev) |
238 | { | |
239 | struct dwc3_exynos *exynos = dev_get_drvdata(dev); | |
240 | ||
ed692a99 | 241 | clk_disable(exynos->axius_clk); |
0646caf7 VS |
242 | clk_disable(exynos->clk); |
243 | ||
bd8ce544 VG |
244 | regulator_disable(exynos->vdd33); |
245 | regulator_disable(exynos->vdd10); | |
246 | ||
0646caf7 VS |
247 | return 0; |
248 | } | |
249 | ||
250 | static int dwc3_exynos_resume(struct device *dev) | |
251 | { | |
252 | struct dwc3_exynos *exynos = dev_get_drvdata(dev); | |
bd8ce544 VG |
253 | int ret; |
254 | ||
255 | ret = regulator_enable(exynos->vdd33); | |
256 | if (ret) { | |
257 | dev_err(dev, "Failed to enable VDD33 supply\n"); | |
258 | return ret; | |
259 | } | |
260 | ret = regulator_enable(exynos->vdd10); | |
261 | if (ret) { | |
262 | dev_err(dev, "Failed to enable VDD10 supply\n"); | |
263 | return ret; | |
264 | } | |
0646caf7 VS |
265 | |
266 | clk_enable(exynos->clk); | |
ed692a99 | 267 | clk_enable(exynos->axius_clk); |
0646caf7 VS |
268 | |
269 | /* runtime set active to reflect active state. */ | |
270 | pm_runtime_disable(dev); | |
271 | pm_runtime_set_active(dev); | |
272 | pm_runtime_enable(dev); | |
273 | ||
274 | return 0; | |
275 | } | |
276 | ||
277 | static const struct dev_pm_ops dwc3_exynos_dev_pm_ops = { | |
278 | SET_SYSTEM_SLEEP_PM_OPS(dwc3_exynos_suspend, dwc3_exynos_resume) | |
279 | }; | |
280 | ||
281 | #define DEV_PM_OPS (&dwc3_exynos_dev_pm_ops) | |
282 | #else | |
283 | #define DEV_PM_OPS NULL | |
19fda7cd | 284 | #endif /* CONFIG_PM_SLEEP */ |
0646caf7 | 285 | |
d28a9689 AT |
286 | static struct platform_driver dwc3_exynos_driver = { |
287 | .probe = dwc3_exynos_probe, | |
7690417d | 288 | .remove = dwc3_exynos_remove, |
d28a9689 AT |
289 | .driver = { |
290 | .name = "exynos-dwc3", | |
b4c9f578 | 291 | .of_match_table = exynos_dwc3_match, |
0646caf7 | 292 | .pm = DEV_PM_OPS, |
d28a9689 AT |
293 | }, |
294 | }; | |
295 | ||
296 | module_platform_driver(dwc3_exynos_driver); | |
297 | ||
298 | MODULE_ALIAS("platform:exynos-dwc3"); | |
299 | MODULE_AUTHOR("Anton Tikhomirov <av.tikhomirov@samsung.com>"); | |
5945f789 | 300 | MODULE_LICENSE("GPL v2"); |
d28a9689 | 301 | MODULE_DESCRIPTION("DesignWare USB3 EXYNOS Glue Layer"); |