[linux-block.git] / drivers / usb / dwc3 / dwc3-exynos.c

/**
 * dwc3-exynos.c - Samsung EXYNOS DWC3 Specific Glue layer
 *
 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
 * Author: Anton Tikhomirov <av.tikhomirov@samsung.com>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2  of
 * the License as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/platform_device.h>
#include <linux/platform_data/dwc3-exynos.h>
#include <linux/dma-mapping.h>
#include <linux/clk.h>
#include <linux/usb/otg.h>
#include <linux/usb/usb_phy_generic.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/regulator/consumer.h>

struct dwc3_exynos {
	struct platform_device	*usb2_phy;
	struct platform_device	*usb3_phy;
	struct device		*dev;

	struct clk		*clk;
	struct regulator	*vdd33;
	struct regulator	*vdd10;
};

static int dwc3_exynos_register_phys(struct dwc3_exynos *exynos)
{
	struct usb_phy_generic_platform_data pdata;
	struct platform_device	*pdev;
	int			ret;

	memset(&pdata, 0x00, sizeof(pdata));

	pdev = platform_device_alloc("usb_phy_generic", PLATFORM_DEVID_AUTO);
	if (!pdev)
		return -ENOMEM;

	exynos->usb2_phy = pdev;
	pdata.type = USB_PHY_TYPE_USB2;
	pdata.gpio_reset = -1;

	ret = platform_device_add_data(exynos->usb2_phy, &pdata, sizeof(pdata));
	if (ret)
		goto err1;

	pdev = platform_device_alloc("usb_phy_generic", PLATFORM_DEVID_AUTO);
	if (!pdev) {
		ret = -ENOMEM;
		goto err1;
	}

	exynos->usb3_phy = pdev;
	pdata.type = USB_PHY_TYPE_USB3;

	ret = platform_device_add_data(exynos->usb3_phy, &pdata, sizeof(pdata));
	if (ret)
		goto err2;

	ret = platform_device_add(exynos->usb2_phy);
	if (ret)
		goto err2;

	ret = platform_device_add(exynos->usb3_phy);
	if (ret)
		goto err3;

	return 0;

err3:
	platform_device_del(exynos->usb2_phy);

err2:
	platform_device_put(exynos->usb3_phy);

err1:
	platform_device_put(exynos->usb2_phy);

	return ret;
}

static int dwc3_exynos_remove_child(struct device *dev, void *unused)
{
	struct platform_device *pdev = to_platform_device(dev);

	platform_device_unregister(pdev);

	return 0;
}

static int dwc3_exynos_probe(struct platform_device *pdev)
{
	struct dwc3_exynos	*exynos;
	struct clk		*clk;
	struct device		*dev = &pdev->dev;
	struct device_node	*node = dev->of_node;

	int			ret;

	exynos = devm_kzalloc(dev, sizeof(*exynos), GFP_KERNEL);
	if (!exynos)
		return -ENOMEM;

	/*
	 * Right now device-tree probed devices don't get dma_mask set.
	 * Since shared usb code relies on it, set it here for now.
	 * Once we move to full device tree support this will vanish off.
	 */
	ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32));
	if (ret)
		return ret;

	platform_set_drvdata(pdev, exynos);

	ret = dwc3_exynos_register_phys(exynos);
	if (ret) {
		dev_err(dev, "couldn't register PHYs\n");
		return ret;
	}

	clk = devm_clk_get(dev, "usbdrd30");
	if (IS_ERR(clk)) {
		dev_err(dev, "couldn't get clock\n");
		return -EINVAL;
	}

	exynos->dev	= dev;
	exynos->clk	= clk;

	clk_prepare_enable(exynos->clk);

	exynos->vdd33 = devm_regulator_get(dev, "vdd33");
	if (IS_ERR(exynos->vdd33)) {
		ret = PTR_ERR(exynos->vdd33);
		goto err2;
	}
	ret = regulator_enable(exynos->vdd33);
	if (ret) {
		dev_err(dev, "Failed to enable VDD33 supply\n");
		goto err2;
	}

	exynos->vdd10 = devm_regulator_get(dev, "vdd10");
	if (IS_ERR(exynos->vdd10)) {
		ret = PTR_ERR(exynos->vdd10);
		goto err3;
	}
	ret = regulator_enable(exynos->vdd10);
	if (ret) {
		dev_err(dev, "Failed to enable VDD10 supply\n");
		goto err3;
	}

	if (node) {
		ret = of_platform_populate(node, NULL, NULL, dev);
		if (ret) {
			dev_err(dev, "failed to add dwc3 core\n");
			goto err4;
		}
	} else {
		dev_err(dev, "no device node, failed to add dwc3 core\n");
		ret = -ENODEV;
		goto err4;
	}

	return 0;

err4:
	regulator_disable(exynos->vdd10);
err3:
	regulator_disable(exynos->vdd33);
err2:
	clk_disable_unprepare(clk);
	return ret;
}

static int dwc3_exynos_remove(struct platform_device *pdev)
{
	struct dwc3_exynos	*exynos = platform_get_drvdata(pdev);

	device_for_each_child(&pdev->dev, NULL, dwc3_exynos_remove_child);
	platform_device_unregister(exynos->usb2_phy);
	platform_device_unregister(exynos->usb3_phy);

	clk_disable_unprepare(exynos->clk);

	regulator_disable(exynos->vdd33);
	regulator_disable(exynos->vdd10);

	return 0;
}

#ifdef CONFIG_OF
static const struct of_device_id exynos_dwc3_match[] = {
	{ .compatible = "samsung,exynos5250-dwusb3" },
	{},
};
MODULE_DEVICE_TABLE(of, exynos_dwc3_match);
#endif

#ifdef CONFIG_PM_SLEEP
static int dwc3_exynos_suspend(struct device *dev)
{
	struct dwc3_exynos *exynos = dev_get_drvdata(dev);

	clk_disable(exynos->clk);

	regulator_disable(exynos->vdd33);
	regulator_disable(exynos->vdd10);

	return 0;
}

static int dwc3_exynos_resume(struct device *dev)
{
	struct dwc3_exynos *exynos = dev_get_drvdata(dev);
	int ret;

	ret = regulator_enable(exynos->vdd33);
	if (ret) {
		dev_err(dev, "Failed to enable VDD33 supply\n");
		return ret;
	}
	ret = regulator_enable(exynos->vdd10);
	if (ret) {
		dev_err(dev, "Failed to enable VDD10 supply\n");
		return ret;
	}

	clk_enable(exynos->clk);

	/* runtime set active to reflect active state. */
	pm_runtime_disable(dev);
	pm_runtime_set_active(dev);
	pm_runtime_enable(dev);

	return 0;
}

static const struct dev_pm_ops dwc3_exynos_dev_pm_ops = {
	SET_SYSTEM_SLEEP_PM_OPS(dwc3_exynos_suspend, dwc3_exynos_resume)
};

#define DEV_PM_OPS	(&dwc3_exynos_dev_pm_ops)
#else
#define DEV_PM_OPS	NULL
#endif /* CONFIG_PM_SLEEP */

static struct platform_driver dwc3_exynos_driver = {
	.probe		= dwc3_exynos_probe,
	.remove		= dwc3_exynos_remove,
	.driver		= {
		.name	= "exynos-dwc3",
		.of_match_table = of_match_ptr(exynos_dwc3_match),
		.pm	= DEV_PM_OPS,
	},
};

module_platform_driver(dwc3_exynos_driver);

MODULE_ALIAS("platform:exynos-dwc3");
MODULE_AUTHOR("Anton Tikhomirov <av.tikhomirov@samsung.com>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("DesignWare USB3 EXYNOS Glue Layer");
Commit	Line	Data
d28a9689 AT	1	/**
	2	* dwc3-exynos.c - Samsung EXYNOS DWC3 Specific Glue layer
	3	*
	4	* Copyright (c) 2012 Samsung Electronics Co., Ltd.
	5	* http://www.samsung.com
	6	*
	7	* Author: Anton Tikhomirov <av.tikhomirov@samsung.com>
	8	*
5945f789 FB	9	* This program is free software: you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 of
	11	* the License as published by the Free Software Foundation.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
d28a9689 AT	17	*/
	18
	19	#include <linux/module.h>
	20	#include <linux/kernel.h>
	21	#include <linux/slab.h>
	22	#include <linux/platform_device.h>
	23	#include <linux/platform_data/dwc3-exynos.h>
	24	#include <linux/dma-mapping.h>
d28a9689	25	#include <linux/clk.h>
d720f057	26	#include <linux/usb/otg.h>
d7078df6	27	#include <linux/usb/usb_phy_generic.h>
accefdd4	28	#include <linux/of.h>
adcf20dc	29	#include <linux/of_platform.h>
bd8ce544	30	#include <linux/regulator/consumer.h>
d28a9689	31
d28a9689	32	struct dwc3_exynos {
d720f057 FB	33	struct platform_device *usb2_phy;
d720f057 FB	34	struct platform_device *usb3_phy;
d28a9689 AT	35	struct device *dev;
	36
	37	struct clk *clk;
bd8ce544 VG	38	struct regulator *vdd33;
bd8ce544 VG	39	struct regulator *vdd10;
d28a9689 AT	40	};
d28a9689 AT	41
41ac7b3a	42	static int dwc3_exynos_register_phys(struct dwc3_exynos *exynos)
d720f057	43	{
4525beeb	44	struct usb_phy_generic_platform_data pdata;
d720f057 FB	45	struct platform_device *pdev;
	46	int ret;
	47
	48	memset(&pdata, 0x00, sizeof(pdata));
	49
4525beeb	50	pdev = platform_device_alloc("usb_phy_generic", PLATFORM_DEVID_AUTO);
d720f057 FB	51	if (!pdev)
	52	return -ENOMEM;
	53
	54	exynos->usb2_phy = pdev;
	55	pdata.type = USB_PHY_TYPE_USB2;
13518673	56	pdata.gpio_reset = -1;
d720f057 FB	57
	58	ret = platform_device_add_data(exynos->usb2_phy, &pdata, sizeof(pdata));
	59	if (ret)
	60	goto err1;
	61
4525beeb	62	pdev = platform_device_alloc("usb_phy_generic", PLATFORM_DEVID_AUTO);
d720f057 FB	63	if (!pdev) {
	64	ret = -ENOMEM;
	65	goto err1;
	66	}
	67
	68	exynos->usb3_phy = pdev;
	69	pdata.type = USB_PHY_TYPE_USB3;
	70
	71	ret = platform_device_add_data(exynos->usb3_phy, &pdata, sizeof(pdata));
	72	if (ret)
	73	goto err2;
	74
	75	ret = platform_device_add(exynos->usb2_phy);
	76	if (ret)
	77	goto err2;
	78
	79	ret = platform_device_add(exynos->usb3_phy);
	80	if (ret)
	81	goto err3;
	82
	83	return 0;
	84
	85	err3:
	86	platform_device_del(exynos->usb2_phy);
	87
	88	err2:
	89	platform_device_put(exynos->usb3_phy);
	90
	91	err1:
	92	platform_device_put(exynos->usb2_phy);
	93
	94	return ret;
	95	}
	96
adcf20dc VG	97	static int dwc3_exynos_remove_child(struct device dev, void unused)
	98	{
	99	struct platform_device *pdev = to_platform_device(dev);
	100
	101	platform_device_unregister(pdev);
	102
	103	return 0;
	104	}
	105
41ac7b3a	106	static int dwc3_exynos_probe(struct platform_device *pdev)
d28a9689	107	{
d28a9689 AT	108	struct dwc3_exynos *exynos;
d28a9689 AT	109	struct clk *clk;
20b97dc1	110	struct device *dev = &pdev->dev;
adcf20dc	111	struct device_node *node = dev->of_node;
d28a9689	112
b09e99ee	113	int ret;
d28a9689	114
20b97dc1	115	exynos = devm_kzalloc(dev, sizeof(*exynos), GFP_KERNEL);
734d5a53	116	if (!exynos)
b09e99ee	117	return -ENOMEM;
d28a9689	118
accefdd4 VG	119	/*
	120	* Right now device-tree probed devices don't get dma_mask set.
	121	* Since shared usb code relies on it, set it here for now.
	122	* Once we move to full device tree support this will vanish off.
	123	*/
e1fd7341	124	ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32));
22d9d8e8	125	if (ret)
b09e99ee	126	return ret;
accefdd4	127
d28a9689 AT	128	platform_set_drvdata(pdev, exynos);
d28a9689 AT	129
d720f057 FB	130	ret = dwc3_exynos_register_phys(exynos);
d720f057 FB	131	if (ret) {
20b97dc1	132	dev_err(dev, "couldn't register PHYs\n");
b09e99ee	133	return ret;
d28a9689 AT	134	}
d28a9689 AT	135
20b97dc1	136	clk = devm_clk_get(dev, "usbdrd30");
d28a9689	137	if (IS_ERR(clk)) {
20b97dc1	138	dev_err(dev, "couldn't get clock\n");
b09e99ee	139	return -EINVAL;
d28a9689 AT	140	}
d28a9689 AT	141
20b97dc1	142	exynos->dev = dev;
d28a9689 AT	143	exynos->clk = clk;
d28a9689 AT	144
ddb5147c	145	clk_prepare_enable(exynos->clk);
d28a9689	146
bd8ce544 VG	147	exynos->vdd33 = devm_regulator_get(dev, "vdd33");
	148	if (IS_ERR(exynos->vdd33)) {
	149	ret = PTR_ERR(exynos->vdd33);
	150	goto err2;
	151	}
	152	ret = regulator_enable(exynos->vdd33);
	153	if (ret) {
	154	dev_err(dev, "Failed to enable VDD33 supply\n");
	155	goto err2;
	156	}
	157
	158	exynos->vdd10 = devm_regulator_get(dev, "vdd10");
	159	if (IS_ERR(exynos->vdd10)) {
	160	ret = PTR_ERR(exynos->vdd10);
	161	goto err3;
	162	}
	163	ret = regulator_enable(exynos->vdd10);
	164	if (ret) {
	165	dev_err(dev, "Failed to enable VDD10 supply\n");
	166	goto err3;
	167	}
	168
adcf20dc VG	169	if (node) {
	170	ret = of_platform_populate(node, NULL, NULL, dev);
	171	if (ret) {
	172	dev_err(dev, "failed to add dwc3 core\n");
bd8ce544	173	goto err4;
adcf20dc VG	174	}
	175	} else {
	176	dev_err(dev, "no device node, failed to add dwc3 core\n");
	177	ret = -ENODEV;
bd8ce544	178	goto err4;
d28a9689 AT	179	}
	180
	181	return 0;
	182
bd8ce544 VG	183	err4:
	184	regulator_disable(exynos->vdd10);
	185	err3:
	186	regulator_disable(exynos->vdd33);
20b97dc1	187	err2:
ddb5147c	188	clk_disable_unprepare(clk);
d28a9689 AT	189	return ret;
	190	}
	191
fb4e98ab	192	static int dwc3_exynos_remove(struct platform_device *pdev)
d28a9689 AT	193	{
d28a9689 AT	194	struct dwc3_exynos *exynos = platform_get_drvdata(pdev);
d28a9689	195
022d0547	196	device_for_each_child(&pdev->dev, NULL, dwc3_exynos_remove_child);
d720f057 FB	197	platform_device_unregister(exynos->usb2_phy);
d720f057 FB	198	platform_device_unregister(exynos->usb3_phy);
d28a9689	199
ddb5147c	200	clk_disable_unprepare(exynos->clk);
d28a9689	201
bd8ce544 VG	202	regulator_disable(exynos->vdd33);
	203	regulator_disable(exynos->vdd10);
	204
d28a9689 AT	205	return 0;
	206	}
	207
accefdd4 VG	208	#ifdef CONFIG_OF
accefdd4 VG	209	static const struct of_device_id exynos_dwc3_match[] = {
fe29db8f	210	{ .compatible = "samsung,exynos5250-dwusb3" },
accefdd4 VG	211	{},
	212	};
	213	MODULE_DEVICE_TABLE(of, exynos_dwc3_match);
	214	#endif
	215
19fda7cd	216	#ifdef CONFIG_PM_SLEEP
0646caf7 VS	217	static int dwc3_exynos_suspend(struct device *dev)
	218	{
	219	struct dwc3_exynos *exynos = dev_get_drvdata(dev);
	220
	221	clk_disable(exynos->clk);
	222
bd8ce544 VG	223	regulator_disable(exynos->vdd33);
	224	regulator_disable(exynos->vdd10);
	225
0646caf7 VS	226	return 0;
	227	}
	228
	229	static int dwc3_exynos_resume(struct device *dev)
	230	{
	231	struct dwc3_exynos *exynos = dev_get_drvdata(dev);
bd8ce544 VG	232	int ret;
	233
	234	ret = regulator_enable(exynos->vdd33);
	235	if (ret) {
	236	dev_err(dev, "Failed to enable VDD33 supply\n");
	237	return ret;
	238	}
	239	ret = regulator_enable(exynos->vdd10);
	240	if (ret) {
	241	dev_err(dev, "Failed to enable VDD10 supply\n");
	242	return ret;
	243	}
0646caf7 VS	244
	245	clk_enable(exynos->clk);
	246
	247	/* runtime set active to reflect active state. */
	248	pm_runtime_disable(dev);
	249	pm_runtime_set_active(dev);
	250	pm_runtime_enable(dev);
	251
	252	return 0;
	253	}
	254
	255	static const struct dev_pm_ops dwc3_exynos_dev_pm_ops = {
	256	SET_SYSTEM_SLEEP_PM_OPS(dwc3_exynos_suspend, dwc3_exynos_resume)
	257	};
	258
	259	#define DEV_PM_OPS (&dwc3_exynos_dev_pm_ops)
	260	#else
	261	#define DEV_PM_OPS NULL
19fda7cd	262	#endif /* CONFIG_PM_SLEEP */
0646caf7	263
d28a9689 AT	264	static struct platform_driver dwc3_exynos_driver = {
d28a9689 AT	265	.probe = dwc3_exynos_probe,
7690417d	266	.remove = dwc3_exynos_remove,
d28a9689 AT	267	.driver = {
d28a9689 AT	268	.name = "exynos-dwc3",
accefdd4	269	.of_match_table = of_match_ptr(exynos_dwc3_match),
0646caf7	270	.pm = DEV_PM_OPS,
d28a9689 AT	271	},
	272	};
	273
	274	module_platform_driver(dwc3_exynos_driver);
	275
	276	MODULE_ALIAS("platform:exynos-dwc3");
	277	MODULE_AUTHOR("Anton Tikhomirov <av.tikhomirov@samsung.com>");
5945f789	278	MODULE_LICENSE("GPL v2");
d28a9689	279	MODULE_DESCRIPTION("DesignWare USB3 EXYNOS Glue Layer");