Commit | Line | Data |
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d28a9689 AT |
1 | /** |
2 | * dwc3-exynos.c - Samsung EXYNOS DWC3 Specific Glue layer | |
3 | * | |
4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com | |
6 | * | |
7 | * Author: Anton Tikhomirov <av.tikhomirov@samsung.com> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | */ | |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/slab.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/platform_data/dwc3-exynos.h> | |
20 | #include <linux/dma-mapping.h> | |
d28a9689 | 21 | #include <linux/clk.h> |
d720f057 FB |
22 | #include <linux/usb/otg.h> |
23 | #include <linux/usb/nop-usb-xceiv.h> | |
accefdd4 | 24 | #include <linux/of.h> |
adcf20dc | 25 | #include <linux/of_platform.h> |
d28a9689 | 26 | |
d28a9689 | 27 | struct dwc3_exynos { |
d720f057 FB |
28 | struct platform_device *usb2_phy; |
29 | struct platform_device *usb3_phy; | |
d28a9689 AT |
30 | struct device *dev; |
31 | ||
32 | struct clk *clk; | |
33 | }; | |
34 | ||
41ac7b3a | 35 | static int dwc3_exynos_register_phys(struct dwc3_exynos *exynos) |
d720f057 FB |
36 | { |
37 | struct nop_usb_xceiv_platform_data pdata; | |
38 | struct platform_device *pdev; | |
39 | int ret; | |
40 | ||
41 | memset(&pdata, 0x00, sizeof(pdata)); | |
42 | ||
b0e45ddb | 43 | pdev = platform_device_alloc("nop_usb_xceiv", PLATFORM_DEVID_AUTO); |
d720f057 FB |
44 | if (!pdev) |
45 | return -ENOMEM; | |
46 | ||
47 | exynos->usb2_phy = pdev; | |
48 | pdata.type = USB_PHY_TYPE_USB2; | |
49 | ||
50 | ret = platform_device_add_data(exynos->usb2_phy, &pdata, sizeof(pdata)); | |
51 | if (ret) | |
52 | goto err1; | |
53 | ||
b0e45ddb | 54 | pdev = platform_device_alloc("nop_usb_xceiv", PLATFORM_DEVID_AUTO); |
d720f057 FB |
55 | if (!pdev) { |
56 | ret = -ENOMEM; | |
57 | goto err1; | |
58 | } | |
59 | ||
60 | exynos->usb3_phy = pdev; | |
61 | pdata.type = USB_PHY_TYPE_USB3; | |
62 | ||
63 | ret = platform_device_add_data(exynos->usb3_phy, &pdata, sizeof(pdata)); | |
64 | if (ret) | |
65 | goto err2; | |
66 | ||
67 | ret = platform_device_add(exynos->usb2_phy); | |
68 | if (ret) | |
69 | goto err2; | |
70 | ||
71 | ret = platform_device_add(exynos->usb3_phy); | |
72 | if (ret) | |
73 | goto err3; | |
74 | ||
75 | return 0; | |
76 | ||
77 | err3: | |
78 | platform_device_del(exynos->usb2_phy); | |
79 | ||
80 | err2: | |
81 | platform_device_put(exynos->usb3_phy); | |
82 | ||
83 | err1: | |
84 | platform_device_put(exynos->usb2_phy); | |
85 | ||
86 | return ret; | |
87 | } | |
88 | ||
adcf20dc VG |
89 | static int dwc3_exynos_remove_child(struct device *dev, void *unused) |
90 | { | |
91 | struct platform_device *pdev = to_platform_device(dev); | |
92 | ||
93 | platform_device_unregister(pdev); | |
94 | ||
95 | return 0; | |
96 | } | |
97 | ||
41ac7b3a | 98 | static int dwc3_exynos_probe(struct platform_device *pdev) |
d28a9689 | 99 | { |
d28a9689 AT |
100 | struct dwc3_exynos *exynos; |
101 | struct clk *clk; | |
20b97dc1 | 102 | struct device *dev = &pdev->dev; |
adcf20dc | 103 | struct device_node *node = dev->of_node; |
d28a9689 | 104 | |
d28a9689 AT |
105 | int ret = -ENOMEM; |
106 | ||
20b97dc1 | 107 | exynos = devm_kzalloc(dev, sizeof(*exynos), GFP_KERNEL); |
d28a9689 | 108 | if (!exynos) { |
20b97dc1 | 109 | dev_err(dev, "not enough memory\n"); |
adcf20dc | 110 | goto err1; |
d28a9689 AT |
111 | } |
112 | ||
accefdd4 VG |
113 | /* |
114 | * Right now device-tree probed devices don't get dma_mask set. | |
115 | * Since shared usb code relies on it, set it here for now. | |
116 | * Once we move to full device tree support this will vanish off. | |
117 | */ | |
adcf20dc | 118 | if (!dev->dma_mask) |
3b9561e9 SW |
119 | dev->dma_mask = &dev->coherent_dma_mask; |
120 | if (!dev->coherent_dma_mask) | |
121 | dev->coherent_dma_mask = DMA_BIT_MASK(32); | |
accefdd4 | 122 | |
d28a9689 AT |
123 | platform_set_drvdata(pdev, exynos); |
124 | ||
d720f057 FB |
125 | ret = dwc3_exynos_register_phys(exynos); |
126 | if (ret) { | |
20b97dc1 | 127 | dev_err(dev, "couldn't register PHYs\n"); |
adcf20dc | 128 | goto err1; |
d28a9689 AT |
129 | } |
130 | ||
20b97dc1 | 131 | clk = devm_clk_get(dev, "usbdrd30"); |
d28a9689 | 132 | if (IS_ERR(clk)) { |
20b97dc1 | 133 | dev_err(dev, "couldn't get clock\n"); |
d28a9689 | 134 | ret = -EINVAL; |
20b97dc1 | 135 | goto err1; |
d28a9689 AT |
136 | } |
137 | ||
20b97dc1 | 138 | exynos->dev = dev; |
d28a9689 AT |
139 | exynos->clk = clk; |
140 | ||
ddb5147c | 141 | clk_prepare_enable(exynos->clk); |
d28a9689 | 142 | |
adcf20dc VG |
143 | if (node) { |
144 | ret = of_platform_populate(node, NULL, NULL, dev); | |
145 | if (ret) { | |
146 | dev_err(dev, "failed to add dwc3 core\n"); | |
147 | goto err2; | |
148 | } | |
149 | } else { | |
150 | dev_err(dev, "no device node, failed to add dwc3 core\n"); | |
151 | ret = -ENODEV; | |
20b97dc1 | 152 | goto err2; |
d28a9689 AT |
153 | } |
154 | ||
155 | return 0; | |
156 | ||
20b97dc1 | 157 | err2: |
ddb5147c | 158 | clk_disable_unprepare(clk); |
d28a9689 | 159 | err1: |
d28a9689 AT |
160 | return ret; |
161 | } | |
162 | ||
fb4e98ab | 163 | static int dwc3_exynos_remove(struct platform_device *pdev) |
d28a9689 AT |
164 | { |
165 | struct dwc3_exynos *exynos = platform_get_drvdata(pdev); | |
d28a9689 | 166 | |
022d0547 | 167 | device_for_each_child(&pdev->dev, NULL, dwc3_exynos_remove_child); |
d720f057 FB |
168 | platform_device_unregister(exynos->usb2_phy); |
169 | platform_device_unregister(exynos->usb3_phy); | |
d28a9689 | 170 | |
ddb5147c | 171 | clk_disable_unprepare(exynos->clk); |
d28a9689 AT |
172 | |
173 | return 0; | |
174 | } | |
175 | ||
accefdd4 VG |
176 | #ifdef CONFIG_OF |
177 | static const struct of_device_id exynos_dwc3_match[] = { | |
fe29db8f | 178 | { .compatible = "samsung,exynos5250-dwusb3" }, |
accefdd4 VG |
179 | {}, |
180 | }; | |
181 | MODULE_DEVICE_TABLE(of, exynos_dwc3_match); | |
182 | #endif | |
183 | ||
19fda7cd | 184 | #ifdef CONFIG_PM_SLEEP |
0646caf7 VS |
185 | static int dwc3_exynos_suspend(struct device *dev) |
186 | { | |
187 | struct dwc3_exynos *exynos = dev_get_drvdata(dev); | |
188 | ||
189 | clk_disable(exynos->clk); | |
190 | ||
191 | return 0; | |
192 | } | |
193 | ||
194 | static int dwc3_exynos_resume(struct device *dev) | |
195 | { | |
196 | struct dwc3_exynos *exynos = dev_get_drvdata(dev); | |
197 | ||
198 | clk_enable(exynos->clk); | |
199 | ||
200 | /* runtime set active to reflect active state. */ | |
201 | pm_runtime_disable(dev); | |
202 | pm_runtime_set_active(dev); | |
203 | pm_runtime_enable(dev); | |
204 | ||
205 | return 0; | |
206 | } | |
207 | ||
208 | static const struct dev_pm_ops dwc3_exynos_dev_pm_ops = { | |
209 | SET_SYSTEM_SLEEP_PM_OPS(dwc3_exynos_suspend, dwc3_exynos_resume) | |
210 | }; | |
211 | ||
212 | #define DEV_PM_OPS (&dwc3_exynos_dev_pm_ops) | |
213 | #else | |
214 | #define DEV_PM_OPS NULL | |
19fda7cd | 215 | #endif /* CONFIG_PM_SLEEP */ |
0646caf7 | 216 | |
d28a9689 AT |
217 | static struct platform_driver dwc3_exynos_driver = { |
218 | .probe = dwc3_exynos_probe, | |
7690417d | 219 | .remove = dwc3_exynos_remove, |
d28a9689 AT |
220 | .driver = { |
221 | .name = "exynos-dwc3", | |
accefdd4 | 222 | .of_match_table = of_match_ptr(exynos_dwc3_match), |
0646caf7 | 223 | .pm = DEV_PM_OPS, |
d28a9689 AT |
224 | }, |
225 | }; | |
226 | ||
227 | module_platform_driver(dwc3_exynos_driver); | |
228 | ||
229 | MODULE_ALIAS("platform:exynos-dwc3"); | |
230 | MODULE_AUTHOR("Anton Tikhomirov <av.tikhomirov@samsung.com>"); | |
231 | MODULE_LICENSE("GPL"); | |
232 | MODULE_DESCRIPTION("DesignWare USB3 EXYNOS Glue Layer"); |