Commit | Line | Data |
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d28a9689 AT |
1 | /** |
2 | * dwc3-exynos.c - Samsung EXYNOS DWC3 Specific Glue layer | |
3 | * | |
4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com | |
6 | * | |
7 | * Author: Anton Tikhomirov <av.tikhomirov@samsung.com> | |
8 | * | |
5945f789 FB |
9 | * This program is free software: you can redistribute it and/or modify |
10 | * it under the terms of the GNU General Public License version 2 of | |
11 | * the License as published by the Free Software Foundation. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
d28a9689 AT |
17 | */ |
18 | ||
19 | #include <linux/module.h> | |
20 | #include <linux/kernel.h> | |
21 | #include <linux/slab.h> | |
22 | #include <linux/platform_device.h> | |
23 | #include <linux/platform_data/dwc3-exynos.h> | |
24 | #include <linux/dma-mapping.h> | |
d28a9689 | 25 | #include <linux/clk.h> |
d720f057 | 26 | #include <linux/usb/otg.h> |
3fa4d734 | 27 | #include <linux/usb/usb_phy_gen_xceiv.h> |
accefdd4 | 28 | #include <linux/of.h> |
adcf20dc | 29 | #include <linux/of_platform.h> |
d28a9689 | 30 | |
d28a9689 | 31 | struct dwc3_exynos { |
d720f057 FB |
32 | struct platform_device *usb2_phy; |
33 | struct platform_device *usb3_phy; | |
d28a9689 AT |
34 | struct device *dev; |
35 | ||
36 | struct clk *clk; | |
37 | }; | |
38 | ||
41ac7b3a | 39 | static int dwc3_exynos_register_phys(struct dwc3_exynos *exynos) |
d720f057 | 40 | { |
3fa4d734 | 41 | struct usb_phy_gen_xceiv_platform_data pdata; |
d720f057 FB |
42 | struct platform_device *pdev; |
43 | int ret; | |
44 | ||
45 | memset(&pdata, 0x00, sizeof(pdata)); | |
46 | ||
3fa4d734 | 47 | pdev = platform_device_alloc("usb_phy_gen_xceiv", PLATFORM_DEVID_AUTO); |
d720f057 FB |
48 | if (!pdev) |
49 | return -ENOMEM; | |
50 | ||
51 | exynos->usb2_phy = pdev; | |
52 | pdata.type = USB_PHY_TYPE_USB2; | |
13518673 | 53 | pdata.gpio_reset = -1; |
d720f057 FB |
54 | |
55 | ret = platform_device_add_data(exynos->usb2_phy, &pdata, sizeof(pdata)); | |
56 | if (ret) | |
57 | goto err1; | |
58 | ||
3fa4d734 | 59 | pdev = platform_device_alloc("usb_phy_gen_xceiv", PLATFORM_DEVID_AUTO); |
d720f057 FB |
60 | if (!pdev) { |
61 | ret = -ENOMEM; | |
62 | goto err1; | |
63 | } | |
64 | ||
65 | exynos->usb3_phy = pdev; | |
66 | pdata.type = USB_PHY_TYPE_USB3; | |
67 | ||
68 | ret = platform_device_add_data(exynos->usb3_phy, &pdata, sizeof(pdata)); | |
69 | if (ret) | |
70 | goto err2; | |
71 | ||
72 | ret = platform_device_add(exynos->usb2_phy); | |
73 | if (ret) | |
74 | goto err2; | |
75 | ||
76 | ret = platform_device_add(exynos->usb3_phy); | |
77 | if (ret) | |
78 | goto err3; | |
79 | ||
80 | return 0; | |
81 | ||
82 | err3: | |
83 | platform_device_del(exynos->usb2_phy); | |
84 | ||
85 | err2: | |
86 | platform_device_put(exynos->usb3_phy); | |
87 | ||
88 | err1: | |
89 | platform_device_put(exynos->usb2_phy); | |
90 | ||
91 | return ret; | |
92 | } | |
93 | ||
adcf20dc VG |
94 | static int dwc3_exynos_remove_child(struct device *dev, void *unused) |
95 | { | |
96 | struct platform_device *pdev = to_platform_device(dev); | |
97 | ||
98 | platform_device_unregister(pdev); | |
99 | ||
100 | return 0; | |
101 | } | |
102 | ||
41ac7b3a | 103 | static int dwc3_exynos_probe(struct platform_device *pdev) |
d28a9689 | 104 | { |
d28a9689 AT |
105 | struct dwc3_exynos *exynos; |
106 | struct clk *clk; | |
20b97dc1 | 107 | struct device *dev = &pdev->dev; |
adcf20dc | 108 | struct device_node *node = dev->of_node; |
d28a9689 | 109 | |
d28a9689 AT |
110 | int ret = -ENOMEM; |
111 | ||
20b97dc1 | 112 | exynos = devm_kzalloc(dev, sizeof(*exynos), GFP_KERNEL); |
d28a9689 | 113 | if (!exynos) { |
20b97dc1 | 114 | dev_err(dev, "not enough memory\n"); |
adcf20dc | 115 | goto err1; |
d28a9689 AT |
116 | } |
117 | ||
accefdd4 VG |
118 | /* |
119 | * Right now device-tree probed devices don't get dma_mask set. | |
120 | * Since shared usb code relies on it, set it here for now. | |
121 | * Once we move to full device tree support this will vanish off. | |
122 | */ | |
e1fd7341 | 123 | ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32)); |
22d9d8e8 RK |
124 | if (ret) |
125 | goto err1; | |
accefdd4 | 126 | |
d28a9689 AT |
127 | platform_set_drvdata(pdev, exynos); |
128 | ||
d720f057 FB |
129 | ret = dwc3_exynos_register_phys(exynos); |
130 | if (ret) { | |
20b97dc1 | 131 | dev_err(dev, "couldn't register PHYs\n"); |
adcf20dc | 132 | goto err1; |
d28a9689 AT |
133 | } |
134 | ||
20b97dc1 | 135 | clk = devm_clk_get(dev, "usbdrd30"); |
d28a9689 | 136 | if (IS_ERR(clk)) { |
20b97dc1 | 137 | dev_err(dev, "couldn't get clock\n"); |
d28a9689 | 138 | ret = -EINVAL; |
20b97dc1 | 139 | goto err1; |
d28a9689 AT |
140 | } |
141 | ||
20b97dc1 | 142 | exynos->dev = dev; |
d28a9689 AT |
143 | exynos->clk = clk; |
144 | ||
ddb5147c | 145 | clk_prepare_enable(exynos->clk); |
d28a9689 | 146 | |
adcf20dc VG |
147 | if (node) { |
148 | ret = of_platform_populate(node, NULL, NULL, dev); | |
149 | if (ret) { | |
150 | dev_err(dev, "failed to add dwc3 core\n"); | |
151 | goto err2; | |
152 | } | |
153 | } else { | |
154 | dev_err(dev, "no device node, failed to add dwc3 core\n"); | |
155 | ret = -ENODEV; | |
20b97dc1 | 156 | goto err2; |
d28a9689 AT |
157 | } |
158 | ||
159 | return 0; | |
160 | ||
20b97dc1 | 161 | err2: |
ddb5147c | 162 | clk_disable_unprepare(clk); |
d28a9689 | 163 | err1: |
d28a9689 AT |
164 | return ret; |
165 | } | |
166 | ||
fb4e98ab | 167 | static int dwc3_exynos_remove(struct platform_device *pdev) |
d28a9689 AT |
168 | { |
169 | struct dwc3_exynos *exynos = platform_get_drvdata(pdev); | |
d28a9689 | 170 | |
022d0547 | 171 | device_for_each_child(&pdev->dev, NULL, dwc3_exynos_remove_child); |
d720f057 FB |
172 | platform_device_unregister(exynos->usb2_phy); |
173 | platform_device_unregister(exynos->usb3_phy); | |
d28a9689 | 174 | |
ddb5147c | 175 | clk_disable_unprepare(exynos->clk); |
d28a9689 AT |
176 | |
177 | return 0; | |
178 | } | |
179 | ||
accefdd4 VG |
180 | #ifdef CONFIG_OF |
181 | static const struct of_device_id exynos_dwc3_match[] = { | |
fe29db8f | 182 | { .compatible = "samsung,exynos5250-dwusb3" }, |
accefdd4 VG |
183 | {}, |
184 | }; | |
185 | MODULE_DEVICE_TABLE(of, exynos_dwc3_match); | |
186 | #endif | |
187 | ||
19fda7cd | 188 | #ifdef CONFIG_PM_SLEEP |
0646caf7 VS |
189 | static int dwc3_exynos_suspend(struct device *dev) |
190 | { | |
191 | struct dwc3_exynos *exynos = dev_get_drvdata(dev); | |
192 | ||
193 | clk_disable(exynos->clk); | |
194 | ||
195 | return 0; | |
196 | } | |
197 | ||
198 | static int dwc3_exynos_resume(struct device *dev) | |
199 | { | |
200 | struct dwc3_exynos *exynos = dev_get_drvdata(dev); | |
201 | ||
202 | clk_enable(exynos->clk); | |
203 | ||
204 | /* runtime set active to reflect active state. */ | |
205 | pm_runtime_disable(dev); | |
206 | pm_runtime_set_active(dev); | |
207 | pm_runtime_enable(dev); | |
208 | ||
209 | return 0; | |
210 | } | |
211 | ||
212 | static const struct dev_pm_ops dwc3_exynos_dev_pm_ops = { | |
213 | SET_SYSTEM_SLEEP_PM_OPS(dwc3_exynos_suspend, dwc3_exynos_resume) | |
214 | }; | |
215 | ||
216 | #define DEV_PM_OPS (&dwc3_exynos_dev_pm_ops) | |
217 | #else | |
218 | #define DEV_PM_OPS NULL | |
19fda7cd | 219 | #endif /* CONFIG_PM_SLEEP */ |
0646caf7 | 220 | |
d28a9689 AT |
221 | static struct platform_driver dwc3_exynos_driver = { |
222 | .probe = dwc3_exynos_probe, | |
7690417d | 223 | .remove = dwc3_exynos_remove, |
d28a9689 AT |
224 | .driver = { |
225 | .name = "exynos-dwc3", | |
accefdd4 | 226 | .of_match_table = of_match_ptr(exynos_dwc3_match), |
0646caf7 | 227 | .pm = DEV_PM_OPS, |
d28a9689 AT |
228 | }, |
229 | }; | |
230 | ||
231 | module_platform_driver(dwc3_exynos_driver); | |
232 | ||
233 | MODULE_ALIAS("platform:exynos-dwc3"); | |
234 | MODULE_AUTHOR("Anton Tikhomirov <av.tikhomirov@samsung.com>"); | |
5945f789 | 235 | MODULE_LICENSE("GPL v2"); |
d28a9689 | 236 | MODULE_DESCRIPTION("DesignWare USB3 EXYNOS Glue Layer"); |