[linux-2.6-block.git] / drivers / usb / dwc3 / Kconfig

config USB_DWC3
	tristate "DesignWare USB3 DRD Core Support"
	depends on (USB || USB_GADGET) && HAS_DMA
	select USB_XHCI_PLATFORM if USB_SUPPORT && USB_XHCI_HCD
	help
	  Say Y or M here if your system has a Dual Role SuperSpeed
	  USB controller based on the DesignWare USB3 IP Core.

	  If you choose to build this driver is a dynamically linked
	  module, the module will be called dwc3.ko.

if USB_DWC3

choice
	bool "DWC3 Mode Selection"
	default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET)
	default USB_DWC3_HOST if (USB && !USB_GADGET)
	default USB_DWC3_GADGET if (!USB && USB_GADGET)

config USB_DWC3_HOST
	bool "Host only mode"
	depends on USB=y || USB=USB_DWC3
	help
	  Select this when you want to use DWC3 in host mode only,
	  thereby the gadget feature will be regressed.

config USB_DWC3_GADGET
	bool "Gadget only mode"
	depends on USB_GADGET=y || USB_GADGET=USB_DWC3
	help
	  Select this when you want to use DWC3 in gadget mode only,
	  thereby the host feature will be regressed.

config USB_DWC3_DUAL_ROLE
	bool "Dual Role mode"
	depends on ((USB=y || USB=USB_DWC3) && (USB_GADGET=y || USB_GADGET=USB_DWC3))
	help
	  This is the default mode of working of DWC3 controller where
	  both host and gadget features are enabled.

endchoice

comment "Platform Glue Driver Support"

config USB_DWC3_OMAP
	tristate "Texas Instruments OMAP5 and similar Platforms"
	depends on EXTCON && (ARCH_OMAP2PLUS || COMPILE_TEST)
	depends on OF
	default USB_DWC3
	help
	  Some platforms from Texas Instruments like OMAP5, DRA7xxx and
	  AM437x use this IP for USB2/3 functionality.

	  Say 'Y' or 'M' here if you have one such device

config USB_DWC3_EXYNOS
	tristate "Samsung Exynos Platform"
	depends on ARCH_EXYNOS && OF || COMPILE_TEST
	default USB_DWC3
	help
	  Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
	  say 'Y' or 'M' if you have one such device.

config USB_DWC3_PCI
	tristate "PCIe-based Platforms"
	depends on PCI
	default USB_DWC3
	help
	  If you're using the DesignWare Core IP with a PCIe, please say
	  'Y' or 'M' here.

	  One such PCIe-based platform is Synopsys' PCIe HAPS model of
	  this IP.

config USB_DWC3_KEYSTONE
	tristate "Texas Instruments Keystone2 Platforms"
	depends on ARCH_KEYSTONE || COMPILE_TEST
	default USB_DWC3
	help
	  Support of USB2/3 functionality in TI Keystone2 platforms.
	  Say 'Y' or 'M' here if you have one such device

config USB_DWC3_ST
	tristate "STMicroelectronics Platforms"
	depends on ARCH_STI && OF
	default USB_DWC3
	help
	  STMicroelectronics SoCs with one DesignWare Core USB3 IP
	  inside (i.e. STiH407).
	  Say 'Y' or 'M' if you have one such device.

config USB_DWC3_QCOM
	tristate "Qualcomm Platforms"
	depends on ARCH_QCOM || COMPILE_TEST
	default USB_DWC3
	help
	  Recent Qualcomm SoCs ship with one DesignWare Core USB3 IP inside,
	  say 'Y' or 'M' if you have one such device.

comment "Debugging features"

config USB_DWC3_DEBUG
	bool "Enable Debugging Messages"
	help
	  Say Y here to enable debugging messages on DWC3 Driver.

config DWC3_HOST_USB3_LPM_ENABLE
	bool "Enable USB3 LPM Capability"
	depends on USB_DWC3_HOST=y || USB_DWC3_DUAL_ROLE=y
	default n
	help
	  Select this when you want to enable USB3 LPM with dwc3 xhci host.

endif
Commit	Line	Data
72246da4 FB	1	config USB_DWC3
72246da4 FB	2	tristate "DesignWare USB3 DRD Core Support"
0244ad00	3	depends on (USB \|\| USB_GADGET) && HAS_DMA
b8cacf33	4	select USB_XHCI_PLATFORM if USB_SUPPORT && USB_XHCI_HCD
72246da4 FB	5	help
	6	Say Y or M here if your system has a Dual Role SuperSpeed
	7	USB controller based on the DesignWare USB3 IP Core.
	8
	9	If you choose to build this driver is a dynamically linked
	10	module, the module will be called dwc3.ko.
	11
	12	if USB_DWC3
	13
388e5c51 VG	14	choice
	15	bool "DWC3 Mode Selection"
	16	default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET)
	17	default USB_DWC3_HOST if (USB && !USB_GADGET)
	18	default USB_DWC3_GADGET if (!USB && USB_GADGET)
	19
	20	config USB_DWC3_HOST
	21	bool "Host only mode"
1bc0d926	22	depends on USB=y \|\| USB=USB_DWC3
388e5c51 VG	23	help
	24	Select this when you want to use DWC3 in host mode only,
	25	thereby the gadget feature will be regressed.
	26
	27	config USB_DWC3_GADGET
	28	bool "Gadget only mode"
1bc0d926	29	depends on USB_GADGET=y \|\| USB_GADGET=USB_DWC3
388e5c51 VG	30	help
	31	Select this when you want to use DWC3 in gadget mode only,
	32	thereby the host feature will be regressed.
	33
	34	config USB_DWC3_DUAL_ROLE
	35	bool "Dual Role mode"
1bc0d926	36	depends on ((USB=y \|\| USB=USB_DWC3) && (USB_GADGET=y \|\| USB_GADGET=USB_DWC3))
388e5c51 VG	37	help
	38	This is the default mode of working of DWC3 controller where
	39	both host and gadget features are enabled.
	40
	41	endchoice
	42
1a356dbc FB	43	comment "Platform Glue Driver Support"
	44
	45	config USB_DWC3_OMAP
	46	tristate "Texas Instruments OMAP5 and similar Platforms"
aea8928a	47	depends on EXTCON && (ARCH_OMAP2PLUS \|\| COMPILE_TEST)
c5a1fbca	48	depends on OF
1a356dbc FB	49	default USB_DWC3
	50	help
	51	Some platforms from Texas Instruments like OMAP5, DRA7xxx and
	52	AM437x use this IP for USB2/3 functionality.
	53
	54	Say 'Y' or 'M' here if you have one such device
	55
	56	config USB_DWC3_EXYNOS
	57	tristate "Samsung Exynos Platform"
b4c9f578	58	depends on ARCH_EXYNOS && OF \|\| COMPILE_TEST
1a356dbc FB	59	default USB_DWC3
	60	help
	61	Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
	62	say 'Y' or 'M' if you have one such device.
	63
	64	config USB_DWC3_PCI
	65	tristate "PCIe-based Platforms"
	66	depends on PCI
	67	default USB_DWC3
	68	help
	69	If you're using the DesignWare Core IP with a PCIe, please say
	70	'Y' or 'M' here.
	71
	72	One such PCIe-based platform is Synopsys' PCIe HAPS model of
	73	this IP.
	74
943befc3 WK	75	config USB_DWC3_KEYSTONE
943befc3 WK	76	tristate "Texas Instruments Keystone2 Platforms"
aea8928a	77	depends on ARCH_KEYSTONE \|\| COMPILE_TEST
943befc3 WK	78	default USB_DWC3
	79	help
	80	Support of USB2/3 functionality in TI Keystone2 platforms.
	81	Say 'Y' or 'M' here if you have one such device
	82
f83fca07 PG	83	config USB_DWC3_ST
	84	tristate "STMicroelectronics Platforms"
	85	depends on ARCH_STI && OF
	86	default USB_DWC3
	87	help
	88	STMicroelectronics SoCs with one DesignWare Core USB3 IP
	89	inside (i.e. STiH407).
	90	Say 'Y' or 'M' if you have one such device.
	91
d9152161 II	92	config USB_DWC3_QCOM
	93	tristate "Qualcomm Platforms"
	94	depends on ARCH_QCOM \|\| COMPILE_TEST
	95	default USB_DWC3
	96	help
	97	Recent Qualcomm SoCs ship with one DesignWare Core USB3 IP inside,
	98	say 'Y' or 'M' if you have one such device.
	99
1a356dbc FB	100	comment "Debugging features"
1a356dbc FB	101
72246da4 FB	102	config USB_DWC3_DEBUG
	103	bool "Enable Debugging Messages"
	104	help
	105	Say Y here to enable debugging messages on DWC3 Driver.
	106
b2f463e1 PA	107	config DWC3_HOST_USB3_LPM_ENABLE
	108	bool "Enable USB3 LPM Capability"
	109	depends on USB_DWC3_HOST=y \|\| USB_DWC3_DUAL_ROLE=y
	110	default n
	111	help
	112	Select this when you want to enable USB3 LPM with dwc3 xhci host.
	113
72246da4	114	endif