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cae8dc3b GKH |
1 | # SPDX-License-Identifier: GPL-2.0 |
2 | ||
72246da4 FB |
3 | config USB_DWC3 |
4 | tristate "DesignWare USB3 DRD Core Support" | |
0244ad00 | 5 | depends on (USB || USB_GADGET) && HAS_DMA |
7d80dbd7 | 6 | depends on (EXTCON || EXTCON=n) |
a26a1422 | 7 | select USB_XHCI_PLATFORM if USB_XHCI_HCD |
4748d396 | 8 | select USB_ROLE_SWITCH if USB_DWC3_DUAL_ROLE |
72246da4 FB |
9 | help |
10 | Say Y or M here if your system has a Dual Role SuperSpeed | |
11 | USB controller based on the DesignWare USB3 IP Core. | |
12 | ||
3085d1bd | 13 | If you choose to build this driver as a dynamically linked |
72246da4 FB |
14 | module, the module will be called dwc3.ko. |
15 | ||
16 | if USB_DWC3 | |
17 | ||
88bc9d19 HK |
18 | config USB_DWC3_ULPI |
19 | bool "Register ULPI PHY Interface" | |
50641056 | 20 | depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_DWC3 |
88bc9d19 HK |
21 | help |
22 | Select this if you have ULPI type PHY attached to your DWC3 | |
23 | controller. | |
24 | ||
388e5c51 VG |
25 | choice |
26 | bool "DWC3 Mode Selection" | |
27 | default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET) | |
28 | default USB_DWC3_HOST if (USB && !USB_GADGET) | |
29 | default USB_DWC3_GADGET if (!USB && USB_GADGET) | |
30 | ||
31 | config USB_DWC3_HOST | |
32 | bool "Host only mode" | |
1bc0d926 | 33 | depends on USB=y || USB=USB_DWC3 |
388e5c51 VG |
34 | help |
35 | Select this when you want to use DWC3 in host mode only, | |
36 | thereby the gadget feature will be regressed. | |
37 | ||
38 | config USB_DWC3_GADGET | |
39 | bool "Gadget only mode" | |
1bc0d926 | 40 | depends on USB_GADGET=y || USB_GADGET=USB_DWC3 |
388e5c51 VG |
41 | help |
42 | Select this when you want to use DWC3 in gadget mode only, | |
43 | thereby the host feature will be regressed. | |
44 | ||
45 | config USB_DWC3_DUAL_ROLE | |
46 | bool "Dual Role mode" | |
1bc0d926 | 47 | depends on ((USB=y || USB=USB_DWC3) && (USB_GADGET=y || USB_GADGET=USB_DWC3)) |
388e5c51 VG |
48 | help |
49 | This is the default mode of working of DWC3 controller where | |
50 | both host and gadget features are enabled. | |
51 | ||
52 | endchoice | |
53 | ||
1a356dbc FB |
54 | comment "Platform Glue Driver Support" |
55 | ||
56 | config USB_DWC3_OMAP | |
57 | tristate "Texas Instruments OMAP5 and similar Platforms" | |
67130830 MG |
58 | depends on ARCH_OMAP2PLUS || COMPILE_TEST |
59 | depends on EXTCON || !EXTCON | |
c5a1fbca | 60 | depends on OF |
1a356dbc FB |
61 | default USB_DWC3 |
62 | help | |
63 | Some platforms from Texas Instruments like OMAP5, DRA7xxx and | |
64 | AM437x use this IP for USB2/3 functionality. | |
65 | ||
66 | Say 'Y' or 'M' here if you have one such device | |
67 | ||
68 | config USB_DWC3_EXYNOS | |
2abc8657 | 69 | tristate "Samsung Exynos SoC Platform" |
ba1773fb | 70 | depends on (ARCH_EXYNOS || COMPILE_TEST) && OF |
1a356dbc FB |
71 | default USB_DWC3 |
72 | help | |
2abc8657 KK |
73 | Recent Samsung Exynos SoCs (Exynos5250, Exynos5410, Exynos542x, |
74 | Exynos5800, Exynos5433, Exynos7) ship with one DesignWare Core USB3 | |
75 | IP inside, say 'Y' or 'M' if you have one such device. | |
1a356dbc FB |
76 | |
77 | config USB_DWC3_PCI | |
78 | tristate "PCIe-based Platforms" | |
2c93e790 | 79 | depends on USB_PCI && ACPI |
1a356dbc FB |
80 | default USB_DWC3 |
81 | help | |
3fe314ca TN |
82 | If you're using the DesignWare Core IP with a PCIe (but not HAPS |
83 | platform), please say 'Y' or 'M' here. | |
1a356dbc | 84 | |
3fe314ca TN |
85 | config USB_DWC3_HAPS |
86 | tristate "Synopsys PCIe-based HAPS Platforms" | |
87 | depends on USB_PCI | |
88 | default USB_DWC3 | |
89 | help | |
90 | If you're using the DesignWare Core IP with a Synopsys PCIe HAPS | |
91 | platform, please say 'Y' or 'M' here. | |
1a356dbc | 92 | |
943befc3 | 93 | config USB_DWC3_KEYSTONE |
eca6b494 RQ |
94 | tristate "Texas Instruments Keystone2/AM654 Platforms" |
95 | depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST | |
943befc3 WK |
96 | default USB_DWC3 |
97 | help | |
eca6b494 | 98 | Support of USB2/3 functionality in TI Keystone2 and AM654 platforms. |
943befc3 WK |
99 | Say 'Y' or 'M' here if you have one such device |
100 | ||
c9999337 | 101 | config USB_DWC3_MESON_G12A |
c3afa222 KK |
102 | tristate "Amlogic Meson G12A Platforms" |
103 | depends on OF && COMMON_CLK | |
104 | depends on ARCH_MESON || COMPILE_TEST | |
105 | default USB_DWC3 | |
106 | select USB_ROLE_SWITCH | |
a51bab59 | 107 | select REGMAP_MMIO |
c3afa222 KK |
108 | help |
109 | Support USB2/3 functionality in Amlogic G12A platforms. | |
110 | Say 'Y' or 'M' if you have one such device. | |
c9999337 | 111 | |
16adc674 | 112 | config USB_DWC3_OF_SIMPLE |
c3afa222 KK |
113 | tristate "Generic OF Simple Glue Layer" |
114 | depends on OF && COMMON_CLK | |
115 | default USB_DWC3 | |
116 | help | |
117 | Support USB2/3 functionality in simple SoC integrations. | |
118 | Currently supports Xilinx and Qualcomm DWC USB3 IP. | |
119 | Say 'Y' or 'M' if you have one such device. | |
16adc674 | 120 | |
f83fca07 PG |
121 | config USB_DWC3_ST |
122 | tristate "STMicroelectronics Platforms" | |
ba1773fb | 123 | depends on (ARCH_STI || COMPILE_TEST) && OF |
f83fca07 PG |
124 | default USB_DWC3 |
125 | help | |
126 | STMicroelectronics SoCs with one DesignWare Core USB3 IP | |
127 | inside (i.e. STiH407). | |
128 | Say 'Y' or 'M' if you have one such device. | |
129 | ||
a4333c3a MG |
130 | config USB_DWC3_QCOM |
131 | tristate "Qualcomm Platform" | |
67130830 MG |
132 | depends on ARCH_QCOM || COMPILE_TEST |
133 | depends on EXTCON || !EXTCON | |
2bc02355 | 134 | depends on (OF || ACPI) |
a4333c3a MG |
135 | default USB_DWC3 |
136 | help | |
137 | Some Qualcomm SoCs use DesignWare Core IP for USB2/3 | |
138 | functionality. | |
139 | This driver also handles Qscratch wrapper which is needed | |
140 | for peripheral mode support. | |
141 | Say 'Y' or 'M' if you have one such device. | |
142 | ||
6dd25659 LJ |
143 | config USB_DWC3_IMX8MP |
144 | tristate "NXP iMX8MP Platform" | |
145 | depends on OF && COMMON_CLK | |
146 | depends on (ARCH_MXC && ARM64) || COMPILE_TEST | |
147 | default USB_DWC3 | |
148 | help | |
149 | NXP iMX8M Plus SoC use DesignWare Core IP for USB2/3 | |
150 | functionality. | |
151 | Say 'Y' or 'M' if you have one such device. | |
152 | ||
84770f02 MN |
153 | config USB_DWC3_XILINX |
154 | tristate "Xilinx Platforms" | |
3205054d | 155 | depends on (ARCH_ZYNQMP || COMPILE_TEST) && OF |
84770f02 MN |
156 | default USB_DWC3 |
157 | help | |
158 | Support Xilinx SoCs with DesignWare Core USB3 IP. | |
3205054d | 159 | This driver handles ZynqMP SoC operations. |
84770f02 MN |
160 | Say 'Y' or 'M' if you have one such device. |
161 | ||
e8784c0a AG |
162 | config USB_DWC3_AM62 |
163 | tristate "Texas Instruments AM62 Platforms" | |
164 | depends on ARCH_K3 || COMPILE_TEST | |
165 | default USB_DWC3 | |
166 | help | |
167 | Support TI's AM62 platforms with DesignWare Core USB3 IP. | |
3085d1bd | 168 | The Designware Core USB3 IP is programmed to operate in |
e8784c0a AG |
169 | in USB 2.0 mode only. |
170 | Say 'Y' or 'M' here if you have one such device | |
72246da4 | 171 | endif |