[linux-2.6-block.git] / drivers / usb / dwc2 / platform.c

/*
 * platform.c - DesignWare HS OTG Controller platform driver
 *
 * Copyright (C) Matthijs Kooijman <matthijs@stdin.nl>
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions, and the following disclaimer,
 *    without modification.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. The names of the above-listed copyright holders may not be used
 *    to endorse or promote products derived from this software without
 *    specific prior written permission.
 *
 * ALTERNATIVELY, this software may be distributed under the terms of the
 * GNU General Public License ("GPL") as published by the Free Software
 * Foundation; either version 2 of the License, or (at your option) any
 * later version.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/clk.h>
#include <linux/device.h>
#include <linux/dma-mapping.h>
#include <linux/of_device.h>
#include <linux/mutex.h>
#include <linux/platform_device.h>
#include <linux/phy/phy.h>
#include <linux/platform_data/s3c-hsotg.h>

#include <linux/usb/of.h>

#include "core.h"
#include "hcd.h"
#include "debug.h"

static const char dwc2_driver_name[] = "dwc2";

static const struct dwc2_core_params params_bcm2835 = {
	.otg_cap			= 0,	/* HNP/SRP capable */
	.otg_ver			= 0,	/* 1.3 */
	.dma_enable			= 1,
	.dma_desc_enable		= 0,
	.speed				= 0,	/* High Speed */
	.enable_dynamic_fifo		= 1,
	.en_multiple_tx_fifo		= 1,
	.host_rx_fifo_size		= 774,	/* 774 DWORDs */
	.host_nperio_tx_fifo_size	= 256,	/* 256 DWORDs */
	.host_perio_tx_fifo_size	= 512,	/* 512 DWORDs */
	.max_transfer_size		= 65535,
	.max_packet_count		= 511,
	.host_channels			= 8,
	.phy_type			= 1,	/* UTMI */
	.phy_utmi_width			= 8,	/* 8 bits */
	.phy_ulpi_ddr			= 0,	/* Single */
	.phy_ulpi_ext_vbus		= 0,
	.i2c_enable			= 0,
	.ulpi_fs_ls			= 0,
	.host_support_fs_ls_low_power	= 0,
	.host_ls_low_power_phy_clk	= 0,	/* 48 MHz */
	.ts_dline			= 0,
	.reload_ctl			= 0,
	.ahbcfg				= 0x10,
	.uframe_sched			= 0,
	.external_id_pin_ctl		= -1,
	.hibernation			= -1,
};

static const struct dwc2_core_params params_rk3066 = {
	.otg_cap			= 2,	/* non-HNP/non-SRP */
	.otg_ver			= -1,
	.dma_enable			= -1,
	.dma_desc_enable		= 0,
	.speed				= -1,
	.enable_dynamic_fifo		= 1,
	.en_multiple_tx_fifo		= -1,
	.host_rx_fifo_size		= 520,	/* 520 DWORDs */
	.host_nperio_tx_fifo_size	= 128,	/* 128 DWORDs */
	.host_perio_tx_fifo_size	= 256,	/* 256 DWORDs */
	.max_transfer_size		= 65535,
	.max_packet_count		= -1,
	.host_channels			= -1,
	.phy_type			= -1,
	.phy_utmi_width			= -1,
	.phy_ulpi_ddr			= -1,
	.phy_ulpi_ext_vbus		= -1,
	.i2c_enable			= -1,
	.ulpi_fs_ls			= -1,
	.host_support_fs_ls_low_power	= -1,
	.host_ls_low_power_phy_clk	= -1,
	.ts_dline			= -1,
	.reload_ctl			= -1,
	.ahbcfg				= GAHBCFG_HBSTLEN_INCR16 <<
					  GAHBCFG_HBSTLEN_SHIFT,
	.uframe_sched			= -1,
	.external_id_pin_ctl		= -1,
	.hibernation			= -1,
};

static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
{
	struct platform_device *pdev = to_platform_device(hsotg->dev);
	int ret;

	ret = regulator_bulk_enable(ARRAY_SIZE(hsotg->supplies),
				    hsotg->supplies);
	if (ret)
		return ret;

	ret = clk_prepare_enable(hsotg->clk);
	if (ret)
		return ret;

	if (hsotg->uphy)
		ret = usb_phy_init(hsotg->uphy);
	else if (hsotg->plat && hsotg->plat->phy_init)
		ret = hsotg->plat->phy_init(pdev, hsotg->plat->phy_type);
	else {
		ret = phy_power_on(hsotg->phy);
		if (ret == 0)
			ret = phy_init(hsotg->phy);
	}

	return ret;
}

/**
 * dwc2_lowlevel_hw_enable - enable platform lowlevel hw resources
 * @hsotg: The driver state
 *
 * A wrapper for platform code responsible for controlling
 * low-level USB platform resources (phy, clock, regulators)
 */
int dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
{
	int ret = __dwc2_lowlevel_hw_enable(hsotg);

	if (ret == 0)
		hsotg->ll_hw_enabled = true;
	return ret;
}

static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
{
	struct platform_device *pdev = to_platform_device(hsotg->dev);
	int ret = 0;

	if (hsotg->uphy)
		usb_phy_shutdown(hsotg->uphy);
	else if (hsotg->plat && hsotg->plat->phy_exit)
		ret = hsotg->plat->phy_exit(pdev, hsotg->plat->phy_type);
	else {
		ret = phy_exit(hsotg->phy);
		if (ret == 0)
			ret = phy_power_off(hsotg->phy);
	}
	if (ret)
		return ret;

	clk_disable_unprepare(hsotg->clk);

	ret = regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies),
				     hsotg->supplies);

	return ret;
}

/**
 * dwc2_lowlevel_hw_disable - disable platform lowlevel hw resources
 * @hsotg: The driver state
 *
 * A wrapper for platform code responsible for controlling
 * low-level USB platform resources (phy, clock, regulators)
 */
int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
{
	int ret = __dwc2_lowlevel_hw_disable(hsotg);

	if (ret == 0)
		hsotg->ll_hw_enabled = false;
	return ret;
}

static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
{
	int i, ret;

	/* Set default UTMI width */
	hsotg->phyif = GUSBCFG_PHYIF16;

	/*
	 * Attempt to find a generic PHY, then look for an old style
	 * USB PHY and then fall back to pdata
	 */
	hsotg->phy = devm_phy_get(hsotg->dev, "usb2-phy");
	if (IS_ERR(hsotg->phy)) {
		ret = PTR_ERR(hsotg->phy);
		switch (ret) {
		case -ENODEV:
		case -ENOSYS:
			hsotg->phy = NULL;
			break;
		case -EPROBE_DEFER:
			return ret;
		default:
			dev_err(hsotg->dev, "error getting phy %d\n", ret);
			return ret;
		}
	}

	if (!hsotg->phy) {
		hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2);
		if (IS_ERR(hsotg->uphy)) {
			ret = PTR_ERR(hsotg->uphy);
			switch (ret) {
			case -ENODEV:
			case -ENXIO:
				hsotg->uphy = NULL;
				break;
			case -EPROBE_DEFER:
				return ret;
			default:
				dev_err(hsotg->dev, "error getting usb phy %d\n",
					ret);
				return ret;
			}
		}
	}

	hsotg->plat = dev_get_platdata(hsotg->dev);

	if (hsotg->phy) {
		/*
		 * If using the generic PHY framework, check if the PHY bus
		 * width is 8-bit and set the phyif appropriately.
		 */
		if (phy_get_bus_width(hsotg->phy) == 8)
			hsotg->phyif = GUSBCFG_PHYIF8;
	}

	/* Clock */
	hsotg->clk = devm_clk_get(hsotg->dev, "otg");
	if (IS_ERR(hsotg->clk)) {
		hsotg->clk = NULL;
		dev_dbg(hsotg->dev, "cannot get otg clock\n");
	}

	/* Regulators */
	for (i = 0; i < ARRAY_SIZE(hsotg->supplies); i++)
		hsotg->supplies[i].supply = dwc2_hsotg_supply_names[i];

	ret = devm_regulator_bulk_get(hsotg->dev, ARRAY_SIZE(hsotg->supplies),
				      hsotg->supplies);
	if (ret) {
		dev_err(hsotg->dev, "failed to request supplies: %d\n", ret);
		return ret;
	}
	return 0;
}

/**
 * dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
 * DWC_otg driver
 *
 * @dev: Platform device
 *
 * This routine is called, for example, when the rmmod command is executed. The
 * device may or may not be electrically present. If it is present, the driver
 * stops device processing. Any resources used on behalf of this device are
 * freed.
 */
static int dwc2_driver_remove(struct platform_device *dev)
{
	struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);

	dwc2_debugfs_exit(hsotg);
	if (hsotg->hcd_enabled)
		dwc2_hcd_remove(hsotg);
	if (hsotg->gadget_enabled)
		dwc2_hsotg_remove(hsotg);

	if (hsotg->ll_hw_enabled)
		dwc2_lowlevel_hw_disable(hsotg);

	return 0;
}

static const struct of_device_id dwc2_of_match_table[] = {
	{ .compatible = "brcm,bcm2835-usb", .data = &params_bcm2835 },
	{ .compatible = "rockchip,rk3066-usb", .data = &params_rk3066 },
	{ .compatible = "snps,dwc2", .data = NULL },
	{ .compatible = "samsung,s3c6400-hsotg", .data = NULL},
	{},
};
MODULE_DEVICE_TABLE(of, dwc2_of_match_table);

/**
 * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
 * driver
 *
 * @dev: Platform device
 *
 * This routine creates the driver components required to control the device
 * (core, HCD, and PCD) and initializes the device. The driver components are
 * stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved
 * in the device private data. This allows the driver to access the dwc2_hsotg
 * structure on subsequent calls to driver methods for this device.
 */
static int dwc2_driver_probe(struct platform_device *dev)
{
	const struct of_device_id *match;
	const struct dwc2_core_params *params;
	struct dwc2_core_params defparams;
	struct dwc2_hsotg *hsotg;
	struct resource *res;
	int retval;
	int irq;

	match = of_match_device(dwc2_of_match_table, &dev->dev);
	if (match && match->data) {
		params = match->data;
	} else {
		/* Default all params to autodetect */
		dwc2_set_all_params(&defparams, -1);
		params = &defparams;

		/*
		 * Disable descriptor dma mode by default as the HW can support
		 * it, but does not support it for SPLIT transactions.
		 */
		defparams.dma_desc_enable = 0;
	}

	hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL);
	if (!hsotg)
		return -ENOMEM;

	hsotg->dev = &dev->dev;

	/*
	 * Use reasonable defaults so platforms don't have to provide these.
	 */
	if (!dev->dev.dma_mask)
		dev->dev.dma_mask = &dev->dev.coherent_dma_mask;
	retval = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32));
	if (retval)
		return retval;

	irq = platform_get_irq(dev, 0);
	if (irq < 0) {
		dev_err(&dev->dev, "missing IRQ resource\n");
		return irq;
	}

	dev_dbg(hsotg->dev, "registering common handler for irq%d\n",
		irq);
	retval = devm_request_irq(hsotg->dev, irq,
				  dwc2_handle_common_intr, IRQF_SHARED,
				  dev_name(hsotg->dev), hsotg);
	if (retval)
		return retval;

	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
	hsotg->regs = devm_ioremap_resource(&dev->dev, res);
	if (IS_ERR(hsotg->regs))
		return PTR_ERR(hsotg->regs);

	dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
		(unsigned long)res->start, hsotg->regs);

	hsotg->dr_mode = usb_get_dr_mode(&dev->dev);
	if (IS_ENABLED(CONFIG_USB_DWC2_HOST) &&
			hsotg->dr_mode != USB_DR_MODE_HOST) {
		hsotg->dr_mode = USB_DR_MODE_HOST;
		dev_warn(hsotg->dev,
			"Configuration mismatch. Forcing host mode\n");
	} else if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) &&
			hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
		hsotg->dr_mode = USB_DR_MODE_PERIPHERAL;
		dev_warn(hsotg->dev,
			"Configuration mismatch. Forcing peripheral mode\n");
	}

	retval = dwc2_lowlevel_hw_init(hsotg);
	if (retval)
		return retval;

	spin_lock_init(&hsotg->lock);

	hsotg->core_params = devm_kzalloc(&dev->dev,
				sizeof(*hsotg->core_params), GFP_KERNEL);
	if (!hsotg->core_params)
		return -ENOMEM;

	dwc2_set_all_params(hsotg->core_params, -1);

	retval = dwc2_lowlevel_hw_enable(hsotg);
	if (retval)
		return retval;

	/* Detect config values from hardware */
	retval = dwc2_get_hwparams(hsotg);
	if (retval)
		goto error;

	/* Validate parameter values */
	dwc2_set_parameters(hsotg, params);

	if (hsotg->dr_mode != USB_DR_MODE_HOST) {
		retval = dwc2_gadget_init(hsotg, irq);
		if (retval)
			goto error;
		hsotg->gadget_enabled = 1;
	}

	if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
		retval = dwc2_hcd_init(hsotg, irq);
		if (retval) {
			if (hsotg->gadget_enabled)
				dwc2_hsotg_remove(hsotg);
			goto error;
		}
		hsotg->hcd_enabled = 1;
	}

	platform_set_drvdata(dev, hsotg);

	dwc2_debugfs_init(hsotg);

	/* Gadget code manages lowlevel hw on its own */
	if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL)
		dwc2_lowlevel_hw_disable(hsotg);

	return 0;

error:
	dwc2_lowlevel_hw_disable(hsotg);
	return retval;
}

static int __maybe_unused dwc2_suspend(struct device *dev)
{
	struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
	int ret = 0;

	if (dwc2_is_device_mode(dwc2))
		dwc2_hsotg_suspend(dwc2);

	if (dwc2->ll_hw_enabled)
		ret = __dwc2_lowlevel_hw_disable(dwc2);

	return ret;
}

static int __maybe_unused dwc2_resume(struct device *dev)
{
	struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
	int ret = 0;

	if (dwc2->ll_hw_enabled) {
		ret = __dwc2_lowlevel_hw_enable(dwc2);
		if (ret)
			return ret;
	}

	if (dwc2_is_device_mode(dwc2))
		ret = dwc2_hsotg_resume(dwc2);

	return ret;
}

static const struct dev_pm_ops dwc2_dev_pm_ops = {
	SET_SYSTEM_SLEEP_PM_OPS(dwc2_suspend, dwc2_resume)
};

static struct platform_driver dwc2_platform_driver = {
	.driver = {
		.name = dwc2_driver_name,
		.of_match_table = dwc2_of_match_table,
		.pm = &dwc2_dev_pm_ops,
	},
	.probe = dwc2_driver_probe,
	.remove = dwc2_driver_remove,
};

module_platform_driver(dwc2_platform_driver);

MODULE_DESCRIPTION("DESIGNWARE HS OTG Platform Glue");
MODULE_AUTHOR("Matthijs Kooijman <matthijs@stdin.nl>");
MODULE_LICENSE("Dual BSD/GPL");
Commit	Line	Data
5b9974b1 MK	1	/*
	2	* platform.c - DesignWare HS OTG Controller platform driver
	3	*
	4	* Copyright (C) Matthijs Kooijman <matthijs@stdin.nl>
	5	*
	6	* Redistribution and use in source and binary forms, with or without
	7	* modification, are permitted provided that the following conditions
	8	* are met:
	9	* 1. Redistributions of source code must retain the above copyright
	10	* notice, this list of conditions, and the following disclaimer,
	11	* without modification.
	12	* 2. Redistributions in binary form must reproduce the above copyright
	13	* notice, this list of conditions and the following disclaimer in the
	14	* documentation and/or other materials provided with the distribution.
	15	* 3. The names of the above-listed copyright holders may not be used
	16	* to endorse or promote products derived from this software without
	17	* specific prior written permission.
	18	*
	19	* ALTERNATIVELY, this software may be distributed under the terms of the
	20	* GNU General Public License ("GPL") as published by the Free Software
	21	* Foundation; either version 2 of the License, or (at your option) any
	22	* later version.
	23	*
	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
	25	* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
	26	* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
	27	* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
	28	* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
	29	* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
	30	* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
	31	* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
	32	* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
	33	* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
	34	* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	35	*/
	36
	37	#include <linux/kernel.h>
	38	#include <linux/module.h>
	39	#include <linux/slab.h>
09a75e85	40	#include <linux/clk.h>
5b9974b1 MK	41	#include <linux/device.h>
5b9974b1 MK	42	#include <linux/dma-mapping.h>
831eae69	43	#include <linux/of_device.h>
7ad8096e	44	#include <linux/mutex.h>
5b9974b1	45	#include <linux/platform_device.h>
09a75e85 MS	46	#include <linux/phy/phy.h>
09a75e85 MS	47	#include <linux/platform_data/s3c-hsotg.h>
5b9974b1	48
c0155b9d KY	49	#include <linux/usb/of.h>
c0155b9d KY	50
5b9974b1 MK	51	#include "core.h"
5b9974b1 MK	52	#include "hcd.h"
f91eea44	53	#include "debug.h"
5b9974b1 MK	54
	55	static const char dwc2_driver_name[] = "dwc2";
	56
831eae69 SW	57	static const struct dwc2_core_params params_bcm2835 = {
	58	.otg_cap = 0, /* HNP/SRP capable */
	59	.otg_ver = 0, /* 1.3 */
	60	.dma_enable = 1,
	61	.dma_desc_enable = 0,
	62	.speed = 0, /* High Speed */
	63	.enable_dynamic_fifo = 1,
	64	.en_multiple_tx_fifo = 1,
	65	.host_rx_fifo_size = 774, /* 774 DWORDs */
	66	.host_nperio_tx_fifo_size = 256, /* 256 DWORDs */
	67	.host_perio_tx_fifo_size = 512, /* 512 DWORDs */
	68	.max_transfer_size = 65535,
	69	.max_packet_count = 511,
	70	.host_channels = 8,
	71	.phy_type = 1, /* UTMI */
	72	.phy_utmi_width = 8, /* 8 bits */
	73	.phy_ulpi_ddr = 0, /* Single */
	74	.phy_ulpi_ext_vbus = 0,
	75	.i2c_enable = 0,
	76	.ulpi_fs_ls = 0,
	77	.host_support_fs_ls_low_power = 0,
	78	.host_ls_low_power_phy_clk = 0, /* 48 MHz */
	79	.ts_dline = 0,
	80	.reload_ctl = 0,
	81	.ahbcfg = 0x10,
58b179dc	82	.uframe_sched = 0,
a6d249d8	83	.external_id_pin_ctl = -1,
285046aa	84	.hibernation = -1,
831eae69 SW	85	};
831eae69 SW	86
95083146 KY	87	static const struct dwc2_core_params params_rk3066 = {
	88	.otg_cap = 2, /* non-HNP/non-SRP */
	89	.otg_ver = -1,
	90	.dma_enable = -1,
	91	.dma_desc_enable = 0,
	92	.speed = -1,
	93	.enable_dynamic_fifo = 1,
	94	.en_multiple_tx_fifo = -1,
	95	.host_rx_fifo_size = 520, /* 520 DWORDs */
	96	.host_nperio_tx_fifo_size = 128, /* 128 DWORDs */
	97	.host_perio_tx_fifo_size = 256, /* 256 DWORDs */
	98	.max_transfer_size = 65535,
	99	.max_packet_count = -1,
	100	.host_channels = -1,
	101	.phy_type = -1,
	102	.phy_utmi_width = -1,
	103	.phy_ulpi_ddr = -1,
	104	.phy_ulpi_ext_vbus = -1,
	105	.i2c_enable = -1,
	106	.ulpi_fs_ls = -1,
	107	.host_support_fs_ls_low_power = -1,
	108	.host_ls_low_power_phy_clk = -1,
	109	.ts_dline = -1,
	110	.reload_ctl = -1,
f1659303 DA	111	.ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
f1659303 DA	112	GAHBCFG_HBSTLEN_SHIFT,
95083146	113	.uframe_sched = -1,
a6d249d8	114	.external_id_pin_ctl = -1,
285046aa	115	.hibernation = -1,
95083146 KY	116	};
95083146 KY	117
09a75e85 MS	118	static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
	119	{
	120	struct platform_device *pdev = to_platform_device(hsotg->dev);
	121	int ret;
	122
	123	ret = regulator_bulk_enable(ARRAY_SIZE(hsotg->supplies),
	124	hsotg->supplies);
	125	if (ret)
	126	return ret;
	127
	128	ret = clk_prepare_enable(hsotg->clk);
	129	if (ret)
	130	return ret;
	131
	132	if (hsotg->uphy)
	133	ret = usb_phy_init(hsotg->uphy);
	134	else if (hsotg->plat && hsotg->plat->phy_init)
	135	ret = hsotg->plat->phy_init(pdev, hsotg->plat->phy_type);
	136	else {
	137	ret = phy_power_on(hsotg->phy);
	138	if (ret == 0)
	139	ret = phy_init(hsotg->phy);
	140	}
	141
	142	return ret;
	143	}
	144
	145	/**
	146	* dwc2_lowlevel_hw_enable - enable platform lowlevel hw resources
	147	* @hsotg: The driver state
	148	*
	149	* A wrapper for platform code responsible for controlling
	150	* low-level USB platform resources (phy, clock, regulators)
	151	*/
	152	int dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
	153	{
	154	int ret = __dwc2_lowlevel_hw_enable(hsotg);
	155
	156	if (ret == 0)
	157	hsotg->ll_hw_enabled = true;
	158	return ret;
	159	}
	160
	161	static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
	162	{
	163	struct platform_device *pdev = to_platform_device(hsotg->dev);
	164	int ret = 0;
	165
	166	if (hsotg->uphy)
	167	usb_phy_shutdown(hsotg->uphy);
	168	else if (hsotg->plat && hsotg->plat->phy_exit)
	169	ret = hsotg->plat->phy_exit(pdev, hsotg->plat->phy_type);
	170	else {
	171	ret = phy_exit(hsotg->phy);
	172	if (ret == 0)
	173	ret = phy_power_off(hsotg->phy);
	174	}
	175	if (ret)
	176	return ret;
	177
	178	clk_disable_unprepare(hsotg->clk);
	179
	180	ret = regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies),
	181	hsotg->supplies);
182
183	return ret;
184	}
185
186	/**
187	* dwc2_lowlevel_hw_disable - disable platform lowlevel hw resources
188	* @hsotg: The driver state
189	*
190	* A wrapper for platform code responsible for controlling
191	* low-level USB platform resources (phy, clock, regulators)
192	*/
193	int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
194	{
195	int ret = __dwc2_lowlevel_hw_disable(hsotg);
196
197	if (ret == 0)
198	hsotg->ll_hw_enabled = false;
199	return ret;
200	}
201
202	static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
203	{
204	int i, ret;
205
206	/* Set default UTMI width */
207	hsotg->phyif = GUSBCFG_PHYIF16;
208
209	/*
210	* Attempt to find a generic PHY, then look for an old style
211	* USB PHY and then fall back to pdata
212	*/
213	hsotg->phy = devm_phy_get(hsotg->dev, "usb2-phy");
214	if (IS_ERR(hsotg->phy)) {
6c2dad69 SW	215	ret = PTR_ERR(hsotg->phy);
	216	switch (ret) {
	217	case -ENODEV:
	218	case -ENOSYS:
	219	hsotg->phy = NULL;
	220	break;
	221	case -EPROBE_DEFER:
	222	return ret;
	223	default:
	224	dev_err(hsotg->dev, "error getting phy %d\n", ret);
	225	return ret;
	226	}
	227	}
	228
	229	if (!hsotg->phy) {
09a75e85	230	hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2);
6c2dad69 SW	231	if (IS_ERR(hsotg->uphy)) {
	232	ret = PTR_ERR(hsotg->uphy);
	233	switch (ret) {
	234	case -ENODEV:
	235	case -ENXIO:
	236	hsotg->uphy = NULL;
	237	break;
	238	case -EPROBE_DEFER:
	239	return ret;
	240	default:
	241	dev_err(hsotg->dev, "error getting usb phy %d\n",
	242	ret);
	243	return ret;
	244	}
	245	}
09a75e85 MS	246	}
09a75e85 MS	247
6c2dad69 SW	248	hsotg->plat = dev_get_platdata(hsotg->dev);
6c2dad69 SW	249
09a75e85 MS	250	if (hsotg->phy) {
	251	/*
	252	* If using the generic PHY framework, check if the PHY bus
	253	* width is 8-bit and set the phyif appropriately.
	254	*/
	255	if (phy_get_bus_width(hsotg->phy) == 8)
	256	hsotg->phyif = GUSBCFG_PHYIF8;
	257	}
	258
09a75e85 MS	259	/* Clock */
	260	hsotg->clk = devm_clk_get(hsotg->dev, "otg");
	261	if (IS_ERR(hsotg->clk)) {
	262	hsotg->clk = NULL;
	263	dev_dbg(hsotg->dev, "cannot get otg clock\n");
	264	}
	265
	266	/* Regulators */
	267	for (i = 0; i < ARRAY_SIZE(hsotg->supplies); i++)
	268	hsotg->supplies[i].supply = dwc2_hsotg_supply_names[i];
	269
	270	ret = devm_regulator_bulk_get(hsotg->dev, ARRAY_SIZE(hsotg->supplies),
	271	hsotg->supplies);
	272	if (ret) {
	273	dev_err(hsotg->dev, "failed to request supplies: %d\n", ret);
	274	return ret;
	275	}
	276	return 0;
	277	}
	278
5b9974b1 MK	279	/**
	280	* dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
	281	* DWC_otg driver
	282	*
	283	* @dev: Platform device
	284	*
	285	* This routine is called, for example, when the rmmod command is executed. The
	286	* device may or may not be electrically present. If it is present, the driver
	287	* stops device processing. Any resources used on behalf of this device are
	288	* freed.
	289	*/
	290	static int dwc2_driver_remove(struct platform_device *dev)
	291	{
	292	struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
	293
f91eea44	294	dwc2_debugfs_exit(hsotg);
e39af88f MS	295	if (hsotg->hcd_enabled)
	296	dwc2_hcd_remove(hsotg);
	297	if (hsotg->gadget_enabled)
1f91b4cc	298	dwc2_hsotg_remove(hsotg);
5b9974b1	299
09a75e85 MS	300	if (hsotg->ll_hw_enabled)
	301	dwc2_lowlevel_hw_disable(hsotg);
	302
5b9974b1 MK	303	return 0;
	304	}
	305
831eae69 SW	306	static const struct of_device_id dwc2_of_match_table[] = {
831eae69 SW	307	{ .compatible = "brcm,bcm2835-usb", .data = &params_bcm2835 },
95083146	308	{ .compatible = "rockchip,rk3066-usb", .data = &params_rk3066 },
831eae69	309	{ .compatible = "snps,dwc2", .data = NULL },
117777b2	310	{ .compatible = "samsung,s3c6400-hsotg", .data = NULL},
831eae69 SW	311	{},
	312	};
	313	MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
	314
5b9974b1 MK	315	/**
	316	* dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
	317	* driver
	318	*
	319	* @dev: Platform device
	320	*
	321	* This routine creates the driver components required to control the device
	322	* (core, HCD, and PCD) and initializes the device. The driver components are
	323	* stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved
	324	* in the device private data. This allows the driver to access the dwc2_hsotg
	325	* structure on subsequent calls to driver methods for this device.
	326	*/
	327	static int dwc2_driver_probe(struct platform_device *dev)
	328	{
831eae69 SW	329	const struct of_device_id *match;
	330	const struct dwc2_core_params *params;
	331	struct dwc2_core_params defparams;
5b9974b1 MK	332	struct dwc2_hsotg *hsotg;
	333	struct resource *res;
	334	int retval;
	335	int irq;
5b9974b1	336
831eae69 SW	337	match = of_match_device(dwc2_of_match_table, &dev->dev);
	338	if (match && match->data) {
	339	params = match->data;
	340	} else {
	341	/* Default all params to autodetect */
	342	dwc2_set_all_params(&defparams, -1);
	343	params = &defparams;
8b3e233e DN	344
	345	/*
	346	* Disable descriptor dma mode by default as the HW can support
	347	* it, but does not support it for SPLIT transactions.
	348	*/
	349	defparams.dma_desc_enable = 0;
831eae69	350	}
5b9974b1 MK	351
	352	hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL);
	353	if (!hsotg)
	354	return -ENOMEM;
	355
	356	hsotg->dev = &dev->dev;
	357
642f2ecc MK	358	/*
	359	* Use reasonable defaults so platforms don't have to provide these.
	360	*/
	361	if (!dev->dev.dma_mask)
	362	dev->dev.dma_mask = &dev->dev.coherent_dma_mask;
4cdbb4ff RK	363	retval = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32));
	364	if (retval)
	365	return retval;
642f2ecc	366
5b9974b1 MK	367	irq = platform_get_irq(dev, 0);
	368	if (irq < 0) {
	369	dev_err(&dev->dev, "missing IRQ resource\n");
097f2612	370	return irq;
5b9974b1 MK	371	}
5b9974b1 MK	372
db8178c3 DN	373	dev_dbg(hsotg->dev, "registering common handler for irq%d\n",
	374	irq);
	375	retval = devm_request_irq(hsotg->dev, irq,
	376	dwc2_handle_common_intr, IRQF_SHARED,
	377	dev_name(hsotg->dev), hsotg);
	378	if (retval)
	379	return retval;
	380
5b9974b1	381	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
5b9974b1 MK	382	hsotg->regs = devm_ioremap_resource(&dev->dev, res);
	383	if (IS_ERR(hsotg->regs))
	384	return PTR_ERR(hsotg->regs);
	385
	386	dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
	387	(unsigned long)res->start, hsotg->regs);
	388
06e7114f	389	hsotg->dr_mode = usb_get_dr_mode(&dev->dev);
857512d0 MYK	390	if (IS_ENABLED(CONFIG_USB_DWC2_HOST) &&
	391	hsotg->dr_mode != USB_DR_MODE_HOST) {
	392	hsotg->dr_mode = USB_DR_MODE_HOST;
	393	dev_warn(hsotg->dev,
	394	"Configuration mismatch. Forcing host mode\n");
	395	} else if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) &&
	396	hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
	397	hsotg->dr_mode = USB_DR_MODE_PERIPHERAL;
	398	dev_warn(hsotg->dev,
	399	"Configuration mismatch. Forcing peripheral mode\n");
	400	}
c0155b9d	401
09a75e85	402	retval = dwc2_lowlevel_hw_init(hsotg);
ecb176c6 MYK	403	if (retval)
	404	return retval;
	405
09a75e85 MS	406	spin_lock_init(&hsotg->lock);
09a75e85 MS	407
ecb176c6 MYK	408	hsotg->core_params = devm_kzalloc(&dev->dev,
	409	sizeof(*hsotg->core_params), GFP_KERNEL);
	410	if (!hsotg->core_params)
	411	return -ENOMEM;
	412
	413	dwc2_set_all_params(hsotg->core_params, -1);
	414
09a75e85 MS	415	retval = dwc2_lowlevel_hw_enable(hsotg);
	416	if (retval)
	417	return retval;
	418
	419	/* Detect config values from hardware */
	420	retval = dwc2_get_hwparams(hsotg);
	421	if (retval)
	422	goto error;
	423
ecb176c6 MYK	424	/* Validate parameter values */
	425	dwc2_set_parameters(hsotg, params);
	426
e39af88f MS	427	if (hsotg->dr_mode != USB_DR_MODE_HOST) {
	428	retval = dwc2_gadget_init(hsotg, irq);
	429	if (retval)
09a75e85	430	goto error;
e39af88f MS	431	hsotg->gadget_enabled = 1;
	432	}
	433
	434	if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
ecb176c6	435	retval = dwc2_hcd_init(hsotg, irq);
e39af88f MS	436	if (retval) {
e39af88f MS	437	if (hsotg->gadget_enabled)
1f91b4cc	438	dwc2_hsotg_remove(hsotg);
09a75e85	439	goto error;
e39af88f MS	440	}
	441	hsotg->hcd_enabled = 1;
	442	}
5b9974b1 MK	443
	444	platform_set_drvdata(dev, hsotg);
	445
f91eea44 MYK	446	dwc2_debugfs_init(hsotg);
f91eea44 MYK	447
09a75e85 MS	448	/* Gadget code manages lowlevel hw on its own */
	449	if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL)
	450	dwc2_lowlevel_hw_disable(hsotg);
	451
	452	return 0;
	453
	454	error:
	455	dwc2_lowlevel_hw_disable(hsotg);
5b9974b1 MK	456	return retval;
	457	}
	458
da9f3289	459	static int __maybe_unused dwc2_suspend(struct device *dev)
117777b2	460	{
bcc06078	461	struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
117777b2 DN	462	int ret = 0;
117777b2 DN	463
09a75e85 MS	464	if (dwc2_is_device_mode(dwc2))
	465	dwc2_hsotg_suspend(dwc2);
	466
	467	if (dwc2->ll_hw_enabled)
	468	ret = __dwc2_lowlevel_hw_disable(dwc2);
135b3c43	469
117777b2 DN	470	return ret;
	471	}
	472
da9f3289	473	static int __maybe_unused dwc2_resume(struct device *dev)
117777b2	474	{
bcc06078	475	struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
117777b2 DN	476	int ret = 0;
117777b2 DN	477
09a75e85 MS	478	if (dwc2->ll_hw_enabled) {
	479	ret = __dwc2_lowlevel_hw_enable(dwc2);
	480	if (ret)
	481	return ret;
	482	}
	483
	484	if (dwc2_is_device_mode(dwc2))
1f91b4cc	485	ret = dwc2_hsotg_resume(dwc2);
135b3c43	486
117777b2 DN	487	return ret;
	488	}
	489
bcc06078 DN	490	static const struct dev_pm_ops dwc2_dev_pm_ops = {
	491	SET_SYSTEM_SLEEP_PM_OPS(dwc2_suspend, dwc2_resume)
	492	};
	493
5b9974b1 MK	494	static struct platform_driver dwc2_platform_driver = {
5b9974b1 MK	495	.driver = {
1c126bc6	496	.name = dwc2_driver_name,
5b9974b1	497	.of_match_table = dwc2_of_match_table,
bcc06078	498	.pm = &dwc2_dev_pm_ops,
5b9974b1 MK	499	},
	500	.probe = dwc2_driver_probe,
	501	.remove = dwc2_driver_remove,
	502	};
	503
	504	module_platform_driver(dwc2_platform_driver);
	505
	506	MODULE_DESCRIPTION("DESIGNWARE HS OTG Platform Glue");
	507	MODULE_AUTHOR("Matthijs Kooijman <matthijs@stdin.nl>");
	508	MODULE_LICENSE("Dual BSD/GPL");