Commit | Line | Data |
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5fd54ace | 1 | // SPDX-License-Identifier: GPL-2.0 |
c10b4f03 PC |
2 | /* |
3 | * otg.c - ChipIdea USB IP core OTG driver | |
4 | * | |
5 | * Copyright (C) 2013 Freescale Semiconductor, Inc. | |
6 | * | |
7 | * Author: Peter Chen | |
c10b4f03 PC |
8 | */ |
9 | ||
10 | /* | |
4dcf720c LJ |
11 | * This file mainly handles otgsc register, OTG fsm operations for HNP and SRP |
12 | * are also included. | |
c10b4f03 PC |
13 | */ |
14 | ||
15 | #include <linux/usb/otg.h> | |
16 | #include <linux/usb/gadget.h> | |
17 | #include <linux/usb/chipidea.h> | |
18 | ||
19 | #include "ci.h" | |
20 | #include "bits.h" | |
21 | #include "otg.h" | |
57677be5 | 22 | #include "otg_fsm.h" |
c10b4f03 | 23 | |
0c33bf78 LJ |
24 | /** |
25 | * hw_read_otgsc returns otgsc register bits value. | |
26 | * @mask: bitfield mask | |
27 | */ | |
28 | u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask) | |
29 | { | |
3ecb3e09 II |
30 | struct ci_hdrc_cable *cable; |
31 | u32 val = hw_read(ci, OP_OTGSC, mask); | |
32 | ||
33 | /* | |
34 | * If using extcon framework for VBUS and/or ID signal | |
35 | * detection overwrite OTGSC register value | |
36 | */ | |
37 | cable = &ci->platdata->vbus_extcon; | |
05559f10 | 38 | if (!IS_ERR(cable->edev) || ci->role_switch) { |
3ecb3e09 II |
39 | if (cable->changed) |
40 | val |= OTGSC_BSVIS; | |
41 | else | |
42 | val &= ~OTGSC_BSVIS; | |
43 | ||
5cc49268 | 44 | if (cable->connected) |
3ecb3e09 II |
45 | val |= OTGSC_BSV; |
46 | else | |
47 | val &= ~OTGSC_BSV; | |
a89b94b5 SB |
48 | |
49 | if (cable->enabled) | |
50 | val |= OTGSC_BSVIE; | |
51 | else | |
52 | val &= ~OTGSC_BSVIE; | |
3ecb3e09 II |
53 | } |
54 | ||
55 | cable = &ci->platdata->id_extcon; | |
05559f10 | 56 | if (!IS_ERR(cable->edev) || ci->role_switch) { |
3ecb3e09 II |
57 | if (cable->changed) |
58 | val |= OTGSC_IDIS; | |
59 | else | |
60 | val &= ~OTGSC_IDIS; | |
61 | ||
5cc49268 SB |
62 | if (cable->connected) |
63 | val &= ~OTGSC_ID; /* host */ | |
3ecb3e09 | 64 | else |
5cc49268 | 65 | val |= OTGSC_ID; /* device */ |
a89b94b5 SB |
66 | |
67 | if (cable->enabled) | |
68 | val |= OTGSC_IDIE; | |
69 | else | |
70 | val &= ~OTGSC_IDIE; | |
3ecb3e09 II |
71 | } |
72 | ||
a89b94b5 | 73 | return val & mask; |
0c33bf78 LJ |
74 | } |
75 | ||
76 | /** | |
77 | * hw_write_otgsc updates target bits of OTGSC register. | |
78 | * @mask: bitfield mask | |
79 | * @data: to be written | |
80 | */ | |
81 | void hw_write_otgsc(struct ci_hdrc *ci, u32 mask, u32 data) | |
82 | { | |
a89b94b5 SB |
83 | struct ci_hdrc_cable *cable; |
84 | ||
85 | cable = &ci->platdata->vbus_extcon; | |
05559f10 | 86 | if (!IS_ERR(cable->edev) || ci->role_switch) { |
a89b94b5 SB |
87 | if (data & mask & OTGSC_BSVIS) |
88 | cable->changed = false; | |
89 | ||
90 | /* Don't enable vbus interrupt if using external notifier */ | |
91 | if (data & mask & OTGSC_BSVIE) { | |
92 | cable->enabled = true; | |
93 | data &= ~OTGSC_BSVIE; | |
94 | } else if (mask & OTGSC_BSVIE) { | |
95 | cable->enabled = false; | |
96 | } | |
97 | } | |
98 | ||
99 | cable = &ci->platdata->id_extcon; | |
05559f10 | 100 | if (!IS_ERR(cable->edev) || ci->role_switch) { |
a89b94b5 SB |
101 | if (data & mask & OTGSC_IDIS) |
102 | cable->changed = false; | |
103 | ||
104 | /* Don't enable id interrupt if using external notifier */ | |
105 | if (data & mask & OTGSC_IDIE) { | |
106 | cable->enabled = true; | |
107 | data &= ~OTGSC_IDIE; | |
108 | } else if (mask & OTGSC_IDIE) { | |
109 | cable->enabled = false; | |
110 | } | |
111 | } | |
112 | ||
0c33bf78 LJ |
113 | hw_write(ci, OP_OTGSC, mask | OTGSC_INT_STATUS_BITS, data); |
114 | } | |
115 | ||
c10b4f03 | 116 | /** |
cbec6bd5 PC |
117 | * ci_otg_role - pick role based on ID pin state |
118 | * @ci: the controller | |
119 | */ | |
120 | enum ci_role ci_otg_role(struct ci_hdrc *ci) | |
121 | { | |
0c33bf78 | 122 | enum ci_role role = hw_read_otgsc(ci, OTGSC_ID) |
cbec6bd5 PC |
123 | ? CI_ROLE_GADGET |
124 | : CI_ROLE_HOST; | |
125 | ||
126 | return role; | |
127 | } | |
128 | ||
a107f8c5 PC |
129 | void ci_handle_vbus_change(struct ci_hdrc *ci) |
130 | { | |
a107f8c5 PC |
131 | if (!ci->is_otg) |
132 | return; | |
133 | ||
c3b674a0 | 134 | if (hw_read_otgsc(ci, OTGSC_BSV) && !ci->vbus_active) |
a107f8c5 | 135 | usb_gadget_vbus_connect(&ci->gadget); |
c3b674a0 | 136 | else if (!hw_read_otgsc(ci, OTGSC_BSV) && ci->vbus_active) |
a107f8c5 PC |
137 | usb_gadget_vbus_disconnect(&ci->gadget); |
138 | } | |
139 | ||
f60f8ccd SB |
140 | /** |
141 | * When we switch to device mode, the vbus value should be lower | |
142 | * than OTGSC_BSV before connecting to host. | |
143 | * | |
144 | * @ci: the controller | |
145 | * | |
146 | * This function returns an error code if timeout | |
147 | */ | |
148 | static int hw_wait_vbus_lower_bsv(struct ci_hdrc *ci) | |
149 | { | |
150 | unsigned long elapse = jiffies + msecs_to_jiffies(5000); | |
151 | u32 mask = OTGSC_BSV; | |
152 | ||
153 | while (hw_read_otgsc(ci, mask)) { | |
154 | if (time_after(jiffies, elapse)) { | |
155 | dev_err(ci->dev, "timeout waiting for %08x in OTGSC\n", | |
156 | mask); | |
157 | return -ETIMEDOUT; | |
158 | } | |
159 | msleep(20); | |
160 | } | |
161 | ||
162 | return 0; | |
163 | } | |
164 | ||
a107f8c5 | 165 | static void ci_handle_id_switch(struct ci_hdrc *ci) |
cbec6bd5 | 166 | { |
cbec6bd5 PC |
167 | enum ci_role role = ci_otg_role(ci); |
168 | ||
169 | if (role != ci->role) { | |
170 | dev_dbg(ci->dev, "switching from %s to %s\n", | |
171 | ci_role(ci)->name, ci->roles[role]->name); | |
172 | ||
3ac82cf3 PC |
173 | if (ci->vbus_active && ci->role == CI_ROLE_GADGET) |
174 | /* | |
175 | * vbus disconnect event is lost due to role | |
176 | * switch occurs during system suspend. | |
177 | */ | |
178 | usb_gadget_vbus_disconnect(&ci->gadget); | |
179 | ||
cbec6bd5 | 180 | ci_role_stop(ci); |
851ce932 | 181 | |
c3b674a0 PC |
182 | if (role == CI_ROLE_GADGET && |
183 | IS_ERR(ci->platdata->vbus_extcon.edev)) | |
f60f8ccd | 184 | /* |
c3b674a0 PC |
185 | * Wait vbus lower than OTGSC_BSV before connecting |
186 | * to host. If connecting status is from an external | |
187 | * connector instead of register, we don't need to | |
188 | * care vbus on the board, since it will not affect | |
189 | * external connector status. | |
f60f8ccd SB |
190 | */ |
191 | hw_wait_vbus_lower_bsv(ci); | |
851ce932 | 192 | |
cbec6bd5 | 193 | ci_role_start(ci, role); |
c3b674a0 PC |
194 | /* vbus change may have already occurred */ |
195 | if (role == CI_ROLE_GADGET) | |
196 | ci_handle_vbus_change(ci); | |
cbec6bd5 | 197 | } |
a107f8c5 PC |
198 | } |
199 | /** | |
200 | * ci_otg_work - perform otg (vbus/id) event handle | |
201 | * @work: work struct | |
202 | */ | |
203 | static void ci_otg_work(struct work_struct *work) | |
204 | { | |
205 | struct ci_hdrc *ci = container_of(work, struct ci_hdrc, work); | |
206 | ||
4dcf720c LJ |
207 | if (ci_otg_is_fsm_mode(ci) && !ci_otg_fsm_work(ci)) { |
208 | enable_irq(ci->irq); | |
209 | return; | |
210 | } | |
211 | ||
1f874edc | 212 | pm_runtime_get_sync(ci->dev); |
59739131 | 213 | |
a107f8c5 PC |
214 | if (ci->id_event) { |
215 | ci->id_event = false; | |
216 | ci_handle_id_switch(ci); | |
59739131 LP |
217 | } |
218 | ||
219 | if (ci->b_sess_valid_event) { | |
a107f8c5 PC |
220 | ci->b_sess_valid_event = false; |
221 | ci_handle_vbus_change(ci); | |
59739131 LP |
222 | } |
223 | ||
1f874edc | 224 | pm_runtime_put_sync(ci->dev); |
cbec6bd5 PC |
225 | |
226 | enable_irq(ci->irq); | |
227 | } | |
228 | ||
a107f8c5 | 229 | |
cbec6bd5 PC |
230 | /** |
231 | * ci_hdrc_otg_init - initialize otg struct | |
c10b4f03 PC |
232 | * ci: the controller |
233 | */ | |
234 | int ci_hdrc_otg_init(struct ci_hdrc *ci) | |
235 | { | |
a107f8c5 | 236 | INIT_WORK(&ci->work, ci_otg_work); |
d144dfea | 237 | ci->wq = create_freezable_workqueue("ci_otg"); |
cbec6bd5 PC |
238 | if (!ci->wq) { |
239 | dev_err(ci->dev, "can't create workqueue\n"); | |
240 | return -ENODEV; | |
241 | } | |
c10b4f03 | 242 | |
57677be5 LJ |
243 | if (ci_otg_is_fsm_mode(ci)) |
244 | return ci_hdrc_otg_fsm_init(ci); | |
245 | ||
c10b4f03 PC |
246 | return 0; |
247 | } | |
cbec6bd5 PC |
248 | |
249 | /** | |
250 | * ci_hdrc_otg_destroy - destroy otg struct | |
251 | * ci: the controller | |
252 | */ | |
253 | void ci_hdrc_otg_destroy(struct ci_hdrc *ci) | |
254 | { | |
255 | if (ci->wq) { | |
256 | flush_workqueue(ci->wq); | |
257 | destroy_workqueue(ci->wq); | |
258 | } | |
0c33bf78 LJ |
259 | /* Disable all OTG irq and clear status */ |
260 | hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS, | |
261 | OTGSC_INT_STATUS_BITS); | |
15f75def LJ |
262 | if (ci_otg_is_fsm_mode(ci)) |
263 | ci_hdrc_otg_fsm_remove(ci); | |
cbec6bd5 | 264 | } |