[linux-2.6-block.git] / drivers / usb / chipidea / host.c

// SPDX-License-Identifier: GPL-2.0
/*
 * host.c - ChipIdea USB host controller driver
 *
 * Copyright (c) 2012 Intel Corporation
 *
 * Author: Alexander Shishkin
 */

#include <linux/kernel.h>
#include <linux/io.h>
#include <linux/usb.h>
#include <linux/usb/hcd.h>
#include <linux/usb/chipidea.h>
#include <linux/regulator/consumer.h>
#include <linux/pinctrl/consumer.h>

#include "../host/ehci.h"

#include "ci.h"
#include "bits.h"
#include "host.h"

static struct hc_driver __read_mostly ci_ehci_hc_driver;
static int (*orig_bus_suspend)(struct usb_hcd *hcd);

struct ehci_ci_priv {
	struct regulator *reg_vbus;
	bool enabled;
};

struct ci_hdrc_dma_aligned_buffer {
	void *original_buffer;
	u8 data[];
};

static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable)
{
	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
	struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv;
	struct device *dev = hcd->self.controller;
	struct ci_hdrc *ci = dev_get_drvdata(dev);
	int ret = 0;
	int port = HCS_N_PORTS(ehci->hcs_params);

	if (priv->reg_vbus && enable != priv->enabled) {
		if (port > 1) {
			dev_warn(dev,
				"Not support multi-port regulator control\n");
			return 0;
		}
		if (enable)
			ret = regulator_enable(priv->reg_vbus);
		else
			ret = regulator_disable(priv->reg_vbus);
		if (ret) {
			dev_err(dev,
				"Failed to %s vbus regulator, ret=%d\n",
				enable ? "enable" : "disable", ret);
			return ret;
		}
		priv->enabled = enable;
	}

	if (ci->platdata->flags & CI_HDRC_PHY_VBUS_CONTROL) {
		if (enable)
			usb_phy_vbus_on(ci->usb_phy);
		else
			usb_phy_vbus_off(ci->usb_phy);
	}

	if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) {
		/*
		 * Marvell 28nm HSIC PHY requires forcing the port to HS mode.
		 * As HSIC is always HS, this should be safe for others.
		 */
		hw_port_test_set(ci, 5);
		hw_port_test_set(ci, 0);
	}
	return 0;
};

static int ehci_ci_reset(struct usb_hcd *hcd)
{
	struct device *dev = hcd->self.controller;
	struct ci_hdrc *ci = dev_get_drvdata(dev);
	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
	int ret;

	ret = ehci_setup(hcd);
	if (ret)
		return ret;

	ehci->need_io_watchdog = 0;

	if (ci->platdata->notify_event) {
		ret = ci->platdata->notify_event(ci,
				CI_HDRC_CONTROLLER_RESET_EVENT);
		if (ret)
			return ret;
	}

	ci_platform_configure(ci);

	return ret;
}

static const struct ehci_driver_overrides ehci_ci_overrides = {
	.extra_priv_size = sizeof(struct ehci_ci_priv),
	.port_power	 = ehci_ci_portpower,
	.reset		 = ehci_ci_reset,
};

static irqreturn_t host_irq(struct ci_hdrc *ci)
{
	return usb_hcd_irq(ci->irq, ci->hcd);
}

static int host_start(struct ci_hdrc *ci)
{
	struct usb_hcd *hcd;
	struct ehci_hcd *ehci;
	struct ehci_ci_priv *priv;
	int ret;

	if (usb_disabled())
		return -ENODEV;

	hcd = __usb_create_hcd(&ci_ehci_hc_driver, ci->dev->parent,
			       ci->dev, dev_name(ci->dev), NULL);
	if (!hcd)
		return -ENOMEM;

	dev_set_drvdata(ci->dev, ci);
	hcd->rsrc_start = ci->hw_bank.phys;
	hcd->rsrc_len = ci->hw_bank.size;
	hcd->regs = ci->hw_bank.abs;
	hcd->has_tt = 1;

	hcd->power_budget = ci->platdata->power_budget;
	hcd->tpl_support = ci->platdata->tpl_support;
	if (ci->phy || ci->usb_phy) {
		hcd->skip_phy_initialization = 1;
		if (ci->usb_phy)
			hcd->usb_phy = ci->usb_phy;
	}

	ehci = hcd_to_ehci(hcd);
	ehci->caps = ci->hw_bank.cap;
	ehci->has_hostpc = ci->hw_bank.lpm;
	ehci->has_tdi_phy_lpm = ci->hw_bank.lpm;
	ehci->imx28_write_fix = ci->imx28_write_fix;
	ehci->has_ci_pec_bug = ci->has_portsc_pec_bug;

	priv = (struct ehci_ci_priv *)ehci->priv;
	priv->reg_vbus = NULL;

	if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) {
		if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) {
			ret = regulator_enable(ci->platdata->reg_vbus);
			if (ret) {
				dev_err(ci->dev,
				"Failed to enable vbus regulator, ret=%d\n",
									ret);
				goto put_hcd;
			}
		} else {
			priv->reg_vbus = ci->platdata->reg_vbus;
		}
	}

	if (ci->platdata->pins_host)
		pinctrl_select_state(ci->platdata->pctl,
				     ci->platdata->pins_host);

	ci->hcd = hcd;

	ret = usb_add_hcd(hcd, 0, 0);
	if (ret) {
		ci->hcd = NULL;
		goto disable_reg;
	} else {
		struct usb_otg *otg = &ci->otg;

		if (ci_otg_is_fsm_mode(ci)) {
			otg->host = &hcd->self;
			hcd->self.otg_port = 1;
		}

		if (ci->platdata->notify_event &&
			(ci->platdata->flags & CI_HDRC_IMX_IS_HSIC))
			ci->platdata->notify_event
				(ci, CI_HDRC_IMX_HSIC_ACTIVE_EVENT);
	}

	return ret;

disable_reg:
	if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
			(ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
		regulator_disable(ci->platdata->reg_vbus);
put_hcd:
	usb_put_hcd(hcd);

	return ret;
}

static void host_stop(struct ci_hdrc *ci)
{
	struct usb_hcd *hcd = ci->hcd;

	if (hcd) {
		if (ci->platdata->notify_event)
			ci->platdata->notify_event(ci,
				CI_HDRC_CONTROLLER_STOPPED_EVENT);
		usb_remove_hcd(hcd);
		ci->role = CI_ROLE_END;
		synchronize_irq(ci->irq);
		usb_put_hcd(hcd);
		if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
			(ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
				regulator_disable(ci->platdata->reg_vbus);
	}
	ci->hcd = NULL;
	ci->otg.host = NULL;

	if (ci->platdata->pins_host && ci->platdata->pins_default)
		pinctrl_select_state(ci->platdata->pctl,
				     ci->platdata->pins_default);
}


void ci_hdrc_host_destroy(struct ci_hdrc *ci)
{
	if (ci->role == CI_ROLE_HOST && ci->hcd)
		host_stop(ci);
}

/* The below code is based on tegra ehci driver */
static int ci_ehci_hub_control(
	struct usb_hcd	*hcd,
	u16		typeReq,
	u16		wValue,
	u16		wIndex,
	char		*buf,
	u16		wLength
)
{
	struct ehci_hcd	*ehci = hcd_to_ehci(hcd);
	unsigned int	ports = HCS_N_PORTS(ehci->hcs_params);
	u32 __iomem	*status_reg;
	u32		temp, port_index;
	unsigned long	flags;
	int		retval = 0;
	bool		done = false;
	struct device *dev = hcd->self.controller;
	struct ci_hdrc *ci = dev_get_drvdata(dev);

	port_index = wIndex & 0xff;
	port_index -= (port_index > 0);
	status_reg = &ehci->regs->port_status[port_index];

	spin_lock_irqsave(&ehci->lock, flags);

	if (ci->platdata->hub_control) {
		retval = ci->platdata->hub_control(ci, typeReq, wValue, wIndex,
						   buf, wLength, &done, &flags);
		if (done)
			goto done;
	}

	if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) {
		if (!wIndex || wIndex > ports) {
			retval = -EPIPE;
			goto done;
		}

		temp = ehci_readl(ehci, status_reg);
		if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) {
			retval = -EPIPE;
			goto done;
		}

		temp &= ~(PORT_RWC_BITS | PORT_WKCONN_E);
		temp |= PORT_WKDISC_E | PORT_WKOC_E;
		ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);

		/*
		 * If a transaction is in progress, there may be a delay in
		 * suspending the port. Poll until the port is suspended.
		 */
		if (ehci_handshake(ehci, status_reg, PORT_SUSPEND,
			PORT_SUSPEND, 5000))
			ehci_err(ehci, "timeout waiting for SUSPEND\n");

		if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) {
			if (ci->platdata->notify_event)
				ci->platdata->notify_event(ci,
					CI_HDRC_IMX_HSIC_SUSPEND_EVENT);

			temp = ehci_readl(ehci, status_reg);
			temp &= ~(PORT_WKDISC_E | PORT_WKCONN_E);
			ehci_writel(ehci, temp, status_reg);
		}

		set_bit(port_index, &ehci->suspended_ports);
		goto done;
	}

	/*
	 * After resume has finished, it needs do some post resume
	 * operation for some SoCs.
	 */
	else if (typeReq == ClearPortFeature &&
		wValue == USB_PORT_FEAT_C_SUSPEND) {
		/* Make sure the resume has finished, it should be finished */
		if (ehci_handshake(ehci, status_reg, PORT_RESUME, 0, 25000))
			ehci_err(ehci, "timeout waiting for resume\n");
	}

	spin_unlock_irqrestore(&ehci->lock, flags);

	/* Handle the hub control events here */
	return ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength);
done:
	spin_unlock_irqrestore(&ehci->lock, flags);
	return retval;
}
static int ci_ehci_bus_suspend(struct usb_hcd *hcd)
{
	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
	struct device *dev = hcd->self.controller;
	struct ci_hdrc *ci = dev_get_drvdata(dev);
	int port;
	u32 tmp;

	int ret = orig_bus_suspend(hcd);

	if (ret)
		return ret;

	port = HCS_N_PORTS(ehci->hcs_params);
	while (port--) {
		u32 __iomem *reg = &ehci->regs->port_status[port];
		u32 portsc = ehci_readl(ehci, reg);

		if (portsc & PORT_CONNECT) {
			/*
			 * For chipidea, the resume signal will be ended
			 * automatically, so for remote wakeup case, the
			 * usbcmd.rs may not be set before the resume has
			 * ended if other resume paths consumes too much
			 * time (~24ms), in that case, the SOF will not
			 * send out within 3ms after resume ends, then the
			 * high speed device will enter full speed mode.
			 */

			tmp = ehci_readl(ehci, &ehci->regs->command);
			tmp |= CMD_RUN;
			ehci_writel(ehci, tmp, &ehci->regs->command);
			/*
			 * It needs a short delay between set RS bit and PHCD.
			 */
			usleep_range(150, 200);
			/*
			 * Need to clear WKCN and WKOC for imx HSIC,
			 * otherwise, there will be wakeup event.
			 */
			if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) {
				tmp = ehci_readl(ehci, reg);
				tmp &= ~(PORT_WKDISC_E | PORT_WKCONN_E);
				ehci_writel(ehci, tmp, reg);
			}

			break;
		}
	}

	return 0;
}

static void ci_hdrc_free_dma_aligned_buffer(struct urb *urb, bool copy_back)
{
	struct ci_hdrc_dma_aligned_buffer *temp;

	if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER))
		return;
	urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER;

	temp = container_of(urb->transfer_buffer,
			    struct ci_hdrc_dma_aligned_buffer, data);
	urb->transfer_buffer = temp->original_buffer;

	if (copy_back && usb_urb_dir_in(urb)) {
		size_t length;

		if (usb_pipeisoc(urb->pipe))
			length = urb->transfer_buffer_length;
		else
			length = urb->actual_length;

		memcpy(temp->original_buffer, temp->data, length);
	}

	kfree(temp);
}

static int ci_hdrc_alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags)
{
	struct ci_hdrc_dma_aligned_buffer *temp;

	if (urb->num_sgs || urb->sg || urb->transfer_buffer_length == 0)
		return 0;
	if (IS_ALIGNED((uintptr_t)urb->transfer_buffer, 4)
	    && IS_ALIGNED(urb->transfer_buffer_length, 4))
		return 0;

	temp = kmalloc(sizeof(*temp) + ALIGN(urb->transfer_buffer_length, 4), mem_flags);
	if (!temp)
		return -ENOMEM;

	if (usb_urb_dir_out(urb))
		memcpy(temp->data, urb->transfer_buffer,
		       urb->transfer_buffer_length);

	temp->original_buffer = urb->transfer_buffer;
	urb->transfer_buffer = temp->data;
	urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER;

	return 0;
}

static int ci_hdrc_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb,
				   gfp_t mem_flags)
{
	int ret;

	ret = ci_hdrc_alloc_dma_aligned_buffer(urb, mem_flags);
	if (ret)
		return ret;

	ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags);
	if (ret)
		ci_hdrc_free_dma_aligned_buffer(urb, false);

	return ret;
}

static void ci_hdrc_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
{
	usb_hcd_unmap_urb_for_dma(hcd, urb);
	ci_hdrc_free_dma_aligned_buffer(urb, true);
}

#ifdef CONFIG_PM_SLEEP
static void ci_hdrc_host_suspend(struct ci_hdrc *ci)
{
	ehci_suspend(ci->hcd, device_may_wakeup(ci->dev));
}

static void ci_hdrc_host_resume(struct ci_hdrc *ci, bool power_lost)
{
	ehci_resume(ci->hcd, power_lost);
}
#endif

int ci_hdrc_host_init(struct ci_hdrc *ci)
{
	struct ci_role_driver *rdrv;

	if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC))
		return -ENXIO;

	rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
	if (!rdrv)
		return -ENOMEM;

	rdrv->start	= host_start;
	rdrv->stop	= host_stop;
#ifdef CONFIG_PM_SLEEP
	rdrv->suspend	= ci_hdrc_host_suspend;
	rdrv->resume	= ci_hdrc_host_resume;
#endif
	rdrv->irq	= host_irq;
	rdrv->name	= "host";
	ci->roles[CI_ROLE_HOST] = rdrv;

	if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA) {
		ci_ehci_hc_driver.map_urb_for_dma = ci_hdrc_map_urb_for_dma;
		ci_ehci_hc_driver.unmap_urb_for_dma = ci_hdrc_unmap_urb_for_dma;
	}

	return 0;
}

void ci_hdrc_host_driver_init(void)
{
	ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides);
	orig_bus_suspend = ci_ehci_hc_driver.bus_suspend;
	ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend;
	ci_ehci_hc_driver.hub_control = ci_ehci_hub_control;
}
Commit	Line	Data
5fd54ace	1	// SPDX-License-Identifier: GPL-2.0
eb70e5ab AS	2	/*
	3	* host.c - ChipIdea USB host controller driver
	4	*
	5	* Copyright (c) 2012 Intel Corporation
	6	*
	7	* Author: Alexander Shishkin
eb70e5ab AS	8	*/
	9
	10	#include <linux/kernel.h>
cdb2fac7	11	#include <linux/io.h>
eb70e5ab AS	12	#include <linux/usb.h>
	13	#include <linux/usb/hcd.h>
	14	#include <linux/usb/chipidea.h>
40ed51a4	15	#include <linux/regulator/consumer.h>
16caf1fa	16	#include <linux/pinctrl/consumer.h>
eb70e5ab	17
09f6ffde	18	#include "../host/ehci.h"
eb70e5ab AS	19
	20	#include "ci.h"
	21	#include "bits.h"
	22	#include "host.h"
	23
09f6ffde	24	static struct hc_driver __read_mostly ci_ehci_hc_driver;
78f0357e	25	static int (orig_bus_suspend)(struct usb_hcd hcd);
09f6ffde	26
c8679a2f MG	27	struct ehci_ci_priv {
c8679a2f MG	28	struct regulator *reg_vbus;
c1ffba30	29	bool enabled;
c8679a2f MG	30	};
c8679a2f MG	31
fc53d527	32	struct ci_hdrc_dma_aligned_buffer {
2ae61a25	33	void *original_buffer;
4294a8c2	34	u8 data[];
fc53d527 PG	35	};
fc53d527 PG	36
c8679a2f MG	37	static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable)
	38	{
	39	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
	40	struct ehci_ci_priv priv = (struct ehci_ci_priv )ehci->priv;
	41	struct device *dev = hcd->self.controller;
1311d6e3	42	struct ci_hdrc *ci = dev_get_drvdata(dev);
c8679a2f MG	43	int ret = 0;
	44	int port = HCS_N_PORTS(ehci->hcs_params);
	45
c1ffba30	46	if (priv->reg_vbus && enable != priv->enabled) {
c8679a2f MG	47	if (port > 1) {
	48	dev_warn(dev,
	49	"Not support multi-port regulator control\n");
	50	return 0;
	51	}
	52	if (enable)
	53	ret = regulator_enable(priv->reg_vbus);
	54	else
	55	ret = regulator_disable(priv->reg_vbus);
	56	if (ret) {
	57	dev_err(dev,
	58	"Failed to %s vbus regulator, ret=%d\n",
	59	enable ? "enable" : "disable", ret);
	60	return ret;
	61	}
c1ffba30	62	priv->enabled = enable;
c8679a2f	63	}
fc6b68ba	64
66d1c802 PM	65	if (ci->platdata->flags & CI_HDRC_PHY_VBUS_CONTROL) {
	66	if (enable)
	67	usb_phy_vbus_on(ci->usb_phy);
	68	else
	69	usb_phy_vbus_off(ci->usb_phy);
	70	}
	71
fc6b68ba RH	72	if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) {
	73	/*
	74	* Marvell 28nm HSIC PHY requires forcing the port to HS mode.
	75	* As HSIC is always HS, this should be safe for others.
	76	*/
	77	hw_port_test_set(ci, 5);
	78	hw_port_test_set(ci, 0);
	79	}
c8679a2f MG	80	return 0;
	81	};
	82
11a27098 PC	83	static int ehci_ci_reset(struct usb_hcd *hcd)
	84	{
	85	struct device *dev = hcd->self.controller;
	86	struct ci_hdrc *ci = dev_get_drvdata(dev);
c744a0db	87	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
11a27098 PC	88	int ret;
	89
	90	ret = ehci_setup(hcd);
	91	if (ret)
	92	return ret;
	93
c744a0db LS	94	ehci->need_io_watchdog = 0;
c744a0db LS	95
11893dae SB	96	if (ci->platdata->notify_event) {
	97	ret = ci->platdata->notify_event(ci,
	98	CI_HDRC_CONTROLLER_RESET_EVENT);
	99	if (ret)
	100	return ret;
	101	}
b90a17c5	102
11a27098 PC	103	ci_platform_configure(ci);
	104
	105	return ret;
	106	}
	107
c8679a2f MG	108	static const struct ehci_driver_overrides ehci_ci_overrides = {
	109	.extra_priv_size = sizeof(struct ehci_ci_priv),
	110	.port_power = ehci_ci_portpower,
11a27098	111	.reset = ehci_ci_reset,
c8679a2f MG	112	};
c8679a2f MG	113
8e22978c	114	static irqreturn_t host_irq(struct ci_hdrc *ci)
eb70e5ab AS	115	{
	116	return usb_hcd_irq(ci->irq, ci->hcd);
	117	}
	118
8e22978c	119	static int host_start(struct ci_hdrc *ci)
eb70e5ab AS	120	{
	121	struct usb_hcd *hcd;
	122	struct ehci_hcd *ehci;
c8679a2f	123	struct ehci_ci_priv *priv;
eb70e5ab AS	124	int ret;
	125
	126	if (usb_disabled())
	127	return -ENODEV;
	128
aeb78cda AB	129	hcd = __usb_create_hcd(&ci_ehci_hc_driver, ci->dev->parent,
aeb78cda AB	130	ci->dev, dev_name(ci->dev), NULL);
eb70e5ab AS	131	if (!hcd)
	132	return -ENOMEM;
	133
24c498df	134	dev_set_drvdata(ci->dev, ci);
eb70e5ab AS	135	hcd->rsrc_start = ci->hw_bank.phys;
	136	hcd->rsrc_len = ci->hw_bank.size;
	137	hcd->regs = ci->hw_bank.abs;
	138	hcd->has_tt = 1;
	139
77c4400f	140	hcd->power_budget = ci->platdata->power_budget;
f6a9ff07	141	hcd->tpl_support = ci->platdata->tpl_support;
90f26cc6	142	if (ci->phy \|\| ci->usb_phy) {
4e88d4c0	143	hcd->skip_phy_initialization = 1;
90f26cc6 PC	144	if (ci->usb_phy)
	145	hcd->usb_phy = ci->usb_phy;
	146	}
bd841986	147
eb70e5ab AS	148	ehci = hcd_to_ehci(hcd);
	149	ehci->caps = ci->hw_bank.cap;
	150	ehci->has_hostpc = ci->hw_bank.lpm;
2cdcec4f	151	ehci->has_tdi_phy_lpm = ci->hw_bank.lpm;
ed8f8318	152	ehci->imx28_write_fix = ci->imx28_write_fix;
12e6ac69	153	ehci->has_ci_pec_bug = ci->has_portsc_pec_bug;
eb70e5ab	154
c8679a2f MG	155	priv = (struct ehci_ci_priv *)ehci->priv;
	156	priv->reg_vbus = NULL;
	157
65945917 LJ	158	if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) {
	159	if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) {
	160	ret = regulator_enable(ci->platdata->reg_vbus);
	161	if (ret) {
	162	dev_err(ci->dev,
	163	"Failed to enable vbus regulator, ret=%d\n",
	164	ret);
	165	goto put_hcd;
	166	}
	167	} else {
	168	priv->reg_vbus = ci->platdata->reg_vbus;
	169	}
	170	}
40ed51a4	171
16caf1fa LP	172	if (ci->platdata->pins_host)
	173	pinctrl_select_state(ci->platdata->pctl,
	174	ci->platdata->pins_host);
	175
fc53d527 PG	176	ci->hcd = hcd;
fc53d527 PG	177
eb70e5ab	178	ret = usb_add_hcd(hcd, 0, 0);
0698b9b3	179	if (ret) {
fc53d527	180	ci->hcd = NULL;
65945917	181	goto disable_reg;
0698b9b3	182	} else {
ef44cb42	183	struct usb_otg *otg = &ci->otg;
0698b9b3	184
ef44cb42	185	if (ci_otg_is_fsm_mode(ci)) {
0698b9b3 LJ	186	otg->host = &hcd->self;
	187	hcd->self.otg_port = 1;
	188	}
014abe34 PC	189
	190	if (ci->platdata->notify_event &&
	191	(ci->platdata->flags & CI_HDRC_IMX_IS_HSIC))
	192	ci->platdata->notify_event
	193	(ci, CI_HDRC_IMX_HSIC_ACTIVE_EVENT);
0698b9b3	194	}
eb70e5ab AS	195
eb70e5ab AS	196	return ret;
40ed51a4	197
65945917 LJ	198	disable_reg:
	199	if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
	200	(ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
	201	regulator_disable(ci->platdata->reg_vbus);
40ed51a4 PC	202	put_hcd:
	203	usb_put_hcd(hcd);
	204
	205	return ret;
eb70e5ab AS	206	}
eb70e5ab AS	207
8e22978c	208	static void host_stop(struct ci_hdrc *ci)
eb70e5ab AS	209	{
	210	struct usb_hcd *hcd = ci->hcd;
	211
41314fea	212	if (hcd) {
b90a17c5 SB	213	if (ci->platdata->notify_event)
	214	ci->platdata->notify_event(ci,
	215	CI_HDRC_CONTROLLER_STOPPED_EVENT);
41314fea	216	usb_remove_hcd(hcd);
991d5add SW	217	ci->role = CI_ROLE_END;
991d5add SW	218	synchronize_irq(ci->irq);
41314fea	219	usb_put_hcd(hcd);
65945917 LJ	220	if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
	221	(ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
	222	regulator_disable(ci->platdata->reg_vbus);
41314fea	223	}
43a40457 LJ	224	ci->hcd = NULL;
43a40457 LJ	225	ci->otg.host = NULL;
16caf1fa LP	226
	227	if (ci->platdata->pins_host && ci->platdata->pins_default)
	228	pinctrl_select_state(ci->platdata->pctl,
	229	ci->platdata->pins_default);
eb70e5ab AS	230	}
eb70e5ab AS	231
3f124d23 PC	232
	233	void ci_hdrc_host_destroy(struct ci_hdrc *ci)
	234	{
df101c53	235	if (ci->role == CI_ROLE_HOST && ci->hcd)
3f124d23 PC	236	host_stop(ci);
	237	}
	238
2c4593ec PC	239	/* The below code is based on tegra ehci driver */
	240	static int ci_ehci_hub_control(
	241	struct usb_hcd *hcd,
	242	u16 typeReq,
	243	u16 wValue,
	244	u16 wIndex,
	245	char *buf,
	246	u16 wLength
	247	)
	248	{
	249	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
e5d6a7c6	250	unsigned int ports = HCS_N_PORTS(ehci->hcs_params);
2c4593ec	251	u32 __iomem *status_reg;
e5d6a7c6	252	u32 temp, port_index;
2c4593ec PC	253	unsigned long flags;
2c4593ec PC	254	int retval = 0;
fc53d527	255	bool done = false;
2c4593ec PC	256	struct device *dev = hcd->self.controller;
	257	struct ci_hdrc *ci = dev_get_drvdata(dev);
	258
e5d6a7c6 LJ	259	port_index = wIndex & 0xff;
	260	port_index -= (port_index > 0);
	261	status_reg = &ehci->regs->port_status[port_index];
2c4593ec PC	262
	263	spin_lock_irqsave(&ehci->lock, flags);
	264
fc53d527 PG	265	if (ci->platdata->hub_control) {
	266	retval = ci->platdata->hub_control(ci, typeReq, wValue, wIndex,
	267	buf, wLength, &done, &flags);
	268	if (done)
	269	goto done;
	270	}
	271
2c4593ec	272	if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) {
e5d6a7c6 LJ	273	if (!wIndex \|\| wIndex > ports) {
	274	retval = -EPIPE;
	275	goto done;
	276	}
	277
2c4593ec PC	278	temp = ehci_readl(ehci, status_reg);
	279	if ((temp & PORT_PE) == 0 \|\| (temp & PORT_RESET) != 0) {
	280	retval = -EPIPE;
	281	goto done;
	282	}
	283
	284	temp &= ~(PORT_RWC_BITS \| PORT_WKCONN_E);
	285	temp \|= PORT_WKDISC_E \| PORT_WKOC_E;
	286	ehci_writel(ehci, temp \| PORT_SUSPEND, status_reg);
	287
	288	/*
	289	* If a transaction is in progress, there may be a delay in
	290	* suspending the port. Poll until the port is suspended.
	291	*/
	292	if (ehci_handshake(ehci, status_reg, PORT_SUSPEND,
	293	PORT_SUSPEND, 5000))
	294	ehci_err(ehci, "timeout waiting for SUSPEND\n");
	295
	296	if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) {
	297	if (ci->platdata->notify_event)
	298	ci->platdata->notify_event(ci,
	299	CI_HDRC_IMX_HSIC_SUSPEND_EVENT);
	300
	301	temp = ehci_readl(ehci, status_reg);
	302	temp &= ~(PORT_WKDISC_E \| PORT_WKCONN_E);
	303	ehci_writel(ehci, temp, status_reg);
	304	}
	305
e5d6a7c6	306	set_bit(port_index, &ehci->suspended_ports);
2c4593ec PC	307	goto done;
	308	}
	309
	310	/*
	311	* After resume has finished, it needs do some post resume
	312	* operation for some SoCs.
	313	*/
	314	else if (typeReq == ClearPortFeature &&
	315	wValue == USB_PORT_FEAT_C_SUSPEND) {
	316	/* Make sure the resume has finished, it should be finished */
	317	if (ehci_handshake(ehci, status_reg, PORT_RESUME, 0, 25000))
	318	ehci_err(ehci, "timeout waiting for resume\n");
	319	}
	320
	321	spin_unlock_irqrestore(&ehci->lock, flags);
	322
	323	/* Handle the hub control events here */
	324	return ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength);
	325	done:
	326	spin_unlock_irqrestore(&ehci->lock, flags);
	327	return retval;
	328	}
78f0357e PC	329	static int ci_ehci_bus_suspend(struct usb_hcd *hcd)
	330	{
	331	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
014abe34 PC	332	struct device *dev = hcd->self.controller;
014abe34 PC	333	struct ci_hdrc *ci = dev_get_drvdata(dev);
78f0357e PC	334	int port;
	335	u32 tmp;
	336
	337	int ret = orig_bus_suspend(hcd);
	338
	339	if (ret)
	340	return ret;
	341
	342	port = HCS_N_PORTS(ehci->hcs_params);
	343	while (port--) {
	344	u32 __iomem *reg = &ehci->regs->port_status[port];
	345	u32 portsc = ehci_readl(ehci, reg);
	346
	347	if (portsc & PORT_CONNECT) {
	348	/*
	349	* For chipidea, the resume signal will be ended
	350	* automatically, so for remote wakeup case, the
	351	* usbcmd.rs may not be set before the resume has
	352	* ended if other resume paths consumes too much
	353	* time (~24ms), in that case, the SOF will not
	354	* send out within 3ms after resume ends, then the
	355	* high speed device will enter full speed mode.
	356	*/
	357
	358	tmp = ehci_readl(ehci, &ehci->regs->command);
	359	tmp \|= CMD_RUN;
	360	ehci_writel(ehci, tmp, &ehci->regs->command);
	361	/*
	362	* It needs a short delay between set RS bit and PHCD.
	363	*/
	364	usleep_range(150, 200);
014abe34 PC	365	/*
	366	* Need to clear WKCN and WKOC for imx HSIC,
	367	* otherwise, there will be wakeup event.
	368	*/
	369	if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) {
	370	tmp = ehci_readl(ehci, reg);
	371	tmp &= ~(PORT_WKDISC_E \| PORT_WKCONN_E);
	372	ehci_writel(ehci, tmp, reg);
	373	}
	374
78f0357e PC	375	break;
	376	}
	377	}
	378
	379	return 0;
	380	}
	381
2ae61a25	382	static void ci_hdrc_free_dma_aligned_buffer(struct urb *urb, bool copy_back)
fc53d527 PG	383	{
fc53d527 PG	384	struct ci_hdrc_dma_aligned_buffer *temp;
fc53d527 PG	385
	386	if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER))
	387	return;
2ae61a25	388	urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER;
fc53d527 PG	389
	390	temp = container_of(urb->transfer_buffer,
	391	struct ci_hdrc_dma_aligned_buffer, data);
2ae61a25 MM	392	urb->transfer_buffer = temp->original_buffer;
	393
	394	if (copy_back && usb_urb_dir_in(urb)) {
	395	size_t length;
fc53d527	396
fc53d527 PG	397	if (usb_pipeisoc(urb->pipe))
	398	length = urb->transfer_buffer_length;
	399	else
	400	length = urb->actual_length;
	401
2ae61a25	402	memcpy(temp->original_buffer, temp->data, length);
fc53d527	403	}
fc53d527	404
2ae61a25	405	kfree(temp);
fc53d527 PG	406	}
	407
	408	static int ci_hdrc_alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags)
	409	{
2ae61a25	410	struct ci_hdrc_dma_aligned_buffer *temp;
fc53d527	411
7ab87167 MM	412	if (urb->num_sgs \|\| urb->sg \|\| urb->transfer_buffer_length == 0)
7ab87167 MM	413	return 0;
2ae61a25 MM	414	if (IS_ALIGNED((uintptr_t)urb->transfer_buffer, 4)
2ae61a25 MM	415	&& IS_ALIGNED(urb->transfer_buffer_length, 4))
fc53d527 PG	416	return 0;
fc53d527 PG	417
2ae61a25 MM	418	temp = kmalloc(sizeof(*temp) + ALIGN(urb->transfer_buffer_length, 4), mem_flags);
2ae61a25 MM	419	if (!temp)
fc53d527 PG	420	return -ENOMEM;
fc53d527 PG	421
fc53d527 PG	422	if (usb_urb_dir_out(urb))
	423	memcpy(temp->data, urb->transfer_buffer,
	424	urb->transfer_buffer_length);
fc53d527	425
2ae61a25 MM	426	temp->original_buffer = urb->transfer_buffer;
2ae61a25 MM	427	urb->transfer_buffer = temp->data;
fc53d527 PG	428	urb->transfer_flags \|= URB_ALIGNED_TEMP_BUFFER;
	429
	430	return 0;
	431	}
	432
	433	static int ci_hdrc_map_urb_for_dma(struct usb_hcd hcd, struct urb urb,
	434	gfp_t mem_flags)
	435	{
	436	int ret;
	437
	438	ret = ci_hdrc_alloc_dma_aligned_buffer(urb, mem_flags);
	439	if (ret)
	440	return ret;
	441
	442	ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags);
	443	if (ret)
2ae61a25	444	ci_hdrc_free_dma_aligned_buffer(urb, false);
fc53d527 PG	445
	446	return ret;
	447	}
	448
	449	static void ci_hdrc_unmap_urb_for_dma(struct usb_hcd hcd, struct urb urb)
	450	{
	451	usb_hcd_unmap_urb_for_dma(hcd, urb);
2ae61a25	452	ci_hdrc_free_dma_aligned_buffer(urb, true);
fc53d527 PG	453	}
fc53d527 PG	454
2f64d6a6 XY	455	#ifdef CONFIG_PM_SLEEP
	456	static void ci_hdrc_host_suspend(struct ci_hdrc *ci)
	457	{
	458	ehci_suspend(ci->hcd, device_may_wakeup(ci->dev));
	459	}
	460
	461	static void ci_hdrc_host_resume(struct ci_hdrc *ci, bool power_lost)
	462	{
	463	ehci_resume(ci->hcd, power_lost);
	464	}
	465	#endif
	466
8e22978c	467	int ci_hdrc_host_init(struct ci_hdrc *ci)
eb70e5ab AS	468	{
	469	struct ci_role_driver *rdrv;
	470
	471	if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC))
	472	return -ENXIO;
	473
	474	rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
	475	if (!rdrv)
	476	return -ENOMEM;
	477
	478	rdrv->start = host_start;
	479	rdrv->stop = host_stop;
2f64d6a6 XY	480	#ifdef CONFIG_PM_SLEEP
	481	rdrv->suspend = ci_hdrc_host_suspend;
	482	rdrv->resume = ci_hdrc_host_resume;
	483	#endif
eb70e5ab AS	484	rdrv->irq = host_irq;
	485	rdrv->name = "host";
	486	ci->roles[CI_ROLE_HOST] = rdrv;
	487
fc53d527 PG	488	if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA) {
	489	ci_ehci_hc_driver.map_urb_for_dma = ci_hdrc_map_urb_for_dma;
	490	ci_ehci_hc_driver.unmap_urb_for_dma = ci_hdrc_unmap_urb_for_dma;
	491	}
	492
2f01a33b PC	493	return 0;
	494	}
	495
	496	void ci_hdrc_host_driver_init(void)
	497	{
c8679a2f	498	ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides);
78f0357e PC	499	orig_bus_suspend = ci_ehci_hc_driver.bus_suspend;
78f0357e PC	500	ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend;
2c4593ec	501	ci_ehci_hc_driver.hub_control = ci_ehci_hub_control;
eb70e5ab	502	}