[linux-2.6-block.git] / drivers / uio / uio_pruss.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Programmable Real-Time Unit Sub System (PRUSS) UIO driver (uio_pruss)
 *
 * This driver exports PRUSS host event out interrupts and PRUSS, L3 RAM,
 * and DDR RAM to user space for applications interacting with PRUSS firmware
 *
 * Copyright (C) 2010-11 Texas Instruments Incorporated - http://www.ti.com/
 */
#include <linux/device.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/platform_device.h>
#include <linux/uio_driver.h>
#include <linux/platform_data/uio_pruss.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/dma-mapping.h>
#include <linux/sizes.h>
#include <linux/slab.h>
#include <linux/genalloc.h>

#define DRV_NAME "pruss_uio"
#define DRV_VERSION "1.0"

static int sram_pool_sz = SZ_16K;
module_param(sram_pool_sz, int, 0);
MODULE_PARM_DESC(sram_pool_sz, "sram pool size to allocate ");

static int extram_pool_sz = SZ_256K;
module_param(extram_pool_sz, int, 0);
MODULE_PARM_DESC(extram_pool_sz, "external ram pool size to allocate");

/*
 * Host event IRQ numbers from PRUSS - PRUSS can generate up to 8 interrupt
 * events to AINTC of ARM host processor - which can be used for IPC b/w PRUSS
 * firmware and user space application, async notification from PRU firmware
 * to user space application
 * 3	PRU_EVTOUT0
 * 4	PRU_EVTOUT1
 * 5	PRU_EVTOUT2
 * 6	PRU_EVTOUT3
 * 7	PRU_EVTOUT4
 * 8	PRU_EVTOUT5
 * 9	PRU_EVTOUT6
 * 10	PRU_EVTOUT7
*/
#define MAX_PRUSS_EVT	8

#define PINTC_HIDISR	0x0038
#define PINTC_HIPIR	0x0900
#define HIPIR_NOPEND	0x80000000
#define PINTC_HIER	0x1500

struct uio_pruss_dev {
	struct uio_info *info;
	struct clk *pruss_clk;
	dma_addr_t sram_paddr;
	dma_addr_t ddr_paddr;
	void __iomem *prussio_vaddr;
	unsigned long sram_vaddr;
	void *ddr_vaddr;
	unsigned int hostirq_start;
	unsigned int pintc_base;
	struct gen_pool *sram_pool;
};

static irqreturn_t pruss_handler(int irq, struct uio_info *info)
{
	struct uio_pruss_dev *gdev = info->priv;
	int intr_bit = (irq - gdev->hostirq_start + 2);
	int val, intr_mask = (1 << intr_bit);
	void __iomem *base = gdev->prussio_vaddr + gdev->pintc_base;
	void __iomem *intren_reg = base + PINTC_HIER;
	void __iomem *intrdis_reg = base + PINTC_HIDISR;
	void __iomem *intrstat_reg = base + PINTC_HIPIR + (intr_bit << 2);

	val = ioread32(intren_reg);
	/* Is interrupt enabled and active ? */
	if (!(val & intr_mask) && (ioread32(intrstat_reg) & HIPIR_NOPEND))
		return IRQ_NONE;
	/* Disable interrupt */
	iowrite32(intr_bit, intrdis_reg);
	return IRQ_HANDLED;
}

static void pruss_cleanup(struct device *dev, struct uio_pruss_dev *gdev)
{
	int cnt;
	struct uio_info *p = gdev->info;

	for (cnt = 0; cnt < MAX_PRUSS_EVT; cnt++, p++) {
		uio_unregister_device(p);
	}
	iounmap(gdev->prussio_vaddr);
	if (gdev->ddr_vaddr) {
		dma_free_coherent(dev, extram_pool_sz, gdev->ddr_vaddr,
			gdev->ddr_paddr);
	}
	if (gdev->sram_vaddr)
		gen_pool_free(gdev->sram_pool,
			      gdev->sram_vaddr,
			      sram_pool_sz);
	clk_disable(gdev->pruss_clk);
}

static int pruss_probe(struct platform_device *pdev)
{
	struct uio_info *p;
	struct uio_pruss_dev *gdev;
	struct resource *regs_prussio;
	struct device *dev = &pdev->dev;
	int ret, cnt, i, len;
	struct uio_pruss_pdata *pdata = dev_get_platdata(dev);

	gdev = devm_kzalloc(dev, sizeof(struct uio_pruss_dev), GFP_KERNEL);
	if (!gdev)
		return -ENOMEM;

	gdev->info = devm_kcalloc(dev, MAX_PRUSS_EVT, sizeof(*p), GFP_KERNEL);
	if (!gdev->info)
		return -ENOMEM;

	/* Power on PRU in case its not done as part of boot-loader */
	gdev->pruss_clk = devm_clk_get(dev, "pruss");
	if (IS_ERR(gdev->pruss_clk)) {
		dev_err(dev, "Failed to get clock\n");
		return PTR_ERR(gdev->pruss_clk);
	}

	ret = clk_enable(gdev->pruss_clk);
	if (ret) {
		dev_err(dev, "Failed to enable clock\n");
		return ret;
	}

	regs_prussio = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!regs_prussio) {
		dev_err(dev, "No PRUSS I/O resource specified\n");
		ret = -EIO;
		goto err_clk_disable;
	}

	if (!regs_prussio->start) {
		dev_err(dev, "Invalid memory resource\n");
		ret = -EIO;
		goto err_clk_disable;
	}

	if (pdata->sram_pool) {
		gdev->sram_pool = pdata->sram_pool;
		gdev->sram_vaddr =
			(unsigned long)gen_pool_dma_alloc(gdev->sram_pool,
					sram_pool_sz, &gdev->sram_paddr);
		if (!gdev->sram_vaddr) {
			dev_err(dev, "Could not allocate SRAM pool\n");
			ret = -ENOMEM;
			goto err_clk_disable;
		}
	}

	gdev->ddr_vaddr = dma_alloc_coherent(dev, extram_pool_sz,
				&(gdev->ddr_paddr), GFP_KERNEL | GFP_DMA);
	if (!gdev->ddr_vaddr) {
		dev_err(dev, "Could not allocate external memory\n");
		ret = -ENOMEM;
		goto err_free_sram;
	}

	len = resource_size(regs_prussio);
	gdev->prussio_vaddr = ioremap(regs_prussio->start, len);
	if (!gdev->prussio_vaddr) {
		dev_err(dev, "Can't remap PRUSS I/O  address range\n");
		ret = -ENOMEM;
		goto err_free_ddr_vaddr;
	}

	ret = platform_get_irq(pdev, 0);
	if (ret < 0)
		goto err_unmap;

	gdev->hostirq_start = ret;
	gdev->pintc_base = pdata->pintc_base;

	for (cnt = 0, p = gdev->info; cnt < MAX_PRUSS_EVT; cnt++, p++) {
		p->mem[0].addr = regs_prussio->start;
		p->mem[0].size = resource_size(regs_prussio);
		p->mem[0].memtype = UIO_MEM_PHYS;

		p->mem[1].addr = gdev->sram_paddr;
		p->mem[1].size = sram_pool_sz;
		p->mem[1].memtype = UIO_MEM_PHYS;

		p->mem[2].addr = gdev->ddr_paddr;
		p->mem[2].size = extram_pool_sz;
		p->mem[2].memtype = UIO_MEM_PHYS;

		p->name = devm_kasprintf(dev, GFP_KERNEL, "pruss_evt%d", cnt);
		p->version = DRV_VERSION;

		/* Register PRUSS IRQ lines */
		p->irq = gdev->hostirq_start + cnt;
		p->handler = pruss_handler;
		p->priv = gdev;

		ret = uio_register_device(dev, p);
		if (ret < 0)
			goto err_unloop;
	}

	platform_set_drvdata(pdev, gdev);
	return 0;

err_unloop:
	for (i = 0, p = gdev->info; i < cnt; i++, p++) {
		uio_unregister_device(p);
	}
err_unmap:
	iounmap(gdev->prussio_vaddr);
err_free_ddr_vaddr:
	dma_free_coherent(dev, extram_pool_sz, gdev->ddr_vaddr,
			  gdev->ddr_paddr);
err_free_sram:
	if (pdata->sram_pool)
		gen_pool_free(gdev->sram_pool, gdev->sram_vaddr, sram_pool_sz);
err_clk_disable:
	clk_disable(gdev->pruss_clk);

	return ret;
}

static int pruss_remove(struct platform_device *dev)
{
	struct uio_pruss_dev *gdev = platform_get_drvdata(dev);

	pruss_cleanup(&dev->dev, gdev);
	return 0;
}

static struct platform_driver pruss_driver = {
	.probe = pruss_probe,
	.remove = pruss_remove,
	.driver = {
		   .name = DRV_NAME,
		   },
};

module_platform_driver(pruss_driver);

MODULE_LICENSE("GPL v2");
MODULE_VERSION(DRV_VERSION);
MODULE_AUTHOR("Amit Chatterjee <amit.chatterjee@ti.com>");
MODULE_AUTHOR("Pratheesh Gangadhar <pratheesh@ti.com>");
Commit	Line	Data
2aec85b2	1	// SPDX-License-Identifier: GPL-2.0-only
f1a304e7 PG	2	/*
	3	* Programmable Real-Time Unit Sub System (PRUSS) UIO driver (uio_pruss)
	4	*
	5	* This driver exports PRUSS host event out interrupts and PRUSS, L3 RAM,
	6	* and DDR RAM to user space for applications interacting with PRUSS firmware
	7	*
	8	* Copyright (C) 2010-11 Texas Instruments Incorporated - http://www.ti.com/
f1a304e7 PG	9	*/
	10	#include <linux/device.h>
	11	#include <linux/module.h>
	12	#include <linux/moduleparam.h>
	13	#include <linux/platform_device.h>
	14	#include <linux/uio_driver.h>
	15	#include <linux/platform_data/uio_pruss.h>
	16	#include <linux/io.h>
	17	#include <linux/clk.h>
	18	#include <linux/dma-mapping.h>
87672676	19	#include <linux/sizes.h>
f1a304e7	20	#include <linux/slab.h>
2eb2478d	21	#include <linux/genalloc.h>
f1a304e7 PG	22
	23	#define DRV_NAME "pruss_uio"
	24	#define DRV_VERSION "1.0"
	25
	26	static int sram_pool_sz = SZ_16K;
	27	module_param(sram_pool_sz, int, 0);
	28	MODULE_PARM_DESC(sram_pool_sz, "sram pool size to allocate ");
	29
	30	static int extram_pool_sz = SZ_256K;
	31	module_param(extram_pool_sz, int, 0);
	32	MODULE_PARM_DESC(extram_pool_sz, "external ram pool size to allocate");
	33
	34	/*
25985edc	35	* Host event IRQ numbers from PRUSS - PRUSS can generate up to 8 interrupt
f1a304e7 PG	36	* events to AINTC of ARM host processor - which can be used for IPC b/w PRUSS
	37	* firmware and user space application, async notification from PRU firmware
	38	* to user space application
	39	* 3 PRU_EVTOUT0
	40	* 4 PRU_EVTOUT1
	41	* 5 PRU_EVTOUT2
	42	* 6 PRU_EVTOUT3
	43	* 7 PRU_EVTOUT4
	44	* 8 PRU_EVTOUT5
	45	* 9 PRU_EVTOUT6
	46	* 10 PRU_EVTOUT7
	47	*/
	48	#define MAX_PRUSS_EVT 8
	49
	50	#define PINTC_HIDISR 0x0038
	51	#define PINTC_HIPIR 0x0900
	52	#define HIPIR_NOPEND 0x80000000
	53	#define PINTC_HIER 0x1500
	54
	55	struct uio_pruss_dev {
	56	struct uio_info *info;
	57	struct clk *pruss_clk;
	58	dma_addr_t sram_paddr;
	59	dma_addr_t ddr_paddr;
	60	void __iomem *prussio_vaddr;
2eb2478d	61	unsigned long sram_vaddr;
f1a304e7 PG	62	void *ddr_vaddr;
	63	unsigned int hostirq_start;
	64	unsigned int pintc_base;
2eb2478d	65	struct gen_pool *sram_pool;
f1a304e7 PG	66	};
	67
	68	static irqreturn_t pruss_handler(int irq, struct uio_info *info)
	69	{
	70	struct uio_pruss_dev *gdev = info->priv;
	71	int intr_bit = (irq - gdev->hostirq_start + 2);
	72	int val, intr_mask = (1 << intr_bit);
	73	void __iomem *base = gdev->prussio_vaddr + gdev->pintc_base;
	74	void __iomem *intren_reg = base + PINTC_HIER;
	75	void __iomem *intrdis_reg = base + PINTC_HIDISR;
	76	void __iomem *intrstat_reg = base + PINTC_HIPIR + (intr_bit << 2);
	77
	78	val = ioread32(intren_reg);
	79	/* Is interrupt enabled and active ? */
	80	if (!(val & intr_mask) && (ioread32(intrstat_reg) & HIPIR_NOPEND))
	81	return IRQ_NONE;
	82	/* Disable interrupt */
	83	iowrite32(intr_bit, intrdis_reg);
	84	return IRQ_HANDLED;
	85	}
	86
4719ebfd	87	static void pruss_cleanup(struct device dev, struct uio_pruss_dev gdev)
f1a304e7 PG	88	{
	89	int cnt;
	90	struct uio_info *p = gdev->info;
	91
	92	for (cnt = 0; cnt < MAX_PRUSS_EVT; cnt++, p++) {
	93	uio_unregister_device(p);
f1a304e7 PG	94	}
	95	iounmap(gdev->prussio_vaddr);
	96	if (gdev->ddr_vaddr) {
4719ebfd	97	dma_free_coherent(dev, extram_pool_sz, gdev->ddr_vaddr,
f1a304e7 PG	98	gdev->ddr_paddr);
	99	}
	100	if (gdev->sram_vaddr)
2eb2478d MP	101	gen_pool_free(gdev->sram_pool,
	102	gdev->sram_vaddr,
	103	sram_pool_sz);
e663c5db	104	clk_disable(gdev->pruss_clk);
f1a304e7 PG	105	}
f1a304e7 PG	106
4719ebfd	107	static int pruss_probe(struct platform_device *pdev)
f1a304e7 PG	108	{
	109	struct uio_info *p;
	110	struct uio_pruss_dev *gdev;
	111	struct resource *regs_prussio;
4719ebfd	112	struct device *dev = &pdev->dev;
95883676	113	int ret, cnt, i, len;
4719ebfd	114	struct uio_pruss_pdata *pdata = dev_get_platdata(dev);
f1a304e7	115
cfd3443e	116	gdev = devm_kzalloc(dev, sizeof(struct uio_pruss_dev), GFP_KERNEL);
f1a304e7 PG	117	if (!gdev)
	118	return -ENOMEM;
	119
cfd3443e AA	120	gdev->info = devm_kcalloc(dev, MAX_PRUSS_EVT, sizeof(*p), GFP_KERNEL);
	121	if (!gdev->info)
	122	return -ENOMEM;
4719ebfd	123
f1a304e7	124	/* Power on PRU in case its not done as part of boot-loader */
68d62119	125	gdev->pruss_clk = devm_clk_get(dev, "pruss");
f1a304e7	126	if (IS_ERR(gdev->pruss_clk)) {
4719ebfd	127	dev_err(dev, "Failed to get clock\n");
cfd3443e	128	return PTR_ERR(gdev->pruss_clk);
95883676 DC	129	}
	130
	131	ret = clk_enable(gdev->pruss_clk);
	132	if (ret) {
	133	dev_err(dev, "Failed to enable clock\n");
68d62119	134	return ret;
f1a304e7 PG	135	}
f1a304e7 PG	136
4719ebfd	137	regs_prussio = platform_get_resource(pdev, IORESOURCE_MEM, 0);
f1a304e7	138	if (!regs_prussio) {
4719ebfd	139	dev_err(dev, "No PRUSS I/O resource specified\n");
95883676 DC	140	ret = -EIO;
95883676 DC	141	goto err_clk_disable;
f1a304e7 PG	142	}
	143
	144	if (!regs_prussio->start) {
4719ebfd	145	dev_err(dev, "Invalid memory resource\n");
95883676 DC	146	ret = -EIO;
95883676 DC	147	goto err_clk_disable;
f1a304e7 PG	148	}
f1a304e7 PG	149
2eb2478d MP	150	if (pdata->sram_pool) {
	151	gdev->sram_pool = pdata->sram_pool;
	152	gdev->sram_vaddr =
288342e9 NC	153	(unsigned long)gen_pool_dma_alloc(gdev->sram_pool,
288342e9 NC	154	sram_pool_sz, &gdev->sram_paddr);
2eb2478d	155	if (!gdev->sram_vaddr) {
4719ebfd	156	dev_err(dev, "Could not allocate SRAM pool\n");
95883676 DC	157	ret = -ENOMEM;
95883676 DC	158	goto err_clk_disable;
2eb2478d	159	}
f1a304e7 PG	160	}
f1a304e7 PG	161
4719ebfd	162	gdev->ddr_vaddr = dma_alloc_coherent(dev, extram_pool_sz,
f1a304e7 PG	163	&(gdev->ddr_paddr), GFP_KERNEL \| GFP_DMA);
f1a304e7 PG	164	if (!gdev->ddr_vaddr) {
4719ebfd	165	dev_err(dev, "Could not allocate external memory\n");
95883676 DC	166	ret = -ENOMEM;
95883676 DC	167	goto err_free_sram;
f1a304e7 PG	168	}
	169
	170	len = resource_size(regs_prussio);
	171	gdev->prussio_vaddr = ioremap(regs_prussio->start, len);
	172	if (!gdev->prussio_vaddr) {
4719ebfd	173	dev_err(dev, "Can't remap PRUSS I/O address range\n");
95883676 DC	174	ret = -ENOMEM;
95883676 DC	175	goto err_free_ddr_vaddr;
f1a304e7 PG	176	}
f1a304e7 PG	177
2fd84b9b ZS	178	ret = platform_get_irq(pdev, 0);
2fd84b9b ZS	179	if (ret < 0)
979ca1ca	180	goto err_unmap;
2fd84b9b ZS	181
2fd84b9b ZS	182	gdev->hostirq_start = ret;
f1a304e7	183	gdev->pintc_base = pdata->pintc_base;
f1a304e7 PG	184
	185	for (cnt = 0, p = gdev->info; cnt < MAX_PRUSS_EVT; cnt++, p++) {
	186	p->mem[0].addr = regs_prussio->start;
	187	p->mem[0].size = resource_size(regs_prussio);
	188	p->mem[0].memtype = UIO_MEM_PHYS;
	189
	190	p->mem[1].addr = gdev->sram_paddr;
	191	p->mem[1].size = sram_pool_sz;
	192	p->mem[1].memtype = UIO_MEM_PHYS;
	193
	194	p->mem[2].addr = gdev->ddr_paddr;
	195	p->mem[2].size = extram_pool_sz;
	196	p->mem[2].memtype = UIO_MEM_PHYS;
	197
cfd3443e	198	p->name = devm_kasprintf(dev, GFP_KERNEL, "pruss_evt%d", cnt);
f1a304e7 PG	199	p->version = DRV_VERSION;
	200
	201	/* Register PRUSS IRQ lines */
	202	p->irq = gdev->hostirq_start + cnt;
	203	p->handler = pruss_handler;
	204	p->priv = gdev;
	205
4719ebfd	206	ret = uio_register_device(dev, p);
cfd3443e	207	if (ret < 0)
95883676	208	goto err_unloop;
f1a304e7 PG	209	}
f1a304e7 PG	210
4719ebfd	211	platform_set_drvdata(pdev, gdev);
f1a304e7 PG	212	return 0;
f1a304e7 PG	213
95883676 DC	214	err_unloop:
	215	for (i = 0, p = gdev->info; i < cnt; i++, p++) {
	216	uio_unregister_device(p);
95883676	217	}
979ca1ca	218	err_unmap:
95883676 DC	219	iounmap(gdev->prussio_vaddr);
	220	err_free_ddr_vaddr:
	221	dma_free_coherent(dev, extram_pool_sz, gdev->ddr_vaddr,
	222	gdev->ddr_paddr);
	223	err_free_sram:
	224	if (pdata->sram_pool)
	225	gen_pool_free(gdev->sram_pool, gdev->sram_vaddr, sram_pool_sz);
	226	err_clk_disable:
	227	clk_disable(gdev->pruss_clk);
95883676	228
f1a304e7 PG	229	return ret;
	230	}
	231
9b96c312	232	static int pruss_remove(struct platform_device *dev)
f1a304e7 PG	233	{
	234	struct uio_pruss_dev *gdev = platform_get_drvdata(dev);
	235
4719ebfd	236	pruss_cleanup(&dev->dev, gdev);
f1a304e7 PG	237	return 0;
	238	}
	239
	240	static struct platform_driver pruss_driver = {
	241	.probe = pruss_probe,
5a59509b	242	.remove = pruss_remove,
f1a304e7 PG	243	.driver = {
f1a304e7 PG	244	.name = DRV_NAME,
f1a304e7 PG	245	},
	246	};
	247
11e3123d	248	module_platform_driver(pruss_driver);
f1a304e7 PG	249
	250	MODULE_LICENSE("GPL v2");
	251	MODULE_VERSION(DRV_VERSION);
	252	MODULE_AUTHOR("Amit Chatterjee <amit.chatterjee@ti.com>");
	253	MODULE_AUTHOR("Pratheesh Gangadhar <pratheesh@ti.com>");