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e3b3d0f5 | 1 | // SPDX-License-Identifier: GPL-2.0 |
b7396a38 CZ |
2 | /* |
3 | * Copyright (C) 2012-2015 Spreadtrum Communications Inc. | |
b7396a38 CZ |
4 | */ |
5 | ||
6 | #if defined(CONFIG_SERIAL_SPRD_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | |
7 | #define SUPPORT_SYSRQ | |
8 | #endif | |
9 | ||
10 | #include <linux/clk.h> | |
11 | #include <linux/console.h> | |
12 | #include <linux/delay.h> | |
13 | #include <linux/io.h> | |
14 | #include <linux/ioport.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/module.h> | |
17 | #include <linux/of.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/serial_core.h> | |
20 | #include <linux/serial.h> | |
21 | #include <linux/slab.h> | |
22 | #include <linux/tty.h> | |
23 | #include <linux/tty_flip.h> | |
24 | ||
25 | /* device name */ | |
26 | #define UART_NR_MAX 8 | |
27 | #define SPRD_TTY_NAME "ttyS" | |
28 | #define SPRD_FIFO_SIZE 128 | |
29 | #define SPRD_DEF_RATE 26000000 | |
30 | #define SPRD_BAUD_IO_LIMIT 3000000 | |
e1dc9b08 | 31 | #define SPRD_TIMEOUT 256000 |
b7396a38 CZ |
32 | |
33 | /* the offset of serial registers and BITs for them */ | |
34 | /* data registers */ | |
35 | #define SPRD_TXD 0x0000 | |
36 | #define SPRD_RXD 0x0004 | |
37 | ||
38 | /* line status register and its BITs */ | |
39 | #define SPRD_LSR 0x0008 | |
40 | #define SPRD_LSR_OE BIT(4) | |
41 | #define SPRD_LSR_FE BIT(3) | |
42 | #define SPRD_LSR_PE BIT(2) | |
43 | #define SPRD_LSR_BI BIT(7) | |
44 | #define SPRD_LSR_TX_OVER BIT(15) | |
45 | ||
46 | /* data number in TX and RX fifo */ | |
47 | #define SPRD_STS1 0x000C | |
48 | ||
49 | /* interrupt enable register and its BITs */ | |
50 | #define SPRD_IEN 0x0010 | |
51 | #define SPRD_IEN_RX_FULL BIT(0) | |
52 | #define SPRD_IEN_TX_EMPTY BIT(1) | |
53 | #define SPRD_IEN_BREAK_DETECT BIT(7) | |
54 | #define SPRD_IEN_TIMEOUT BIT(13) | |
55 | ||
56 | /* interrupt clear register */ | |
57 | #define SPRD_ICLR 0x0014 | |
43507825 | 58 | #define SPRD_ICLR_TIMEOUT BIT(13) |
b7396a38 CZ |
59 | |
60 | /* line control register */ | |
61 | #define SPRD_LCR 0x0018 | |
62 | #define SPRD_LCR_STOP_1BIT 0x10 | |
63 | #define SPRD_LCR_STOP_2BIT 0x30 | |
64 | #define SPRD_LCR_DATA_LEN (BIT(2) | BIT(3)) | |
65 | #define SPRD_LCR_DATA_LEN5 0x0 | |
66 | #define SPRD_LCR_DATA_LEN6 0x4 | |
67 | #define SPRD_LCR_DATA_LEN7 0x8 | |
68 | #define SPRD_LCR_DATA_LEN8 0xc | |
69 | #define SPRD_LCR_PARITY (BIT(0) | BIT(1)) | |
70 | #define SPRD_LCR_PARITY_EN 0x2 | |
71 | #define SPRD_LCR_EVEN_PAR 0x0 | |
72 | #define SPRD_LCR_ODD_PAR 0x1 | |
73 | ||
74 | /* control register 1 */ | |
75 | #define SPRD_CTL1 0x001C | |
76 | #define RX_HW_FLOW_CTL_THLD BIT(6) | |
77 | #define RX_HW_FLOW_CTL_EN BIT(7) | |
78 | #define TX_HW_FLOW_CTL_EN BIT(8) | |
79 | #define RX_TOUT_THLD_DEF 0x3E00 | |
80 | #define RX_HFC_THLD_DEF 0x40 | |
81 | ||
82 | /* fifo threshold register */ | |
83 | #define SPRD_CTL2 0x0020 | |
84 | #define THLD_TX_EMPTY 0x40 | |
85 | #define THLD_RX_FULL 0x40 | |
86 | ||
87 | /* config baud rate register */ | |
88 | #define SPRD_CLKD0 0x0024 | |
89 | #define SPRD_CLKD1 0x0028 | |
90 | ||
91 | /* interrupt mask status register */ | |
92 | #define SPRD_IMSR 0x002C | |
93 | #define SPRD_IMSR_RX_FIFO_FULL BIT(0) | |
94 | #define SPRD_IMSR_TX_FIFO_EMPTY BIT(1) | |
95 | #define SPRD_IMSR_BREAK_DETECT BIT(7) | |
96 | #define SPRD_IMSR_TIMEOUT BIT(13) | |
97 | ||
98 | struct reg_backup { | |
99 | u32 ien; | |
100 | u32 ctrl0; | |
101 | u32 ctrl1; | |
102 | u32 ctrl2; | |
103 | u32 clkd0; | |
104 | u32 clkd1; | |
105 | u32 dspwait; | |
106 | }; | |
107 | ||
108 | struct sprd_uart_port { | |
109 | struct uart_port port; | |
110 | struct reg_backup reg_bak; | |
111 | char name[16]; | |
112 | }; | |
113 | ||
114 | static struct sprd_uart_port *sprd_port[UART_NR_MAX]; | |
115 | static int sprd_ports_num; | |
116 | ||
117 | static inline unsigned int serial_in(struct uart_port *port, int offset) | |
118 | { | |
119 | return readl_relaxed(port->membase + offset); | |
120 | } | |
121 | ||
122 | static inline void serial_out(struct uart_port *port, int offset, int value) | |
123 | { | |
124 | writel_relaxed(value, port->membase + offset); | |
125 | } | |
126 | ||
127 | static unsigned int sprd_tx_empty(struct uart_port *port) | |
128 | { | |
129 | if (serial_in(port, SPRD_STS1) & 0xff00) | |
130 | return 0; | |
131 | else | |
132 | return TIOCSER_TEMT; | |
133 | } | |
134 | ||
135 | static unsigned int sprd_get_mctrl(struct uart_port *port) | |
136 | { | |
137 | return TIOCM_DSR | TIOCM_CTS; | |
138 | } | |
139 | ||
140 | static void sprd_set_mctrl(struct uart_port *port, unsigned int mctrl) | |
141 | { | |
142 | /* nothing to do */ | |
143 | } | |
144 | ||
145 | static void sprd_stop_tx(struct uart_port *port) | |
146 | { | |
147 | unsigned int ien, iclr; | |
148 | ||
149 | iclr = serial_in(port, SPRD_ICLR); | |
150 | ien = serial_in(port, SPRD_IEN); | |
151 | ||
152 | iclr |= SPRD_IEN_TX_EMPTY; | |
153 | ien &= ~SPRD_IEN_TX_EMPTY; | |
154 | ||
155 | serial_out(port, SPRD_ICLR, iclr); | |
156 | serial_out(port, SPRD_IEN, ien); | |
157 | } | |
158 | ||
159 | static void sprd_start_tx(struct uart_port *port) | |
160 | { | |
161 | unsigned int ien; | |
162 | ||
163 | ien = serial_in(port, SPRD_IEN); | |
164 | if (!(ien & SPRD_IEN_TX_EMPTY)) { | |
165 | ien |= SPRD_IEN_TX_EMPTY; | |
166 | serial_out(port, SPRD_IEN, ien); | |
167 | } | |
168 | } | |
169 | ||
170 | static void sprd_stop_rx(struct uart_port *port) | |
171 | { | |
172 | unsigned int ien, iclr; | |
173 | ||
174 | iclr = serial_in(port, SPRD_ICLR); | |
175 | ien = serial_in(port, SPRD_IEN); | |
176 | ||
177 | ien &= ~(SPRD_IEN_RX_FULL | SPRD_IEN_BREAK_DETECT); | |
178 | iclr |= SPRD_IEN_RX_FULL | SPRD_IEN_BREAK_DETECT; | |
179 | ||
180 | serial_out(port, SPRD_IEN, ien); | |
181 | serial_out(port, SPRD_ICLR, iclr); | |
182 | } | |
183 | ||
184 | /* The Sprd serial does not support this function. */ | |
185 | static void sprd_break_ctl(struct uart_port *port, int break_state) | |
186 | { | |
187 | /* nothing to do */ | |
188 | } | |
189 | ||
190 | static int handle_lsr_errors(struct uart_port *port, | |
191 | unsigned int *flag, | |
192 | unsigned int *lsr) | |
193 | { | |
194 | int ret = 0; | |
195 | ||
196 | /* statistics */ | |
197 | if (*lsr & SPRD_LSR_BI) { | |
198 | *lsr &= ~(SPRD_LSR_FE | SPRD_LSR_PE); | |
199 | port->icount.brk++; | |
200 | ret = uart_handle_break(port); | |
201 | if (ret) | |
202 | return ret; | |
203 | } else if (*lsr & SPRD_LSR_PE) | |
204 | port->icount.parity++; | |
205 | else if (*lsr & SPRD_LSR_FE) | |
206 | port->icount.frame++; | |
207 | if (*lsr & SPRD_LSR_OE) | |
208 | port->icount.overrun++; | |
209 | ||
210 | /* mask off conditions which should be ignored */ | |
211 | *lsr &= port->read_status_mask; | |
212 | if (*lsr & SPRD_LSR_BI) | |
213 | *flag = TTY_BREAK; | |
214 | else if (*lsr & SPRD_LSR_PE) | |
215 | *flag = TTY_PARITY; | |
216 | else if (*lsr & SPRD_LSR_FE) | |
217 | *flag = TTY_FRAME; | |
218 | ||
219 | return ret; | |
220 | } | |
221 | ||
222 | static inline void sprd_rx(struct uart_port *port) | |
223 | { | |
224 | struct tty_port *tty = &port->state->port; | |
225 | unsigned int ch, flag, lsr, max_count = SPRD_TIMEOUT; | |
226 | ||
227 | while ((serial_in(port, SPRD_STS1) & 0x00ff) && max_count--) { | |
228 | lsr = serial_in(port, SPRD_LSR); | |
229 | ch = serial_in(port, SPRD_RXD); | |
230 | flag = TTY_NORMAL; | |
231 | port->icount.rx++; | |
232 | ||
233 | if (lsr & (SPRD_LSR_BI | SPRD_LSR_PE | | |
234 | SPRD_LSR_FE | SPRD_LSR_OE)) | |
235 | if (handle_lsr_errors(port, &lsr, &flag)) | |
236 | continue; | |
237 | if (uart_handle_sysrq_char(port, ch)) | |
238 | continue; | |
239 | ||
240 | uart_insert_char(port, lsr, SPRD_LSR_OE, ch, flag); | |
241 | } | |
242 | ||
243 | tty_flip_buffer_push(tty); | |
244 | } | |
245 | ||
246 | static inline void sprd_tx(struct uart_port *port) | |
247 | { | |
248 | struct circ_buf *xmit = &port->state->xmit; | |
249 | int count; | |
250 | ||
251 | if (port->x_char) { | |
252 | serial_out(port, SPRD_TXD, port->x_char); | |
253 | port->icount.tx++; | |
254 | port->x_char = 0; | |
255 | return; | |
256 | } | |
257 | ||
258 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | |
259 | sprd_stop_tx(port); | |
260 | return; | |
261 | } | |
262 | ||
263 | count = THLD_TX_EMPTY; | |
264 | do { | |
265 | serial_out(port, SPRD_TXD, xmit->buf[xmit->tail]); | |
266 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
267 | port->icount.tx++; | |
268 | if (uart_circ_empty(xmit)) | |
269 | break; | |
270 | } while (--count > 0); | |
271 | ||
272 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
273 | uart_write_wakeup(port); | |
274 | ||
275 | if (uart_circ_empty(xmit)) | |
276 | sprd_stop_tx(port); | |
277 | } | |
278 | ||
279 | /* this handles the interrupt from one port */ | |
280 | static irqreturn_t sprd_handle_irq(int irq, void *dev_id) | |
281 | { | |
282 | struct uart_port *port = dev_id; | |
283 | unsigned int ims; | |
284 | ||
285 | spin_lock(&port->lock); | |
286 | ||
287 | ims = serial_in(port, SPRD_IMSR); | |
288 | ||
c4e6dcfa AL |
289 | if (!ims) { |
290 | spin_unlock(&port->lock); | |
b7396a38 | 291 | return IRQ_NONE; |
c4e6dcfa | 292 | } |
b7396a38 | 293 | |
43507825 LL |
294 | if (ims & SPRD_IMSR_TIMEOUT) |
295 | serial_out(port, SPRD_ICLR, SPRD_ICLR_TIMEOUT); | |
b7396a38 CZ |
296 | |
297 | if (ims & (SPRD_IMSR_RX_FIFO_FULL | | |
298 | SPRD_IMSR_BREAK_DETECT | SPRD_IMSR_TIMEOUT)) | |
299 | sprd_rx(port); | |
300 | ||
301 | if (ims & SPRD_IMSR_TX_FIFO_EMPTY) | |
302 | sprd_tx(port); | |
303 | ||
304 | spin_unlock(&port->lock); | |
305 | ||
306 | return IRQ_HANDLED; | |
307 | } | |
308 | ||
309 | static int sprd_startup(struct uart_port *port) | |
310 | { | |
311 | int ret = 0; | |
312 | unsigned int ien, fc; | |
313 | unsigned int timeout; | |
314 | struct sprd_uart_port *sp; | |
315 | unsigned long flags; | |
316 | ||
317 | serial_out(port, SPRD_CTL2, ((THLD_TX_EMPTY << 8) | THLD_RX_FULL)); | |
318 | ||
319 | /* clear rx fifo */ | |
320 | timeout = SPRD_TIMEOUT; | |
321 | while (timeout-- && serial_in(port, SPRD_STS1) & 0x00ff) | |
322 | serial_in(port, SPRD_RXD); | |
323 | ||
324 | /* clear tx fifo */ | |
325 | timeout = SPRD_TIMEOUT; | |
326 | while (timeout-- && serial_in(port, SPRD_STS1) & 0xff00) | |
327 | cpu_relax(); | |
328 | ||
329 | /* clear interrupt */ | |
330 | serial_out(port, SPRD_IEN, 0); | |
331 | serial_out(port, SPRD_ICLR, ~0); | |
332 | ||
333 | /* allocate irq */ | |
334 | sp = container_of(port, struct sprd_uart_port, port); | |
335 | snprintf(sp->name, sizeof(sp->name), "sprd_serial%d", port->line); | |
336 | ret = devm_request_irq(port->dev, port->irq, sprd_handle_irq, | |
337 | IRQF_SHARED, sp->name, port); | |
338 | if (ret) { | |
339 | dev_err(port->dev, "fail to request serial irq %d, ret=%d\n", | |
340 | port->irq, ret); | |
341 | return ret; | |
342 | } | |
343 | fc = serial_in(port, SPRD_CTL1); | |
344 | fc |= RX_TOUT_THLD_DEF | RX_HFC_THLD_DEF; | |
345 | serial_out(port, SPRD_CTL1, fc); | |
346 | ||
347 | /* enable interrupt */ | |
348 | spin_lock_irqsave(&port->lock, flags); | |
349 | ien = serial_in(port, SPRD_IEN); | |
350 | ien |= SPRD_IEN_RX_FULL | SPRD_IEN_BREAK_DETECT | SPRD_IEN_TIMEOUT; | |
351 | serial_out(port, SPRD_IEN, ien); | |
352 | spin_unlock_irqrestore(&port->lock, flags); | |
353 | ||
354 | return 0; | |
355 | } | |
356 | ||
357 | static void sprd_shutdown(struct uart_port *port) | |
358 | { | |
359 | serial_out(port, SPRD_IEN, 0); | |
360 | serial_out(port, SPRD_ICLR, ~0); | |
361 | devm_free_irq(port->dev, port->irq, port); | |
362 | } | |
363 | ||
364 | static void sprd_set_termios(struct uart_port *port, | |
365 | struct ktermios *termios, | |
366 | struct ktermios *old) | |
367 | { | |
368 | unsigned int baud, quot; | |
369 | unsigned int lcr = 0, fc; | |
370 | unsigned long flags; | |
371 | ||
372 | /* ask the core to calculate the divisor for us */ | |
373 | baud = uart_get_baud_rate(port, termios, old, 0, SPRD_BAUD_IO_LIMIT); | |
374 | ||
375 | quot = (unsigned int)((port->uartclk + baud / 2) / baud); | |
376 | ||
377 | /* set data length */ | |
378 | switch (termios->c_cflag & CSIZE) { | |
379 | case CS5: | |
380 | lcr |= SPRD_LCR_DATA_LEN5; | |
381 | break; | |
382 | case CS6: | |
383 | lcr |= SPRD_LCR_DATA_LEN6; | |
384 | break; | |
385 | case CS7: | |
386 | lcr |= SPRD_LCR_DATA_LEN7; | |
387 | break; | |
388 | case CS8: | |
389 | default: | |
390 | lcr |= SPRD_LCR_DATA_LEN8; | |
391 | break; | |
392 | } | |
393 | ||
394 | /* calculate stop bits */ | |
395 | lcr &= ~(SPRD_LCR_STOP_1BIT | SPRD_LCR_STOP_2BIT); | |
396 | if (termios->c_cflag & CSTOPB) | |
397 | lcr |= SPRD_LCR_STOP_2BIT; | |
398 | else | |
399 | lcr |= SPRD_LCR_STOP_1BIT; | |
400 | ||
401 | /* calculate parity */ | |
402 | lcr &= ~SPRD_LCR_PARITY; | |
403 | termios->c_cflag &= ~CMSPAR; /* no support mark/space */ | |
404 | if (termios->c_cflag & PARENB) { | |
405 | lcr |= SPRD_LCR_PARITY_EN; | |
406 | if (termios->c_cflag & PARODD) | |
407 | lcr |= SPRD_LCR_ODD_PAR; | |
408 | else | |
409 | lcr |= SPRD_LCR_EVEN_PAR; | |
410 | } | |
411 | ||
412 | spin_lock_irqsave(&port->lock, flags); | |
413 | ||
414 | /* update the per-port timeout */ | |
415 | uart_update_timeout(port, termios->c_cflag, baud); | |
416 | ||
417 | port->read_status_mask = SPRD_LSR_OE; | |
418 | if (termios->c_iflag & INPCK) | |
419 | port->read_status_mask |= SPRD_LSR_FE | SPRD_LSR_PE; | |
420 | if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK)) | |
421 | port->read_status_mask |= SPRD_LSR_BI; | |
422 | ||
423 | /* characters to ignore */ | |
424 | port->ignore_status_mask = 0; | |
425 | if (termios->c_iflag & IGNPAR) | |
426 | port->ignore_status_mask |= SPRD_LSR_PE | SPRD_LSR_FE; | |
427 | if (termios->c_iflag & IGNBRK) { | |
428 | port->ignore_status_mask |= SPRD_LSR_BI; | |
429 | /* | |
430 | * If we're ignoring parity and break indicators, | |
431 | * ignore overruns too (for real raw support). | |
432 | */ | |
433 | if (termios->c_iflag & IGNPAR) | |
434 | port->ignore_status_mask |= SPRD_LSR_OE; | |
435 | } | |
436 | ||
437 | /* flow control */ | |
438 | fc = serial_in(port, SPRD_CTL1); | |
439 | fc &= ~(RX_HW_FLOW_CTL_THLD | RX_HW_FLOW_CTL_EN | TX_HW_FLOW_CTL_EN); | |
440 | if (termios->c_cflag & CRTSCTS) { | |
441 | fc |= RX_HW_FLOW_CTL_THLD; | |
442 | fc |= RX_HW_FLOW_CTL_EN; | |
443 | fc |= TX_HW_FLOW_CTL_EN; | |
444 | } | |
445 | ||
446 | /* clock divider bit0~bit15 */ | |
447 | serial_out(port, SPRD_CLKD0, quot & 0xffff); | |
448 | ||
449 | /* clock divider bit16~bit20 */ | |
450 | serial_out(port, SPRD_CLKD1, (quot & 0x1f0000) >> 16); | |
451 | serial_out(port, SPRD_LCR, lcr); | |
452 | fc |= RX_TOUT_THLD_DEF | RX_HFC_THLD_DEF; | |
453 | serial_out(port, SPRD_CTL1, fc); | |
454 | ||
455 | spin_unlock_irqrestore(&port->lock, flags); | |
456 | ||
457 | /* Don't rewrite B0 */ | |
458 | if (tty_termios_baud_rate(termios)) | |
459 | tty_termios_encode_baud_rate(termios, baud, baud); | |
460 | } | |
461 | ||
462 | static const char *sprd_type(struct uart_port *port) | |
463 | { | |
464 | return "SPX"; | |
465 | } | |
466 | ||
467 | static void sprd_release_port(struct uart_port *port) | |
468 | { | |
469 | /* nothing to do */ | |
470 | } | |
471 | ||
472 | static int sprd_request_port(struct uart_port *port) | |
473 | { | |
474 | return 0; | |
475 | } | |
476 | ||
477 | static void sprd_config_port(struct uart_port *port, int flags) | |
478 | { | |
479 | if (flags & UART_CONFIG_TYPE) | |
480 | port->type = PORT_SPRD; | |
481 | } | |
482 | ||
483 | static int sprd_verify_port(struct uart_port *port, | |
484 | struct serial_struct *ser) | |
485 | { | |
486 | if (ser->type != PORT_SPRD) | |
487 | return -EINVAL; | |
488 | if (port->irq != ser->irq) | |
489 | return -EINVAL; | |
7950dc58 PH |
490 | if (port->iotype != ser->io_type) |
491 | return -EINVAL; | |
b7396a38 CZ |
492 | return 0; |
493 | } | |
494 | ||
2331e068 | 495 | static const struct uart_ops serial_sprd_ops = { |
b7396a38 CZ |
496 | .tx_empty = sprd_tx_empty, |
497 | .get_mctrl = sprd_get_mctrl, | |
498 | .set_mctrl = sprd_set_mctrl, | |
499 | .stop_tx = sprd_stop_tx, | |
500 | .start_tx = sprd_start_tx, | |
501 | .stop_rx = sprd_stop_rx, | |
502 | .break_ctl = sprd_break_ctl, | |
503 | .startup = sprd_startup, | |
504 | .shutdown = sprd_shutdown, | |
505 | .set_termios = sprd_set_termios, | |
506 | .type = sprd_type, | |
507 | .release_port = sprd_release_port, | |
508 | .request_port = sprd_request_port, | |
509 | .config_port = sprd_config_port, | |
510 | .verify_port = sprd_verify_port, | |
511 | }; | |
512 | ||
513 | #ifdef CONFIG_SERIAL_SPRD_CONSOLE | |
63744a69 | 514 | static void wait_for_xmitr(struct uart_port *port) |
b7396a38 CZ |
515 | { |
516 | unsigned int status, tmout = 10000; | |
517 | ||
518 | /* wait up to 10ms for the character(s) to be sent */ | |
519 | do { | |
520 | status = serial_in(port, SPRD_STS1); | |
521 | if (--tmout == 0) | |
522 | break; | |
523 | udelay(1); | |
524 | } while (status & 0xff00); | |
525 | } | |
526 | ||
527 | static void sprd_console_putchar(struct uart_port *port, int ch) | |
528 | { | |
529 | wait_for_xmitr(port); | |
530 | serial_out(port, SPRD_TXD, ch); | |
531 | } | |
532 | ||
533 | static void sprd_console_write(struct console *co, const char *s, | |
534 | unsigned int count) | |
535 | { | |
536 | struct uart_port *port = &sprd_port[co->index]->port; | |
537 | int locked = 1; | |
538 | unsigned long flags; | |
539 | ||
540 | if (port->sysrq) | |
541 | locked = 0; | |
542 | else if (oops_in_progress) | |
543 | locked = spin_trylock_irqsave(&port->lock, flags); | |
544 | else | |
545 | spin_lock_irqsave(&port->lock, flags); | |
546 | ||
547 | uart_console_write(port, s, count, sprd_console_putchar); | |
548 | ||
549 | /* wait for transmitter to become empty */ | |
550 | wait_for_xmitr(port); | |
551 | ||
552 | if (locked) | |
553 | spin_unlock_irqrestore(&port->lock, flags); | |
554 | } | |
555 | ||
556 | static int __init sprd_console_setup(struct console *co, char *options) | |
557 | { | |
558 | struct uart_port *port; | |
559 | int baud = 115200; | |
560 | int bits = 8; | |
561 | int parity = 'n'; | |
562 | int flow = 'n'; | |
563 | ||
564 | if (co->index >= UART_NR_MAX || co->index < 0) | |
565 | co->index = 0; | |
566 | ||
567 | port = &sprd_port[co->index]->port; | |
568 | if (port == NULL) { | |
569 | pr_info("serial port %d not yet initialized\n", co->index); | |
570 | return -ENODEV; | |
571 | } | |
572 | if (options) | |
573 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
574 | ||
575 | return uart_set_options(port, co, baud, parity, bits, flow); | |
576 | } | |
577 | ||
578 | static struct uart_driver sprd_uart_driver; | |
579 | static struct console sprd_console = { | |
580 | .name = SPRD_TTY_NAME, | |
581 | .write = sprd_console_write, | |
582 | .device = uart_console_device, | |
583 | .setup = sprd_console_setup, | |
584 | .flags = CON_PRINTBUFFER, | |
585 | .index = -1, | |
586 | .data = &sprd_uart_driver, | |
587 | }; | |
588 | ||
589 | #define SPRD_CONSOLE (&sprd_console) | |
590 | ||
591 | /* Support for earlycon */ | |
592 | static void sprd_putc(struct uart_port *port, int c) | |
593 | { | |
594 | unsigned int timeout = SPRD_TIMEOUT; | |
595 | ||
596 | while (timeout-- && | |
597 | !(readl(port->membase + SPRD_LSR) & SPRD_LSR_TX_OVER)) | |
598 | cpu_relax(); | |
599 | ||
600 | writeb(c, port->membase + SPRD_TXD); | |
601 | } | |
602 | ||
603 | static void sprd_early_write(struct console *con, const char *s, | |
604 | unsigned n) | |
605 | { | |
606 | struct earlycon_device *dev = con->data; | |
607 | ||
608 | uart_console_write(&dev->port, s, n, sprd_putc); | |
609 | } | |
610 | ||
611 | static int __init sprd_early_console_setup( | |
612 | struct earlycon_device *device, | |
613 | const char *opt) | |
614 | { | |
615 | if (!device->port.membase) | |
616 | return -ENODEV; | |
617 | ||
618 | device->con->write = sprd_early_write; | |
619 | return 0; | |
620 | } | |
b7396a38 CZ |
621 | OF_EARLYCON_DECLARE(sprd_serial, "sprd,sc9836-uart", |
622 | sprd_early_console_setup); | |
623 | ||
624 | #else /* !CONFIG_SERIAL_SPRD_CONSOLE */ | |
625 | #define SPRD_CONSOLE NULL | |
626 | #endif | |
627 | ||
628 | static struct uart_driver sprd_uart_driver = { | |
629 | .owner = THIS_MODULE, | |
630 | .driver_name = "sprd_serial", | |
631 | .dev_name = SPRD_TTY_NAME, | |
632 | .major = 0, | |
633 | .minor = 0, | |
634 | .nr = UART_NR_MAX, | |
635 | .cons = SPRD_CONSOLE, | |
636 | }; | |
637 | ||
638 | static int sprd_probe_dt_alias(int index, struct device *dev) | |
639 | { | |
640 | struct device_node *np; | |
641 | int ret = index; | |
642 | ||
643 | if (!IS_ENABLED(CONFIG_OF)) | |
644 | return ret; | |
645 | ||
646 | np = dev->of_node; | |
647 | if (!np) | |
648 | return ret; | |
649 | ||
650 | ret = of_alias_get_id(np, "serial"); | |
287980e4 | 651 | if (ret < 0) |
b7396a38 CZ |
652 | ret = index; |
653 | else if (ret >= ARRAY_SIZE(sprd_port) || sprd_port[ret] != NULL) { | |
654 | dev_warn(dev, "requested serial port %d not available.\n", ret); | |
655 | ret = index; | |
656 | } | |
657 | ||
658 | return ret; | |
659 | } | |
660 | ||
661 | static int sprd_remove(struct platform_device *dev) | |
662 | { | |
663 | struct sprd_uart_port *sup = platform_get_drvdata(dev); | |
664 | ||
665 | if (sup) { | |
666 | uart_remove_one_port(&sprd_uart_driver, &sup->port); | |
667 | sprd_port[sup->port.line] = NULL; | |
668 | sprd_ports_num--; | |
669 | } | |
670 | ||
671 | if (!sprd_ports_num) | |
672 | uart_unregister_driver(&sprd_uart_driver); | |
673 | ||
674 | return 0; | |
675 | } | |
676 | ||
677 | static int sprd_probe(struct platform_device *pdev) | |
678 | { | |
679 | struct resource *res; | |
680 | struct uart_port *up; | |
681 | struct clk *clk; | |
682 | int irq; | |
683 | int index; | |
684 | int ret; | |
685 | ||
686 | for (index = 0; index < ARRAY_SIZE(sprd_port); index++) | |
687 | if (sprd_port[index] == NULL) | |
688 | break; | |
689 | ||
690 | if (index == ARRAY_SIZE(sprd_port)) | |
691 | return -EBUSY; | |
692 | ||
693 | index = sprd_probe_dt_alias(index, &pdev->dev); | |
694 | ||
695 | sprd_port[index] = devm_kzalloc(&pdev->dev, | |
696 | sizeof(*sprd_port[index]), GFP_KERNEL); | |
697 | if (!sprd_port[index]) | |
698 | return -ENOMEM; | |
699 | ||
700 | up = &sprd_port[index]->port; | |
701 | up->dev = &pdev->dev; | |
702 | up->line = index; | |
703 | up->type = PORT_SPRD; | |
7950dc58 | 704 | up->iotype = UPIO_MEM; |
b7396a38 CZ |
705 | up->uartclk = SPRD_DEF_RATE; |
706 | up->fifosize = SPRD_FIFO_SIZE; | |
707 | up->ops = &serial_sprd_ops; | |
708 | up->flags = UPF_BOOT_AUTOCONF; | |
709 | ||
710 | clk = devm_clk_get(&pdev->dev, NULL); | |
ff0daa1c | 711 | if (!IS_ERR_OR_NULL(clk)) |
b7396a38 CZ |
712 | up->uartclk = clk_get_rate(clk); |
713 | ||
714 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
715 | if (!res) { | |
716 | dev_err(&pdev->dev, "not provide mem resource\n"); | |
717 | return -ENODEV; | |
718 | } | |
719 | up->mapbase = res->start; | |
720 | up->membase = devm_ioremap_resource(&pdev->dev, res); | |
721 | if (IS_ERR(up->membase)) | |
722 | return PTR_ERR(up->membase); | |
723 | ||
724 | irq = platform_get_irq(pdev, 0); | |
725 | if (irq < 0) { | |
ec085c5a GS |
726 | dev_err(&pdev->dev, "not provide irq resource: %d\n", irq); |
727 | return irq; | |
b7396a38 CZ |
728 | } |
729 | up->irq = irq; | |
730 | ||
731 | if (!sprd_ports_num) { | |
732 | ret = uart_register_driver(&sprd_uart_driver); | |
733 | if (ret < 0) { | |
734 | pr_err("Failed to register SPRD-UART driver\n"); | |
735 | return ret; | |
736 | } | |
737 | } | |
738 | sprd_ports_num++; | |
739 | ||
740 | ret = uart_add_one_port(&sprd_uart_driver, up); | |
741 | if (ret) { | |
742 | sprd_port[index] = NULL; | |
743 | sprd_remove(pdev); | |
744 | } | |
745 | ||
746 | platform_set_drvdata(pdev, up); | |
747 | ||
748 | return ret; | |
749 | } | |
750 | ||
b51e3f5a | 751 | #ifdef CONFIG_PM_SLEEP |
b7396a38 CZ |
752 | static int sprd_suspend(struct device *dev) |
753 | { | |
754 | struct sprd_uart_port *sup = dev_get_drvdata(dev); | |
755 | ||
756 | uart_suspend_port(&sprd_uart_driver, &sup->port); | |
757 | ||
758 | return 0; | |
759 | } | |
760 | ||
761 | static int sprd_resume(struct device *dev) | |
762 | { | |
763 | struct sprd_uart_port *sup = dev_get_drvdata(dev); | |
764 | ||
765 | uart_resume_port(&sprd_uart_driver, &sup->port); | |
766 | ||
767 | return 0; | |
768 | } | |
b51e3f5a | 769 | #endif |
b7396a38 CZ |
770 | |
771 | static SIMPLE_DEV_PM_OPS(sprd_pm_ops, sprd_suspend, sprd_resume); | |
772 | ||
773 | static const struct of_device_id serial_ids[] = { | |
774 | {.compatible = "sprd,sc9836-uart",}, | |
775 | {} | |
776 | }; | |
7edb23ce | 777 | MODULE_DEVICE_TABLE(of, serial_ids); |
b7396a38 CZ |
778 | |
779 | static struct platform_driver sprd_platform_driver = { | |
780 | .probe = sprd_probe, | |
781 | .remove = sprd_remove, | |
782 | .driver = { | |
783 | .name = "sprd_serial", | |
784 | .of_match_table = of_match_ptr(serial_ids), | |
785 | .pm = &sprd_pm_ops, | |
786 | }, | |
787 | }; | |
788 | ||
789 | module_platform_driver(sprd_platform_driver); | |
790 | ||
791 | MODULE_LICENSE("GPL v2"); | |
792 | MODULE_DESCRIPTION("Spreadtrum SoC serial driver series"); |