Commit | Line | Data |
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e3b3d0f5 | 1 | // SPDX-License-Identifier: GPL-2.0 |
e4ac92df JP |
2 | #ifndef __SAMSUNG_H |
3 | #define __SAMSUNG_H | |
4 | ||
99edb3d1 | 5 | /* |
b497549a BD |
6 | * Driver for Samsung SoC onboard UARTs. |
7 | * | |
ccae941e | 8 | * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics |
b497549a | 9 | * http://armlinux.simtec.co.uk/ |
b497549a BD |
10 | */ |
11 | ||
7bb6b2f6 RB |
12 | #include <linux/dmaengine.h> |
13 | ||
b497549a BD |
14 | struct s3c24xx_uart_info { |
15 | char *name; | |
16 | unsigned int type; | |
17 | unsigned int fifosize; | |
18 | unsigned long rx_fifomask; | |
19 | unsigned long rx_fifoshift; | |
20 | unsigned long rx_fifofull; | |
21 | unsigned long tx_fifomask; | |
22 | unsigned long tx_fifoshift; | |
23 | unsigned long tx_fifofull; | |
5f5a7a55 TA |
24 | unsigned int def_clk_sel; |
25 | unsigned long num_clks; | |
26 | unsigned long clksel_mask; | |
27 | unsigned long clksel_shift; | |
b497549a | 28 | |
090f848d BD |
29 | /* uart port features */ |
30 | ||
31 | unsigned int has_divslot:1; | |
32 | ||
b497549a BD |
33 | /* uart controls */ |
34 | int (*reset_port)(struct uart_port *, struct s3c2410_uartcfg *); | |
35 | }; | |
36 | ||
da121506 TA |
37 | struct s3c24xx_serial_drv_data { |
38 | struct s3c24xx_uart_info *info; | |
39 | struct s3c2410_uartcfg *def_cfg; | |
40 | unsigned int fifosize[CONFIG_SERIAL_SAMSUNG_UARTS]; | |
41 | }; | |
42 | ||
7bb6b2f6 | 43 | struct s3c24xx_uart_dma { |
7bb6b2f6 RB |
44 | unsigned int rx_chan_id; |
45 | unsigned int tx_chan_id; | |
46 | ||
47 | struct dma_slave_config rx_conf; | |
48 | struct dma_slave_config tx_conf; | |
49 | ||
50 | struct dma_chan *rx_chan; | |
51 | struct dma_chan *tx_chan; | |
52 | ||
53 | dma_addr_t rx_addr; | |
54 | dma_addr_t tx_addr; | |
55 | ||
56 | dma_cookie_t rx_cookie; | |
57 | dma_cookie_t tx_cookie; | |
58 | ||
59 | char *rx_buf; | |
60 | ||
61 | dma_addr_t tx_transfer_addr; | |
62 | ||
63 | size_t rx_size; | |
64 | size_t tx_size; | |
65 | ||
66 | struct dma_async_tx_descriptor *tx_desc; | |
67 | struct dma_async_tx_descriptor *rx_desc; | |
68 | ||
69 | int tx_bytes_requested; | |
70 | int rx_bytes_requested; | |
71 | }; | |
72 | ||
b497549a BD |
73 | struct s3c24xx_uart_port { |
74 | unsigned char rx_claimed; | |
75 | unsigned char tx_claimed; | |
30555476 BD |
76 | unsigned int pm_level; |
77 | unsigned long baudclk_rate; | |
81ccb2a6 | 78 | unsigned int min_dma_size; |
b497549a | 79 | |
b73c289c BD |
80 | unsigned int rx_irq; |
81 | unsigned int tx_irq; | |
82 | ||
29bef799 RB |
83 | unsigned int tx_in_progress; |
84 | unsigned int tx_mode; | |
b543c301 | 85 | unsigned int rx_mode; |
29bef799 | 86 | |
b497549a | 87 | struct s3c24xx_uart_info *info; |
b497549a BD |
88 | struct clk *clk; |
89 | struct clk *baudclk; | |
90 | struct uart_port port; | |
da121506 | 91 | struct s3c24xx_serial_drv_data *drv_data; |
30555476 | 92 | |
4d84e970 TA |
93 | /* reference to platform data */ |
94 | struct s3c2410_uartcfg *cfg; | |
95 | ||
7bb6b2f6 RB |
96 | struct s3c24xx_uart_dma *dma; |
97 | ||
ebaa81c7 | 98 | #ifdef CONFIG_ARM_S3C24XX_CPUFREQ |
30555476 BD |
99 | struct notifier_block freq_transition; |
100 | #endif | |
b497549a BD |
101 | }; |
102 | ||
103 | /* conversion functions */ | |
104 | ||
d4aab206 | 105 | #define s3c24xx_dev_to_port(__dev) dev_get_drvdata(__dev) |
b497549a BD |
106 | |
107 | /* register access controls */ | |
108 | ||
109 | #define portaddr(port, reg) ((port)->membase + (reg)) | |
9fdedf5d JH |
110 | #define portaddrl(port, reg) \ |
111 | ((unsigned long *)(unsigned long)((port)->membase + (reg))) | |
b497549a | 112 | |
e37697b3 ML |
113 | #define rd_regb(port, reg) (readb_relaxed(portaddr(port, reg))) |
114 | #define rd_regl(port, reg) (readl_relaxed(portaddr(port, reg))) | |
b497549a | 115 | |
e37697b3 ML |
116 | #define wr_regb(port, reg, val) writeb_relaxed(val, portaddr(port, reg)) |
117 | #define wr_regl(port, reg, val) writel_relaxed(val, portaddr(port, reg)) | |
b497549a | 118 | |
bbb5ff91 ML |
119 | /* Byte-order aware bit setting/clearing functions. */ |
120 | ||
121 | static inline void s3c24xx_set_bit(struct uart_port *port, int idx, | |
122 | unsigned int reg) | |
123 | { | |
124 | unsigned long flags; | |
125 | u32 val; | |
126 | ||
127 | local_irq_save(flags); | |
128 | val = rd_regl(port, reg); | |
129 | val |= (1 << idx); | |
130 | wr_regl(port, reg, val); | |
131 | local_irq_restore(flags); | |
132 | } | |
133 | ||
134 | static inline void s3c24xx_clear_bit(struct uart_port *port, int idx, | |
135 | unsigned int reg) | |
136 | { | |
137 | unsigned long flags; | |
138 | u32 val; | |
139 | ||
140 | local_irq_save(flags); | |
141 | val = rd_regl(port, reg); | |
142 | val &= ~(1 << idx); | |
143 | wr_regl(port, reg, val); | |
144 | local_irq_restore(flags); | |
145 | } | |
146 | ||
b497549a | 147 | #endif |