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tty: add SPDX identifiers to all remaining files in drivers/tty/
[linux-block.git] / drivers / tty / serial / sa1100.c
CommitLineData
e3b3d0f5 1// SPDX-License-Identifier: GPL-2.0+
1da177e4 2/*
1da177e4
LT		 3 * Driver for SA11x0 serial ports
4 *
5 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
6 *
7 * Copyright (C) 2000 Deep Blue Solutions Ltd.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
1da177e4 22 */
1da177e4
LT		 23
24#if defined(CONFIG_SERIAL_SA1100_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
25#define SUPPORT_SYSRQ
26#endif
27
28#include <linux/module.h>
29#include <linux/ioport.h>
30#include <linux/init.h>
31#include <linux/console.h>
32#include <linux/sysrq.h>
6920b5a7 33#include <linux/platform_data/sa11x0-serial.h>
d052d1be 34#include <linux/platform_device.h>
1da177e4
LT		 35#include <linux/tty.h>
36#include <linux/tty_flip.h>
37#include <linux/serial_core.h>
38#include <linux/serial.h>
99730225 39#include <linux/io.h>
1da177e4 40
1da177e4 41#include <asm/irq.h>
a09e64fb 42#include <mach/hardware.h>
f314f33b 43#include <mach/irqs.h>
1da177e4
LT		 44
45/* We've been assigned a range on the "Low-density serial ports" major */
46#define SERIAL_SA1100_MAJOR 204
47#define MINOR_START 5
48
49#define NR_PORTS 3
50
51#define SA1100_ISR_PASS_LIMIT 256
52
53/*
54 * Convert from ignore_status_mask or read_status_mask to UTSR[01]
55 */
56#define SM_TO_UTSR0(x) ((x) & 0xff)
57#define SM_TO_UTSR1(x) ((x) >> 8)
58#define UTSR0_TO_SM(x) ((x))
59#define UTSR1_TO_SM(x) ((x) << 8)
60
61#define UART_GET_UTCR0(sport) __raw_readl((sport)->port.membase + UTCR0)
62#define UART_GET_UTCR1(sport) __raw_readl((sport)->port.membase + UTCR1)
63#define UART_GET_UTCR2(sport) __raw_readl((sport)->port.membase + UTCR2)
64#define UART_GET_UTCR3(sport) __raw_readl((sport)->port.membase + UTCR3)
65#define UART_GET_UTSR0(sport) __raw_readl((sport)->port.membase + UTSR0)
66#define UART_GET_UTSR1(sport) __raw_readl((sport)->port.membase + UTSR1)
67#define UART_GET_CHAR(sport) __raw_readl((sport)->port.membase + UTDR)
68
69#define UART_PUT_UTCR0(sport,v) __raw_writel((v),(sport)->port.membase + UTCR0)
70#define UART_PUT_UTCR1(sport,v) __raw_writel((v),(sport)->port.membase + UTCR1)
71#define UART_PUT_UTCR2(sport,v) __raw_writel((v),(sport)->port.membase + UTCR2)
72#define UART_PUT_UTCR3(sport,v) __raw_writel((v),(sport)->port.membase + UTCR3)
73#define UART_PUT_UTSR0(sport,v) __raw_writel((v),(sport)->port.membase + UTSR0)
74#define UART_PUT_UTSR1(sport,v) __raw_writel((v),(sport)->port.membase + UTSR1)
75#define UART_PUT_CHAR(sport,v) __raw_writel((v),(sport)->port.membase + UTDR)
76
77/*
78 * This is the size of our serial port register set.
79 */
80#define UART_PORT_SIZE 0x24
81
82/*
83 * This determines how often we check the modem status signals
84 * for any change. They generally aren't connected to an IRQ
85 * so we have to poll them. We also check immediately before
86 * filling the TX fifo incase CTS has been dropped.
87 */
88#define MCTRL_TIMEOUT (250*HZ/1000)
89
90struct sa1100_port {
91 struct uart_port port;
92 struct timer_list timer;
93 unsigned int old_status;
94};
95
96/*
97 * Handle any change of modem status signal since we were last called.
98 */
99static void sa1100_mctrl_check(struct sa1100_port *sport)
100{
101 unsigned int status, changed;
102
103 status = sport->port.ops->get_mctrl(&sport->port);
104 changed = status ^ sport->old_status;
105
106 if (changed == 0)
107 return;
108
109 sport->old_status = status;
110
111 if (changed & TIOCM_RI)
112 sport->port.icount.rng++;
113 if (changed & TIOCM_DSR)
114 sport->port.icount.dsr++;
115 if (changed & TIOCM_CAR)
116 uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
117 if (changed & TIOCM_CTS)
118 uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
119
bdc04e31 120 wake_up_interruptible(&sport->port.state->port.delta_msr_wait);
1da177e4
LT		 121}
122
123/*
124 * This is our per-port timeout handler, for checking the
125 * modem status signals.
126 */
127static void sa1100_timeout(unsigned long data)
128{
129 struct sa1100_port *sport = (struct sa1100_port *)data;
130 unsigned long flags;
131
ebd2c8f6 132 if (sport->port.state) {
1da177e4
LT		 133 spin_lock_irqsave(&sport->port.lock, flags);
134 sa1100_mctrl_check(sport);
135 spin_unlock_irqrestore(&sport->port.lock, flags);
136
137 mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
138 }
139}
140
141/*
142 * interrupts disabled on entry
143 */
b129a8cc 144static void sa1100_stop_tx(struct uart_port *port)
1da177e4 145{
c9db776b
FF		 146 struct sa1100_port *sport =
147 container_of(port, struct sa1100_port, port);
1da177e4
LT		 148 u32 utcr3;
149
150 utcr3 = UART_GET_UTCR3(sport);
151 UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_TIE);
152 sport->port.read_status_mask &= ~UTSR0_TO_SM(UTSR0_TFS);
153}
154
155/*
270c7a72 156 * port locked and interrupts disabled
1da177e4 157 */
b129a8cc 158static void sa1100_start_tx(struct uart_port *port)
1da177e4 159{
c9db776b
FF		 160 struct sa1100_port *sport =
161 container_of(port, struct sa1100_port, port);
1da177e4
LT		 162 u32 utcr3;
163
1da177e4
LT		 164 utcr3 = UART_GET_UTCR3(sport);
165 sport->port.read_status_mask |= UTSR0_TO_SM(UTSR0_TFS);
166 UART_PUT_UTCR3(sport, utcr3 | UTCR3_TIE);
1da177e4
LT		 167}
168
169/*
170 * Interrupts enabled
171 */
172static void sa1100_stop_rx(struct uart_port *port)
173{
c9db776b
FF		 174 struct sa1100_port *sport =
175 container_of(port, struct sa1100_port, port);
1da177e4
LT		 176 u32 utcr3;
177
178 utcr3 = UART_GET_UTCR3(sport);
179 UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_RIE);
180}
181
182/*
183 * Set the modem control timer to fire immediately.
184 */
185static void sa1100_enable_ms(struct uart_port *port)
186{
c9db776b
FF		 187 struct sa1100_port *sport =
188 container_of(port, struct sa1100_port, port);
1da177e4
LT		 189
190 mod_timer(&sport->timer, jiffies);
191}
192
193static void
7d12e780 194sa1100_rx_chars(struct sa1100_port *sport)
1da177e4 195{
ff39bc77 196 unsigned int status, ch, flg;
1da177e4
LT		 197
198 status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
199 UTSR0_TO_SM(UART_GET_UTSR0(sport));
200 while (status & UTSR1_TO_SM(UTSR1_RNE)) {
201 ch = UART_GET_CHAR(sport);
202
1da177e4
LT		 203 sport->port.icount.rx++;
204
205 flg = TTY_NORMAL;
206
207 /*
208 * note that the error handling code is
209 * out of the main execution path
210 */
2a9604b8
RK		 211 if (status & UTSR1_TO_SM(UTSR1_PRE | UTSR1_FRE | UTSR1_ROR)) {
212 if (status & UTSR1_TO_SM(UTSR1_PRE))
213 sport->port.icount.parity++;
214 else if (status & UTSR1_TO_SM(UTSR1_FRE))
215 sport->port.icount.frame++;
216 if (status & UTSR1_TO_SM(UTSR1_ROR))
217 sport->port.icount.overrun++;
218
219 status &= sport->port.read_status_mask;
220
221 if (status & UTSR1_TO_SM(UTSR1_PRE))
222 flg = TTY_PARITY;
223 else if (status & UTSR1_TO_SM(UTSR1_FRE))
224 flg = TTY_FRAME;
225
226#ifdef SUPPORT_SYSRQ
227 sport->port.sysrq = 0;
228#endif
229 }
1da177e4 230
7d12e780 231 if (uart_handle_sysrq_char(&sport->port, ch))
1da177e4
LT		 232 goto ignore_char;
233
05ab3014 234 uart_insert_char(&sport->port, status, UTSR1_TO_SM(UTSR1_ROR), ch, flg);
2a9604b8 235
1da177e4
LT		 236 ignore_char:
237 status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
238 UTSR0_TO_SM(UART_GET_UTSR0(sport));
239 }
53e0e670
VK		 240
241 spin_unlock(&sport->port.lock);
2e124b4a 242 tty_flip_buffer_push(&sport->port.state->port);
53e0e670 243 spin_lock(&sport->port.lock);
1da177e4
LT		 244}
245
246static void sa1100_tx_chars(struct sa1100_port *sport)
247{
ebd2c8f6 248 struct circ_buf *xmit = &sport->port.state->xmit;
1da177e4
LT		 249
250 if (sport->port.x_char) {
251 UART_PUT_CHAR(sport, sport->port.x_char);
252 sport->port.icount.tx++;
253 sport->port.x_char = 0;
254 return;
255 }
256
257 /*
258 * Check the modem control lines before
259 * transmitting anything.
260 */
261 sa1100_mctrl_check(sport);
262
263 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
b129a8cc 264 sa1100_stop_tx(&sport->port);
1da177e4
LT		 265 return;
266 }
267
268 /*
269 * Tried using FIFO (not checking TNF) for fifo fill:
270 * still had the '4 bytes repeated' problem.
271 */
272 while (UART_GET_UTSR1(sport) & UTSR1_TNF) {
273 UART_PUT_CHAR(sport, xmit->buf[xmit->tail]);
274 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
275 sport->port.icount.tx++;
276 if (uart_circ_empty(xmit))
277 break;
278 }
279
280 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
281 uart_write_wakeup(&sport->port);
282
283 if (uart_circ_empty(xmit))
b129a8cc 284 sa1100_stop_tx(&sport->port);
1da177e4
LT		 285}
286
7d12e780 287static irqreturn_t sa1100_int(int irq, void *dev_id)
1da177e4
LT		 288{
289 struct sa1100_port *sport = dev_id;
290 unsigned int status, pass_counter = 0;
291
292 spin_lock(&sport->port.lock);
293 status = UART_GET_UTSR0(sport);
294 status &= SM_TO_UTSR0(sport->port.read_status_mask) | ~UTSR0_TFS;
295 do {
296 if (status & (UTSR0_RFS | UTSR0_RID)) {
297 /* Clear the receiver idle bit, if set */
298 if (status & UTSR0_RID)
299 UART_PUT_UTSR0(sport, UTSR0_RID);
7d12e780 300 sa1100_rx_chars(sport);
1da177e4
LT		 301 }
302
303 /* Clear the relevant break bits */
304 if (status & (UTSR0_RBB | UTSR0_REB))
305 UART_PUT_UTSR0(sport, status & (UTSR0_RBB | UTSR0_REB));
306
307 if (status & UTSR0_RBB)
308 sport->port.icount.brk++;
309
310 if (status & UTSR0_REB)
311 uart_handle_break(&sport->port);
312
313 if (status & UTSR0_TFS)
314 sa1100_tx_chars(sport);
315 if (pass_counter++ > SA1100_ISR_PASS_LIMIT)
316 break;
317 status = UART_GET_UTSR0(sport);
318 status &= SM_TO_UTSR0(sport->port.read_status_mask) |
319 ~UTSR0_TFS;
320 } while (status & (UTSR0_TFS | UTSR0_RFS | UTSR0_RID));
321 spin_unlock(&sport->port.lock);
322
323 return IRQ_HANDLED;
324}
325
326/*
327 * Return TIOCSER_TEMT when transmitter is not busy.
328 */
329static unsigned int sa1100_tx_empty(struct uart_port *port)
330{
c9db776b
FF		 331 struct sa1100_port *sport =
332 container_of(port, struct sa1100_port, port);
1da177e4
LT		 333
334 return UART_GET_UTSR1(sport) & UTSR1_TBY ? 0 : TIOCSER_TEMT;
335}
336
337static unsigned int sa1100_get_mctrl(struct uart_port *port)
338{
339 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
340}
341
342static void sa1100_set_mctrl(struct uart_port *port, unsigned int mctrl)
343{
344}
345
346/*
347 * Interrupts always disabled.
348 */
349static void sa1100_break_ctl(struct uart_port *port, int break_state)
350{
c9db776b
FF		 351 struct sa1100_port *sport =
352 container_of(port, struct sa1100_port, port);
1da177e4
LT		 353 unsigned long flags;
354 unsigned int utcr3;
355
356 spin_lock_irqsave(&sport->port.lock, flags);
357 utcr3 = UART_GET_UTCR3(sport);
358 if (break_state == -1)
359 utcr3 |= UTCR3_BRK;
360 else
361 utcr3 &= ~UTCR3_BRK;
362 UART_PUT_UTCR3(sport, utcr3);
363 spin_unlock_irqrestore(&sport->port.lock, flags);
364}
365
366static int sa1100_startup(struct uart_port *port)
367{
c9db776b
FF		 368 struct sa1100_port *sport =
369 container_of(port, struct sa1100_port, port);
1da177e4
LT		 370 int retval;
371
372 /*
373 * Allocate the IRQ
374 */
375 retval = request_irq(sport->port.irq, sa1100_int, 0,
376 "sa11x0-uart", sport);
377 if (retval)
378 return retval;
379
380 /*
381 * Finally, clear and enable interrupts
382 */
383 UART_PUT_UTSR0(sport, -1);
384 UART_PUT_UTCR3(sport, UTCR3_RXE | UTCR3_TXE | UTCR3_RIE);
385
386 /*
387 * Enable modem status interrupts
388 */
389 spin_lock_irq(&sport->port.lock);
390 sa1100_enable_ms(&sport->port);
391 spin_unlock_irq(&sport->port.lock);
392
393 return 0;
394}
395
396static void sa1100_shutdown(struct uart_port *port)
397{
c9db776b
FF		 398 struct sa1100_port *sport =
399 container_of(port, struct sa1100_port, port);
1da177e4
LT		 400
401 /*
402 * Stop our timer.
403 */
404 del_timer_sync(&sport->timer);
405
406 /*
407 * Free the interrupt
408 */
409 free_irq(sport->port.irq, sport);
410
411 /*
412 * Disable all interrupts, port and break condition.
413 */
414 UART_PUT_UTCR3(sport, 0);
415}
416
417static void
606d099c
AC		 418sa1100_set_termios(struct uart_port *port, struct ktermios *termios,
419 struct ktermios *old)
1da177e4 420{
c9db776b
FF		 421 struct sa1100_port *sport =
422 container_of(port, struct sa1100_port, port);
1da177e4
LT		 423 unsigned long flags;
424 unsigned int utcr0, old_utcr3, baud, quot;
425 unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
426
427 /*
428 * We only support CS7 and CS8.
429 */
430 while ((termios->c_cflag & CSIZE) != CS7 &&
431 (termios->c_cflag & CSIZE) != CS8) {
432 termios->c_cflag &= ~CSIZE;
433 termios->c_cflag |= old_csize;
434 old_csize = CS8;
435 }
436
437 if ((termios->c_cflag & CSIZE) == CS8)
438 utcr0 = UTCR0_DSS;
439 else
440 utcr0 = 0;
441
442 if (termios->c_cflag & CSTOPB)
443 utcr0 |= UTCR0_SBS;
444 if (termios->c_cflag & PARENB) {
445 utcr0 |= UTCR0_PE;
446 if (!(termios->c_cflag & PARODD))
447 utcr0 |= UTCR0_OES;
448 }
449
450 /*
451 * Ask the core to calculate the divisor for us.
452 */
453 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
454 quot = uart_get_divisor(port, baud);
455
456 spin_lock_irqsave(&sport->port.lock, flags);
457
458 sport->port.read_status_mask &= UTSR0_TO_SM(UTSR0_TFS);
459 sport->port.read_status_mask |= UTSR1_TO_SM(UTSR1_ROR);
460 if (termios->c_iflag & INPCK)
461 sport->port.read_status_mask |=
462 UTSR1_TO_SM(UTSR1_FRE | UTSR1_PRE);
463 if (termios->c_iflag & (BRKINT | PARMRK))
464 sport->port.read_status_mask |=
465 UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB);
466
467 /*
468 * Characters to ignore
469 */
470 sport->port.ignore_status_mask = 0;
471 if (termios->c_iflag & IGNPAR)
472 sport->port.ignore_status_mask |=
473 UTSR1_TO_SM(UTSR1_FRE | UTSR1_PRE);
474 if (termios->c_iflag & IGNBRK) {
475 sport->port.ignore_status_mask |=
476 UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB);
477 /*
478 * If we're ignoring parity and break indicators,
479 * ignore overruns too (for real raw support).
480 */
481 if (termios->c_iflag & IGNPAR)
482 sport->port.ignore_status_mask |=
483 UTSR1_TO_SM(UTSR1_ROR);
484 }
485
486 del_timer_sync(&sport->timer);
487
488 /*
489 * Update the per-port timeout.
490 */
491 uart_update_timeout(port, termios->c_cflag, baud);
492
493 /*
494 * disable interrupts and drain transmitter
495 */
496 old_utcr3 = UART_GET_UTCR3(sport);
497 UART_PUT_UTCR3(sport, old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE));
498
499 while (UART_GET_UTSR1(sport) & UTSR1_TBY)
500 barrier();
501
502 /* then, disable everything */
503 UART_PUT_UTCR3(sport, 0);
504
505 /* set the parity, stop bits and data size */
506 UART_PUT_UTCR0(sport, utcr0);
507
508 /* set the baud rate */
509 quot -= 1;
510 UART_PUT_UTCR1(sport, ((quot & 0xf00) >> 8));
511 UART_PUT_UTCR2(sport, (quot & 0xff));
512
513 UART_PUT_UTSR0(sport, -1);
514
515 UART_PUT_UTCR3(sport, old_utcr3);
516
517 if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
518 sa1100_enable_ms(&sport->port);
519
520 spin_unlock_irqrestore(&sport->port.lock, flags);
521}
522
523static const char *sa1100_type(struct uart_port *port)
524{
c9db776b
FF		 525 struct sa1100_port *sport =
526 container_of(port, struct sa1100_port, port);
1da177e4
LT		 527
528 return sport->port.type == PORT_SA1100 ? "SA1100" : NULL;
529}
530
531/*
532 * Release the memory region(s) being used by 'port'.
533 */
534static void sa1100_release_port(struct uart_port *port)
535{
c9db776b
FF		 536 struct sa1100_port *sport =
537 container_of(port, struct sa1100_port, port);
1da177e4
LT		 538
539 release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
540}
541
542/*
543 * Request the memory region(s) being used by 'port'.
544 */
545static int sa1100_request_port(struct uart_port *port)
546{
c9db776b
FF		 547 struct sa1100_port *sport =
548 container_of(port, struct sa1100_port, port);
1da177e4
LT		 549
550 return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
551 "sa11x0-uart") != NULL ? 0 : -EBUSY;
552}
553
554/*
555 * Configure/autoconfigure the port.
556 */
557static void sa1100_config_port(struct uart_port *port, int flags)
558{
c9db776b
FF		 559 struct sa1100_port *sport =
560 container_of(port, struct sa1100_port, port);
1da177e4
LT		 561
562 if (flags & UART_CONFIG_TYPE &&
563 sa1100_request_port(&sport->port) == 0)
564 sport->port.type = PORT_SA1100;
565}
566
567/*
568 * Verify the new serial_struct (for TIOCSSERIAL).
569 * The only change we allow are to the flags and type, and
570 * even then only between PORT_SA1100 and PORT_UNKNOWN
571 */
572static int
573sa1100_verify_port(struct uart_port *port, struct serial_struct *ser)
574{
c9db776b
FF		 575 struct sa1100_port *sport =
576 container_of(port, struct sa1100_port, port);
1da177e4
LT		 577 int ret = 0;
578
579 if (ser->type != PORT_UNKNOWN && ser->type != PORT_SA1100)
580 ret = -EINVAL;
581 if (sport->port.irq != ser->irq)
582 ret = -EINVAL;
583 if (ser->io_type != SERIAL_IO_MEM)
584 ret = -EINVAL;
585 if (sport->port.uartclk / 16 != ser->baud_base)
586 ret = -EINVAL;
587 if ((void *)sport->port.mapbase != ser->iomem_base)
588 ret = -EINVAL;
589 if (sport->port.iobase != ser->port)
590 ret = -EINVAL;
591 if (ser->hub6 != 0)
592 ret = -EINVAL;
593 return ret;
594}
595
596static struct uart_ops sa1100_pops = {
597 .tx_empty = sa1100_tx_empty,
598 .set_mctrl = sa1100_set_mctrl,
599 .get_mctrl = sa1100_get_mctrl,
600 .stop_tx = sa1100_stop_tx,
601 .start_tx = sa1100_start_tx,
602 .stop_rx = sa1100_stop_rx,
603 .enable_ms = sa1100_enable_ms,
604 .break_ctl = sa1100_break_ctl,
605 .startup = sa1100_startup,
606 .shutdown = sa1100_shutdown,
607 .set_termios = sa1100_set_termios,
608 .type = sa1100_type,
609 .release_port = sa1100_release_port,
610 .request_port = sa1100_request_port,
611 .config_port = sa1100_config_port,
612 .verify_port = sa1100_verify_port,
613};
614
615static struct sa1100_port sa1100_ports[NR_PORTS];
616
617/*
618 * Setup the SA1100 serial ports. Note that we don't include the IrDA
619 * port here since we have our own SIR/FIR driver (see drivers/net/irda)
620 *
621 * Note also that we support "console=ttySAx" where "x" is either 0 or 1.
622 * Which serial port this ends up being depends on the machine you're
623 * running this kernel on. I'm not convinced that this is a good idea,
624 * but that's the way it traditionally works.
625 *
626 * Note that NanoEngine UART3 becomes UART2, and UART2 is no longer
627 * used here.
628 */
629static void __init sa1100_init_ports(void)
630{
631 static int first = 1;
632 int i;
633
634 if (!first)
635 return;
636 first = 0;
637
638 for (i = 0; i < NR_PORTS; i++) {
639 sa1100_ports[i].port.uartclk = 3686400;
640 sa1100_ports[i].port.ops = &sa1100_pops;
641 sa1100_ports[i].port.fifosize = 8;
642 sa1100_ports[i].port.line = i;
9b4a1617 643 sa1100_ports[i].port.iotype = UPIO_MEM;
3b837fa2
AP		 644 setup_timer(&sa1100_ports[i].timer, sa1100_timeout,
645 (unsigned long)&sa1100_ports[i]);
1da177e4
LT		 646 }
647
648 /*
649 * make transmit lines outputs, so that when the port
650 * is closed, the output is in the MARK state.
651 */
652 PPDR |= PPC_TXD1 | PPC_TXD3;
653 PPSR |= PPC_TXD1 | PPC_TXD3;
654}
655
9671f099 656void sa1100_register_uart_fns(struct sa1100_port_fns *fns)
1da177e4
LT		 657{
658 if (fns->get_mctrl)
659 sa1100_pops.get_mctrl = fns->get_mctrl;
660 if (fns->set_mctrl)
661 sa1100_pops.set_mctrl = fns->set_mctrl;
662
663 sa1100_pops.pm = fns->pm;
adedb750
LW		 664 /*
665 * FIXME: fns->set_wake is unused - this should be called from
666 * the suspend() callback if device_may_wakeup(dev)) is set.
667 */
1da177e4
LT		 668}
669
670void __init sa1100_register_uart(int idx, int port)
671{
672 if (idx >= NR_PORTS) {
71cc2c21 673 printk(KERN_ERR "%s: bad index number %d\n", __func__, idx);
1da177e4
LT		 674 return;
675 }
676
677 switch (port) {
678 case 1:
679 sa1100_ports[idx].port.membase = (void __iomem *)&Ser1UTCR0;
680 sa1100_ports[idx].port.mapbase = _Ser1UTCR0;
681 sa1100_ports[idx].port.irq = IRQ_Ser1UART;
ce8337cb 682 sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
1da177e4
LT		 683 break;
684
685 case 2:
686 sa1100_ports[idx].port.membase = (void __iomem *)&Ser2UTCR0;
687 sa1100_ports[idx].port.mapbase = _Ser2UTCR0;
688 sa1100_ports[idx].port.irq = IRQ_Ser2ICP;
ce8337cb 689 sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
1da177e4
LT		 690 break;
691
692 case 3:
693 sa1100_ports[idx].port.membase = (void __iomem *)&Ser3UTCR0;
694 sa1100_ports[idx].port.mapbase = _Ser3UTCR0;
695 sa1100_ports[idx].port.irq = IRQ_Ser3UART;
ce8337cb 696 sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
1da177e4
LT		 697 break;
698
699 default:
71cc2c21 700 printk(KERN_ERR "%s: bad port number %d\n", __func__, port);
1da177e4
LT		 701 }
702}
703
704
705#ifdef CONFIG_SERIAL_SA1100_CONSOLE
d358788f
RK		 706static void sa1100_console_putchar(struct uart_port *port, int ch)
707{
c9db776b
FF		 708 struct sa1100_port *sport =
709 container_of(port, struct sa1100_port, port);
d358788f
RK		 710
711 while (!(UART_GET_UTSR1(sport) & UTSR1_TNF))
712 barrier();
713 UART_PUT_CHAR(sport, ch);
714}
1da177e4
LT		 715
716/*
717 * Interrupts are disabled on entering
718 */
719static void
720sa1100_console_write(struct console *co, const char *s, unsigned int count)
721{
722 struct sa1100_port *sport = &sa1100_ports[co->index];
d358788f 723 unsigned int old_utcr3, status;
1da177e4
LT		 724
725 /*
726 * First, save UTCR3 and then disable interrupts
727 */
728 old_utcr3 = UART_GET_UTCR3(sport);
729 UART_PUT_UTCR3(sport, (old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE)) |
730 UTCR3_TXE);
731
d358788f 732 uart_console_write(&sport->port, s, count, sa1100_console_putchar);
1da177e4
LT		 733
734 /*
735 * Finally, wait for transmitter to become empty
736 * and restore UTCR3
737 */
738 do {
739 status = UART_GET_UTSR1(sport);
740 } while (status & UTSR1_TBY);
741 UART_PUT_UTCR3(sport, old_utcr3);
742}
743
744/*
745 * If the port was already initialised (eg, by a boot loader),
746 * try to determine the current setup.
747 */
748static void __init
749sa1100_console_get_options(struct sa1100_port *sport, int *baud,
750 int *parity, int *bits)
751{
752 unsigned int utcr3;
753
754 utcr3 = UART_GET_UTCR3(sport) & (UTCR3_RXE | UTCR3_TXE);
755 if (utcr3 == (UTCR3_RXE | UTCR3_TXE)) {
756 /* ok, the port was enabled */
757 unsigned int utcr0, quot;
758
759 utcr0 = UART_GET_UTCR0(sport);
760
761 *parity = 'n';
762 if (utcr0 & UTCR0_PE) {
763 if (utcr0 & UTCR0_OES)
764 *parity = 'e';
765 else
766 *parity = 'o';
767 }
768
769 if (utcr0 & UTCR0_DSS)
770 *bits = 8;
771 else
772 *bits = 7;
773
774 quot = UART_GET_UTCR2(sport) | UART_GET_UTCR1(sport) << 8;
775 quot &= 0xfff;
776 *baud = sport->port.uartclk / (16 * (quot + 1));
777 }
778}
779
780static int __init
781sa1100_console_setup(struct console *co, char *options)
782{
783 struct sa1100_port *sport;
784 int baud = 9600;
785 int bits = 8;
786 int parity = 'n';
787 int flow = 'n';
788
789 /*
790 * Check whether an invalid uart number has been specified, and
791 * if so, search for the first available port that does have
792 * console support.
793 */
794 if (co->index == -1 || co->index >= NR_PORTS)
795 co->index = 0;
796 sport = &sa1100_ports[co->index];
797
798 if (options)
799 uart_parse_options(options, &baud, &parity, &bits, &flow);
800 else
801 sa1100_console_get_options(sport, &baud, &parity, &bits);
802
803 return uart_set_options(&sport->port, co, baud, parity, bits, flow);
804}
805
2d93486c 806static struct uart_driver sa1100_reg;
1da177e4
LT		 807static struct console sa1100_console = {
808 .name = "ttySA",
809 .write = sa1100_console_write,
810 .device = uart_console_device,
811 .setup = sa1100_console_setup,
812 .flags = CON_PRINTBUFFER,
813 .index = -1,
814 .data = &sa1100_reg,
815};
816
817static int __init sa1100_rs_console_init(void)
818{
819 sa1100_init_ports();
820 register_console(&sa1100_console);
821 return 0;
822}
823console_initcall(sa1100_rs_console_init);
824
825#define SA1100_CONSOLE &sa1100_console
826#else
827#define SA1100_CONSOLE NULL
828#endif
829
830static struct uart_driver sa1100_reg = {
831 .owner = THIS_MODULE,
832 .driver_name = "ttySA",
833 .dev_name = "ttySA",
1da177e4
LT		 834 .major = SERIAL_SA1100_MAJOR,
835 .minor = MINOR_START,
836 .nr = NR_PORTS,
837 .cons = SA1100_CONSOLE,
838};
839
3ae5eaec 840static int sa1100_serial_suspend(struct platform_device *dev, pm_message_t state)
1da177e4 841{
3ae5eaec 842 struct sa1100_port *sport = platform_get_drvdata(dev);
1da177e4 843
9480e307 844 if (sport)
1da177e4
LT		 845 uart_suspend_port(&sa1100_reg, &sport->port);
846
847 return 0;
848}
849
3ae5eaec 850static int sa1100_serial_resume(struct platform_device *dev)
1da177e4 851{
3ae5eaec 852 struct sa1100_port *sport = platform_get_drvdata(dev);
1da177e4 853
9480e307 854 if (sport)
1da177e4
LT		 855 uart_resume_port(&sa1100_reg, &sport->port);
856
857 return 0;
858}
859
3ae5eaec 860static int sa1100_serial_probe(struct platform_device *dev)
1da177e4 861{
1da177e4
LT		 862 struct resource *res = dev->resource;
863 int i;
864
865 for (i = 0; i < dev->num_resources; i++, res++)
866 if (res->flags & IORESOURCE_MEM)
867 break;
868
869 if (i < dev->num_resources) {
870 for (i = 0; i < NR_PORTS; i++) {
871 if (sa1100_ports[i].port.mapbase != res->start)
872 continue;
873
3ae5eaec 874 sa1100_ports[i].port.dev = &dev->dev;
1da177e4 875 uart_add_one_port(&sa1100_reg, &sa1100_ports[i].port);
3ae5eaec 876 platform_set_drvdata(dev, &sa1100_ports[i]);
1da177e4
LT		 877 break;
878 }
879 }
880
881 return 0;
882}
883
3ae5eaec 884static int sa1100_serial_remove(struct platform_device *pdev)
1da177e4 885{
3ae5eaec 886 struct sa1100_port *sport = platform_get_drvdata(pdev);
1da177e4 887
1da177e4
LT		 888 if (sport)
889 uart_remove_one_port(&sa1100_reg, &sport->port);
890
891 return 0;
892}
893
3ae5eaec 894static struct platform_driver sa11x0_serial_driver = {
1da177e4
LT		 895 .probe = sa1100_serial_probe,
896 .remove = sa1100_serial_remove,
897 .suspend = sa1100_serial_suspend,
898 .resume = sa1100_serial_resume,
3ae5eaec
RK		 899 .driver = {
900 .name = "sa11x0-uart",
901 },
1da177e4
LT		 902};
903
904static int __init sa1100_serial_init(void)
905{
906 int ret;
907
d87a6d95 908 printk(KERN_INFO "Serial: SA11x0 driver\n");
1da177e4
LT		 909
910 sa1100_init_ports();
911
912 ret = uart_register_driver(&sa1100_reg);
913 if (ret == 0) {
3ae5eaec 914 ret = platform_driver_register(&sa11x0_serial_driver);
1da177e4
LT		 915 if (ret)
916 uart_unregister_driver(&sa1100_reg);
917 }
918 return ret;
919}
920
921static void __exit sa1100_serial_exit(void)
922{
3ae5eaec 923 platform_driver_unregister(&sa11x0_serial_driver);
1da177e4
LT		 924 uart_unregister_driver(&sa1100_reg);
925}
926
927module_init(sa1100_serial_init);
928module_exit(sa1100_serial_exit);
929
930MODULE_AUTHOR("Deep Blue Solutions Ltd");
d87a6d95 931MODULE_DESCRIPTION("SA1100 generic serial port driver");
1da177e4
LT		 932MODULE_LICENSE("GPL");
933MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_SA1100_MAJOR);
e169c139 934MODULE_ALIAS("platform:sa11x0-uart");
Linux 6.x block layer and io_uring tree(s)