Commit | Line | Data |
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8d38a5b2 AB |
1 | /* |
2 | * Serial Port driver for Open Firmware platform devices | |
3 | * | |
4 | * Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; either version | |
9 | * 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | */ | |
12 | #include <linux/init.h> | |
13 | #include <linux/module.h> | |
5a0e3ad6 | 14 | #include <linux/slab.h> |
bf03f65b | 15 | #include <linux/delay.h> |
8d38a5b2 AB |
16 | #include <linux/serial_core.h> |
17 | #include <linux/serial_8250.h> | |
bf03f65b | 18 | #include <linux/serial_reg.h> |
f1ca09b2 | 19 | #include <linux/of_address.h> |
73930a85 | 20 | #include <linux/of_irq.h> |
bf03f65b | 21 | #include <linux/of_serial.h> |
c401b044 | 22 | #include <linux/of_platform.h> |
5886188d | 23 | #include <linux/nwpserial.h> |
0bbeb3c3 | 24 | #include <linux/clk.h> |
8d38a5b2 | 25 | |
e34b9c94 | 26 | struct of_serial_info { |
0bbeb3c3 | 27 | struct clk *clk; |
e34b9c94 IK |
28 | int type; |
29 | int line; | |
30 | }; | |
31 | ||
bf03f65b DW |
32 | #ifdef CONFIG_ARCH_TEGRA |
33 | void tegra_serial_handle_break(struct uart_port *p) | |
34 | { | |
35 | unsigned int status, tmout = 10000; | |
36 | ||
37 | do { | |
38 | status = p->serial_in(p, UART_LSR); | |
39 | if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS)) | |
40 | status = p->serial_in(p, UART_RX); | |
41 | else | |
42 | break; | |
43 | if (--tmout == 0) | |
44 | break; | |
45 | udelay(1); | |
46 | } while (1); | |
47 | } | |
48 | /* FIXME remove this export when tegra finishes conversion to open firmware */ | |
49 | EXPORT_SYMBOL_GPL(tegra_serial_handle_break); | |
50 | #endif | |
51 | ||
8d38a5b2 AB |
52 | /* |
53 | * Fill a struct uart_port for a given device node | |
54 | */ | |
9671f099 | 55 | static int of_platform_serial_setup(struct platform_device *ofdev, |
0bbeb3c3 MK |
56 | int type, struct uart_port *port, |
57 | struct of_serial_info *info) | |
8d38a5b2 AB |
58 | { |
59 | struct resource resource; | |
61c7a080 | 60 | struct device_node *np = ofdev->dev.of_node; |
b84e7731 GL |
61 | u32 clk, spd, prop; |
62 | int ret; | |
8d38a5b2 AB |
63 | |
64 | memset(port, 0, sizeof *port); | |
b84e7731 | 65 | if (of_property_read_u32(np, "clock-frequency", &clk)) { |
0bbeb3c3 MK |
66 | |
67 | /* Get clk rate through clk driver if present */ | |
68 | info->clk = clk_get(&ofdev->dev, NULL); | |
76cc4386 | 69 | if (IS_ERR(info->clk)) { |
0bbeb3c3 MK |
70 | dev_warn(&ofdev->dev, |
71 | "clk or clock-frequency not defined\n"); | |
76cc4386 | 72 | return PTR_ERR(info->clk); |
0bbeb3c3 MK |
73 | } |
74 | ||
75 | clk_prepare_enable(info->clk); | |
76 | clk = clk_get_rate(info->clk); | |
8d38a5b2 | 77 | } |
b84e7731 GL |
78 | /* If current-speed was set, then try not to change it. */ |
79 | if (of_property_read_u32(np, "current-speed", &spd) == 0) | |
80 | port->custom_divisor = clk / (16 * spd); | |
8d38a5b2 AB |
81 | |
82 | ret = of_address_to_resource(np, 0, &resource); | |
83 | if (ret) { | |
84 | dev_warn(&ofdev->dev, "invalid address\n"); | |
0bbeb3c3 | 85 | goto out; |
8d38a5b2 AB |
86 | } |
87 | ||
88 | spin_lock_init(&port->lock); | |
89 | port->mapbase = resource.start; | |
b912b5e2 JL |
90 | |
91 | /* Check for shifted address mapping */ | |
b84e7731 GL |
92 | if (of_property_read_u32(np, "reg-offset", &prop) == 0) |
93 | port->mapbase += prop; | |
b912b5e2 JL |
94 | |
95 | /* Check for registers offset within the devices address range */ | |
b84e7731 GL |
96 | if (of_property_read_u32(np, "reg-shift", &prop) == 0) |
97 | port->regshift = prop; | |
b912b5e2 | 98 | |
8d38a5b2 AB |
99 | port->irq = irq_of_parse_and_map(np, 0); |
100 | port->iotype = UPIO_MEM; | |
b84e7731 GL |
101 | if (of_property_read_u32(np, "reg-io-width", &prop) == 0) { |
102 | switch (prop) { | |
7423734e JI |
103 | case 1: |
104 | port->iotype = UPIO_MEM; | |
105 | break; | |
106 | case 4: | |
107 | port->iotype = UPIO_MEM32; | |
108 | break; | |
109 | default: | |
b84e7731 GL |
110 | dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n", |
111 | prop); | |
0bbeb3c3 MK |
112 | ret = -EINVAL; |
113 | goto out; | |
7423734e JI |
114 | } |
115 | } | |
116 | ||
8d38a5b2 | 117 | port->type = type; |
b84e7731 | 118 | port->uartclk = clk; |
abb4a239 | 119 | port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP |
eedacbf0 | 120 | | UPF_FIXED_PORT | UPF_FIXED_TYPE; |
fde8be29 GJ |
121 | |
122 | if (of_find_property(np, "no-loopback-test", NULL)) | |
123 | port->flags |= UPF_SKIP_TEST; | |
124 | ||
8d38a5b2 | 125 | port->dev = &ofdev->dev; |
8d38a5b2 | 126 | |
bf03f65b DW |
127 | if (type == PORT_TEGRA) |
128 | port->handle_break = tegra_serial_handle_break; | |
129 | ||
8d38a5b2 | 130 | return 0; |
0bbeb3c3 MK |
131 | out: |
132 | if (info->clk) | |
133 | clk_disable_unprepare(info->clk); | |
134 | return ret; | |
8d38a5b2 AB |
135 | } |
136 | ||
137 | /* | |
138 | * Try to register a serial port | |
139 | */ | |
b1608d69 | 140 | static struct of_device_id of_platform_serial_table[]; |
9671f099 | 141 | static int of_platform_serial_probe(struct platform_device *ofdev) |
8d38a5b2 | 142 | { |
b1608d69 | 143 | const struct of_device_id *match; |
e34b9c94 | 144 | struct of_serial_info *info; |
8d38a5b2 AB |
145 | struct uart_port port; |
146 | int port_type; | |
147 | int ret; | |
148 | ||
b1608d69 GL |
149 | match = of_match_device(of_platform_serial_table, &ofdev->dev); |
150 | if (!match) | |
793218df GL |
151 | return -EINVAL; |
152 | ||
61c7a080 | 153 | if (of_find_property(ofdev->dev.of_node, "used-by-rtas", NULL)) |
8d38a5b2 AB |
154 | return -EBUSY; |
155 | ||
e34b9c94 IK |
156 | info = kmalloc(sizeof(*info), GFP_KERNEL); |
157 | if (info == NULL) | |
158 | return -ENOMEM; | |
159 | ||
b1608d69 | 160 | port_type = (unsigned long)match->data; |
0bbeb3c3 | 161 | ret = of_platform_serial_setup(ofdev, port_type, &port, info); |
8d38a5b2 AB |
162 | if (ret) |
163 | goto out; | |
164 | ||
165 | switch (port_type) { | |
5886188d | 166 | #ifdef CONFIG_SERIAL_8250 |
8d38a5b2 | 167 | case PORT_8250 ... PORT_MAX_8250: |
ce7240e4 AC |
168 | { |
169 | /* For now the of bindings don't support the extra | |
170 | 8250 specific bits */ | |
171 | struct uart_8250_port port8250; | |
172 | memset(&port8250, 0, sizeof(port8250)); | |
173 | port8250.port = port; | |
174 | ret = serial8250_register_8250_port(&port8250); | |
8d38a5b2 | 175 | break; |
ce7240e4 | 176 | } |
5886188d BK |
177 | #endif |
178 | #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL | |
179 | case PORT_NWPSERIAL: | |
180 | ret = nwpserial_register_port(&port); | |
181 | break; | |
182 | #endif | |
8d38a5b2 AB |
183 | default: |
184 | /* need to add code for these */ | |
1558f9b4 IK |
185 | case PORT_UNKNOWN: |
186 | dev_info(&ofdev->dev, "Unknown serial port found, ignored\n"); | |
8d38a5b2 AB |
187 | ret = -ENODEV; |
188 | break; | |
189 | } | |
190 | if (ret < 0) | |
191 | goto out; | |
192 | ||
e34b9c94 IK |
193 | info->type = port_type; |
194 | info->line = ret; | |
3cf62a5a | 195 | dev_set_drvdata(&ofdev->dev, info); |
8d38a5b2 AB |
196 | return 0; |
197 | out: | |
e34b9c94 | 198 | kfree(info); |
8d38a5b2 AB |
199 | irq_dispose_mapping(port.irq); |
200 | return ret; | |
201 | } | |
202 | ||
203 | /* | |
204 | * Release a line | |
205 | */ | |
2dc11581 | 206 | static int of_platform_serial_remove(struct platform_device *ofdev) |
8d38a5b2 | 207 | { |
3cf62a5a | 208 | struct of_serial_info *info = dev_get_drvdata(&ofdev->dev); |
e34b9c94 | 209 | switch (info->type) { |
5886188d | 210 | #ifdef CONFIG_SERIAL_8250 |
e34b9c94 IK |
211 | case PORT_8250 ... PORT_MAX_8250: |
212 | serial8250_unregister_port(info->line); | |
213 | break; | |
5886188d BK |
214 | #endif |
215 | #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL | |
216 | case PORT_NWPSERIAL: | |
217 | nwpserial_unregister_port(info->line); | |
218 | break; | |
219 | #endif | |
e34b9c94 IK |
220 | default: |
221 | /* need to add code for these */ | |
222 | break; | |
223 | } | |
0bbeb3c3 MK |
224 | |
225 | if (info->clk) | |
226 | clk_disable_unprepare(info->clk); | |
e34b9c94 | 227 | kfree(info); |
8d38a5b2 AB |
228 | return 0; |
229 | } | |
230 | ||
231 | /* | |
232 | * A few common types, add more as needed. | |
233 | */ | |
234 | static struct of_device_id __devinitdata of_platform_serial_table[] = { | |
8c6e9112 GL |
235 | { .compatible = "ns8250", .data = (void *)PORT_8250, }, |
236 | { .compatible = "ns16450", .data = (void *)PORT_16450, }, | |
237 | { .compatible = "ns16550a", .data = (void *)PORT_16550A, }, | |
238 | { .compatible = "ns16550", .data = (void *)PORT_16550, }, | |
239 | { .compatible = "ns16750", .data = (void *)PORT_16750, }, | |
240 | { .compatible = "ns16850", .data = (void *)PORT_16850, }, | |
2e39e5be | 241 | { .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, }, |
e4305f0c | 242 | { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, }, |
5886188d | 243 | #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL |
8c6e9112 GL |
244 | { .compatible = "ibm,qpace-nwp-serial", |
245 | .data = (void *)PORT_NWPSERIAL, }, | |
5886188d | 246 | #endif |
8c6e9112 | 247 | { .type = "serial", .data = (void *)PORT_UNKNOWN, }, |
8d38a5b2 AB |
248 | { /* end of list */ }, |
249 | }; | |
250 | ||
793218df | 251 | static struct platform_driver of_platform_serial_driver = { |
4018294b GL |
252 | .driver = { |
253 | .name = "of_serial", | |
254 | .owner = THIS_MODULE, | |
255 | .of_match_table = of_platform_serial_table, | |
256 | }, | |
8d38a5b2 AB |
257 | .probe = of_platform_serial_probe, |
258 | .remove = of_platform_serial_remove, | |
8d38a5b2 AB |
259 | }; |
260 | ||
940ab889 | 261 | module_platform_driver(of_platform_serial_driver); |
8d38a5b2 AB |
262 | |
263 | MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>"); | |
264 | MODULE_LICENSE("GPL"); | |
265 | MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices"); |