Commit | Line | Data |
---|---|---|
8d38a5b2 AB |
1 | /* |
2 | * Serial Port driver for Open Firmware platform devices | |
3 | * | |
4 | * Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; either version | |
9 | * 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | */ | |
8ad3b135 | 12 | #include <linux/console.h> |
8d38a5b2 | 13 | #include <linux/module.h> |
5a0e3ad6 | 14 | #include <linux/slab.h> |
bf03f65b | 15 | #include <linux/delay.h> |
8d38a5b2 | 16 | #include <linux/serial_core.h> |
bf03f65b | 17 | #include <linux/serial_reg.h> |
f1ca09b2 | 18 | #include <linux/of_address.h> |
73930a85 | 19 | #include <linux/of_irq.h> |
c401b044 | 20 | #include <linux/of_platform.h> |
5886188d | 21 | #include <linux/nwpserial.h> |
0bbeb3c3 | 22 | #include <linux/clk.h> |
8d38a5b2 | 23 | |
b0b8c84c HK |
24 | #include "8250/8250.h" |
25 | ||
e34b9c94 | 26 | struct of_serial_info { |
0bbeb3c3 | 27 | struct clk *clk; |
e34b9c94 IK |
28 | int type; |
29 | int line; | |
30 | }; | |
31 | ||
bf03f65b DW |
32 | #ifdef CONFIG_ARCH_TEGRA |
33 | void tegra_serial_handle_break(struct uart_port *p) | |
34 | { | |
35 | unsigned int status, tmout = 10000; | |
36 | ||
37 | do { | |
38 | status = p->serial_in(p, UART_LSR); | |
39 | if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS)) | |
40 | status = p->serial_in(p, UART_RX); | |
41 | else | |
42 | break; | |
43 | if (--tmout == 0) | |
44 | break; | |
45 | udelay(1); | |
46 | } while (1); | |
47 | } | |
f26402e8 SW |
48 | #else |
49 | static inline void tegra_serial_handle_break(struct uart_port *port) | |
50 | { | |
51 | } | |
bf03f65b DW |
52 | #endif |
53 | ||
8d38a5b2 AB |
54 | /* |
55 | * Fill a struct uart_port for a given device node | |
56 | */ | |
9671f099 | 57 | static int of_platform_serial_setup(struct platform_device *ofdev, |
0bbeb3c3 MK |
58 | int type, struct uart_port *port, |
59 | struct of_serial_info *info) | |
8d38a5b2 AB |
60 | { |
61 | struct resource resource; | |
61c7a080 | 62 | struct device_node *np = ofdev->dev.of_node; |
b84e7731 GL |
63 | u32 clk, spd, prop; |
64 | int ret; | |
8d38a5b2 AB |
65 | |
66 | memset(port, 0, sizeof *port); | |
b84e7731 | 67 | if (of_property_read_u32(np, "clock-frequency", &clk)) { |
0bbeb3c3 MK |
68 | |
69 | /* Get clk rate through clk driver if present */ | |
70 | info->clk = clk_get(&ofdev->dev, NULL); | |
76cc4386 | 71 | if (IS_ERR(info->clk)) { |
0bbeb3c3 MK |
72 | dev_warn(&ofdev->dev, |
73 | "clk or clock-frequency not defined\n"); | |
76cc4386 | 74 | return PTR_ERR(info->clk); |
0bbeb3c3 MK |
75 | } |
76 | ||
77 | clk_prepare_enable(info->clk); | |
78 | clk = clk_get_rate(info->clk); | |
8d38a5b2 | 79 | } |
b84e7731 GL |
80 | /* If current-speed was set, then try not to change it. */ |
81 | if (of_property_read_u32(np, "current-speed", &spd) == 0) | |
82 | port->custom_divisor = clk / (16 * spd); | |
8d38a5b2 AB |
83 | |
84 | ret = of_address_to_resource(np, 0, &resource); | |
85 | if (ret) { | |
86 | dev_warn(&ofdev->dev, "invalid address\n"); | |
0bbeb3c3 | 87 | goto out; |
8d38a5b2 AB |
88 | } |
89 | ||
90 | spin_lock_init(&port->lock); | |
91 | port->mapbase = resource.start; | |
b912b5e2 JL |
92 | |
93 | /* Check for shifted address mapping */ | |
b84e7731 GL |
94 | if (of_property_read_u32(np, "reg-offset", &prop) == 0) |
95 | port->mapbase += prop; | |
b912b5e2 JL |
96 | |
97 | /* Check for registers offset within the devices address range */ | |
b84e7731 GL |
98 | if (of_property_read_u32(np, "reg-shift", &prop) == 0) |
99 | port->regshift = prop; | |
b912b5e2 | 100 | |
9f1ca068 HK |
101 | /* Check for fifo size */ |
102 | if (of_property_read_u32(np, "fifo-size", &prop) == 0) | |
103 | port->fifosize = prop; | |
104 | ||
3239fd31 LS |
105 | /* Check for a fixed line number */ |
106 | ret = of_alias_get_id(np, "serial"); | |
107 | if (ret >= 0) | |
108 | port->line = ret; | |
109 | ||
8d38a5b2 AB |
110 | port->irq = irq_of_parse_and_map(np, 0); |
111 | port->iotype = UPIO_MEM; | |
b84e7731 GL |
112 | if (of_property_read_u32(np, "reg-io-width", &prop) == 0) { |
113 | switch (prop) { | |
7423734e JI |
114 | case 1: |
115 | port->iotype = UPIO_MEM; | |
116 | break; | |
117 | case 4: | |
118 | port->iotype = UPIO_MEM32; | |
119 | break; | |
120 | default: | |
b84e7731 GL |
121 | dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n", |
122 | prop); | |
0bbeb3c3 MK |
123 | ret = -EINVAL; |
124 | goto out; | |
7423734e JI |
125 | } |
126 | } | |
127 | ||
8d38a5b2 | 128 | port->type = type; |
b84e7731 | 129 | port->uartclk = clk; |
abb4a239 | 130 | port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP |
eedacbf0 | 131 | | UPF_FIXED_PORT | UPF_FIXED_TYPE; |
fde8be29 GJ |
132 | |
133 | if (of_find_property(np, "no-loopback-test", NULL)) | |
134 | port->flags |= UPF_SKIP_TEST; | |
135 | ||
8d38a5b2 | 136 | port->dev = &ofdev->dev; |
8d38a5b2 | 137 | |
9b8777e3 JC |
138 | switch (type) { |
139 | case PORT_TEGRA: | |
bf03f65b | 140 | port->handle_break = tegra_serial_handle_break; |
9b8777e3 JC |
141 | break; |
142 | ||
143 | case PORT_RT2880: | |
144 | port->iotype = UPIO_AU; | |
145 | break; | |
146 | } | |
bf03f65b | 147 | |
8d38a5b2 | 148 | return 0; |
0bbeb3c3 MK |
149 | out: |
150 | if (info->clk) | |
151 | clk_disable_unprepare(info->clk); | |
152 | return ret; | |
8d38a5b2 AB |
153 | } |
154 | ||
155 | /* | |
156 | * Try to register a serial port | |
157 | */ | |
b1608d69 | 158 | static struct of_device_id of_platform_serial_table[]; |
9671f099 | 159 | static int of_platform_serial_probe(struct platform_device *ofdev) |
8d38a5b2 | 160 | { |
b1608d69 | 161 | const struct of_device_id *match; |
e34b9c94 | 162 | struct of_serial_info *info; |
8d38a5b2 AB |
163 | struct uart_port port; |
164 | int port_type; | |
165 | int ret; | |
166 | ||
b1608d69 GL |
167 | match = of_match_device(of_platform_serial_table, &ofdev->dev); |
168 | if (!match) | |
793218df GL |
169 | return -EINVAL; |
170 | ||
61c7a080 | 171 | if (of_find_property(ofdev->dev.of_node, "used-by-rtas", NULL)) |
8d38a5b2 AB |
172 | return -EBUSY; |
173 | ||
7e12e675 | 174 | info = kzalloc(sizeof(*info), GFP_KERNEL); |
e34b9c94 IK |
175 | if (info == NULL) |
176 | return -ENOMEM; | |
177 | ||
b1608d69 | 178 | port_type = (unsigned long)match->data; |
0bbeb3c3 | 179 | ret = of_platform_serial_setup(ofdev, port_type, &port, info); |
8d38a5b2 AB |
180 | if (ret) |
181 | goto out; | |
182 | ||
183 | switch (port_type) { | |
5886188d | 184 | #ifdef CONFIG_SERIAL_8250 |
8d38a5b2 | 185 | case PORT_8250 ... PORT_MAX_8250: |
ce7240e4 | 186 | { |
ce7240e4 AC |
187 | struct uart_8250_port port8250; |
188 | memset(&port8250, 0, sizeof(port8250)); | |
7fa21dd8 | 189 | port.type = port_type; |
ce7240e4 | 190 | port8250.port = port; |
b0b8c84c HK |
191 | |
192 | if (port.fifosize) | |
193 | port8250.capabilities = UART_CAP_FIFO; | |
194 | ||
195 | if (of_property_read_bool(ofdev->dev.of_node, | |
196 | "auto-flow-control")) | |
197 | port8250.capabilities |= UART_CAP_AFE; | |
198 | ||
ce7240e4 | 199 | ret = serial8250_register_8250_port(&port8250); |
8d38a5b2 | 200 | break; |
ce7240e4 | 201 | } |
5886188d BK |
202 | #endif |
203 | #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL | |
204 | case PORT_NWPSERIAL: | |
205 | ret = nwpserial_register_port(&port); | |
206 | break; | |
207 | #endif | |
8d38a5b2 AB |
208 | default: |
209 | /* need to add code for these */ | |
1558f9b4 IK |
210 | case PORT_UNKNOWN: |
211 | dev_info(&ofdev->dev, "Unknown serial port found, ignored\n"); | |
8d38a5b2 AB |
212 | ret = -ENODEV; |
213 | break; | |
214 | } | |
215 | if (ret < 0) | |
216 | goto out; | |
217 | ||
e34b9c94 IK |
218 | info->type = port_type; |
219 | info->line = ret; | |
696faedd | 220 | platform_set_drvdata(ofdev, info); |
8d38a5b2 AB |
221 | return 0; |
222 | out: | |
e34b9c94 | 223 | kfree(info); |
8d38a5b2 AB |
224 | irq_dispose_mapping(port.irq); |
225 | return ret; | |
226 | } | |
227 | ||
228 | /* | |
229 | * Release a line | |
230 | */ | |
2dc11581 | 231 | static int of_platform_serial_remove(struct platform_device *ofdev) |
8d38a5b2 | 232 | { |
696faedd | 233 | struct of_serial_info *info = platform_get_drvdata(ofdev); |
e34b9c94 | 234 | switch (info->type) { |
5886188d | 235 | #ifdef CONFIG_SERIAL_8250 |
e34b9c94 IK |
236 | case PORT_8250 ... PORT_MAX_8250: |
237 | serial8250_unregister_port(info->line); | |
238 | break; | |
5886188d BK |
239 | #endif |
240 | #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL | |
241 | case PORT_NWPSERIAL: | |
242 | nwpserial_unregister_port(info->line); | |
243 | break; | |
244 | #endif | |
e34b9c94 IK |
245 | default: |
246 | /* need to add code for these */ | |
247 | break; | |
248 | } | |
0bbeb3c3 MK |
249 | |
250 | if (info->clk) | |
251 | clk_disable_unprepare(info->clk); | |
e34b9c94 | 252 | kfree(info); |
8d38a5b2 AB |
253 | return 0; |
254 | } | |
255 | ||
8ad3b135 JL |
256 | #ifdef CONFIG_PM_SLEEP |
257 | #ifdef CONFIG_SERIAL_8250 | |
258 | static void of_serial_suspend_8250(struct of_serial_info *info) | |
259 | { | |
260 | struct uart_8250_port *port8250 = serial8250_get_port(info->line); | |
261 | struct uart_port *port = &port8250->port; | |
262 | ||
263 | serial8250_suspend_port(info->line); | |
264 | if (info->clk && (!uart_console(port) || console_suspend_enabled)) | |
265 | clk_disable_unprepare(info->clk); | |
266 | } | |
267 | ||
268 | static void of_serial_resume_8250(struct of_serial_info *info) | |
269 | { | |
270 | struct uart_8250_port *port8250 = serial8250_get_port(info->line); | |
271 | struct uart_port *port = &port8250->port; | |
272 | ||
273 | if (info->clk && (!uart_console(port) || console_suspend_enabled)) | |
274 | clk_prepare_enable(info->clk); | |
275 | ||
276 | serial8250_resume_port(info->line); | |
277 | } | |
278 | #else | |
279 | static inline void of_serial_suspend_8250(struct of_serial_info *info) | |
280 | { | |
281 | } | |
282 | ||
283 | static inline void of_serial_resume_8250(struct of_serial_info *info) | |
284 | { | |
285 | } | |
286 | #endif | |
287 | ||
288 | static int of_serial_suspend(struct device *dev) | |
289 | { | |
290 | struct of_serial_info *info = dev_get_drvdata(dev); | |
291 | ||
292 | switch (info->type) { | |
293 | case PORT_8250 ... PORT_MAX_8250: | |
294 | of_serial_suspend_8250(info); | |
295 | break; | |
296 | default: | |
297 | break; | |
298 | } | |
299 | ||
300 | return 0; | |
301 | } | |
302 | ||
303 | static int of_serial_resume(struct device *dev) | |
304 | { | |
305 | struct of_serial_info *info = dev_get_drvdata(dev); | |
306 | ||
307 | switch (info->type) { | |
308 | case PORT_8250 ... PORT_MAX_8250: | |
309 | of_serial_resume_8250(info); | |
310 | break; | |
311 | default: | |
312 | break; | |
313 | } | |
314 | ||
315 | return 0; | |
316 | } | |
317 | #endif | |
318 | static SIMPLE_DEV_PM_OPS(of_serial_pm_ops, of_serial_suspend, of_serial_resume); | |
319 | ||
8d38a5b2 AB |
320 | /* |
321 | * A few common types, add more as needed. | |
322 | */ | |
de88b340 | 323 | static struct of_device_id of_platform_serial_table[] = { |
8c6e9112 GL |
324 | { .compatible = "ns8250", .data = (void *)PORT_8250, }, |
325 | { .compatible = "ns16450", .data = (void *)PORT_16450, }, | |
326 | { .compatible = "ns16550a", .data = (void *)PORT_16550A, }, | |
327 | { .compatible = "ns16550", .data = (void *)PORT_16550, }, | |
328 | { .compatible = "ns16750", .data = (void *)PORT_16750, }, | |
329 | { .compatible = "ns16850", .data = (void *)PORT_16850, }, | |
2e39e5be | 330 | { .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, }, |
e4305f0c | 331 | { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, }, |
9b8777e3 | 332 | { .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, }, |
e06c93ca LFT |
333 | { .compatible = "altr,16550-FIFO32", |
334 | .data = (void *)PORT_ALTR_16550_F32, }, | |
335 | { .compatible = "altr,16550-FIFO64", | |
336 | .data = (void *)PORT_ALTR_16550_F64, }, | |
337 | { .compatible = "altr,16550-FIFO128", | |
338 | .data = (void *)PORT_ALTR_16550_F128, }, | |
6ad991b6 RH |
339 | { .compatible = "mrvl,mmp-uart", |
340 | .data = (void *)PORT_XSCALE, }, | |
341 | { .compatible = "mrvl,pxa-uart", | |
342 | .data = (void *)PORT_XSCALE, }, | |
5886188d | 343 | #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL |
8c6e9112 GL |
344 | { .compatible = "ibm,qpace-nwp-serial", |
345 | .data = (void *)PORT_NWPSERIAL, }, | |
5886188d | 346 | #endif |
8c6e9112 | 347 | { .type = "serial", .data = (void *)PORT_UNKNOWN, }, |
8d38a5b2 AB |
348 | { /* end of list */ }, |
349 | }; | |
350 | ||
793218df | 351 | static struct platform_driver of_platform_serial_driver = { |
4018294b GL |
352 | .driver = { |
353 | .name = "of_serial", | |
4018294b GL |
354 | .of_match_table = of_platform_serial_table, |
355 | }, | |
8d38a5b2 AB |
356 | .probe = of_platform_serial_probe, |
357 | .remove = of_platform_serial_remove, | |
8d38a5b2 AB |
358 | }; |
359 | ||
940ab889 | 360 | module_platform_driver(of_platform_serial_driver); |
8d38a5b2 AB |
361 | |
362 | MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>"); | |
363 | MODULE_LICENSE("GPL"); | |
364 | MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices"); |