Commit | Line | Data |
---|---|---|
e3b3d0f5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
1da177e4 | 2 | /* |
1da177e4 LT |
3 | * Driver for CPM (SCC/SMC) serial ports; CPM2 definitions |
4 | * | |
4c8d3d99 | 5 | * Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2) |
1da177e4 | 6 | * Pantelis Antoniou (panto@intracom.gr) (CPM1) |
0d844065 | 7 | * |
1da177e4 LT |
8 | * Copyright (C) 2004 Freescale Semiconductor, Inc. |
9 | * (C) 2004 Intracom, S.A. | |
6e197696 | 10 | * (C) 2006 MontaVista Software, Inc. |
0d844065 | 11 | * Vitaly Bordug <vbordug@ru.mvista.com> |
1da177e4 LT |
12 | */ |
13 | ||
1da177e4 LT |
14 | #include <linux/module.h> |
15 | #include <linux/tty.h> | |
16 | #include <linux/ioport.h> | |
5a0e3ad6 | 17 | #include <linux/slab.h> |
1da177e4 LT |
18 | #include <linux/serial.h> |
19 | #include <linux/console.h> | |
20 | #include <linux/sysrq.h> | |
21 | #include <linux/device.h> | |
57c8a661 | 22 | #include <linux/memblock.h> |
1da177e4 LT |
23 | #include <linux/dma-mapping.h> |
24 | ||
25 | #include <asm/io.h> | |
26 | #include <asm/irq.h> | |
3dd0dcbe | 27 | #include <asm/fs_pd.h> |
d464df26 | 28 | #include <asm/prom.h> |
1da177e4 LT |
29 | |
30 | #include <linux/serial_core.h> | |
31 | #include <linux/kernel.h> | |
32 | ||
33 | #include "cpm_uart.h" | |
34 | ||
35 | /**************************************************************/ | |
36 | ||
7ae87036 SW |
37 | void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd) |
38 | { | |
362f9b6f | 39 | cpm_command(port->command, cmd); |
7ae87036 | 40 | } |
d464df26 LP |
41 | |
42 | void __iomem *cpm_uart_map_pram(struct uart_cpm_port *port, | |
43 | struct device_node *np) | |
44 | { | |
45 | void __iomem *pram; | |
46 | unsigned long offset; | |
47 | struct resource res; | |
23144366 | 48 | resource_size_t len; |
d464df26 LP |
49 | |
50 | /* Don't remap parameter RAM if it has already been initialized | |
51 | * during console setup. | |
52 | */ | |
53 | if (IS_SMC(port) && port->smcup) | |
54 | return port->smcup; | |
55 | else if (!IS_SMC(port) && port->sccup) | |
56 | return port->sccup; | |
57 | ||
58 | if (of_address_to_resource(np, 1, &res)) | |
59 | return NULL; | |
60 | ||
23144366 | 61 | len = resource_size(&res); |
d464df26 LP |
62 | pram = ioremap(res.start, len); |
63 | if (!pram) | |
64 | return NULL; | |
65 | ||
66 | if (!IS_SMC(port)) | |
67 | return pram; | |
68 | ||
69 | if (len != 2) { | |
70 | printk(KERN_WARNING "cpm_uart[%d]: device tree references " | |
71 | "SMC pram, using boot loader/wrapper pram mapping. " | |
72 | "Please fix your device tree to reference the pram " | |
73 | "base register instead.\n", | |
74 | port->port.line); | |
75 | return pram; | |
76 | } | |
77 | ||
78 | offset = cpm_dpalloc(PROFF_SMC_SIZE, 64); | |
79 | out_be16(pram, offset); | |
80 | iounmap(pram); | |
81 | return cpm_muram_addr(offset); | |
82 | } | |
83 | ||
84 | void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram) | |
85 | { | |
86 | if (!IS_SMC(port)) | |
87 | iounmap(pram); | |
88 | } | |
89 | ||
1da177e4 | 90 | /* |
0d844065 | 91 | * Allocate DP-Ram and memory buffers. We need to allocate a transmit and |
1da177e4 LT |
92 | * receive buffer descriptors from dual port ram, and a character |
93 | * buffer area from host mem. If we are allocating for the console we need | |
94 | * to do it from bootmem | |
95 | */ | |
96 | int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con) | |
97 | { | |
98 | int dpmemsz, memsz; | |
15f8c604 | 99 | u8 __iomem *dp_mem; |
4c35630c | 100 | unsigned long dp_offset; |
1da177e4 LT |
101 | u8 *mem_addr; |
102 | dma_addr_t dma_addr = 0; | |
103 | ||
104 | pr_debug("CPM uart[%d]:allocbuf\n", pinfo->port.line); | |
105 | ||
106 | dpmemsz = sizeof(cbd_t) * (pinfo->rx_nrfifos + pinfo->tx_nrfifos); | |
107 | dp_offset = cpm_dpalloc(dpmemsz, 8); | |
4c35630c | 108 | if (IS_ERR_VALUE(dp_offset)) { |
1da177e4 LT |
109 | printk(KERN_ERR |
110 | "cpm_uart_cpm.c: could not allocate buffer descriptors\n"); | |
111 | return -ENOMEM; | |
112 | } | |
113 | ||
114 | dp_mem = cpm_dpram_addr(dp_offset); | |
115 | ||
116 | memsz = L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize) + | |
117 | L1_CACHE_ALIGN(pinfo->tx_nrfifos * pinfo->tx_fifosize); | |
09b03b6c | 118 | if (is_con) { |
6e900de3 | 119 | mem_addr = kzalloc(memsz, GFP_NOWAIT); |
8e30a9a2 | 120 | dma_addr = virt_to_bus(mem_addr); |
09b03b6c | 121 | } |
1da177e4 | 122 | else |
8b05cefc | 123 | mem_addr = dma_alloc_coherent(pinfo->port.dev, memsz, &dma_addr, |
1da177e4 LT |
124 | GFP_KERNEL); |
125 | ||
126 | if (mem_addr == NULL) { | |
127 | cpm_dpfree(dp_offset); | |
128 | printk(KERN_ERR | |
129 | "cpm_uart_cpm.c: could not allocate coherent memory\n"); | |
130 | return -ENOMEM; | |
131 | } | |
132 | ||
133 | pinfo->dp_addr = dp_offset; | |
134 | pinfo->mem_addr = mem_addr; | |
135 | pinfo->dma_addr = dma_addr; | |
09b03b6c | 136 | pinfo->mem_size = memsz; |
1da177e4 LT |
137 | |
138 | pinfo->rx_buf = mem_addr; | |
139 | pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos | |
140 | * pinfo->rx_fifosize); | |
141 | ||
15f8c604 | 142 | pinfo->rx_bd_base = (cbd_t __iomem *)dp_mem; |
1da177e4 LT |
143 | pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos; |
144 | ||
145 | return 0; | |
146 | } | |
147 | ||
148 | void cpm_uart_freebuf(struct uart_cpm_port *pinfo) | |
149 | { | |
8b05cefc BB |
150 | dma_free_coherent(pinfo->port.dev, L1_CACHE_ALIGN(pinfo->rx_nrfifos * |
151 | pinfo->rx_fifosize) + | |
1da177e4 | 152 | L1_CACHE_ALIGN(pinfo->tx_nrfifos * |
c1dcfd9d | 153 | pinfo->tx_fifosize), (void __force *)pinfo->mem_addr, |
1da177e4 LT |
154 | pinfo->dma_addr); |
155 | ||
156 | cpm_dpfree(pinfo->dp_addr); | |
157 | } |