Commit | Line | Data |
---|---|---|
e3b3d0f5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
1da177e4 | 2 | /* |
1da177e4 LT |
3 | * Driver for CPM (SCC/SMC) serial ports; CPM1 definitions |
4 | * | |
4c8d3d99 | 5 | * Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2) |
1da177e4 | 6 | * Pantelis Antoniou (panto@intracom.gr) (CPM1) |
311c4627 | 7 | * |
1da177e4 LT |
8 | * Copyright (C) 2004 Freescale Semiconductor, Inc. |
9 | * (C) 2004 Intracom, S.A. | |
6e197696 | 10 | * (C) 2006 MontaVista Software, Inc. |
0d844065 | 11 | * Vitaly Bordug <vbordug@ru.mvista.com> |
1da177e4 LT |
12 | */ |
13 | ||
1da177e4 LT |
14 | #include <linux/module.h> |
15 | #include <linux/tty.h> | |
5a0e3ad6 | 16 | #include <linux/gfp.h> |
1da177e4 | 17 | #include <linux/ioport.h> |
1da177e4 LT |
18 | #include <linux/serial.h> |
19 | #include <linux/console.h> | |
20 | #include <linux/sysrq.h> | |
21 | #include <linux/device.h> | |
57c8a661 | 22 | #include <linux/memblock.h> |
1da177e4 LT |
23 | #include <linux/dma-mapping.h> |
24 | ||
25 | #include <asm/io.h> | |
26 | #include <asm/irq.h> | |
f25222b9 | 27 | #include <asm/fs_pd.h> |
1da177e4 LT |
28 | |
29 | #include <linux/serial_core.h> | |
30 | #include <linux/kernel.h> | |
31 | ||
d464df26 | 32 | #include <linux/of.h> |
5af50730 | 33 | #include <linux/of_address.h> |
d464df26 | 34 | |
1da177e4 LT |
35 | #include "cpm_uart.h" |
36 | ||
37 | /**************************************************************/ | |
38 | ||
7ae87036 SW |
39 | void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd) |
40 | { | |
362f9b6f | 41 | cpm_command(port->command, cmd); |
7ae87036 | 42 | } |
d464df26 LP |
43 | |
44 | void __iomem *cpm_uart_map_pram(struct uart_cpm_port *port, | |
45 | struct device_node *np) | |
46 | { | |
47 | return of_iomap(np, 1); | |
48 | } | |
49 | ||
50 | void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram) | |
51 | { | |
52 | iounmap(pram); | |
53 | } | |
54 | ||
1da177e4 | 55 | /* |
311c4627 | 56 | * Allocate DP-Ram and memory buffers. We need to allocate a transmit and |
1da177e4 LT |
57 | * receive buffer descriptors from dual port ram, and a character |
58 | * buffer area from host mem. If we are allocating for the console we need | |
59 | * to do it from bootmem | |
60 | */ | |
61 | int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con) | |
62 | { | |
63 | int dpmemsz, memsz; | |
64 | u8 *dp_mem; | |
4c35630c | 65 | unsigned long dp_offset; |
1da177e4 LT |
66 | u8 *mem_addr; |
67 | dma_addr_t dma_addr = 0; | |
68 | ||
69 | pr_debug("CPM uart[%d]:allocbuf\n", pinfo->port.line); | |
70 | ||
71 | dpmemsz = sizeof(cbd_t) * (pinfo->rx_nrfifos + pinfo->tx_nrfifos); | |
72 | dp_offset = cpm_dpalloc(dpmemsz, 8); | |
4c35630c | 73 | if (IS_ERR_VALUE(dp_offset)) { |
1da177e4 LT |
74 | printk(KERN_ERR |
75 | "cpm_uart_cpm1.c: could not allocate buffer descriptors\n"); | |
76 | return -ENOMEM; | |
77 | } | |
78 | dp_mem = cpm_dpram_addr(dp_offset); | |
79 | ||
80 | memsz = L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize) + | |
81 | L1_CACHE_ALIGN(pinfo->tx_nrfifos * pinfo->tx_fifosize); | |
82 | if (is_con) { | |
311c4627 KG |
83 | /* was hostalloc but changed cause it blows away the */ |
84 | /* large tlb mapping when pinning the kernel area */ | |
4e4b7952 | 85 | mem_addr = (u8 *) cpm_dpram_addr(cpm_dpalloc(memsz, 8)); |
f25222b9 | 86 | dma_addr = (u32)cpm_dpram_phys(mem_addr); |
1da177e4 | 87 | } else |
8b05cefc | 88 | mem_addr = dma_alloc_coherent(pinfo->port.dev, memsz, &dma_addr, |
1da177e4 LT |
89 | GFP_KERNEL); |
90 | ||
91 | if (mem_addr == NULL) { | |
92 | cpm_dpfree(dp_offset); | |
93 | printk(KERN_ERR | |
94 | "cpm_uart_cpm1.c: could not allocate coherent memory\n"); | |
95 | return -ENOMEM; | |
96 | } | |
97 | ||
98 | pinfo->dp_addr = dp_offset; | |
09b03b6c VB |
99 | pinfo->mem_addr = mem_addr; /* virtual address*/ |
100 | pinfo->dma_addr = dma_addr; /* physical address*/ | |
101 | pinfo->mem_size = memsz; | |
1da177e4 LT |
102 | |
103 | pinfo->rx_buf = mem_addr; | |
104 | pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos | |
105 | * pinfo->rx_fifosize); | |
106 | ||
c1dcfd9d | 107 | pinfo->rx_bd_base = (cbd_t __iomem __force *)dp_mem; |
1da177e4 LT |
108 | pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos; |
109 | ||
110 | return 0; | |
111 | } | |
112 | ||
113 | void cpm_uart_freebuf(struct uart_cpm_port *pinfo) | |
114 | { | |
8b05cefc BB |
115 | dma_free_coherent(pinfo->port.dev, L1_CACHE_ALIGN(pinfo->rx_nrfifos * |
116 | pinfo->rx_fifosize) + | |
1da177e4 LT |
117 | L1_CACHE_ALIGN(pinfo->tx_nrfifos * |
118 | pinfo->tx_fifosize), pinfo->mem_addr, | |
119 | pinfo->dma_addr); | |
120 | ||
121 | cpm_dpfree(pinfo->dp_addr); | |
122 | } |