[linux-2.6-block.git] / drivers / tty / serial / cpm_uart / cpm_uart.h

/*
 *  Driver for CPM (SCC/SMC) serial ports
 *
 *  Copyright (C) 2004 Freescale Semiconductor, Inc.
 *
 *  2006 (c) MontaVista Software, Inc.
 *	Vitaly Bordug <vbordug@ru.mvista.com>
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2. This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 *
 */
#ifndef CPM_UART_H
#define CPM_UART_H

#include <linux/platform_device.h>
#include <linux/fs_uart_pd.h>

#if defined(CONFIG_CPM2)
#include "cpm_uart_cpm2.h"
#elif defined(CONFIG_CPM1)
#include "cpm_uart_cpm1.h"
#endif

#define SERIAL_CPM_MAJOR	204
#define SERIAL_CPM_MINOR	46

#define IS_SMC(pinfo)		(pinfo->flags & FLAG_SMC)
#define IS_DISCARDING(pinfo)	(pinfo->flags & FLAG_DISCARDING)
#define FLAG_DISCARDING	0x00000004	/* when set, don't discard */
#define FLAG_SMC	0x00000002
#define FLAG_CONSOLE	0x00000001

#define UART_SMC1	fsid_smc1_uart
#define UART_SMC2	fsid_smc2_uart
#define UART_SCC1	fsid_scc1_uart
#define UART_SCC2	fsid_scc2_uart
#define UART_SCC3	fsid_scc3_uart
#define UART_SCC4	fsid_scc4_uart

#define UART_NR		fs_uart_nr

#define RX_NUM_FIFO	4
#define RX_BUF_SIZE	32
#define TX_NUM_FIFO	4
#define TX_BUF_SIZE	32

#define SCC_WAIT_CLOSING 100

#define GPIO_CTS	0
#define GPIO_RTS	1
#define GPIO_DCD	2
#define GPIO_DSR	3
#define GPIO_DTR	4
#define GPIO_RI		5

#define NUM_GPIOS	(GPIO_RI+1)

struct uart_cpm_port {
	struct uart_port	port;
	u16			rx_nrfifos;
	u16			rx_fifosize;
	u16			tx_nrfifos;
	u16			tx_fifosize;
	smc_t __iomem		*smcp;
	smc_uart_t __iomem	*smcup;
	scc_t __iomem		*sccp;
	scc_uart_t __iomem	*sccup;
	cbd_t __iomem		*rx_bd_base;
	cbd_t __iomem		*rx_cur;
	cbd_t __iomem		*tx_bd_base;
	cbd_t __iomem		*tx_cur;
	unsigned char		*tx_buf;
	unsigned char		*rx_buf;
	u32			flags;
	struct clk		*clk;
	u8			brg;
	uint			 dp_addr;
	void			*mem_addr;
	dma_addr_t		 dma_addr;
	u32			mem_size;
	/* wait on close if needed */
	int			wait_closing;
	/* value to combine with opcode to form cpm command */
	u32			command;
	int			gpios[NUM_GPIOS];
};

extern int cpm_uart_nr;
extern struct uart_cpm_port cpm_uart_ports[UART_NR];

/* these are located in their respective files */
void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd);
void __iomem *cpm_uart_map_pram(struct uart_cpm_port *port,
				struct device_node *np);
void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram);
int cpm_uart_init_portdesc(void);
int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con);
void cpm_uart_freebuf(struct uart_cpm_port *pinfo);

void smc1_lineif(struct uart_cpm_port *pinfo);
void smc2_lineif(struct uart_cpm_port *pinfo);
void scc1_lineif(struct uart_cpm_port *pinfo);
void scc2_lineif(struct uart_cpm_port *pinfo);
void scc3_lineif(struct uart_cpm_port *pinfo);
void scc4_lineif(struct uart_cpm_port *pinfo);

/*
   virtual to phys transtalion
*/
static inline unsigned long cpu2cpm_addr(void *addr,
                                         struct uart_cpm_port *pinfo)
{
	int offset;
	u32 val = (u32)addr;
	u32 mem = (u32)pinfo->mem_addr;
	/* sane check */
	if (likely(val >= mem && val < mem + pinfo->mem_size)) {
		offset = val - mem;
		return pinfo->dma_addr + offset;
	}
	/* something nasty happened */
	BUG();
	return 0;
}

static inline void *cpm2cpu_addr(unsigned long addr,
                                 struct uart_cpm_port *pinfo)
{
	int offset;
	u32 val = addr;
	u32 dma = (u32)pinfo->dma_addr;
	/* sane check */
	if (likely(val >= dma && val < dma + pinfo->mem_size)) {
		offset = val - dma;
		return pinfo->mem_addr + offset;
	}
	/* something nasty happened */
	BUG();
	return NULL;
}


#endif /* CPM_UART_H */
Commit	Line	Data
1da177e4	1	/*
1da177e4 LT	2	* Driver for CPM (SCC/SMC) serial ports
	3	*
	4	* Copyright (C) 2004 Freescale Semiconductor, Inc.
	5	*
6e197696	6	* 2006 (c) MontaVista Software, Inc.
0d844065	7	* Vitaly Bordug <vbordug@ru.mvista.com>
6e197696 VB	8	*
	9	* This file is licensed under the terms of the GNU General Public License
	10	* version 2. This program is licensed "as is" without any warranty of any
	11	* kind, whether express or implied.
	12	*
1da177e4 LT	13	*/
	14	#ifndef CPM_UART_H
	15	#define CPM_UART_H
	16
e27987cd VB	17	#include <linux/platform_device.h>
e27987cd VB	18	#include <linux/fs_uart_pd.h>
1da177e4 LT	19
	20	#if defined(CONFIG_CPM2)
	21	#include "cpm_uart_cpm2.h"
49708c9e	22	#elif defined(CONFIG_CPM1)
1da177e4 LT	23	#include "cpm_uart_cpm1.h"
	24	#endif
	25
	26	#define SERIAL_CPM_MAJOR 204
	27	#define SERIAL_CPM_MINOR 46
	28
0d844065	29	#define IS_SMC(pinfo) (pinfo->flags & FLAG_SMC)
1da177e4 LT	30	#define IS_DISCARDING(pinfo) (pinfo->flags & FLAG_DISCARDING)
	31	#define FLAG_DISCARDING 0x00000004 /* when set, don't discard */
	32	#define FLAG_SMC 0x00000002
	33	#define FLAG_CONSOLE 0x00000001
	34
e27987cd VB	35	#define UART_SMC1 fsid_smc1_uart
	36	#define UART_SMC2 fsid_smc2_uart
	37	#define UART_SCC1 fsid_scc1_uart
	38	#define UART_SCC2 fsid_scc2_uart
	39	#define UART_SCC3 fsid_scc3_uart
	40	#define UART_SCC4 fsid_scc4_uart
1da177e4	41
e27987cd	42	#define UART_NR fs_uart_nr
1da177e4 LT	43
	44	#define RX_NUM_FIFO 4
	45	#define RX_BUF_SIZE 32
	46	#define TX_NUM_FIFO 4
	47	#define TX_BUF_SIZE 32
	48
311c4627 KG	49	#define SCC_WAIT_CLOSING 100
311c4627 KG	50
7485d26b LP	51	#define GPIO_CTS 0
	52	#define GPIO_RTS 1
	53	#define GPIO_DCD 2
	54	#define GPIO_DSR 3
	55	#define GPIO_DTR 4
	56	#define GPIO_RI 5
	57
	58	#define NUM_GPIOS (GPIO_RI+1)
	59
1da177e4 LT	60	struct uart_cpm_port {
1da177e4 LT	61	struct uart_port port;
311c4627	62	u16 rx_nrfifos;
1da177e4	63	u16 rx_fifosize;
311c4627	64	u16 tx_nrfifos;
1da177e4	65	u16 tx_fifosize;
c1dcfd9d SW	66	smc_t __iomem *smcp;
	67	smc_uart_t __iomem *smcup;
	68	scc_t __iomem *sccp;
	69	scc_uart_t __iomem *sccup;
	70	cbd_t __iomem *rx_bd_base;
	71	cbd_t __iomem *rx_cur;
	72	cbd_t __iomem *tx_bd_base;
	73	cbd_t __iomem *tx_cur;
1da177e4 LT	74	unsigned char *tx_buf;
	75	unsigned char *rx_buf;
	76	u32 flags;
80776554	77	struct clk *clk;
1da177e4 LT	78	u8 brg;
1da177e4 LT	79	uint dp_addr;
0d844065	80	void *mem_addr;
1da177e4	81	dma_addr_t dma_addr;
09b03b6c	82	u32 mem_size;
311c4627	83	/* wait on close if needed */
0d844065	84	int wait_closing;
7ae87036 SW	85	/* value to combine with opcode to form cpm command */
7ae87036 SW	86	u32 command;
7485d26b	87	int gpios[NUM_GPIOS];
1da177e4 LT	88	};
1da177e4 LT	89
1da177e4 LT	90	extern int cpm_uart_nr;
	91	extern struct uart_cpm_port cpm_uart_ports[UART_NR];
	92
	93	/* these are located in their respective files */
7ae87036	94	void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd);
d464df26 LP	95	void __iomem cpm_uart_map_pram(struct uart_cpm_port port,
	96	struct device_node *np);
	97	void cpm_uart_unmap_pram(struct uart_cpm_port port, void __iomem pram);
32a56ebb	98	int cpm_uart_init_portdesc(void);
1da177e4 LT	99	int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con);
	100	void cpm_uart_freebuf(struct uart_cpm_port *pinfo);
	101
	102	void smc1_lineif(struct uart_cpm_port *pinfo);
	103	void smc2_lineif(struct uart_cpm_port *pinfo);
	104	void scc1_lineif(struct uart_cpm_port *pinfo);
	105	void scc2_lineif(struct uart_cpm_port *pinfo);
	106	void scc3_lineif(struct uart_cpm_port *pinfo);
	107	void scc4_lineif(struct uart_cpm_port *pinfo);
	108
09b03b6c VB	109	/*
	110	virtual to phys transtalion
	111	*/
c1dcfd9d SW	112	static inline unsigned long cpu2cpm_addr(void *addr,
c1dcfd9d SW	113	struct uart_cpm_port *pinfo)
09b03b6c VB	114	{
	115	int offset;
	116	u32 val = (u32)addr;
c1dcfd9d	117	u32 mem = (u32)pinfo->mem_addr;
09b03b6c	118	/* sane check */
c1dcfd9d SW	119	if (likely(val >= mem && val < mem + pinfo->mem_size)) {
	120	offset = val - mem;
	121	return pinfo->dma_addr + offset;
09b03b6c	122	}
6e197696 VB	123	/* something nasty happened */
6e197696 VB	124	BUG();
09b03b6c VB	125	return 0;
	126	}
	127
c1dcfd9d SW	128	static inline void *cpm2cpu_addr(unsigned long addr,
c1dcfd9d SW	129	struct uart_cpm_port *pinfo)
09b03b6c VB	130	{
	131	int offset;
	132	u32 val = addr;
c1dcfd9d	133	u32 dma = (u32)pinfo->dma_addr;
09b03b6c	134	/* sane check */
c1dcfd9d SW	135	if (likely(val >= dma && val < dma + pinfo->mem_size)) {
	136	offset = val - dma;
	137	return pinfo->mem_addr + offset;
09b03b6c	138	}
6e197696 VB	139	/* something nasty happened */
6e197696 VB	140	BUG();
c1dcfd9d	141	return NULL;
09b03b6c VB	142	}
	143
	144
1da177e4	145	#endif /* CPM_UART_H */