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[linux-2.6-block.git] / drivers / tty / serial / arc_uart.c
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2ac4ad2a
VG		 1/*
2 * ARC On-Chip(fpga) UART Driver
3 *
4 * Copyright (C) 2010-2012 Synopsys, Inc. (www.synopsys.com)
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * vineetg: July 10th 2012
11 * -Decoupled the driver from arch/arc
12 * +Using platform_get_resource() for irq/membase (thx to bfin_uart.c)
13 * +Using early_platform_xxx() for early console (thx to mach-shmobile/xxx)
14 *
15 * Vineetg: Aug 21st 2010
16 * -Is uart_tx_stopped() not done in tty write path as it has already been
17 * taken care of, in serial core
18 *
19 * Vineetg: Aug 18th 2010
20 * -New Serial Core based ARC UART driver
21 * -Derived largely from blackfin driver albiet with some major tweaks
22 *
23 * TODO:
24 * -check if sysreq works
25 */
26
27#if defined(CONFIG_SERIAL_ARC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
28#define SUPPORT_SYSRQ
29#endif
30
31#include <linux/module.h>
32#include <linux/serial.h>
33#include <linux/console.h>
34#include <linux/sysrq.h>
35#include <linux/platform_device.h>
36#include <linux/tty.h>
37#include <linux/tty_flip.h>
38#include <linux/serial_core.h>
39#include <linux/io.h>
ea28fd56
VG		 40#include <linux/of.h>
41#include <linux/of_platform.h>
2ac4ad2a
VG		 42
43/*************************************
44 * ARC UART Hardware Specs
45 ************************************/
46#define ARC_UART_TX_FIFO_SIZE 1
47
48/*
49 * UART Register set (this is not a Standards Compliant IP)
50 * Also each reg is Word aligned, but only 8 bits wide
51 */
52#define R_ID0 0
53#define R_ID1 4
54#define R_ID2 8
55#define R_ID3 12
56#define R_DATA 16
57#define R_STS 20
58#define R_BAUDL 24
59#define R_BAUDH 28
60
61/* Bits for UART Status Reg (R/W) */
62#define RXIENB 0x04 /* Receive Interrupt Enable */
63#define TXIENB 0x40 /* Transmit Interrupt Enable */
64
65#define RXEMPTY 0x20 /* Receive FIFO Empty: No char receivede */
66#define TXEMPTY 0x80 /* Transmit FIFO Empty, thus char can be written into */
67
68#define RXFULL 0x08 /* Receive FIFO full */
69#define RXFULL1 0x10 /* Receive FIFO has space for 1 char (tot space=4) */
70
71#define RXFERR 0x01 /* Frame Error: Stop Bit not detected */
72#define RXOERR 0x02 /* OverFlow Err: Char recv but RXFULL still set */
73
74/* Uart bit fiddling helpers: lowest level */
75#define RBASE(uart, reg) (uart->port.membase + reg)
76#define UART_REG_SET(u, r, v) writeb((v), RBASE(u, r))
77#define UART_REG_GET(u, r) readb(RBASE(u, r))
78
79#define UART_REG_OR(u, r, v) UART_REG_SET(u, r, UART_REG_GET(u, r) | (v))
80#define UART_REG_CLR(u, r, v) UART_REG_SET(u, r, UART_REG_GET(u, r) & ~(v))
81
82/* Uart bit fiddling helpers: API level */
83#define UART_SET_DATA(uart, val) UART_REG_SET(uart, R_DATA, val)
84#define UART_GET_DATA(uart) UART_REG_GET(uart, R_DATA)
85
86#define UART_SET_BAUDH(uart, val) UART_REG_SET(uart, R_BAUDH, val)
87#define UART_SET_BAUDL(uart, val) UART_REG_SET(uart, R_BAUDL, val)
88
89#define UART_CLR_STATUS(uart, val) UART_REG_CLR(uart, R_STS, val)
90#define UART_GET_STATUS(uart) UART_REG_GET(uart, R_STS)
91
92#define UART_ALL_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB|TXIENB)
93#define UART_RX_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB)
94#define UART_TX_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, TXIENB)
95
96#define UART_ALL_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, RXIENB|TXIENB)
97#define UART_RX_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, RXIENB)
98#define UART_TX_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, TXIENB)
99
100#define ARC_SERIAL_DEV_NAME "ttyARC"
101
102struct arc_uart_port {
103 struct uart_port port;
104 unsigned long baud;
105 int is_emulated; /* H/w vs. Instruction Set Simulator */
106};
107
108#define to_arc_port(uport) container_of(uport, struct arc_uart_port, port)
109
110static struct arc_uart_port arc_uart_ports[CONFIG_SERIAL_ARC_NR_PORTS];
111
112#ifdef CONFIG_SERIAL_ARC_CONSOLE
113static struct console arc_console;
114#endif
115
116#define DRIVER_NAME "arc-uart"
117
118static struct uart_driver arc_uart_driver = {
119 .owner = THIS_MODULE,
120 .driver_name = DRIVER_NAME,
121 .dev_name = ARC_SERIAL_DEV_NAME,
122 .major = 0,
123 .minor = 0,
124 .nr = CONFIG_SERIAL_ARC_NR_PORTS,
125#ifdef CONFIG_SERIAL_ARC_CONSOLE
126 .cons = &arc_console,
127#endif
128};
129
130static void arc_serial_stop_rx(struct uart_port *port)
131{
132 struct arc_uart_port *uart = to_arc_port(port);
133
134 UART_RX_IRQ_DISABLE(uart);
135}
136
137static void arc_serial_stop_tx(struct uart_port *port)
138{
139 struct arc_uart_port *uart = to_arc_port(port);
140
141 while (!(UART_GET_STATUS(uart) & TXEMPTY))
142 cpu_relax();
143
144 UART_TX_IRQ_DISABLE(uart);
145}
146
147/*
148 * Return TIOCSER_TEMT when transmitter is not busy.
149 */
150static unsigned int arc_serial_tx_empty(struct uart_port *port)
151{
152 struct arc_uart_port *uart = to_arc_port(port);
153 unsigned int stat;
154
155 stat = UART_GET_STATUS(uart);
156 if (stat & TXEMPTY)
157 return TIOCSER_TEMT;
158
159 return 0;
160}
161
162/*
163 * Driver internal routine, used by both tty(serial core) as well as tx-isr
164 * -Called under spinlock in either cases
ee797069 165 * -also tty->stopped has already been checked
2ac4ad2a
VG		 166 * = by uart_start( ) before calling us
167 * = tx_ist checks that too before calling
168 */
169static void arc_serial_tx_chars(struct arc_uart_port *uart)
170{
171 struct circ_buf *xmit = &uart->port.state->xmit;
172 int sent = 0;
173 unsigned char ch;
174
175 if (unlikely(uart->port.x_char)) {
176 UART_SET_DATA(uart, uart->port.x_char);
177 uart->port.icount.tx++;
178 uart->port.x_char = 0;
179 sent = 1;
99ecb001 180 } else if (!uart_circ_empty(xmit)) {
2ac4ad2a
VG		 181 ch = xmit->buf[xmit->tail];
182 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
183 uart->port.icount.tx++;
184 while (!(UART_GET_STATUS(uart) & TXEMPTY))
185 cpu_relax();
186 UART_SET_DATA(uart, ch);
187 sent = 1;
188 }
189
190 /*
191 * If num chars in xmit buffer are too few, ask tty layer for more.
192 * By Hard ISR to schedule processing in software interrupt part
193 */
194 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
195 uart_write_wakeup(&uart->port);
196
197 if (sent)
198 UART_TX_IRQ_ENABLE(uart);
199}
200
201/*
202 * port is locked and interrupts are disabled
203 * uart_start( ) calls us under the port spinlock irqsave
204 */
205static void arc_serial_start_tx(struct uart_port *port)
206{
207 struct arc_uart_port *uart = to_arc_port(port);
208
209 arc_serial_tx_chars(uart);
210}
211
5284eba7 212static void arc_serial_rx_chars(struct arc_uart_port *uart, unsigned int status)
2ac4ad2a 213{
5284eba7 214 unsigned int ch, flg = 0;
2ac4ad2a 215
2ac4ad2a
VG		 216 /*
217 * UART has 4 deep RX-FIFO. Driver's recongnition of this fact
218 * is very subtle. Here's how ...
219 * Upon getting a RX-Intr, such that RX-EMPTY=0, meaning data available,
220 * driver reads the DATA Reg and keeps doing that in a loop, until
221 * RX-EMPTY=1. Multiple chars being avail, with a single Interrupt,
222 * before RX-EMPTY=0, implies some sort of buffering going on in the
223 * controller, which is indeed the Rx-FIFO.
224 */
5284eba7
VG		 225 do {
226 /*
227 * This could be an Rx Intr for err (no data),
228 * so check err and clear that Intr first
229 */
2ac4ad2a
VG		 230 if (unlikely(status & (RXOERR | RXFERR))) {
231 if (status & RXOERR) {
232 uart->port.icount.overrun++;
233 flg = TTY_OVERRUN;
234 UART_CLR_STATUS(uart, RXOERR);
235 }
236
237 if (status & RXFERR) {
238 uart->port.icount.frame++;
239 flg = TTY_FRAME;
240 UART_CLR_STATUS(uart, RXFERR);
241 }
242 } else
243 flg = TTY_NORMAL;
244
5284eba7
VG		 245 if (status & RXEMPTY)
246 continue;
247
248 ch = UART_GET_DATA(uart);
249 uart->port.icount.rx++;
250
00a135b3
VG		 251 if (!(uart_handle_sysrq_char(&uart->port, ch)))
252 uart_insert_char(&uart->port, status, RXOERR, ch, flg);
2ac4ad2a 253
3fa12008 254 spin_unlock(&uart->port.lock);
2e124b4a 255 tty_flip_buffer_push(&uart->port.state->port);
3fa12008 256 spin_lock(&uart->port.lock);
5284eba7 257 } while (!((status = UART_GET_STATUS(uart)) & RXEMPTY));
2ac4ad2a
VG		 258}
259
260/*
261 * A note on the Interrupt handling state machine of this driver
262 *
263 * kernel printk writes funnel thru the console driver framework and in order
264 * to keep things simple as well as efficient, it writes to UART in polled
265 * mode, in one shot, and exits.
266 *
267 * OTOH, Userland output (via tty layer), uses interrupt based writes as there
268 * can be undeterministic delay between char writes.
269 *
270 * Thus Rx-interrupts are always enabled, while tx-interrupts are by default
271 * disabled.
272 *
273 * When tty has some data to send out, serial core calls driver's start_tx
274 * which
275 * -checks-if-tty-buffer-has-char-to-send
276 * -writes-data-to-uart
277 * -enable-tx-intr
278 *
279 * Once data bits are pushed out, controller raises the Tx-room-avail-Interrupt.
280 * The first thing Tx ISR does is disable further Tx interrupts (as this could
281 * be the last char to send, before settling down into the quiet polled mode).
282 * It then calls the exact routine used by tty layer write to send out any
283 * more char in tty buffer. In case of sending, it re-enables Tx-intr. In case
284 * of no data, it remains disabled.
285 * This is how the transmit state machine is dynamically switched on/off
286 */
287
288static irqreturn_t arc_serial_isr(int irq, void *dev_id)
289{
290 struct arc_uart_port *uart = dev_id;
291 unsigned int status;
292
293 status = UART_GET_STATUS(uart);
294
295 /*
296 * Single IRQ for both Rx (data available) Tx (room available) Interrupt
297 * notifications from the UART Controller.
298 * To demultiplex between the two, we check the relevant bits
299 */
5284eba7 300 if (status & RXIENB) {
2ac4ad2a
VG		 301
302 /* already in ISR, no need of xx_irqsave */
303 spin_lock(&uart->port.lock);
5284eba7 304 arc_serial_rx_chars(uart, status);
2ac4ad2a
VG		 305 spin_unlock(&uart->port.lock);
306 }
307
308 if ((status & TXIENB) && (status & TXEMPTY)) {
309
310 /* Unconditionally disable further Tx-Interrupts.
311 * will be enabled by tx_chars() if needed.
312 */
313 UART_TX_IRQ_DISABLE(uart);
314
315 spin_lock(&uart->port.lock);
316
317 if (!uart_tx_stopped(&uart->port))
318 arc_serial_tx_chars(uart);
319
320 spin_unlock(&uart->port.lock);
321 }
322
323 return IRQ_HANDLED;
324}
325
326static unsigned int arc_serial_get_mctrl(struct uart_port *port)
327{
328 /*
329 * Pretend we have a Modem status reg and following bits are
330 * always set, to satify the serial core state machine
331 * (DSR) Data Set Ready
332 * (CTS) Clear To Send
333 * (CAR) Carrier Detect
334 */
335 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
336}
337
338static void arc_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
339{
340 /* MCR not present */
341}
342
343/* Enable Modem Status Interrupts */
344
345static void arc_serial_enable_ms(struct uart_port *port)
346{
347 /* MSR not present */
348}
349
350static void arc_serial_break_ctl(struct uart_port *port, int break_state)
351{
352 /* ARC UART doesn't support sending Break signal */
353}
354
355static int arc_serial_startup(struct uart_port *port)
356{
357 struct arc_uart_port *uart = to_arc_port(port);
358
359 /* Before we hook up the ISR, Disable all UART Interrupts */
360 UART_ALL_IRQ_DISABLE(uart);
361
362 if (request_irq(uart->port.irq, arc_serial_isr, 0, "arc uart rx-tx",
363 uart)) {
364 dev_warn(uart->port.dev, "Unable to attach ARC UART intr\n");
365 return -EBUSY;
366 }
367
368 UART_RX_IRQ_ENABLE(uart); /* Only Rx IRQ enabled to begin with */
369
370 return 0;
371}
372
373/* This is not really needed */
374static void arc_serial_shutdown(struct uart_port *port)
375{
376 struct arc_uart_port *uart = to_arc_port(port);
377 free_irq(uart->port.irq, uart);
378}
379
380static void
381arc_serial_set_termios(struct uart_port *port, struct ktermios *new,
382 struct ktermios *old)
383{
384 struct arc_uart_port *uart = to_arc_port(port);
385 unsigned int baud, uartl, uarth, hw_val;
386 unsigned long flags;
387
388 /*
389 * Use the generic handler so that any specially encoded baud rates
390 * such as SPD_xx flags or "%B0" can be handled
391 * Max Baud I suppose will not be more than current 115K * 4
392 * Formula for ARC UART is: hw-val = ((CLK/(BAUD*4)) -1)
393 * spread over two 8-bit registers
394 */
395 baud = uart_get_baud_rate(port, new, old, 0, 460800);
396
397 hw_val = port->uartclk / (uart->baud * 4) - 1;
398 uartl = hw_val & 0xFF;
399 uarth = (hw_val >> 8) & 0xFF;
400
401 /*
402 * UART ISS(Instruction Set simulator) emulation has a subtle bug:
403 * A existing value of Baudh = 0 is used as a indication to startup
404 * it's internal state machine.
405 * Thus if baudh is set to 0, 2 times, it chokes.
406 * This happens with BAUD=115200 and the formaula above
407 * Until that is fixed, when running on ISS, we will set baudh to !0
408 */
409 if (uart->is_emulated)
410 uarth = 1;
411
412 spin_lock_irqsave(&port->lock, flags);
413
414 UART_ALL_IRQ_DISABLE(uart);
415
416 UART_SET_BAUDL(uart, uartl);
417 UART_SET_BAUDH(uart, uarth);
418
419 UART_RX_IRQ_ENABLE(uart);
420
421 /*
422 * UART doesn't support Parity/Hardware Flow Control;
423 * Only supports 8N1 character size
424 */
425 new->c_cflag &= ~(CMSPAR|CRTSCTS|CSIZE);
426 new->c_cflag |= CS8;
427
428 if (old)
429 tty_termios_copy_hw(new, old);
430
431 /* Don't rewrite B0 */
432 if (tty_termios_baud_rate(new))
433 tty_termios_encode_baud_rate(new, baud, baud);
434
435 uart_update_timeout(port, new->c_cflag, baud);
436
437 spin_unlock_irqrestore(&port->lock, flags);
438}
439
440static const char *arc_serial_type(struct uart_port *port)
441{
442 struct arc_uart_port *uart = to_arc_port(port);
443
444 return uart->port.type == PORT_ARC ? DRIVER_NAME : NULL;
445}
446
447static void arc_serial_release_port(struct uart_port *port)
448{
449}
450
451static int arc_serial_request_port(struct uart_port *port)
452{
453 return 0;
454}
455
456/*
457 * Verify the new serial_struct (for TIOCSSERIAL).
458 */
459static int
460arc_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
461{
462 if (port->type != PORT_UNKNOWN && ser->type != PORT_ARC)
463 return -EINVAL;
464
465 return 0;
466}
467
468/*
469 * Configure/autoconfigure the port.
470 */
471static void arc_serial_config_port(struct uart_port *port, int flags)
472{
473 struct arc_uart_port *uart = to_arc_port(port);
474
475 if (flags & UART_CONFIG_TYPE)
476 uart->port.type = PORT_ARC;
477}
478
479#if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_ARC_CONSOLE)
480
481static void arc_serial_poll_putchar(struct uart_port *port, unsigned char chr)
482{
483 struct arc_uart_port *uart = to_arc_port(port);
484
485 while (!(UART_GET_STATUS(uart) & TXEMPTY))
486 cpu_relax();
487
488 UART_SET_DATA(uart, chr);
489}
490#endif
491
492#ifdef CONFIG_CONSOLE_POLL
493static int arc_serial_poll_getchar(struct uart_port *port)
494{
495 struct arc_uart_port *uart = to_arc_port(port);
496 unsigned char chr;
497
498 while (!(UART_GET_STATUS(uart) & RXEMPTY))
499 cpu_relax();
500
501 chr = UART_GET_DATA(uart);
502 return chr;
503}
504#endif
505
506static struct uart_ops arc_serial_pops = {
507 .tx_empty = arc_serial_tx_empty,
508 .set_mctrl = arc_serial_set_mctrl,
509 .get_mctrl = arc_serial_get_mctrl,
510 .stop_tx = arc_serial_stop_tx,
511 .start_tx = arc_serial_start_tx,
512 .stop_rx = arc_serial_stop_rx,
513 .enable_ms = arc_serial_enable_ms,
514 .break_ctl = arc_serial_break_ctl,
515 .startup = arc_serial_startup,
516 .shutdown = arc_serial_shutdown,
517 .set_termios = arc_serial_set_termios,
518 .type = arc_serial_type,
519 .release_port = arc_serial_release_port,
520 .request_port = arc_serial_request_port,
521 .config_port = arc_serial_config_port,
522 .verify_port = arc_serial_verify_port,
523#ifdef CONFIG_CONSOLE_POLL
524 .poll_put_char = arc_serial_poll_putchar,
525 .poll_get_char = arc_serial_poll_getchar,
526#endif
527};
528
9671f099 529static int
026bb292 530arc_uart_init_one(struct platform_device *pdev, int dev_id)
2ac4ad2a
VG		 531{
532 struct resource *res, *res2;
533 unsigned long *plat_data;
026bb292 534 struct arc_uart_port *uart = &arc_uart_ports[dev_id];
2ac4ad2a 535
0d8570ad 536 plat_data = dev_get_platdata(&pdev->dev);
d6c0d06b
VG		 537 if (!plat_data)
538 return -ENODEV;
539
540 uart->is_emulated = !!plat_data[0]; /* workaround ISS bug */
ea28fd56
VG		 541
542 if (is_early_platform_device(pdev)) {
543 uart->port.uartclk = plat_data[1];
544 uart->baud = plat_data[2];
545 } else {
546 struct device_node *np = pdev->dev.of_node;
547 u32 val;
548
549 if (of_property_read_u32(np, "clock-frequency", &val)) {
550 dev_err(&pdev->dev, "clock-frequency property NOTset\n");
551 return -EINVAL;
552 }
553 uart->port.uartclk = val;
554
11c62d4f
VG		 555 if (of_property_read_u32(np, "current-speed", &val)) {
556 dev_err(&pdev->dev, "current-speed property NOT set\n");
ea28fd56
VG		 557 return -EINVAL;
558 }
559 uart->baud = val;
560 }
2ac4ad2a
VG		 561
562 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
563 if (!res)
564 return -ENODEV;
565
566 res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
567 if (!res2)
568 return -ENODEV;
569
570 uart->port.mapbase = res->start;
571 uart->port.membase = ioremap_nocache(res->start, resource_size(res));
572 if (!uart->port.membase)
573 /* No point of dev_err since UART itself is hosed here */
574 return -ENXIO;
575
576 uart->port.irq = res2->start;
577 uart->port.dev = &pdev->dev;
578 uart->port.iotype = UPIO_MEM;
579 uart->port.flags = UPF_BOOT_AUTOCONF;
026bb292 580 uart->port.line = dev_id;
2ac4ad2a
VG		 581 uart->port.ops = &arc_serial_pops;
582
2ac4ad2a
VG		 583 uart->port.fifosize = ARC_UART_TX_FIFO_SIZE;
584
585 /*
586 * uart_insert_char( ) uses it in decideding whether to ignore a
587 * char or not. Explicitly setting it here, removes the subtelty
588 */
589 uart->port.ignore_status_mask = 0;
590
2ac4ad2a
VG		 591 return 0;
592}
593
594#ifdef CONFIG_SERIAL_ARC_CONSOLE
595
9671f099 596static int arc_serial_console_setup(struct console *co, char *options)
2ac4ad2a
VG		 597{
598 struct uart_port *port;
599 int baud = 115200;
600 int bits = 8;
601 int parity = 'n';
602 int flow = 'n';
603
604 if (co->index < 0 || co->index >= CONFIG_SERIAL_ARC_NR_PORTS)
605 return -ENODEV;
606
607 /*
608 * The uart port backing the console (e.g. ttyARC1) might not have been
609 * init yet. If so, defer the console setup to after the port.
610 */
611 port = &arc_uart_ports[co->index].port;
612 if (!port->membase)
613 return -ENODEV;
614
615 if (options)
616 uart_parse_options(options, &baud, &parity, &bits, &flow);
617
618 /*
619 * Serial core will call port->ops->set_termios( )
620 * which will set the baud reg
621 */
622 return uart_set_options(port, co, baud, parity, bits, flow);
623}
624
625static void arc_serial_console_putchar(struct uart_port *port, int ch)
626{
627 arc_serial_poll_putchar(port, (unsigned char)ch);
628}
629
630/*
631 * Interrupts are disabled on entering
632 */
633static void arc_serial_console_write(struct console *co, const char *s,
634 unsigned int count)
635{
636 struct uart_port *port = &arc_uart_ports[co->index].port;
637 unsigned long flags;
638
639 spin_lock_irqsave(&port->lock, flags);
640 uart_console_write(port, s, count, arc_serial_console_putchar);
641 spin_unlock_irqrestore(&port->lock, flags);
642}
643
644static struct console arc_console = {
645 .name = ARC_SERIAL_DEV_NAME,
646 .write = arc_serial_console_write,
647 .device = uart_console_device,
648 .setup = arc_serial_console_setup,
649 .flags = CON_PRINTBUFFER,
650 .index = -1,
651 .data = &arc_uart_driver
652};
653
654static __init void early_serial_write(struct console *con, const char *s,
655 unsigned int n)
656{
657 struct uart_port *port = &arc_uart_ports[con->index].port;
658 unsigned int i;
659
660 for (i = 0; i < n; i++, s++) {
661 if (*s == '\n')
662 arc_serial_poll_putchar(port, '\r');
663 arc_serial_poll_putchar(port, *s);
664 }
665}
666
795b5bbe 667static struct console arc_early_serial_console __initdata = {
2ac4ad2a
VG		 668 .name = "early_ARCuart",
669 .write = early_serial_write,
670 .flags = CON_PRINTBUFFER | CON_BOOT,
671 .index = -1
672};
673
e163d1f4 674static int __init arc_serial_probe_earlyprintk(struct platform_device *pdev)
2ac4ad2a 675{
026bb292
VG		 676 int dev_id = pdev->id < 0 ? 0 : pdev->id;
677 int rc;
2ac4ad2a 678
026bb292
VG		 679 arc_early_serial_console.index = dev_id;
680
681 rc = arc_uart_init_one(pdev, dev_id);
682 if (rc)
683 panic("early console init failed\n");
2ac4ad2a
VG		 684
685 arc_serial_console_setup(&arc_early_serial_console, NULL);
686
687 register_console(&arc_early_serial_console);
688 return 0;
689}
2ac4ad2a
VG		 690#endif /* CONFIG_SERIAL_ARC_CONSOLE */
691
9671f099 692static int arc_serial_probe(struct platform_device *pdev)
2ac4ad2a 693{
026bb292 694 int rc, dev_id;
ea28fd56
VG		 695 struct device_node *np = pdev->dev.of_node;
696
697 /* no device tree device */
698 if (!np)
699 return -ENODEV;
700
701 dev_id = of_alias_get_id(np, "serial");
11c62d4f
VG		 702 if (dev_id < 0)
703 dev_id = 0;
2ac4ad2a 704
026bb292 705 rc = arc_uart_init_one(pdev, dev_id);
2ac4ad2a
VG		 706 if (rc)
707 return rc;
708
026bb292
VG		 709 rc = uart_add_one_port(&arc_uart_driver, &arc_uart_ports[dev_id].port);
710 return rc;
2ac4ad2a
VG		 711}
712
ae8d8a14 713static int arc_serial_remove(struct platform_device *pdev)
2ac4ad2a
VG		 714{
715 /* This will never be called */
716 return 0;
717}
718
ea28fd56
VG		 719static const struct of_device_id arc_uart_dt_ids[] = {
720 { .compatible = "snps,arc-uart" },
721 { /* Sentinel */ }
722};
723MODULE_DEVICE_TABLE(of, arc_uart_dt_ids);
724
2ac4ad2a
VG		 725static struct platform_driver arc_platform_driver = {
726 .probe = arc_serial_probe,
2d47b716 727 .remove = arc_serial_remove,
2ac4ad2a
VG		 728 .driver = {
729 .name = DRIVER_NAME,
730 .owner = THIS_MODULE,
ea28fd56 731 .of_match_table = arc_uart_dt_ids,
2ac4ad2a
VG		 732 },
733};
734
735#ifdef CONFIG_SERIAL_ARC_CONSOLE
e163d1f4 736
795b5bbe 737static struct platform_driver early_arc_platform_driver __initdata = {
e163d1f4
VG		 738 .probe = arc_serial_probe_earlyprintk,
739 .remove = arc_serial_remove,
740 .driver = {
741 .name = DRIVER_NAME,
742 .owner = THIS_MODULE,
743 },
744};
2ac4ad2a
VG		 745/*
746 * Register an early platform driver of "earlyprintk" class.
747 * ARCH platform code installs the driver and probes the early devices
748 * The installation could rely on user specifying earlyprintk=xyx in cmd line
749 * or it could be done independently, for all "earlyprintk" class drivers.
750 * [see arch/arc/plat-arcfpga/platform.c]
751 */
e163d1f4 752early_platform_init("earlyprintk", &early_arc_platform_driver);
2ac4ad2a
VG		 753
754#endif /* CONFIG_SERIAL_ARC_CONSOLE */
755
756static int __init arc_serial_init(void)
757{
758 int ret;
759
760 ret = uart_register_driver(&arc_uart_driver);
761 if (ret)
762 return ret;
763
764 ret = platform_driver_register(&arc_platform_driver);
765 if (ret)
766 uart_unregister_driver(&arc_uart_driver);
767
768 return ret;
769}
770
771static void __exit arc_serial_exit(void)
772{
773 platform_driver_unregister(&arc_platform_driver);
774 uart_unregister_driver(&arc_uart_driver);
775}
776
777module_init(arc_serial_init);
778module_exit(arc_serial_exit);
779
780MODULE_LICENSE("GPL");
d5a12ea7 781MODULE_ALIAS("platform:" DRIVER_NAME);
2ac4ad2a
VG		 782MODULE_AUTHOR("Vineet Gupta");
783MODULE_DESCRIPTION("ARC(Synopsys) On-Chip(fpga) serial driver");
Linux 6.x block layer and io_uring tree(s)