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d57f341b GJ |
1 | /* |
2 | * Atheros AR933X SoC built-in UART driver | |
3 | * | |
4 | * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> | |
5 | * | |
6 | * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License version 2 as published | |
10 | * by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/module.h> | |
14 | #include <linux/ioport.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/console.h> | |
17 | #include <linux/sysrq.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/platform_device.h> | |
20 | #include <linux/tty.h> | |
21 | #include <linux/tty_flip.h> | |
22 | #include <linux/serial_core.h> | |
23 | #include <linux/serial.h> | |
24 | #include <linux/slab.h> | |
25 | #include <linux/io.h> | |
26 | #include <linux/irq.h> | |
27 | ||
2dff8ad9 GJ |
28 | #include <asm/div64.h> |
29 | ||
d57f341b GJ |
30 | #include <asm/mach-ath79/ar933x_uart.h> |
31 | #include <asm/mach-ath79/ar933x_uart_platform.h> | |
32 | ||
33 | #define DRIVER_NAME "ar933x-uart" | |
34 | ||
2dff8ad9 GJ |
35 | #define AR933X_UART_MAX_SCALE 0xff |
36 | #define AR933X_UART_MAX_STEP 0xffff | |
37 | ||
38 | #define AR933X_UART_MIN_BAUD 300 | |
39 | #define AR933X_UART_MAX_BAUD 3000000 | |
40 | ||
d57f341b GJ |
41 | #define AR933X_DUMMY_STATUS_RD 0x01 |
42 | ||
43 | static struct uart_driver ar933x_uart_driver; | |
44 | ||
45 | struct ar933x_uart_port { | |
46 | struct uart_port port; | |
47 | unsigned int ier; /* shadow Interrupt Enable Register */ | |
2dff8ad9 GJ |
48 | unsigned int min_baud; |
49 | unsigned int max_baud; | |
d57f341b GJ |
50 | }; |
51 | ||
52 | static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up, | |
53 | int offset) | |
54 | { | |
55 | return readl(up->port.membase + offset); | |
56 | } | |
57 | ||
58 | static inline void ar933x_uart_write(struct ar933x_uart_port *up, | |
59 | int offset, unsigned int value) | |
60 | { | |
61 | writel(value, up->port.membase + offset); | |
62 | } | |
63 | ||
64 | static inline void ar933x_uart_rmw(struct ar933x_uart_port *up, | |
65 | unsigned int offset, | |
66 | unsigned int mask, | |
67 | unsigned int val) | |
68 | { | |
69 | unsigned int t; | |
70 | ||
71 | t = ar933x_uart_read(up, offset); | |
72 | t &= ~mask; | |
73 | t |= val; | |
74 | ar933x_uart_write(up, offset, t); | |
75 | } | |
76 | ||
77 | static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up, | |
78 | unsigned int offset, | |
79 | unsigned int val) | |
80 | { | |
81 | ar933x_uart_rmw(up, offset, 0, val); | |
82 | } | |
83 | ||
84 | static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up, | |
85 | unsigned int offset, | |
86 | unsigned int val) | |
87 | { | |
88 | ar933x_uart_rmw(up, offset, val, 0); | |
89 | } | |
90 | ||
91 | static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up) | |
92 | { | |
93 | up->ier |= AR933X_UART_INT_TX_EMPTY; | |
94 | ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); | |
95 | } | |
96 | ||
97 | static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up) | |
98 | { | |
99 | up->ier &= ~AR933X_UART_INT_TX_EMPTY; | |
100 | ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); | |
101 | } | |
102 | ||
103 | static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch) | |
104 | { | |
105 | unsigned int rdata; | |
106 | ||
107 | rdata = ch & AR933X_UART_DATA_TX_RX_MASK; | |
108 | rdata |= AR933X_UART_DATA_TX_CSR; | |
109 | ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata); | |
110 | } | |
111 | ||
112 | static unsigned int ar933x_uart_tx_empty(struct uart_port *port) | |
113 | { | |
114 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
115 | unsigned long flags; | |
116 | unsigned int rdata; | |
117 | ||
118 | spin_lock_irqsave(&up->port.lock, flags); | |
119 | rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG); | |
120 | spin_unlock_irqrestore(&up->port.lock, flags); | |
121 | ||
122 | return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT; | |
123 | } | |
124 | ||
125 | static unsigned int ar933x_uart_get_mctrl(struct uart_port *port) | |
126 | { | |
127 | return TIOCM_CAR; | |
128 | } | |
129 | ||
130 | static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) | |
131 | { | |
132 | } | |
133 | ||
134 | static void ar933x_uart_start_tx(struct uart_port *port) | |
135 | { | |
136 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
137 | ||
138 | ar933x_uart_start_tx_interrupt(up); | |
139 | } | |
140 | ||
141 | static void ar933x_uart_stop_tx(struct uart_port *port) | |
142 | { | |
143 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
144 | ||
145 | ar933x_uart_stop_tx_interrupt(up); | |
146 | } | |
147 | ||
148 | static void ar933x_uart_stop_rx(struct uart_port *port) | |
149 | { | |
150 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
151 | ||
152 | up->ier &= ~AR933X_UART_INT_RX_VALID; | |
153 | ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); | |
154 | } | |
155 | ||
156 | static void ar933x_uart_break_ctl(struct uart_port *port, int break_state) | |
157 | { | |
158 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
159 | unsigned long flags; | |
160 | ||
161 | spin_lock_irqsave(&up->port.lock, flags); | |
162 | if (break_state == -1) | |
163 | ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, | |
164 | AR933X_UART_CS_TX_BREAK); | |
165 | else | |
166 | ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG, | |
167 | AR933X_UART_CS_TX_BREAK); | |
168 | spin_unlock_irqrestore(&up->port.lock, flags); | |
169 | } | |
170 | ||
171 | static void ar933x_uart_enable_ms(struct uart_port *port) | |
172 | { | |
173 | } | |
174 | ||
2dff8ad9 GJ |
175 | /* |
176 | * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17)) | |
177 | */ | |
178 | static unsigned long ar933x_uart_get_baud(unsigned int clk, | |
179 | unsigned int scale, | |
180 | unsigned int step) | |
181 | { | |
182 | u64 t; | |
183 | u32 div; | |
184 | ||
185 | div = (2 << 16) * (scale + 1); | |
186 | t = clk; | |
187 | t *= step; | |
188 | t += (div / 2); | |
189 | do_div(t, div); | |
190 | ||
191 | return t; | |
192 | } | |
193 | ||
194 | static void ar933x_uart_get_scale_step(unsigned int clk, | |
195 | unsigned int baud, | |
196 | unsigned int *scale, | |
197 | unsigned int *step) | |
198 | { | |
199 | unsigned int tscale; | |
200 | long min_diff; | |
201 | ||
202 | *scale = 0; | |
203 | *step = 0; | |
204 | ||
205 | min_diff = baud; | |
206 | for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) { | |
207 | u64 tstep; | |
208 | int diff; | |
209 | ||
210 | tstep = baud * (tscale + 1); | |
211 | tstep *= (2 << 16); | |
212 | do_div(tstep, clk); | |
213 | ||
214 | if (tstep > AR933X_UART_MAX_STEP) | |
215 | break; | |
216 | ||
217 | diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud); | |
218 | if (diff < min_diff) { | |
219 | min_diff = diff; | |
220 | *scale = tscale; | |
221 | *step = tstep; | |
222 | } | |
223 | } | |
224 | } | |
225 | ||
d57f341b GJ |
226 | static void ar933x_uart_set_termios(struct uart_port *port, |
227 | struct ktermios *new, | |
228 | struct ktermios *old) | |
229 | { | |
230 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
231 | unsigned int cs; | |
232 | unsigned long flags; | |
2dff8ad9 | 233 | unsigned int baud, scale, step; |
d57f341b GJ |
234 | |
235 | /* Only CS8 is supported */ | |
236 | new->c_cflag &= ~CSIZE; | |
237 | new->c_cflag |= CS8; | |
238 | ||
239 | /* Only one stop bit is supported */ | |
240 | new->c_cflag &= ~CSTOPB; | |
241 | ||
242 | cs = 0; | |
243 | if (new->c_cflag & PARENB) { | |
244 | if (!(new->c_cflag & PARODD)) | |
245 | cs |= AR933X_UART_CS_PARITY_EVEN; | |
246 | else | |
247 | cs |= AR933X_UART_CS_PARITY_ODD; | |
248 | } else { | |
249 | cs |= AR933X_UART_CS_PARITY_NONE; | |
250 | } | |
251 | ||
252 | /* Mark/space parity is not supported */ | |
253 | new->c_cflag &= ~CMSPAR; | |
254 | ||
2dff8ad9 GJ |
255 | baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud); |
256 | ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step); | |
d57f341b GJ |
257 | |
258 | /* | |
259 | * Ok, we're now changing the port state. Do it with | |
260 | * interrupts disabled. | |
261 | */ | |
262 | spin_lock_irqsave(&up->port.lock, flags); | |
263 | ||
2dff8ad9 GJ |
264 | /* disable the UART */ |
265 | ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG, | |
266 | AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S); | |
267 | ||
d57f341b GJ |
268 | /* Update the per-port timeout. */ |
269 | uart_update_timeout(port, new->c_cflag, baud); | |
270 | ||
271 | up->port.ignore_status_mask = 0; | |
272 | ||
273 | /* ignore all characters if CREAD is not set */ | |
274 | if ((new->c_cflag & CREAD) == 0) | |
275 | up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD; | |
276 | ||
277 | ar933x_uart_write(up, AR933X_UART_CLOCK_REG, | |
2dff8ad9 | 278 | scale << AR933X_UART_CLOCK_SCALE_S | step); |
d57f341b GJ |
279 | |
280 | /* setup configuration register */ | |
281 | ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs); | |
282 | ||
283 | /* enable host interrupt */ | |
284 | ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, | |
285 | AR933X_UART_CS_HOST_INT_EN); | |
286 | ||
2dff8ad9 GJ |
287 | /* reenable the UART */ |
288 | ar933x_uart_rmw(up, AR933X_UART_CS_REG, | |
289 | AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S, | |
290 | AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S); | |
291 | ||
d57f341b GJ |
292 | spin_unlock_irqrestore(&up->port.lock, flags); |
293 | ||
294 | if (tty_termios_baud_rate(new)) | |
295 | tty_termios_encode_baud_rate(new, baud, baud); | |
296 | } | |
297 | ||
298 | static void ar933x_uart_rx_chars(struct ar933x_uart_port *up) | |
299 | { | |
300 | struct tty_struct *tty; | |
301 | int max_count = 256; | |
302 | ||
303 | tty = tty_port_tty_get(&up->port.state->port); | |
304 | do { | |
305 | unsigned int rdata; | |
306 | unsigned char ch; | |
307 | ||
308 | rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG); | |
309 | if ((rdata & AR933X_UART_DATA_RX_CSR) == 0) | |
310 | break; | |
311 | ||
312 | /* remove the character from the FIFO */ | |
313 | ar933x_uart_write(up, AR933X_UART_DATA_REG, | |
314 | AR933X_UART_DATA_RX_CSR); | |
315 | ||
316 | if (!tty) { | |
317 | /* discard the data if no tty available */ | |
318 | continue; | |
319 | } | |
320 | ||
321 | up->port.icount.rx++; | |
322 | ch = rdata & AR933X_UART_DATA_TX_RX_MASK; | |
323 | ||
324 | if (uart_handle_sysrq_char(&up->port, ch)) | |
325 | continue; | |
326 | ||
327 | if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0) | |
328 | tty_insert_flip_char(tty, ch, TTY_NORMAL); | |
329 | } while (max_count-- > 0); | |
330 | ||
331 | if (tty) { | |
332 | tty_flip_buffer_push(tty); | |
333 | tty_kref_put(tty); | |
334 | } | |
335 | } | |
336 | ||
337 | static void ar933x_uart_tx_chars(struct ar933x_uart_port *up) | |
338 | { | |
339 | struct circ_buf *xmit = &up->port.state->xmit; | |
340 | int count; | |
341 | ||
342 | if (uart_tx_stopped(&up->port)) | |
343 | return; | |
344 | ||
345 | count = up->port.fifosize; | |
346 | do { | |
347 | unsigned int rdata; | |
348 | ||
349 | rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG); | |
350 | if ((rdata & AR933X_UART_DATA_TX_CSR) == 0) | |
351 | break; | |
352 | ||
353 | if (up->port.x_char) { | |
354 | ar933x_uart_putc(up, up->port.x_char); | |
355 | up->port.icount.tx++; | |
356 | up->port.x_char = 0; | |
357 | continue; | |
358 | } | |
359 | ||
360 | if (uart_circ_empty(xmit)) | |
361 | break; | |
362 | ||
363 | ar933x_uart_putc(up, xmit->buf[xmit->tail]); | |
364 | ||
365 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
366 | up->port.icount.tx++; | |
367 | } while (--count > 0); | |
368 | ||
369 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
370 | uart_write_wakeup(&up->port); | |
371 | ||
372 | if (!uart_circ_empty(xmit)) | |
373 | ar933x_uart_start_tx_interrupt(up); | |
374 | } | |
375 | ||
376 | static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id) | |
377 | { | |
378 | struct ar933x_uart_port *up = dev_id; | |
379 | unsigned int status; | |
380 | ||
381 | status = ar933x_uart_read(up, AR933X_UART_CS_REG); | |
382 | if ((status & AR933X_UART_CS_HOST_INT) == 0) | |
383 | return IRQ_NONE; | |
384 | ||
385 | spin_lock(&up->port.lock); | |
386 | ||
387 | status = ar933x_uart_read(up, AR933X_UART_INT_REG); | |
388 | status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG); | |
389 | ||
390 | if (status & AR933X_UART_INT_RX_VALID) { | |
391 | ar933x_uart_write(up, AR933X_UART_INT_REG, | |
392 | AR933X_UART_INT_RX_VALID); | |
393 | ar933x_uart_rx_chars(up); | |
394 | } | |
395 | ||
396 | if (status & AR933X_UART_INT_TX_EMPTY) { | |
397 | ar933x_uart_write(up, AR933X_UART_INT_REG, | |
398 | AR933X_UART_INT_TX_EMPTY); | |
399 | ar933x_uart_stop_tx_interrupt(up); | |
400 | ar933x_uart_tx_chars(up); | |
401 | } | |
402 | ||
403 | spin_unlock(&up->port.lock); | |
404 | ||
405 | return IRQ_HANDLED; | |
406 | } | |
407 | ||
408 | static int ar933x_uart_startup(struct uart_port *port) | |
409 | { | |
410 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
411 | unsigned long flags; | |
412 | int ret; | |
413 | ||
414 | ret = request_irq(up->port.irq, ar933x_uart_interrupt, | |
415 | up->port.irqflags, dev_name(up->port.dev), up); | |
416 | if (ret) | |
417 | return ret; | |
418 | ||
419 | spin_lock_irqsave(&up->port.lock, flags); | |
420 | ||
421 | /* Enable HOST interrupts */ | |
422 | ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, | |
423 | AR933X_UART_CS_HOST_INT_EN); | |
424 | ||
425 | /* Enable RX interrupts */ | |
426 | up->ier = AR933X_UART_INT_RX_VALID; | |
427 | ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); | |
428 | ||
429 | spin_unlock_irqrestore(&up->port.lock, flags); | |
430 | ||
431 | return 0; | |
432 | } | |
433 | ||
434 | static void ar933x_uart_shutdown(struct uart_port *port) | |
435 | { | |
436 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
437 | ||
438 | /* Disable all interrupts */ | |
439 | up->ier = 0; | |
440 | ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); | |
441 | ||
442 | /* Disable break condition */ | |
443 | ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG, | |
444 | AR933X_UART_CS_TX_BREAK); | |
445 | ||
446 | free_irq(up->port.irq, up); | |
447 | } | |
448 | ||
449 | static const char *ar933x_uart_type(struct uart_port *port) | |
450 | { | |
451 | return (port->type == PORT_AR933X) ? "AR933X UART" : NULL; | |
452 | } | |
453 | ||
454 | static void ar933x_uart_release_port(struct uart_port *port) | |
455 | { | |
456 | /* Nothing to release ... */ | |
457 | } | |
458 | ||
459 | static int ar933x_uart_request_port(struct uart_port *port) | |
460 | { | |
461 | /* UARTs always present */ | |
462 | return 0; | |
463 | } | |
464 | ||
465 | static void ar933x_uart_config_port(struct uart_port *port, int flags) | |
466 | { | |
467 | if (flags & UART_CONFIG_TYPE) | |
468 | port->type = PORT_AR933X; | |
469 | } | |
470 | ||
471 | static int ar933x_uart_verify_port(struct uart_port *port, | |
472 | struct serial_struct *ser) | |
473 | { | |
2dff8ad9 GJ |
474 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; |
475 | ||
d57f341b GJ |
476 | if (ser->type != PORT_UNKNOWN && |
477 | ser->type != PORT_AR933X) | |
478 | return -EINVAL; | |
479 | ||
480 | if (ser->irq < 0 || ser->irq >= NR_IRQS) | |
481 | return -EINVAL; | |
482 | ||
2dff8ad9 GJ |
483 | if (ser->baud_base < up->min_baud || |
484 | ser->baud_base > up->max_baud) | |
d57f341b GJ |
485 | return -EINVAL; |
486 | ||
487 | return 0; | |
488 | } | |
489 | ||
490 | static struct uart_ops ar933x_uart_ops = { | |
491 | .tx_empty = ar933x_uart_tx_empty, | |
492 | .set_mctrl = ar933x_uart_set_mctrl, | |
493 | .get_mctrl = ar933x_uart_get_mctrl, | |
494 | .stop_tx = ar933x_uart_stop_tx, | |
495 | .start_tx = ar933x_uart_start_tx, | |
496 | .stop_rx = ar933x_uart_stop_rx, | |
497 | .enable_ms = ar933x_uart_enable_ms, | |
498 | .break_ctl = ar933x_uart_break_ctl, | |
499 | .startup = ar933x_uart_startup, | |
500 | .shutdown = ar933x_uart_shutdown, | |
501 | .set_termios = ar933x_uart_set_termios, | |
502 | .type = ar933x_uart_type, | |
503 | .release_port = ar933x_uart_release_port, | |
504 | .request_port = ar933x_uart_request_port, | |
505 | .config_port = ar933x_uart_config_port, | |
506 | .verify_port = ar933x_uart_verify_port, | |
507 | }; | |
508 | ||
509 | #ifdef CONFIG_SERIAL_AR933X_CONSOLE | |
510 | ||
511 | static struct ar933x_uart_port * | |
512 | ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS]; | |
513 | ||
514 | static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up) | |
515 | { | |
516 | unsigned int status; | |
517 | unsigned int timeout = 60000; | |
518 | ||
519 | /* Wait up to 60ms for the character(s) to be sent. */ | |
520 | do { | |
521 | status = ar933x_uart_read(up, AR933X_UART_DATA_REG); | |
522 | if (--timeout == 0) | |
523 | break; | |
524 | udelay(1); | |
525 | } while ((status & AR933X_UART_DATA_TX_CSR) == 0); | |
526 | } | |
527 | ||
528 | static void ar933x_uart_console_putchar(struct uart_port *port, int ch) | |
529 | { | |
530 | struct ar933x_uart_port *up = (struct ar933x_uart_port *) port; | |
531 | ||
532 | ar933x_uart_wait_xmitr(up); | |
533 | ar933x_uart_putc(up, ch); | |
534 | } | |
535 | ||
536 | static void ar933x_uart_console_write(struct console *co, const char *s, | |
537 | unsigned int count) | |
538 | { | |
539 | struct ar933x_uart_port *up = ar933x_console_ports[co->index]; | |
540 | unsigned long flags; | |
541 | unsigned int int_en; | |
542 | int locked = 1; | |
543 | ||
544 | local_irq_save(flags); | |
545 | ||
546 | if (up->port.sysrq) | |
547 | locked = 0; | |
548 | else if (oops_in_progress) | |
549 | locked = spin_trylock(&up->port.lock); | |
550 | else | |
551 | spin_lock(&up->port.lock); | |
552 | ||
553 | /* | |
554 | * First save the IER then disable the interrupts | |
555 | */ | |
556 | int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG); | |
557 | ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0); | |
558 | ||
559 | uart_console_write(&up->port, s, count, ar933x_uart_console_putchar); | |
560 | ||
561 | /* | |
562 | * Finally, wait for transmitter to become empty | |
563 | * and restore the IER | |
564 | */ | |
565 | ar933x_uart_wait_xmitr(up); | |
566 | ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en); | |
567 | ||
568 | ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS); | |
569 | ||
570 | if (locked) | |
571 | spin_unlock(&up->port.lock); | |
572 | ||
573 | local_irq_restore(flags); | |
574 | } | |
575 | ||
576 | static int ar933x_uart_console_setup(struct console *co, char *options) | |
577 | { | |
578 | struct ar933x_uart_port *up; | |
579 | int baud = 115200; | |
580 | int bits = 8; | |
581 | int parity = 'n'; | |
582 | int flow = 'n'; | |
583 | ||
584 | if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS) | |
585 | return -EINVAL; | |
586 | ||
587 | up = ar933x_console_ports[co->index]; | |
588 | if (!up) | |
589 | return -ENODEV; | |
590 | ||
591 | if (options) | |
592 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
593 | ||
594 | return uart_set_options(&up->port, co, baud, parity, bits, flow); | |
595 | } | |
596 | ||
597 | static struct console ar933x_uart_console = { | |
598 | .name = "ttyATH", | |
599 | .write = ar933x_uart_console_write, | |
600 | .device = uart_console_device, | |
601 | .setup = ar933x_uart_console_setup, | |
602 | .flags = CON_PRINTBUFFER, | |
603 | .index = -1, | |
604 | .data = &ar933x_uart_driver, | |
605 | }; | |
606 | ||
607 | static void ar933x_uart_add_console_port(struct ar933x_uart_port *up) | |
608 | { | |
609 | ar933x_console_ports[up->port.line] = up; | |
610 | } | |
611 | ||
612 | #define AR933X_SERIAL_CONSOLE (&ar933x_uart_console) | |
613 | ||
614 | #else | |
615 | ||
616 | static inline void ar933x_uart_add_console_port(struct ar933x_uart_port *up) {} | |
617 | ||
618 | #define AR933X_SERIAL_CONSOLE NULL | |
619 | ||
620 | #endif /* CONFIG_SERIAL_AR933X_CONSOLE */ | |
621 | ||
622 | static struct uart_driver ar933x_uart_driver = { | |
623 | .owner = THIS_MODULE, | |
624 | .driver_name = DRIVER_NAME, | |
625 | .dev_name = "ttyATH", | |
626 | .nr = CONFIG_SERIAL_AR933X_NR_UARTS, | |
627 | .cons = AR933X_SERIAL_CONSOLE, | |
628 | }; | |
629 | ||
630 | static int __devinit ar933x_uart_probe(struct platform_device *pdev) | |
631 | { | |
632 | struct ar933x_uart_platform_data *pdata; | |
633 | struct ar933x_uart_port *up; | |
634 | struct uart_port *port; | |
635 | struct resource *mem_res; | |
636 | struct resource *irq_res; | |
2dff8ad9 | 637 | unsigned int baud; |
d57f341b GJ |
638 | int id; |
639 | int ret; | |
640 | ||
641 | pdata = pdev->dev.platform_data; | |
642 | if (!pdata) | |
643 | return -EINVAL; | |
644 | ||
645 | id = pdev->id; | |
646 | if (id == -1) | |
647 | id = 0; | |
648 | ||
649 | if (id > CONFIG_SERIAL_AR933X_NR_UARTS) | |
650 | return -EINVAL; | |
651 | ||
652 | mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
653 | if (!mem_res) { | |
654 | dev_err(&pdev->dev, "no MEM resource\n"); | |
655 | return -EINVAL; | |
656 | } | |
657 | ||
658 | irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
659 | if (!irq_res) { | |
660 | dev_err(&pdev->dev, "no IRQ resource\n"); | |
661 | return -EINVAL; | |
662 | } | |
663 | ||
664 | up = kzalloc(sizeof(struct ar933x_uart_port), GFP_KERNEL); | |
665 | if (!up) | |
666 | return -ENOMEM; | |
667 | ||
668 | port = &up->port; | |
669 | port->mapbase = mem_res->start; | |
670 | ||
671 | port->membase = ioremap(mem_res->start, AR933X_UART_REGS_SIZE); | |
672 | if (!port->membase) { | |
673 | ret = -ENOMEM; | |
674 | goto err_free_up; | |
675 | } | |
676 | ||
677 | port->line = id; | |
678 | port->irq = irq_res->start; | |
679 | port->dev = &pdev->dev; | |
680 | port->type = PORT_AR933X; | |
681 | port->iotype = UPIO_MEM32; | |
682 | port->uartclk = pdata->uartclk; | |
683 | ||
684 | port->regshift = 2; | |
685 | port->fifosize = AR933X_UART_FIFO_SIZE; | |
686 | port->ops = &ar933x_uart_ops; | |
687 | ||
2dff8ad9 GJ |
688 | baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1); |
689 | up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD); | |
690 | ||
691 | baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP); | |
692 | up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD); | |
693 | ||
d57f341b GJ |
694 | ar933x_uart_add_console_port(up); |
695 | ||
696 | ret = uart_add_one_port(&ar933x_uart_driver, &up->port); | |
697 | if (ret) | |
698 | goto err_unmap; | |
699 | ||
700 | platform_set_drvdata(pdev, up); | |
701 | return 0; | |
702 | ||
703 | err_unmap: | |
704 | iounmap(up->port.membase); | |
705 | err_free_up: | |
706 | kfree(up); | |
707 | return ret; | |
708 | } | |
709 | ||
710 | static int __devexit ar933x_uart_remove(struct platform_device *pdev) | |
711 | { | |
712 | struct ar933x_uart_port *up; | |
713 | ||
714 | up = platform_get_drvdata(pdev); | |
715 | platform_set_drvdata(pdev, NULL); | |
716 | ||
717 | if (up) { | |
718 | uart_remove_one_port(&ar933x_uart_driver, &up->port); | |
719 | iounmap(up->port.membase); | |
720 | kfree(up); | |
721 | } | |
722 | ||
723 | return 0; | |
724 | } | |
725 | ||
726 | static struct platform_driver ar933x_uart_platform_driver = { | |
727 | .probe = ar933x_uart_probe, | |
728 | .remove = __devexit_p(ar933x_uart_remove), | |
729 | .driver = { | |
730 | .name = DRIVER_NAME, | |
731 | .owner = THIS_MODULE, | |
732 | }, | |
733 | }; | |
734 | ||
735 | static int __init ar933x_uart_init(void) | |
736 | { | |
737 | int ret; | |
738 | ||
739 | ar933x_uart_driver.nr = CONFIG_SERIAL_AR933X_NR_UARTS; | |
740 | ret = uart_register_driver(&ar933x_uart_driver); | |
741 | if (ret) | |
742 | goto err_out; | |
743 | ||
744 | ret = platform_driver_register(&ar933x_uart_platform_driver); | |
745 | if (ret) | |
746 | goto err_unregister_uart_driver; | |
747 | ||
748 | return 0; | |
749 | ||
750 | err_unregister_uart_driver: | |
751 | uart_unregister_driver(&ar933x_uart_driver); | |
752 | err_out: | |
753 | return ret; | |
754 | } | |
755 | ||
756 | static void __exit ar933x_uart_exit(void) | |
757 | { | |
758 | platform_driver_unregister(&ar933x_uart_platform_driver); | |
759 | uart_unregister_driver(&ar933x_uart_driver); | |
760 | } | |
761 | ||
762 | module_init(ar933x_uart_init); | |
763 | module_exit(ar933x_uart_exit); | |
764 | ||
765 | MODULE_DESCRIPTION("Atheros AR933X UART driver"); | |
766 | MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); | |
767 | MODULE_LICENSE("GPL v2"); | |
768 | MODULE_ALIAS("platform:" DRIVER_NAME); |